blob: 86937903a9b53ce807e60627d929e5f6876e5416 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <linux/types.h>
13#include <linux/interrupt.h>
14#include <linux/pci.h>
15#include <linux/delay.h>
16#include <asm/bootinfo.h>
17
18extern struct pci_ops nile4_pci_ops;
19extern struct pci_ops gt64120_pci_ops;
20static struct resource lasat_pci_mem_resource = {
21 .name = "LASAT PCI MEM",
22 .start = 0x18000000,
23 .end = 0x19FFFFFF,
24 .flags = IORESOURCE_MEM,
25};
26
27static struct resource lasat_pci_io_resource = {
28 .name = "LASAT PCI IO",
29 .start = 0x1a000000,
30 .end = 0x1bFFFFFF,
31 .flags = IORESOURCE_IO,
32};
33
34static struct pci_controller lasat_pci_controller = {
35 .mem_resource = &lasat_pci_mem_resource,
36 .io_resource = &lasat_pci_io_resource,
37};
38
39static int __init lasat_pci_setup(void)
40{
41 printk("PCI: starting\n");
42
43 switch (mips_machtype) {
44 case MACH_LASAT_100:
45 lasat_pci_controller.pci_ops = &gt64120_pci_ops;
46 break;
47 case MACH_LASAT_200:
48 lasat_pci_controller.pci_ops = &nile4_pci_ops;
49 break;
50 default:
51 panic("pcibios_init: mips_machtype incorrect");
52 }
53
54 register_pci_controller(&lasat_pci_controller);
Ralf Baechlec83cfc92005-06-21 13:56:30 +000055
56 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070057}
Ralf Baechlec83cfc92005-06-21 13:56:30 +000058
59arch_initcall(lasat_pci_setup);
Linus Torvalds1da177e2005-04-16 15:20:36 -070060
61#define LASATINT_ETH1 0
62#define LASATINT_ETH0 1
63#define LASATINT_HDC 2
64#define LASATINT_COMP 3
65#define LASATINT_HDLC 4
66#define LASATINT_PCIA 5
67#define LASATINT_PCIB 6
68#define LASATINT_PCIC 7
69#define LASATINT_PCID 8
70
71int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
72{
73 switch (slot) {
74 case 1:
75 return LASATINT_PCIA; /* Expansion Module 0 */
76 case 2:
77 return LASATINT_PCIB; /* Expansion Module 1 */
78 case 3:
79 return LASATINT_PCIC; /* Expansion Module 2 */
80 case 4:
81 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
82 case 5:
83 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
84 case 6:
85 return LASATINT_HDC; /* IDE controller */
86 default:
87 return 0xff; /* Illegal */
88 }
89
90 return -1;
91}
92
93/* Do platform specific device initialization at pci_enable_device() time */
94int pcibios_plat_dev_init(struct pci_dev *dev)
95{
96 return 0;
97}