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Taniya Dasc868a2e2012-01-03 10:18:47 +05301/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Chintan Pandyacf467fc2011-12-01 17:11:11 +05302 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <asm/mach-types.h>
15#include <asm/mach/mmc.h>
16#include <linux/regulator/consumer.h>
17#include <mach/gpio.h>
18#include <mach/gpiomux.h>
19#include <mach/board.h>
20
21#include "devices.h"
22#include "board-msm7627a.h"
23
24#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
25 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
26 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
27 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
28
29static unsigned long vreg_sts, gpio_sts;
30
31struct sdcc_gpio {
32 struct msm_gpio *cfg_data;
33 uint32_t size;
34 struct msm_gpio *sleep_cfg_data;
35};
36
37/**
38 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
39 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
40 * for SDC slots based on timing closure and marginality. SDC1 slot
41 * require higher value since it should handle bad signal quality due
42 * to size of T-flash adapters.
43 */
44static struct msm_gpio sdc1_cfg_data[] = {
45 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
46 "sdc1_dat_3"},
47 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
48 "sdc1_dat_2"},
49 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
50 "sdc1_dat_1"},
51 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
52 "sdc1_dat_0"},
53 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
54 "sdc1_cmd"},
55 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
56 "sdc1_clk"},
57};
58
59static struct msm_gpio sdc2_cfg_data[] = {
60 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
61 "sdc2_clk"},
62 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
63 "sdc2_cmd"},
64 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
65 "sdc2_dat_3"},
66 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
67 "sdc2_dat_2"},
68 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
69 "sdc2_dat_1"},
70 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
71 "sdc2_dat_0"},
72};
73
74static struct msm_gpio sdc2_sleep_cfg_data[] = {
75 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
76 "sdc2_clk"},
77 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
78 "sdc2_cmd"},
79 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
80 "sdc2_dat_3"},
81 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
82 "sdc2_dat_2"},
83 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
84 "sdc2_dat_1"},
85 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
86 "sdc2_dat_0"},
87};
88static struct msm_gpio sdc3_cfg_data[] = {
89 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
90 "sdc3_clk"},
91 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
92 "sdc3_cmd"},
93 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
94 "sdc3_dat_3"},
95 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
96 "sdc3_dat_2"},
97 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
98 "sdc3_dat_1"},
99 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
100 "sdc3_dat_0"},
101#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
102 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
103 "sdc3_dat_7"},
104 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
105 "sdc3_dat_6"},
106 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
107 "sdc3_dat_5"},
108 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
109 "sdc3_dat_4"},
110#endif
111};
112
113static struct msm_gpio sdc4_cfg_data[] = {
114 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
115 "sdc4_dat_3"},
116 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
117 "sdc4_dat_2"},
118 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
119 "sdc4_dat_1"},
120 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
121 "sdc4_cmd"},
122 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
123 "sdc4_dat_0"},
124 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
125 "sdc4_clk"},
126};
127
128static struct sdcc_gpio sdcc_cfg_data[] = {
129 {
130 .cfg_data = sdc1_cfg_data,
131 .size = ARRAY_SIZE(sdc1_cfg_data),
132 },
133 {
134 .cfg_data = sdc2_cfg_data,
135 .size = ARRAY_SIZE(sdc2_cfg_data),
136 .sleep_cfg_data = sdc2_sleep_cfg_data,
137 },
138 {
139 .cfg_data = sdc3_cfg_data,
140 .size = ARRAY_SIZE(sdc3_cfg_data),
141 },
142 {
143 .cfg_data = sdc4_cfg_data,
144 .size = ARRAY_SIZE(sdc4_cfg_data),
145 },
146};
147
148static int gpio_sdc1_hw_det = 85;
149static void gpio_sdc1_config(void)
150{
Taniya Dasc868a2e2012-01-03 10:18:47 +0530151 if (machine_is_msm7627a_qrd1() || machine_is_msm7627a_evb())
Chintan Pandyacf467fc2011-12-01 17:11:11 +0530152 gpio_sdc1_hw_det = 42;
153}
154
155static struct regulator *sdcc_vreg_data[ARRAY_SIZE(sdcc_cfg_data)];
156static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
157{
158 int rc = 0;
159 struct sdcc_gpio *curr;
160
161 curr = &sdcc_cfg_data[dev_id - 1];
162 if (!(test_bit(dev_id, &gpio_sts)^enable))
163 return rc;
164
165 if (enable) {
166 set_bit(dev_id, &gpio_sts);
167 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
168 if (rc)
169 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
170 __func__, dev_id);
171 } else {
172 clear_bit(dev_id, &gpio_sts);
173 if (curr->sleep_cfg_data) {
174 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
175 msm_gpios_free(curr->sleep_cfg_data, curr->size);
176 return rc;
177 }
178 msm_gpios_disable_free(curr->cfg_data, curr->size);
179 }
180 return rc;
181}
182
183static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
184{
185 int rc = 0;
186 struct regulator *curr = sdcc_vreg_data[dev_id - 1];
187
188 if (test_bit(dev_id, &vreg_sts) == enable)
189 return 0;
190
191 if (!curr)
192 return -ENODEV;
193
194 if (IS_ERR(curr))
195 return PTR_ERR(curr);
196
197 if (enable) {
198 set_bit(dev_id, &vreg_sts);
199
200 rc = regulator_enable(curr);
201 if (rc)
202 pr_err("%s: could not enable regulator: %d\n",
203 __func__, rc);
204 } else {
205 clear_bit(dev_id, &vreg_sts);
206
207 rc = regulator_disable(curr);
208 if (rc)
209 pr_err("%s: could not disable regulator: %d\n",
210 __func__, rc);
211 }
212 return rc;
213}
214
215static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
216{
217 int rc = 0;
218 struct platform_device *pdev;
219
220 pdev = container_of(dv, struct platform_device, dev);
221
222 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
223 if (rc)
224 goto out;
225
226 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
227out:
228 return rc;
229}
230
231#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
232 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
233static unsigned int msm7627a_sdcc_slot_status(struct device *dev)
234{
235 int status;
236
237 status = gpio_tlmm_config(GPIO_CFG(gpio_sdc1_hw_det, 2, GPIO_CFG_INPUT,
238 GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
239 GPIO_CFG_ENABLE);
240 if (status)
241 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
242 gpio_sdc1_hw_det);
243
244 status = gpio_request(gpio_sdc1_hw_det, "SD_HW_Detect");
245 if (status) {
246 pr_err("%s:Failed to request GPIO %d\n", __func__,
247 gpio_sdc1_hw_det);
248 } else {
249 status = gpio_direction_input(gpio_sdc1_hw_det);
250 if (!status) {
Taniya Dasc868a2e2012-01-03 10:18:47 +0530251 if (machine_is_msm7627a_qrd1() ||
252 machine_is_msm7627a_evb())
Chintan Pandyacf467fc2011-12-01 17:11:11 +0530253 status = !gpio_get_value(gpio_sdc1_hw_det);
254 else
255 status = gpio_get_value(gpio_sdc1_hw_det);
256 }
257 gpio_free(gpio_sdc1_hw_det);
258 }
259 return status;
260}
261#endif
262
263#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
264static struct mmc_platform_data sdc1_plat_data = {
265 .ocr_mask = MMC_VDD_28_29,
266 .translate_vdd = msm_sdcc_setup_power,
267 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
268 .msmsdcc_fmin = 144000,
269 .msmsdcc_fmid = 24576000,
270 .msmsdcc_fmax = 49152000,
271#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
272 .status = msm7627a_sdcc_slot_status,
273 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
274#endif
275};
276#endif
277
278#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
279static struct mmc_platform_data sdc2_plat_data = {
280 /*
281 * SDC2 supports only 1.8V, claim for 2.85V range is just
282 * for allowing buggy cards who advertise 2.8V even though
283 * they can operate at 1.8V supply.
284 */
285 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
286 .translate_vdd = msm_sdcc_setup_power,
287 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
288#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
289 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
290#endif
291 .msmsdcc_fmin = 144000,
292 .msmsdcc_fmid = 24576000,
293 .msmsdcc_fmax = 49152000,
294#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
295 .dummy52_required = 1,
296#endif
297};
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
301static struct mmc_platform_data sdc3_plat_data = {
302 .ocr_mask = MMC_VDD_28_29,
303 .translate_vdd = msm_sdcc_setup_power,
304#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
305 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
306#else
307 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
308#endif
309 .msmsdcc_fmin = 144000,
310 .msmsdcc_fmid = 24576000,
311 .msmsdcc_fmax = 49152000,
312 .nonremovable = 1,
313};
314#endif
315
316#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
317 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
318static struct mmc_platform_data sdc4_plat_data = {
319 .ocr_mask = MMC_VDD_28_29,
320 .translate_vdd = msm_sdcc_setup_power,
321 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
322 .msmsdcc_fmin = 144000,
323 .msmsdcc_fmid = 24576000,
324 .msmsdcc_fmax = 49152000,
325};
326#endif
327
328static int __init mmc_regulator_init(int sdcc_no, const char *supply, int uV)
329{
330 int rc;
331
332 BUG_ON(sdcc_no < 1 || sdcc_no > 4);
333
334 sdcc_no--;
335
336 sdcc_vreg_data[sdcc_no] = regulator_get(NULL, supply);
337
338 if (IS_ERR(sdcc_vreg_data[sdcc_no])) {
339 rc = PTR_ERR(sdcc_vreg_data[sdcc_no]);
340 pr_err("%s: could not get regulator \"%s\": %d\n",
341 __func__, supply, rc);
342 goto out;
343 }
344
345 rc = regulator_set_voltage(sdcc_vreg_data[sdcc_no], uV, uV);
346
347 if (rc) {
348 pr_err("%s: could not set voltage for \"%s\" to %d uV: %d\n",
349 __func__, supply, uV, rc);
350 goto reg_free;
351 }
352
353 return rc;
354
355reg_free:
356 regulator_put(sdcc_vreg_data[sdcc_no]);
357out:
358 sdcc_vreg_data[sdcc_no] = NULL;
359 return rc;
360}
361
362void __init msm7627a_init_mmc(void)
363{
364 /* eMMC slot */
365#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
366 if (mmc_regulator_init(3, "emmc", 3000000))
367 return;
368 msm_add_sdcc(3, &sdc3_plat_data);
369#endif
370 /* Micro-SD slot */
371#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
372 gpio_sdc1_config();
373 if (mmc_regulator_init(1, "mmc", 2850000))
374 return;
375 sdc1_plat_data.status_irq = MSM_GPIO_TO_INT(gpio_sdc1_hw_det);
376 msm_add_sdcc(1, &sdc1_plat_data);
377#endif
378 /* SDIO WLAN slot */
379#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
380 if (mmc_regulator_init(2, "mmc", 2850000))
381 return;
382 msm_add_sdcc(2, &sdc2_plat_data);
383#endif
384 /* Not Used */
385#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
386 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
387 if (mmc_regulator_init(4, "mmc", 2850000))
388 return;
389 msm_add_sdcc(4, &sdc4_plat_data);
390#endif
391}
392#endif