Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2002,2007-2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #ifndef __ADRENO_RINGBUFFER_H |
| 14 | #define __ADRENO_RINGBUFFER_H |
| 15 | |
| 16 | #define GSL_RB_USE_MEM_RPTR |
| 17 | #define GSL_RB_USE_MEM_TIMESTAMP |
| 18 | #define GSL_DEVICE_SHADOW_MEMSTORE_TO_USER |
| 19 | |
| 20 | /* |
| 21 | * Adreno ringbuffer sizes in bytes - these are converted to |
| 22 | * the appropriate log2 values in the code |
| 23 | */ |
| 24 | |
| 25 | #define KGSL_RB_SIZE (32 * 1024) |
| 26 | #define KGSL_RB_BLKSIZE 16 |
| 27 | |
| 28 | /* CP timestamp register */ |
| 29 | #define REG_CP_TIMESTAMP REG_SCRATCH_REG0 |
| 30 | |
| 31 | |
| 32 | struct kgsl_device; |
| 33 | struct kgsl_device_private; |
| 34 | |
| 35 | #define GSL_RB_MEMPTRS_SCRATCH_COUNT 8 |
| 36 | struct kgsl_rbmemptrs { |
| 37 | int rptr; |
| 38 | int wptr_poll; |
| 39 | }; |
| 40 | |
| 41 | #define GSL_RB_MEMPTRS_RPTR_OFFSET \ |
| 42 | (offsetof(struct kgsl_rbmemptrs, rptr)) |
| 43 | |
| 44 | #define GSL_RB_MEMPTRS_WPTRPOLL_OFFSET \ |
| 45 | (offsetof(struct kgsl_rbmemptrs, wptr_poll)) |
| 46 | |
| 47 | struct adreno_ringbuffer { |
| 48 | struct kgsl_device *device; |
| 49 | uint32_t flags; |
| 50 | |
| 51 | struct kgsl_memdesc buffer_desc; |
| 52 | |
| 53 | struct kgsl_memdesc memptrs_desc; |
| 54 | struct kgsl_rbmemptrs *memptrs; |
| 55 | |
| 56 | /*ringbuffer size */ |
| 57 | unsigned int sizedwords; |
| 58 | |
| 59 | unsigned int wptr; /* write pointer offset in dwords from baseaddr */ |
| 60 | unsigned int rptr; /* read pointer offset in dwords from baseaddr */ |
| 61 | uint32_t timestamp; |
| 62 | }; |
| 63 | |
| 64 | /* dword base address of the GFX decode space */ |
| 65 | #define GSL_HAL_SUBBLOCK_OFFSET(reg) ((unsigned int)((reg) - (0x2000))) |
| 66 | |
| 67 | #define GSL_RB_WRITE(ring, gpuaddr, data) \ |
| 68 | do { \ |
| 69 | writel_relaxed(data, ring); \ |
| 70 | wmb(); \ |
| 71 | kgsl_cffdump_setmem(gpuaddr, data, 4); \ |
| 72 | ring++; \ |
| 73 | gpuaddr += sizeof(uint); \ |
| 74 | } while (0) |
| 75 | |
| 76 | /* timestamp */ |
| 77 | #ifdef GSL_DEVICE_SHADOW_MEMSTORE_TO_USER |
| 78 | #define GSL_RB_USE_MEM_TIMESTAMP |
| 79 | #endif /* GSL_DEVICE_SHADOW_MEMSTORE_TO_USER */ |
| 80 | |
| 81 | #ifdef GSL_RB_USE_MEM_TIMESTAMP |
| 82 | /* enable timestamp (...scratch0) memory shadowing */ |
| 83 | #define GSL_RB_MEMPTRS_SCRATCH_MASK 0x1 |
| 84 | #define GSL_RB_INIT_TIMESTAMP(rb) |
| 85 | |
| 86 | #else |
| 87 | #define GSL_RB_MEMPTRS_SCRATCH_MASK 0x0 |
| 88 | #define GSL_RB_INIT_TIMESTAMP(rb) \ |
| 89 | adreno_regwrite((rb)->device->id, REG_CP_TIMESTAMP, 0) |
| 90 | |
| 91 | #endif /* GSL_RB_USE_MEMTIMESTAMP */ |
| 92 | |
| 93 | /* mem rptr */ |
| 94 | #ifdef GSL_RB_USE_MEM_RPTR |
| 95 | #define GSL_RB_CNTL_NO_UPDATE 0x0 /* enable */ |
| 96 | #define GSL_RB_GET_READPTR(rb, data) \ |
| 97 | do { \ |
| 98 | *(data) = readl_relaxed(&(rb)->memptrs->rptr); \ |
| 99 | } while (0) |
| 100 | #else |
| 101 | #define GSL_RB_CNTL_NO_UPDATE 0x1 /* disable */ |
| 102 | #define GSL_RB_GET_READPTR(rb, data) \ |
| 103 | do { \ |
| 104 | adreno_regread((rb)->device->id, REG_CP_RB_RPTR, (data)); \ |
| 105 | } while (0) |
| 106 | #endif /* GSL_RB_USE_MEMRPTR */ |
| 107 | |
| 108 | #define GSL_RB_CNTL_POLL_EN 0x0 /* disable */ |
| 109 | |
| 110 | int adreno_ringbuffer_issueibcmds(struct kgsl_device_private *dev_priv, |
| 111 | struct kgsl_context *context, |
| 112 | struct kgsl_ibdesc *ibdesc, |
| 113 | unsigned int numibs, |
| 114 | uint32_t *timestamp, |
| 115 | unsigned int flags); |
| 116 | |
| 117 | int adreno_ringbuffer_init(struct kgsl_device *device); |
| 118 | |
| 119 | int adreno_ringbuffer_start(struct adreno_ringbuffer *rb, |
| 120 | unsigned int init_ram); |
| 121 | |
| 122 | int adreno_ringbuffer_stop(struct adreno_ringbuffer *rb); |
| 123 | |
| 124 | int adreno_ringbuffer_close(struct adreno_ringbuffer *rb); |
| 125 | |
| 126 | void adreno_ringbuffer_issuecmds(struct kgsl_device *device, |
| 127 | unsigned int flags, |
| 128 | unsigned int *cmdaddr, |
| 129 | int sizedwords); |
| 130 | |
| 131 | void kgsl_cp_intrcallback(struct kgsl_device *device); |
| 132 | |
| 133 | int adreno_ringbuffer_extract(struct adreno_ringbuffer *rb, |
| 134 | unsigned int *temp_rb_buffer, |
| 135 | int *rb_size); |
| 136 | |
| 137 | void |
| 138 | adreno_ringbuffer_restore(struct adreno_ringbuffer *rb, unsigned int *rb_buff, |
| 139 | int num_rb_contents); |
| 140 | |
| 141 | static inline int adreno_ringbuffer_count(struct adreno_ringbuffer *rb, |
| 142 | unsigned int rptr) |
| 143 | { |
| 144 | if (rb->wptr >= rptr) |
| 145 | return rb->wptr - rptr; |
| 146 | return rb->wptr + rb->sizedwords - rptr; |
| 147 | } |
| 148 | |
| 149 | /* Increment a value by 4 bytes with wrap-around based on size */ |
| 150 | static inline unsigned int adreno_ringbuffer_inc_wrapped(unsigned int val, |
| 151 | unsigned int size) |
| 152 | { |
| 153 | return (val + sizeof(unsigned int)) % size; |
| 154 | } |
| 155 | |
| 156 | #endif /* __ADRENO_RINGBUFFER_H */ |