blob: 1e5fda94d96caeaeffc2786738e6674a51ca52f9 [file] [log] [blame]
Shawn Guo4afbbb72010-12-18 21:39:35 +08001/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
Shawn Guo53b8ff92011-05-31 17:07:03 +080018#include <linux/leds.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080019#include <linux/irq.h>
20#include <linux/clk.h>
21
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/time.h>
25
26#include <mach/common.h>
27#include <mach/iomux-mx28.h>
28
29#include "devices-mx28.h"
Shawn Guo4afbbb72010-12-18 21:39:35 +080030
Shawn Guoacc9cdc2011-03-03 22:13:38 +080031#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
Shawn Guo4afbbb72010-12-18 21:39:35 +080032#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
Shawn Guo53b8ff92011-05-31 17:07:03 +080033#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
Shawn Guo0590a792011-03-08 18:51:10 +080034#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
35#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
Shawn Guo4afbbb72010-12-18 21:39:35 +080036#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
37
Shawn Guo5bb2c822011-02-22 16:50:24 +080038#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
39#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
40#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
41#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
42
Shawn Guo4afbbb72010-12-18 21:39:35 +080043static const iomux_cfg_t mx28evk_pads[] __initconst = {
44 /* duart */
Shawn Guodb63a492011-03-06 00:40:19 +080045 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
46 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080047
Shawn Guo15808182011-02-17 14:28:52 +080048 /* auart0 */
Shawn Guodb63a492011-03-06 00:40:19 +080049 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
50 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
52 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080053 /* auart3 */
Shawn Guodb63a492011-03-06 00:40:19 +080054 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
55 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
56 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
57 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080058
Shawn Guodb63a492011-03-06 00:40:19 +080059#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
Shawn Guo4afbbb72010-12-18 21:39:35 +080060 /* fec0 */
Shawn Guodb63a492011-03-06 00:40:19 +080061 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
62 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
63 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
64 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
65 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
66 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
67 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
68 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
69 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
Shawn Guo48f76ed2011-01-11 20:09:24 +080070 /* fec1 */
Shawn Guodb63a492011-03-06 00:40:19 +080071 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
72 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
73 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
74 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
75 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
76 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
Shawn Guo4afbbb72010-12-18 21:39:35 +080077 /* phy power line */
Shawn Guodb63a492011-03-06 00:40:19 +080078 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080079 /* phy reset line */
Shawn Guodb63a492011-03-06 00:40:19 +080080 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
Shawn Guoacc9cdc2011-03-03 22:13:38 +080081
82 /* flexcan0 */
83 MX28_PAD_GPMI_RDY2__CAN0_TX,
84 MX28_PAD_GPMI_RDY3__CAN0_RX,
85 /* flexcan1 */
86 MX28_PAD_GPMI_CE2N__CAN1_TX,
87 MX28_PAD_GPMI_CE3N__CAN1_RX,
88 /* transceiver power control */
89 MX28_PAD_SSP1_CMD__GPIO_2_13,
Shawn Guo0590a792011-03-08 18:51:10 +080090
91 /* mxsfb (lcdif) */
92 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
93 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
117 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
118 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
119 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
120 /* LCD panel enable */
121 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
122 /* backlight control */
123 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800124 /* mmc0 */
125 MX28_PAD_SSP0_DATA0__SSP0_D0 |
126 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
127 MX28_PAD_SSP0_DATA1__SSP0_D1 |
128 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
129 MX28_PAD_SSP0_DATA2__SSP0_D2 |
130 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
131 MX28_PAD_SSP0_DATA3__SSP0_D3 |
132 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
133 MX28_PAD_SSP0_DATA4__SSP0_D4 |
134 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
135 MX28_PAD_SSP0_DATA5__SSP0_D5 |
136 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
137 MX28_PAD_SSP0_DATA6__SSP0_D6 |
138 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
139 MX28_PAD_SSP0_DATA7__SSP0_D7 |
140 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
141 MX28_PAD_SSP0_CMD__SSP0_CMD |
142 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
143 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
144 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
145 MX28_PAD_SSP0_SCK__SSP0_SCK |
146 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
147 /* write protect */
148 MX28_PAD_SSP1_SCK__GPIO_2_12 |
149 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
150 /* slot power enable */
151 MX28_PAD_PWM3__GPIO_3_28 |
152 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
153
154 /* mmc1 */
155 MX28_PAD_GPMI_D00__SSP1_D0 |
156 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
157 MX28_PAD_GPMI_D01__SSP1_D1 |
158 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
159 MX28_PAD_GPMI_D02__SSP1_D2 |
160 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
161 MX28_PAD_GPMI_D03__SSP1_D3 |
162 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
163 MX28_PAD_GPMI_D04__SSP1_D4 |
164 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
165 MX28_PAD_GPMI_D05__SSP1_D5 |
166 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
167 MX28_PAD_GPMI_D06__SSP1_D6 |
168 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
169 MX28_PAD_GPMI_D07__SSP1_D7 |
170 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
171 MX28_PAD_GPMI_RDY1__SSP1_CMD |
172 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
173 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
174 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
175 MX28_PAD_GPMI_WRN__SSP1_SCK |
176 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
177 /* write protect */
178 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
179 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
180 /* slot power enable */
181 MX28_PAD_PWM4__GPIO_3_29 |
182 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800183
184 /* led */
185 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800186
187 /* saif0 & saif1 */
188 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
189 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
190 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
191 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
192 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
193 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
194 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
195 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
196 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
197 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800198};
199
200/* led */
201static const struct gpio_led mx28evk_leds[] __initconst = {
202 {
203 .name = "GPIO-LED",
204 .default_trigger = "heartbeat",
205 .gpio = MX28EVK_GPIO_LED,
206 },
207};
208
209static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
210 .leds = mx28evk_leds,
211 .num_leds = ARRAY_SIZE(mx28evk_leds),
Shawn Guo4afbbb72010-12-18 21:39:35 +0800212};
213
214/* fec */
215static void __init mx28evk_fec_reset(void)
216{
217 int ret;
218 struct clk *clk;
219
220 /* Enable fec phy clock */
221 clk = clk_get_sys("pll2", NULL);
222 if (!IS_ERR(clk))
223 clk_enable(clk);
224
225 /* Power up fec phy */
226 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
227 if (ret) {
228 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
229 return;
230 }
231
232 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
233 if (ret) {
234 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
235 return;
236 }
237
238 /* Reset fec phy */
239 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
240 if (ret) {
241 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
242 return;
243 }
244
245 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
246 if (ret) {
247 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
248 return;
249 }
250
251 mdelay(1);
252 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
253}
254
Shawn Guoa320b272011-01-14 15:25:52 +0800255static struct fec_platform_data mx28_fec_pdata[] __initdata = {
Shawn Guo48f76ed2011-01-11 20:09:24 +0800256 {
257 /* fec0 */
258 .phy = PHY_INTERFACE_MODE_RMII,
259 }, {
260 /* fec1 */
261 .phy = PHY_INTERFACE_MODE_RMII,
262 },
Shawn Guo4afbbb72010-12-18 21:39:35 +0800263};
264
Shawn Guoa320b272011-01-14 15:25:52 +0800265static int __init mx28evk_fec_get_mac(void)
266{
267 int i;
268 u32 val;
269 const u32 *ocotp = mxs_get_ocotp();
270
271 if (!ocotp)
272 goto error;
273
274 /*
275 * OCOTP only stores the last 4 octets for each mac address,
276 * so hard-code Freescale OUI (00:04:9f) here.
277 */
278 for (i = 0; i < 2; i++) {
279 val = ocotp[i * 4];
280 mx28_fec_pdata[i].mac[0] = 0x00;
281 mx28_fec_pdata[i].mac[1] = 0x04;
282 mx28_fec_pdata[i].mac[2] = 0x9f;
283 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
284 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
285 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
286 }
287
288 return 0;
289
290error:
291 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
292 return -ETIMEDOUT;
293}
294
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800295/*
296 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
297 */
298static int flexcan0_en, flexcan1_en;
299
300static void mx28evk_flexcan_switch(void)
301{
302 if (flexcan0_en || flexcan1_en)
303 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
304 else
305 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
306}
307
308static void mx28evk_flexcan0_switch(int enable)
309{
310 flexcan0_en = enable;
311 mx28evk_flexcan_switch();
312}
313
314static void mx28evk_flexcan1_switch(int enable)
315{
316 flexcan1_en = enable;
317 mx28evk_flexcan_switch();
318}
319
320static const struct flexcan_platform_data
321 mx28evk_flexcan_pdata[] __initconst = {
322 {
323 .transceiver_switch = mx28evk_flexcan0_switch,
324 }, {
325 .transceiver_switch = mx28evk_flexcan1_switch,
326 }
327};
328
Shawn Guo0590a792011-03-08 18:51:10 +0800329/* mxsfb (lcdif) */
330static struct fb_videomode mx28evk_video_modes[] = {
331 {
332 .name = "Seiko-43WVF1G",
333 .refresh = 60,
334 .xres = 800,
335 .yres = 480,
336 .pixclock = 29851, /* picosecond (33.5 MHz) */
337 .left_margin = 89,
338 .right_margin = 164,
339 .upper_margin = 23,
340 .lower_margin = 10,
341 .hsync_len = 10,
342 .vsync_len = 10,
343 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
344 FB_SYNC_DOTCLK_FAILING_ACT,
345 },
346};
347
348static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
349 .mode_list = mx28evk_video_modes,
350 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
351 .default_bpp = 32,
352 .ld_intf_width = STMLCDIF_24BIT,
353};
354
Shawn Guo5bb2c822011-02-22 16:50:24 +0800355static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
356 {
357 /* mmc0 */
358 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
359 .flags = SLOTF_8_BIT_CAPABLE,
360 }, {
361 /* mmc1 */
362 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
363 .flags = SLOTF_8_BIT_CAPABLE,
364 },
365};
366
Shawn Guo4afbbb72010-12-18 21:39:35 +0800367static void __init mx28evk_init(void)
368{
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800369 int ret;
370
Shawn Guo4afbbb72010-12-18 21:39:35 +0800371 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
372
373 mx28_add_duart();
Shawn Guo15808182011-02-17 14:28:52 +0800374 mx28_add_auart0();
375 mx28_add_auart3();
Shawn Guo4afbbb72010-12-18 21:39:35 +0800376
Shawn Guoa320b272011-01-14 15:25:52 +0800377 if (mx28evk_fec_get_mac())
378 pr_warn("%s: failed on fec mac setup\n", __func__);
379
Shawn Guo4afbbb72010-12-18 21:39:35 +0800380 mx28evk_fec_reset();
Shawn Guo48f76ed2011-01-11 20:09:24 +0800381 mx28_add_fec(0, &mx28_fec_pdata[0]);
382 mx28_add_fec(1, &mx28_fec_pdata[1]);
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800383
384 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
385 "flexcan-switch");
386 if (ret) {
387 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
388 } else {
389 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
390 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
391 }
Shawn Guo0590a792011-03-08 18:51:10 +0800392
393 ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
394 if (ret)
395 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
396 else
397 gpio_set_value(MX28EVK_LCD_ENABLE, 1);
398
399 ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
400 if (ret)
401 pr_warn("failed to request gpio bl-enable: %d\n", ret);
402 else
403 gpio_set_value(MX28EVK_BL_ENABLE, 1);
404
405 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800406
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800407 mx28_add_saif(0);
408 mx28_add_saif(1);
409
Shawn Guo5bb2c822011-02-22 16:50:24 +0800410 /* power on mmc slot by writing 0 to the gpio */
Fabio Estevamc7dae182011-03-29 16:45:09 -0300411 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800412 "mmc0-slot-power");
413 if (ret)
414 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
415 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
416
Fabio Estevamc7dae182011-03-29 16:45:09 -0300417 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800418 "mmc1-slot-power");
419 if (ret)
420 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
421 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
Shawn Guo53b8ff92011-05-31 17:07:03 +0800422
423 gpio_led_register_device(0, &mx28evk_led_data);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800424}
425
426static void __init mx28evk_timer_init(void)
427{
428 mx28_clocks_init();
429}
430
431static struct sys_timer mx28evk_timer = {
432 .init = mx28evk_timer_init,
433};
434
435MACHINE_START(MX28EVK, "Freescale MX28 EVK")
436 /* Maintainer: Freescale Semiconductor, Inc. */
437 .map_io = mx28_map_io,
438 .init_irq = mx28_init_irq,
439 .init_machine = mx28evk_init,
440 .timer = &mx28evk_timer,
441MACHINE_END