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Changhwan Youn2b12b5c2010-07-26 21:08:52 +09001/* linux/arch/arm/mach-s5pv310/cpu.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/sched.h>
12#include <linux/sysdev.h>
13
14#include <asm/mach/map.h>
15#include <asm/mach/irq.h>
16
17#include <asm/proc-fns.h>
Kyungmin Park1cf0eb72010-10-21 15:22:36 +090018#include <asm/hardware/cache-l2x0.h>
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090019
20#include <plat/cpu.h>
21#include <plat/clock.h>
22#include <plat/s5pv310.h>
Hyuk Lee1036c3a2010-10-05 19:07:41 +090023#include <plat/sdhci.h>
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090024
25#include <mach/regs-irq.h>
26
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090027extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
28 unsigned int irq_start);
29extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
30
31/* Initial IO mappings */
32static struct map_desc s5pv310_iodesc[] __initdata = {
33 {
Changhwan Youn766211e2010-08-27 17:57:44 +090034 .virtual = (unsigned long)S5P_VA_SYSRAM,
35 .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
36 .length = SZ_4K,
37 .type = MT_DEVICE,
38 }, {
Kukjin Kimc598c472010-08-18 21:45:49 +090039 .virtual = (unsigned long)S5P_VA_CMU,
40 .pfn = __phys_to_pfn(S5PV310_PA_CMU),
41 .length = SZ_128K,
42 .type = MT_DEVICE,
Kukjin Kim19a2c062010-08-31 16:30:51 +090043 }, {
44 .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
45 .pfn = __phys_to_pfn(S5PV310_PA_COMBINER),
46 .length = SZ_4K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
50 .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
51 .length = SZ_8K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_L2CC,
55 .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
Jongpill Lee37ea63b2010-10-14 15:46:18 +090059 .virtual = (unsigned long)S5P_VA_GPIO1,
Kukjin Kimfe0cdec2010-09-09 21:57:29 +090060 .pfn = __phys_to_pfn(S5PV310_PA_GPIO1),
Kukjin Kim19a2c062010-08-31 16:30:51 +090061 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
Jongpill Lee37ea63b2010-10-14 15:46:18 +090064 .virtual = (unsigned long)S5P_VA_GPIO2,
65 .pfn = __phys_to_pfn(S5PV310_PA_GPIO2),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (unsigned long)S5P_VA_GPIO3,
70 .pfn = __phys_to_pfn(S5PV310_PA_GPIO3),
71 .length = SZ_256,
72 .type = MT_DEVICE,
73 }, {
Kukjin Kim19a2c062010-08-31 16:30:51 +090074 .virtual = (unsigned long)S3C_VA_UART,
75 .pfn = __phys_to_pfn(S3C_PA_UART),
76 .length = SZ_512K,
77 .type = MT_DEVICE,
Daein Moon09596ba2010-10-25 16:30:40 +090078 }, {
79 .virtual = (unsigned long)S5P_VA_SROMC,
80 .pfn = __phys_to_pfn(S5PV310_PA_SROMC),
81 .length = SZ_4K,
82 .type = MT_DEVICE,
Changhwan Youn766211e2010-08-27 17:57:44 +090083 },
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090084};
85
86static void s5pv310_idle(void)
87{
88 if (!need_resched())
89 cpu_do_idle();
90
91 local_irq_enable();
92}
93
94/* s5pv310_map_io
95 *
96 * register the standard cpu IO areas
97*/
98void __init s5pv310_map_io(void)
99{
100 iotable_init(s5pv310_iodesc, ARRAY_SIZE(s5pv310_iodesc));
Hyuk Lee1036c3a2010-10-05 19:07:41 +0900101
102 /* initialize device information early */
103 s5pv310_default_sdhci0();
104 s5pv310_default_sdhci1();
105 s5pv310_default_sdhci2();
106 s5pv310_default_sdhci3();
Changhwan Youn2b12b5c2010-07-26 21:08:52 +0900107}
108
109void __init s5pv310_init_clocks(int xtal)
110{
111 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
112
113 s3c24xx_register_baseclocks(xtal);
114 s5p_register_clocks(xtal);
115 s5pv310_register_clocks();
116 s5pv310_setup_clocks();
117}
118
119void __init s5pv310_init_irq(void)
120{
121 int irq;
122
Russell Kingb580b892010-12-04 15:55:14 +0000123 gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
Changhwan Youn2b12b5c2010-07-26 21:08:52 +0900124
125 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
126 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
127 COMBINER_IRQ(irq, 0));
128 combiner_cascade_irq(irq, IRQ_SPI(irq));
129 }
130
131 /* The parameters of s5p_init_irq() are for VIC init.
132 * Theses parameters should be NULL and 0 because S5PV310
133 * uses GIC instead of VIC.
134 */
135 s5p_init_irq(NULL, 0);
136}
137
138struct sysdev_class s5pv310_sysclass = {
139 .name = "s5pv310-core",
140};
141
142static struct sys_device s5pv310_sysdev = {
143 .cls = &s5pv310_sysclass,
144};
145
146static int __init s5pv310_core_init(void)
147{
148 return sysdev_class_register(&s5pv310_sysclass);
149}
150
151core_initcall(s5pv310_core_init);
152
Kyungmin Park1cf0eb72010-10-21 15:22:36 +0900153#ifdef CONFIG_CACHE_L2X0
154static int __init s5pv310_l2x0_cache_init(void)
155{
156 /* TAG, Data Latency Control: 2cycle */
157 __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
158 __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
159
160 /* L2X0 Prefetch Control */
161 __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);
162
163 /* L2X0 Power Control */
164 __raw_writel(L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN,
165 S5P_VA_L2CC + L2X0_POWER_CTRL);
166
167 l2x0_init(S5P_VA_L2CC, 0x7C070001, 0xC200ffff);
168
169 return 0;
170}
171
172early_initcall(s5pv310_l2x0_cache_init);
173#endif
174
Changhwan Youn2b12b5c2010-07-26 21:08:52 +0900175int __init s5pv310_init(void)
176{
177 printk(KERN_INFO "S5PV310: Initializing architecture\n");
178
179 /* set idle function */
180 pm_idle = s5pv310_idle;
181
182 return sysdev_register(&s5pv310_sysdev);
183}