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review.evervolv.com / android_kernel_htc_msm8960 / cc39cb15a62c7e515557edcc3aea20cc62ffb13b / . / arch / powerpc / boot / dts / mpc8272ads.dts
blob: 260b2e447779f5c672ed686dac183416b8864529 [file] [log] [blame]
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]1/*
2 * MPC8272 ADS Device Tree Source
3 *
4 * Copyright 2005 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8272ADS";
14 compatible = "MPC8260ADS";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 linux,phandle = <100>;
18
19 cpus {
20 #cpus = <1>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23 linux,phandle = <200>;
24
25 PowerPC,8272@0 {
26 device_type = "cpu";
27 reg = <0>;
28 d-cache-line-size = <20>; // 32 bytes
29 i-cache-line-size = <20>; // 32 bytes
30 d-cache-size = <4000>; // L1, 16K
31 i-cache-size = <4000>; // L1, 16K
32 timebase-frequency = <0>;
33 bus-frequency = <0>;
34 clock-frequency = <0>;
35 32-bit;
36 linux,phandle = <201>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]37 };
38 };
39
40 interrupt-controller@f8200000 {
41 linux,phandle = <f8200000>;
42 #address-cells = <0>;
43 #interrupt-cells = <2>;
44 interrupt-controller;
45 reg = <f8200000 f8200004>;
46 built-in;
47 device_type = "pci-pic";
48 };
49 memory {
50 device_type = "memory";
51 linux,phandle = <300>;
52 reg = <00000000 4000000 f4500000 00000020>;
53 };
54
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]55 chosen {
56 name = "chosen";
57 linux,platform = <0>;
58 interrupt-controller = <10c00>;
59 linux,phandle = <400>;
60 };
61
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]62 soc8272@f0000000 {
63 #address-cells = <1>;
64 #size-cells = <1>;
65 #interrupt-cells = <2>;
66 device_type = "soc";
Vitaly Bordug54278282007-01-31 02:09:00 +0300[diff] [blame]67 ranges = <00000000 f0000000 00053000>;
68 reg = <f0000000 10000>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]69
70 mdio@0 {
71 device_type = "mdio";
72 compatible = "fs_enet";
73 reg = <0 0>;
74 linux,phandle = <24520>;
75 #address-cells = <1>;
76 #size-cells = <0>;
77 ethernet-phy@0 {
78 linux,phandle = <2452000>;
79 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]80 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]81 reg = <0>;
82 bitbang = [ 12 12 13 02 02 01 ];
83 device_type = "ethernet-phy";
84 };
85 ethernet-phy@1 {
86 linux,phandle = <2452001>;
87 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]88 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]89 bitbang = [ 12 12 13 02 02 01 ];
90 reg = <3>;
91 device_type = "ethernet-phy";
92 };
93 };
94
95 ethernet@24000 {
96 #address-cells = <1>;
97 #size-cells = <0>;
98 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]99 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]100 compatible = "fs_enet";
101 model = "FCC";
102 reg = <11300 20 8400 100 11380 30>;
103 mac-address = [ 00 11 2F 99 43 54 ];
104 interrupts = <20 2>;
105 interrupt-parent = <10c00>;
106 phy-handle = <2452000>;
107 rx-clock = <13>;
108 tx-clock = <12>;
109 };
110
111 ethernet@25000 {
112 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]113 device-id = <2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]114 compatible = "fs_enet";
115 model = "FCC";
116 reg = <11320 20 8500 100 113b0 30>;
117 mac-address = [ 00 11 2F 99 44 54 ];
118 interrupts = <21 2>;
119 interrupt-parent = <10c00>;
120 phy-handle = <2452001>;
121 rx-clock = <17>;
122 tx-clock = <18>;
123 };
124
125 cpm@f0000000 {
126 linux,phandle = <f0000000>;
127 #address-cells = <1>;
128 #size-cells = <1>;
129 #interrupt-cells = <2>;
130 device_type = "cpm";
131 model = "CPM2";
Vitaly Bordug54278282007-01-31 02:09:00 +0300[diff] [blame]132 ranges = <00000000 00000000 20000>;
133 reg = <0 20000>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]134 command-proc = <119c0>;
135 brg-frequency = <17D7840>;
136 cpm_clk = <BEBC200>;
137
138 scc@11a00 {
139 device_type = "serial";
140 compatible = "cpm_uart";
141 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]142 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]143 reg = <11a00 20 8000 100>;
144 current-speed = <1c200>;
145 interrupts = <28 2>;
146 interrupt-parent = <10c00>;
147 clock-setup = <0 00ffffff>;
148 rx-clock = <1>;
149 tx-clock = <1>;
150 };
151
152 scc@11a60 {
153 device_type = "serial";
154 compatible = "cpm_uart";
155 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]156 device-id = <4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]157 reg = <11a60 20 8300 100>;
158 current-speed = <1c200>;
159 interrupts = <2b 2>;
160 interrupt-parent = <10c00>;
161 clock-setup = <1b ffffff00>;
162 rx-clock = <4>;
163 tx-clock = <4>;
164 };
165
166 };
167 interrupt-controller@10c00 {
168 linux,phandle = <10c00>;
169 #address-cells = <0>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 reg = <10c00 80>;
173 built-in;
174 device_type = "cpm-pic";
175 compatible = "CPM2";
176 };
177 pci@0500 {
178 linux,phandle = <0500>;
179 #interrupt-cells = <1>;
180 #size-cells = <2>;
181 #address-cells = <3>;
182 compatible = "8272";
183 device_type = "pci";
184 reg = <10430 4dc>;
185 clock-frequency = <3f940aa>;
186 interrupt-map-mask = <f800 0 0 7>;
187 interrupt-map = <
188
189 /* IDSEL 0x16 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]190 b000 0 0 1 f8200000 40 8
191 b000 0 0 2 f8200000 41 8
192 b000 0 0 3 f8200000 42 8
193 b000 0 0 4 f8200000 43 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]194
195 /* IDSEL 0x17 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]196 b800 0 0 1 f8200000 43 8
197 b800 0 0 2 f8200000 40 8
198 b800 0 0 3 f8200000 41 8
199 b800 0 0 4 f8200000 42 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]200
201 /* IDSEL 0x18 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]202 c000 0 0 1 f8200000 42 8
203 c000 0 0 2 f8200000 43 8
204 c000 0 0 3 f8200000 40 8
205 c000 0 0 4 f8200000 41 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]206 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]207 interrupts = <14 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]208 bus-range = <0 0>;
209 ranges = <02000000 0 80000000 80000000 0 40000000
210 01000000 0 00000000 f6000000 0 02000000>;
211 };
212
213/* May need to remove if on a part without crypto engine */
214 crypto@30000 {
215 device_type = "crypto";
216 model = "SEC2";
217 compatible = "talitos";
218 reg = <30000 10000>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]219 interrupts = <b 2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]220 interrupt-parent = <10c00>;
221 num-channels = <4>;
222 channel-fifo-len = <18>;
223 exec-units-mask = <0000007e>;
224/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
225 descriptor-types-mask = <01010ebf>;
226 };
227
228 };
229};