Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-arm/arch-ixp4xx/nas100d.h |
| 3 | * |
| 4 | * NAS100D platform specific definitions |
| 5 | * |
| 6 | * Copyright (c) 2005 Tower Technologies |
| 7 | * |
| 8 | * Author: Alessandro Zummo <a.zummo@towertech.it> |
| 9 | * |
| 10 | * based on ixdp425.h: |
| 11 | * Copyright 2004 (c) MontaVista, Software, Inc. |
| 12 | * |
Michael-Luke Jones | cc50a0d | 2007-05-23 22:41:53 +0100 | [diff] [blame^] | 13 | * This file is licensed under the terms of the GNU General Public |
Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 14 | * License version 2. This program is licensed "as is" without any |
| 15 | * warranty of any kind, whether express or implied. |
| 16 | */ |
| 17 | |
| 18 | #ifndef __ASM_ARCH_HARDWARE_H__ |
| 19 | #error "Do not include this directly, instead #include <asm/hardware.h>" |
| 20 | #endif |
| 21 | |
Alessandro Zummo | af898b8 | 2006-02-22 21:12:06 +0000 | [diff] [blame] | 22 | #define NAS100D_SDA_PIN 5 |
| 23 | #define NAS100D_SCL_PIN 6 |
Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 24 | |
| 25 | /* |
| 26 | * NAS100D PCI IRQs |
| 27 | */ |
| 28 | #define NAS100D_PCI_MAX_DEV 3 |
| 29 | #define NAS100D_PCI_IRQ_LINES 3 |
| 30 | |
| 31 | |
| 32 | /* PCI controller GPIO to IRQ pin mappings */ |
| 33 | #define NAS100D_PCI_INTA_PIN 11 |
| 34 | #define NAS100D_PCI_INTB_PIN 10 |
| 35 | #define NAS100D_PCI_INTC_PIN 9 |
| 36 | #define NAS100D_PCI_INTD_PIN 8 |
| 37 | #define NAS100D_PCI_INTE_PIN 7 |
| 38 | |
Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 39 | /* Buttons */ |
| 40 | |
Michael-Luke Jones | cc50a0d | 2007-05-23 22:41:53 +0100 | [diff] [blame^] | 41 | #define NAS100D_PB_GPIO 14 |
| 42 | #define NAS100D_RB_GPIO 4 |
| 43 | #define NAS100D_PO_GPIO 12 /* power off */ |
Rod Whitby | 3145d8a | 2006-01-04 17:17:11 +0000 | [diff] [blame] | 44 | |
| 45 | #define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14 |
| 46 | #define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4 |
| 47 | |
| 48 | /* |
| 49 | #define NAS100D_PB_BM (1L << NAS100D_PB_GPIO) |
| 50 | #define NAS100D_PO_BM (1L << NAS100D_PO_GPIO) |
| 51 | #define NAS100D_RB_BM (1L << NAS100D_RB_GPIO) |
| 52 | */ |