blob: c1da16ad07e7d785bb6434d6b70e03555cd2b49e [file] [log] [blame]
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001/*
Michael Krufky6ca04de2007-11-23 16:52:15 -03002 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
Michael Krufky5bea1cd2007-10-22 09:56:38 -03003
Michael Krufky59067f72008-01-02 01:58:26 -03004 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
Michael Krufky5bea1cd2007-10-22 09:56:38 -03005
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
Michael Krufky5bea1cd2007-10-22 09:56:38 -030021#include <linux/delay.h>
22#include <linux/videodev2.h>
Michael Krufky6ca04de2007-11-23 16:52:15 -030023#include "tda18271-priv.h"
Michael Krufky5bea1cd2007-10-22 09:56:38 -030024
Michael Krufkyb5f3e1e2007-12-02 16:36:05 -030025int tda18271_debug;
Michael Krufky54465b02007-11-23 18:14:53 -030026module_param_named(debug, tda18271_debug, int, 0644);
Michael Krufky0e1fab92008-01-03 01:40:47 -030027MODULE_PARM_DESC(debug, "set debug level "
28 "(info=1, map=2, reg=4, adv=8 (or-able))");
Michael Krufky5bea1cd2007-10-22 09:56:38 -030029
Michael Krufky5bea1cd2007-10-22 09:56:38 -030030/*---------------------------------------------------------------------*/
31
Michael Krufky09f83c42008-01-05 20:00:09 -030032static int tda18271_ir_cal_init(struct dvb_frontend *fe)
Michael Krufkyefce8412007-12-01 17:40:16 -030033{
34 struct tda18271_priv *priv = fe->tuner_priv;
35 unsigned char *regs = priv->tda18271_regs;
36
37 tda18271_read_regs(fe);
38
39 /* test IR_CAL_OK to see if we need init */
40 if ((regs[R_EP1] & 0x08) == 0)
41 tda18271_init_regs(fe);
42
43 return 0;
44}
45
Michael Krufky255b5112008-01-01 22:52:09 -030046/* ------------------------------------------------------------------ */
47
48static int tda18271_channel_configuration(struct dvb_frontend *fe,
49 u32 ifc, u32 freq, u32 bw, u8 std)
50{
51 struct tda18271_priv *priv = fe->tuner_priv;
52 unsigned char *regs = priv->tda18271_regs;
53 u32 N;
54
55 /* update TV broadcast parameters */
56
57 /* set standard */
58 regs[R_EP3] &= ~0x1f; /* clear std bits */
59 regs[R_EP3] |= std;
60
61 /* set cal mode to normal */
62 regs[R_EP4] &= ~0x03;
63
64 /* update IF output level & IF notch frequency */
65 regs[R_EP4] &= ~0x1c; /* clear if level bits */
66
67 switch (priv->mode) {
68 case TDA18271_ANALOG:
69 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
70 break;
71 case TDA18271_DIGITAL:
72 regs[R_EP4] |= 0x04; /* IF level = 1 */
73 regs[R_MPD] |= 0x80; /* IF notch = 1 */
74 break;
75 }
76 regs[R_EP4] &= ~0x80; /* FM_RFn: turn this bit on only for fm radio */
77
78 /* update RF_TOP / IF_TOP */
79 switch (priv->mode) {
80 case TDA18271_ANALOG:
81 regs[R_EB22] = 0x2c;
82 break;
83 case TDA18271_DIGITAL:
84 regs[R_EB22] = 0x37;
85 break;
86 }
87 tda18271_write_regs(fe, R_EB22, 1);
88
89 /* --------------------------------------------------------------- */
90
91 /* disable Power Level Indicator */
92 regs[R_EP1] |= 0x40;
93
94 /* frequency dependent parameters */
95
96 tda18271_calc_ir_measure(fe, &freq);
97
98 tda18271_calc_bp_filter(fe, &freq);
99
100 tda18271_calc_rf_band(fe, &freq);
101
102 tda18271_calc_gain_taper(fe, &freq);
103
104 /* --------------------------------------------------------------- */
105
106 /* dual tuner and agc1 extra configuration */
107
108 /* main vco when Master, cal vco when slave */
109 regs[R_EB1] |= 0x04; /* FIXME: assumes master */
110
111 /* agc1 always active */
112 regs[R_EB1] &= ~0x02;
113
114 /* agc1 has priority on agc2 */
115 regs[R_EB1] &= ~0x01;
116
117 tda18271_write_regs(fe, R_EB1, 1);
118
119 /* --------------------------------------------------------------- */
120
121 N = freq + ifc;
122
123 /* FIXME: assumes master */
124 tda18271_calc_main_pll(fe, N);
125 tda18271_write_regs(fe, R_MPD, 4);
126
127 tda18271_write_regs(fe, R_TM, 7);
128
129 /* main pll charge pump source */
130 regs[R_EB4] |= 0x20;
131 tda18271_write_regs(fe, R_EB4, 1);
132
133 msleep(1);
134
135 /* normal operation for the main pll */
136 regs[R_EB4] &= ~0x20;
137 tda18271_write_regs(fe, R_EB4, 1);
138
139 msleep(5);
140
141 return 0;
142}
143
144static int tda18271_read_thermometer(struct dvb_frontend *fe)
145{
146 struct tda18271_priv *priv = fe->tuner_priv;
147 unsigned char *regs = priv->tda18271_regs;
148 int tm;
149
150 /* switch thermometer on */
151 regs[R_TM] |= 0x10;
152 tda18271_write_regs(fe, R_TM, 1);
153
154 /* read thermometer info */
155 tda18271_read_regs(fe);
156
157 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
158 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
159
160 if ((regs[R_TM] & 0x20) == 0x20)
161 regs[R_TM] &= ~0x20;
162 else
163 regs[R_TM] |= 0x20;
164
165 tda18271_write_regs(fe, R_TM, 1);
166
167 msleep(10); /* temperature sensing */
168
169 /* read thermometer info */
170 tda18271_read_regs(fe);
171 }
172
173 tm = tda18271_lookup_thermometer(fe);
174
175 /* switch thermometer off */
176 regs[R_TM] &= ~0x10;
177 tda18271_write_regs(fe, R_TM, 1);
178
179 /* set CAL mode to normal */
180 regs[R_EP4] &= ~0x03;
181 tda18271_write_regs(fe, R_EP4, 1);
182
183 return tm;
184}
185
186static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
Michael Krufky09f83c42008-01-05 20:00:09 -0300187 u32 freq)
Michael Krufky255b5112008-01-01 22:52:09 -0300188{
189 struct tda18271_priv *priv = fe->tuner_priv;
190 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
191 unsigned char *regs = priv->tda18271_regs;
192 int tm_current, rfcal_comp, approx, i;
193 u8 dc_over_dt, rf_tab;
194
195 /* power up */
196 regs[R_EP3] &= ~0xe0; /* sm = 0, sm_lt = 0, sm_xt = 0 */
197 tda18271_write_regs(fe, R_EP3, 1);
198
199 /* read die current temperature */
200 tm_current = tda18271_read_thermometer(fe);
201
202 /* frequency dependent parameters */
203
204 tda18271_calc_rf_cal(fe, &freq);
205 rf_tab = regs[R_EB14];
206
207 i = tda18271_lookup_rf_band(fe, &freq, NULL);
208 if (i < 0)
209 return -EINVAL;
210
211 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
212 approx = map[i].rf_a1 *
213 (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
214 } else {
215 approx = map[i].rf_a2 *
216 (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
217 }
218
219 if (approx < 0)
220 approx = 0;
221 if (approx > 255)
222 approx = 255;
223
224 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
225
226 /* calculate temperature compensation */
Michael Krufky09f83c42008-01-05 20:00:09 -0300227 rfcal_comp = dc_over_dt * (tm_current - priv->tm_rfcal);
Michael Krufky255b5112008-01-01 22:52:09 -0300228
229 regs[R_EB14] = approx + rfcal_comp;
230 tda18271_write_regs(fe, R_EB14, 1);
231
232 return 0;
233}
234
235static int tda18271_por(struct dvb_frontend *fe)
236{
237 struct tda18271_priv *priv = fe->tuner_priv;
238 unsigned char *regs = priv->tda18271_regs;
239
240 /* power up detector 1 */
241 regs[R_EB12] &= ~0x20;
242 tda18271_write_regs(fe, R_EB12, 1);
243
244 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
245 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
246 tda18271_write_regs(fe, R_EB18, 1);
247
248 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
249
250 /* POR mode */
251 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
252 regs[R_EP3] |= 0x80; /* sm = 1, sm_lt = 0, sm_xt = 0 */
253 tda18271_write_regs(fe, R_EP3, 1);
254
255 /* disable 1.5 MHz low pass filter */
256 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
257 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
258 tda18271_write_regs(fe, R_EB21, 3);
259
260 return 0;
261}
262
263static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
264{
265 struct tda18271_priv *priv = fe->tuner_priv;
266 unsigned char *regs = priv->tda18271_regs;
267 u32 N;
268
269 /* set CAL mode to normal */
270 regs[R_EP4] &= ~0x03;
271 tda18271_write_regs(fe, R_EP4, 1);
272
273 /* switch off agc1 */
274 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
275
276 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
277 tda18271_write_regs(fe, R_EB18, 1);
278
279 /* frequency dependent parameters */
280
281 tda18271_calc_bp_filter(fe, &freq);
282 tda18271_calc_gain_taper(fe, &freq);
283 tda18271_calc_rf_band(fe, &freq);
284 tda18271_calc_km(fe, &freq);
285
286 tda18271_write_regs(fe, R_EP1, 3);
287 tda18271_write_regs(fe, R_EB13, 1);
288
289 /* main pll charge pump source */
290 regs[R_EB4] |= 0x20;
291 tda18271_write_regs(fe, R_EB4, 1);
292
293 /* cal pll charge pump source */
294 regs[R_EB7] |= 0x20;
295 tda18271_write_regs(fe, R_EB7, 1);
296
297 /* force dcdc converter to 0 V */
298 regs[R_EB14] = 0x00;
299 tda18271_write_regs(fe, R_EB14, 1);
300
301 /* disable plls lock */
302 regs[R_EB20] &= ~0x20;
303 tda18271_write_regs(fe, R_EB20, 1);
304
305 /* set CAL mode to RF tracking filter calibration */
306 regs[R_EP4] |= 0x03;
307 tda18271_write_regs(fe, R_EP4, 2);
308
309 /* --------------------------------------------------------------- */
310
311 /* set the internal calibration signal */
312 N = freq;
313
314 tda18271_calc_main_pll(fe, N);
315 tda18271_write_regs(fe, R_MPD, 4);
316
317 /* downconvert internal calibration */
318 N += 1000000;
319
320 tda18271_calc_main_pll(fe, N);
321 tda18271_write_regs(fe, R_MPD, 4);
322
323 msleep(5);
324
325 tda18271_write_regs(fe, R_EP2, 1);
326 tda18271_write_regs(fe, R_EP1, 1);
327 tda18271_write_regs(fe, R_EP2, 1);
328 tda18271_write_regs(fe, R_EP1, 1);
329
330 /* --------------------------------------------------------------- */
331
332 /* normal operation for the main pll */
333 regs[R_EB4] &= ~0x20;
334 tda18271_write_regs(fe, R_EB4, 1);
335
336 /* normal operation for the cal pll */
337 regs[R_EB7] &= ~0x20;
338 tda18271_write_regs(fe, R_EB7, 1);
339
340 msleep(5); /* plls locking */
341
342 /* launch the rf tracking filters calibration */
343 regs[R_EB20] |= 0x20;
344 tda18271_write_regs(fe, R_EB20, 1);
345
346 msleep(60); /* calibration */
347
348 /* --------------------------------------------------------------- */
349
350 /* set CAL mode to normal */
351 regs[R_EP4] &= ~0x03;
352
353 /* switch on agc1 */
354 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
355
356 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
357 tda18271_write_regs(fe, R_EB18, 1);
358
359 tda18271_write_regs(fe, R_EP3, 2);
360
361 /* synchronization */
362 tda18271_write_regs(fe, R_EP1, 1);
363
364 /* get calibration result */
365 tda18271_read_extended(fe);
366
367 return regs[R_EB14];
368}
369
370static int tda18271_powerscan(struct dvb_frontend *fe,
371 u32 *freq_in, u32 *freq_out)
372{
373 struct tda18271_priv *priv = fe->tuner_priv;
374 unsigned char *regs = priv->tda18271_regs;
375 int sgn, bcal, count, wait;
376 u8 cid_target;
377 u16 count_limit;
378 u32 freq;
379
380 freq = *freq_in;
381
382 tda18271_calc_rf_band(fe, &freq);
383 tda18271_calc_rf_cal(fe, &freq);
384 tda18271_calc_gain_taper(fe, &freq);
385 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
386
387 tda18271_write_regs(fe, R_EP2, 1);
388 tda18271_write_regs(fe, R_EB14, 1);
389
390 /* downconvert frequency */
391 freq += 1000000;
392
393 tda18271_calc_main_pll(fe, freq);
394 tda18271_write_regs(fe, R_MPD, 4);
395
396 msleep(5); /* pll locking */
397
398 /* detection mode */
399 regs[R_EP4] &= ~0x03;
400 regs[R_EP4] |= 0x01;
401 tda18271_write_regs(fe, R_EP4, 1);
402
403 /* launch power detection measurement */
404 tda18271_write_regs(fe, R_EP2, 1);
405
406 /* read power detection info, stored in EB10 */
407 tda18271_read_extended(fe);
408
409 /* algorithm initialization */
410 sgn = 1;
411 *freq_out = *freq_in;
412 bcal = 0;
413 count = 0;
414 wait = false;
415
416 while ((regs[R_EB10] & 0x3f) < cid_target) {
417 /* downconvert updated freq to 1 MHz */
418 freq = *freq_in + (sgn * count) + 1000000;
419
420 tda18271_calc_main_pll(fe, freq);
421 tda18271_write_regs(fe, R_MPD, 4);
422
423 if (wait) {
424 msleep(5); /* pll locking */
425 wait = false;
426 } else
427 udelay(100); /* pll locking */
428
429 /* launch power detection measurement */
430 tda18271_write_regs(fe, R_EP2, 1);
431
432 /* read power detection info, stored in EB10 */
433 tda18271_read_extended(fe);
434
435 count += 200;
436
437 if (count < count_limit)
438 continue;
439
440 if (sgn <= 0)
441 break;
442
443 sgn = -1 * sgn;
444 count = 200;
445 wait = true;
446 }
447
448 if ((regs[R_EB10] & 0x3f) >= cid_target) {
449 bcal = 1;
450 *freq_out = freq - 1000000;
451 } else
452 bcal = 0;
453
454 tda_dbg("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
455 bcal, *freq_in, *freq_out, freq);
456
457 return bcal;
458}
459
460static int tda18271_powerscan_init(struct dvb_frontend *fe)
461{
462 struct tda18271_priv *priv = fe->tuner_priv;
463 unsigned char *regs = priv->tda18271_regs;
464
465 /* set standard to digital */
466 regs[R_EP3] &= ~0x1f; /* clear std bits */
467 regs[R_EP3] |= 0x12;
468
469 /* set cal mode to normal */
470 regs[R_EP4] &= ~0x03;
471
472 /* update IF output level & IF notch frequency */
473 regs[R_EP4] &= ~0x1c; /* clear if level bits */
474
475 tda18271_write_regs(fe, R_EP3, 2);
476
477 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
478 tda18271_write_regs(fe, R_EB18, 1);
479
480 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
481
482 /* 1.5 MHz low pass filter */
483 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
484 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
485
486 tda18271_write_regs(fe, R_EB21, 3);
487
488 return 0;
489}
490
491static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
492{
493 struct tda18271_priv *priv = fe->tuner_priv;
494 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
495 unsigned char *regs = priv->tda18271_regs;
496 int bcal, rf, i;
497#define RF1 0
498#define RF2 1
499#define RF3 2
500 u32 rf_default[3];
501 u32 rf_freq[3];
502 u8 prog_cal[3];
503 u8 prog_tab[3];
504
505 i = tda18271_lookup_rf_band(fe, &freq, NULL);
506
507 if (i < 0)
508 return i;
509
510 rf_default[RF1] = 1000 * map[i].rf1_def;
511 rf_default[RF2] = 1000 * map[i].rf2_def;
512 rf_default[RF3] = 1000 * map[i].rf3_def;
513
514 for (rf = RF1; rf <= RF3; rf++) {
515 if (0 == rf_default[rf])
516 return 0;
517 tda_dbg("freq = %d, rf = %d\n", freq, rf);
518
519 /* look for optimized calibration frequency */
520 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
521
522 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
523 prog_tab[rf] = regs[R_EB14];
524
525 if (1 == bcal)
526 prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
527 else
528 prog_cal[rf] = prog_tab[rf];
529
530 switch (rf) {
531 case RF1:
532 map[i].rf_a1 = 0;
533 map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
534 map[i].rf1 = rf_freq[RF1] / 1000;
535 break;
536 case RF2:
537 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
538 prog_cal[RF1] + prog_tab[RF1]) /
539 ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
540 map[i].rf2 = rf_freq[RF2] / 1000;
541 break;
542 case RF3:
543 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
544 prog_cal[RF2] + prog_tab[RF2]) /
545 ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
546 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
547 map[i].rf3 = rf_freq[RF3] / 1000;
548 break;
549 default:
550 BUG();
551 }
552 }
553
554 return 0;
555}
556
Michael Krufky09f83c42008-01-05 20:00:09 -0300557static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
Michael Krufky255b5112008-01-01 22:52:09 -0300558{
559 struct tda18271_priv *priv = fe->tuner_priv;
560 unsigned int i;
561
562 tda_info("tda18271: performing RF tracking filter calibration\n");
563
564 /* wait for die temperature stabilization */
565 msleep(200);
566
567 tda18271_powerscan_init(fe);
568
569 /* rf band calibration */
570 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
571 tda18271_rf_tracking_filters_init(fe, 1000 *
572 priv->rf_cal_state[i].rfmax);
573
Michael Krufky09f83c42008-01-05 20:00:09 -0300574 priv->tm_rfcal = tda18271_read_thermometer(fe);
Michael Krufky255b5112008-01-01 22:52:09 -0300575
576 return 0;
577}
578
579/* ------------------------------------------------------------------ */
580
Michael Krufky09f83c42008-01-05 20:00:09 -0300581static int tda18271_rf_cal_init(struct dvb_frontend *fe)
Michael Krufky255b5112008-01-01 22:52:09 -0300582{
583 struct tda18271_priv *priv = fe->tuner_priv;
584
585 if (priv->cal_initialized)
586 return 0;
587
Michael Krufky09f83c42008-01-05 20:00:09 -0300588 tda18271_calc_rf_filter_curve(fe);
Michael Krufky255b5112008-01-01 22:52:09 -0300589
590 tda18271_por(fe);
591
592 priv->cal_initialized = true;
593
594 return 0;
595}
596
Michael Krufky09f83c42008-01-05 20:00:09 -0300597static int tda18271_init(struct dvb_frontend *fe)
598{
599 struct tda18271_priv *priv = fe->tuner_priv;
600
601 /* initialization */
602 tda18271_ir_cal_init(fe);
603
604 if (priv->id == TDA18271HDC2)
605 tda18271_rf_cal_init(fe);
606
607 return 0;
608}
609
Michael Krufky255b5112008-01-01 22:52:09 -0300610static int tda18271c2_tune(struct dvb_frontend *fe,
611 u32 ifc, u32 freq, u32 bw, u8 std)
612{
Michael Krufky255b5112008-01-01 22:52:09 -0300613 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
614
Michael Krufky09f83c42008-01-05 20:00:09 -0300615 tda18271_init(fe);
Michael Krufky255b5112008-01-01 22:52:09 -0300616
Michael Krufky09f83c42008-01-05 20:00:09 -0300617 tda18271_rf_tracking_filters_correction(fe, freq);
Michael Krufky255b5112008-01-01 22:52:09 -0300618
619 tda18271_channel_configuration(fe, ifc, freq, bw, std);
620
621 return 0;
622}
623
624/* ------------------------------------------------------------------ */
625
626static int tda18271c1_tune(struct dvb_frontend *fe,
627 u32 ifc, u32 freq, u32 bw, u8 std)
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300628{
629 struct tda18271_priv *priv = fe->tuner_priv;
630 unsigned char *regs = priv->tda18271_regs;
Michael Krufkyfe0bf6d2007-12-24 05:05:05 -0300631 u32 N = 0;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300632
Michael Krufky14572632007-12-02 02:32:49 -0300633 tda18271_init(fe);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300634
Michael Krufky182519f2007-12-25 15:10:11 -0300635 tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300636
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300637 /* RF tracking filter calibration */
638
Michael Krufky255b5112008-01-01 22:52:09 -0300639 /* calculate bp filter */
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300640 tda18271_calc_bp_filter(fe, &freq);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300641 tda18271_write_regs(fe, R_EP1, 1);
642
643 regs[R_EB4] &= 0x07;
644 regs[R_EB4] |= 0x60;
645 tda18271_write_regs(fe, R_EB4, 1);
646
647 regs[R_EB7] = 0x60;
648 tda18271_write_regs(fe, R_EB7, 1);
649
650 regs[R_EB14] = 0x00;
651 tda18271_write_regs(fe, R_EB14, 1);
652
653 regs[R_EB20] = 0xcc;
654 tda18271_write_regs(fe, R_EB20, 1);
655
Michael Krufky255b5112008-01-01 22:52:09 -0300656 /* set cal mode to RF tracking filter calibration */
Michael Krufky26501a72007-12-21 14:28:46 -0300657 regs[R_EP4] |= 0x03;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300658
Michael Krufky255b5112008-01-01 22:52:09 -0300659 /* calculate cal pll */
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300660
661 switch (priv->mode) {
662 case TDA18271_ANALOG:
663 N = freq - 1250000;
664 break;
665 case TDA18271_DIGITAL:
666 N = freq + bw / 2;
667 break;
668 }
669
Michael Krufkyfe0bf6d2007-12-24 05:05:05 -0300670 tda18271_calc_cal_pll(fe, N);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300671
Michael Krufky255b5112008-01-01 22:52:09 -0300672 /* calculate main pll */
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300673
674 switch (priv->mode) {
675 case TDA18271_ANALOG:
676 N = freq - 250000;
677 break;
678 case TDA18271_DIGITAL:
679 N = freq + bw / 2 + 1000000;
680 break;
681 }
682
Michael Krufkyfe0bf6d2007-12-24 05:05:05 -0300683 tda18271_calc_main_pll(fe, N);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300684
685 tda18271_write_regs(fe, R_EP3, 11);
686 msleep(5); /* RF tracking filter calibration initialization */
687
Michael Krufky255b5112008-01-01 22:52:09 -0300688 /* search for K,M,CO for RF calibration */
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300689 tda18271_calc_km(fe, &freq);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300690 tda18271_write_regs(fe, R_EB13, 1);
691
Michael Krufky255b5112008-01-01 22:52:09 -0300692 /* search for rf band */
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300693 tda18271_calc_rf_band(fe, &freq);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300694
Michael Krufky255b5112008-01-01 22:52:09 -0300695 /* search for gain taper */
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300696 tda18271_calc_gain_taper(fe, &freq);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300697
698 tda18271_write_regs(fe, R_EP2, 1);
699 tda18271_write_regs(fe, R_EP1, 1);
700 tda18271_write_regs(fe, R_EP2, 1);
701 tda18271_write_regs(fe, R_EP1, 1);
702
703 regs[R_EB4] &= 0x07;
704 regs[R_EB4] |= 0x40;
705 tda18271_write_regs(fe, R_EB4, 1);
706
707 regs[R_EB7] = 0x40;
708 tda18271_write_regs(fe, R_EB7, 1);
709 msleep(10);
710
711 regs[R_EB20] = 0xec;
712 tda18271_write_regs(fe, R_EB20, 1);
713 msleep(60); /* RF tracking filter calibration completion */
714
715 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
716 tda18271_write_regs(fe, R_EP4, 1);
717
718 tda18271_write_regs(fe, R_EP1, 1);
719
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300720 /* RF tracking filter correction for VHF_Low band */
721 if (0 == tda18271_calc_rf_cal(fe, &freq))
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300722 tda18271_write_regs(fe, R_EB14, 1);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300723
724 /* Channel Configuration */
725
726 switch (priv->mode) {
727 case TDA18271_ANALOG:
728 regs[R_EB22] = 0x2c;
729 break;
730 case TDA18271_DIGITAL:
731 regs[R_EB22] = 0x37;
732 break;
733 }
734 tda18271_write_regs(fe, R_EB22, 1);
735
736 regs[R_EP1] |= 0x40; /* set dis power level on */
737
738 /* set standard */
739 regs[R_EP3] &= ~0x1f; /* clear std bits */
740
741 /* see table 22 */
742 regs[R_EP3] |= std;
743
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300744 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
745
746 regs[R_EP4] &= ~0x1c; /* clear if level bits */
747 switch (priv->mode) {
748 case TDA18271_ANALOG:
749 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
750 break;
751 case TDA18271_DIGITAL:
752 regs[R_EP4] |= 0x04;
753 regs[R_MPD] |= 0x80;
754 break;
755 }
756
757 regs[R_EP4] &= ~0x80; /* turn this bit on only for fm */
758
Michael Krufkyb92bf0f2007-12-25 18:54:22 -0300759 /* image rejection validity */
760 tda18271_calc_ir_measure(fe, &freq);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300761
762 /* calculate MAIN PLL */
763 N = freq + ifc;
764
Michael Krufkyfe0bf6d2007-12-24 05:05:05 -0300765 tda18271_calc_main_pll(fe, N);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300766
767 tda18271_write_regs(fe, R_TM, 15);
768 msleep(5);
Michael Krufky6ca04de2007-11-23 16:52:15 -0300769
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300770 return 0;
771}
772
Michael Krufkyccbac9b2008-01-06 00:55:21 -0300773static inline int tda18271_tune(struct dvb_frontend *fe,
774 u32 ifc, u32 freq, u32 bw, u8 std)
775{
776 struct tda18271_priv *priv = fe->tuner_priv;
777 int ret = -EINVAL;
778
779 switch (priv->id) {
780 case TDA18271HDC1:
781 ret = tda18271c1_tune(fe, ifc, freq, bw, std);
782 break;
783 case TDA18271HDC2:
784 ret = tda18271c2_tune(fe, ifc, freq, bw, std);
785 break;
786 }
787 return ret;
788}
789
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300790/* ------------------------------------------------------------------ */
791
792static int tda18271_set_params(struct dvb_frontend *fe,
793 struct dvb_frontend_parameters *params)
794{
795 struct tda18271_priv *priv = fe->tuner_priv;
Michael Krufkyf21e0d72008-01-02 03:01:54 -0300796 struct tda18271_std_map *std_map = &priv->std;
Michael Krufkyccbac9b2008-01-06 00:55:21 -0300797 int ret;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300798 u8 std;
Michael Krufky2ba65d52008-01-03 01:17:45 -0300799 u16 sgIF;
800 u32 bw, freq = params->frequency;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300801
802 priv->mode = TDA18271_DIGITAL;
803
804 /* see table 22 */
805 if (fe->ops.info.type == FE_ATSC) {
806 switch (params->u.vsb.modulation) {
807 case VSB_8:
808 case VSB_16:
Michael Krufky255b5112008-01-01 22:52:09 -0300809 std = std_map->atsc_6.std_bits;
810 sgIF = std_map->atsc_6.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300811 break;
812 case QAM_64:
813 case QAM_256:
Michael Krufky255b5112008-01-01 22:52:09 -0300814 std = std_map->qam_6.std_bits;
815 sgIF = std_map->qam_6.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300816 break;
817 default:
Michael Krufky182519f2007-12-25 15:10:11 -0300818 tda_warn("modulation not set!\n");
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300819 return -EINVAL;
820 }
Michael Krufky14e3c152007-12-07 00:33:08 -0300821#if 0
822 /* userspace request is already center adjusted */
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300823 freq += 1750000; /* Adjust to center (+1.75MHZ) */
Michael Krufky14e3c152007-12-07 00:33:08 -0300824#endif
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300825 bw = 6000000;
826 } else if (fe->ops.info.type == FE_OFDM) {
827 switch (params->u.ofdm.bandwidth) {
828 case BANDWIDTH_6_MHZ:
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300829 bw = 6000000;
Michael Krufky255b5112008-01-01 22:52:09 -0300830 std = std_map->dvbt_6.std_bits;
831 sgIF = std_map->dvbt_6.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300832 break;
833 case BANDWIDTH_7_MHZ:
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300834 bw = 7000000;
Michael Krufky255b5112008-01-01 22:52:09 -0300835 std = std_map->dvbt_7.std_bits;
836 sgIF = std_map->dvbt_7.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300837 break;
838 case BANDWIDTH_8_MHZ:
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300839 bw = 8000000;
Michael Krufky255b5112008-01-01 22:52:09 -0300840 std = std_map->dvbt_8.std_bits;
841 sgIF = std_map->dvbt_8.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300842 break;
843 default:
Michael Krufky182519f2007-12-25 15:10:11 -0300844 tda_warn("bandwidth not set!\n");
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300845 return -EINVAL;
846 }
847 } else {
Michael Krufky182519f2007-12-25 15:10:11 -0300848 tda_warn("modulation type not supported!\n");
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300849 return -EINVAL;
850 }
851
Michael Krufkyccbac9b2008-01-06 00:55:21 -0300852 ret = tda18271_tune(fe, sgIF * 1000, freq, bw, std);
853
854 if (ret < 0)
855 goto fail;
856
857 priv->frequency = freq;
858 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ?
859 params->u.ofdm.bandwidth : 0;
860fail:
861 return ret;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300862}
863
864static int tda18271_set_analog_params(struct dvb_frontend *fe,
865 struct analog_parameters *params)
866{
867 struct tda18271_priv *priv = fe->tuner_priv;
Michael Krufkyf21e0d72008-01-02 03:01:54 -0300868 struct tda18271_std_map *std_map = &priv->std;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300869 char *mode;
Michael Krufkyccbac9b2008-01-06 00:55:21 -0300870 int ret;
Michael Krufky95af8a22008-01-01 18:31:34 -0300871 u8 std;
Michael Krufky2ba65d52008-01-03 01:17:45 -0300872 u16 sgIF;
873 u32 freq = params->frequency * 62500;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300874
875 priv->mode = TDA18271_ANALOG;
876
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300877 if (params->std & V4L2_STD_MN) {
Michael Krufky255b5112008-01-01 22:52:09 -0300878 std = std_map->atv_mn.std_bits;
879 sgIF = std_map->atv_mn.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300880 mode = "MN";
881 } else if (params->std & V4L2_STD_B) {
Michael Krufky255b5112008-01-01 22:52:09 -0300882 std = std_map->atv_b.std_bits;
883 sgIF = std_map->atv_b.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300884 mode = "B";
885 } else if (params->std & V4L2_STD_GH) {
Michael Krufky255b5112008-01-01 22:52:09 -0300886 std = std_map->atv_gh.std_bits;
887 sgIF = std_map->atv_gh.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300888 mode = "GH";
889 } else if (params->std & V4L2_STD_PAL_I) {
Michael Krufky255b5112008-01-01 22:52:09 -0300890 std = std_map->atv_i.std_bits;
891 sgIF = std_map->atv_i.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300892 mode = "I";
893 } else if (params->std & V4L2_STD_DK) {
Michael Krufky255b5112008-01-01 22:52:09 -0300894 std = std_map->atv_dk.std_bits;
895 sgIF = std_map->atv_dk.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300896 mode = "DK";
897 } else if (params->std & V4L2_STD_SECAM_L) {
Michael Krufky255b5112008-01-01 22:52:09 -0300898 std = std_map->atv_l.std_bits;
899 sgIF = std_map->atv_l.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300900 mode = "L";
901 } else if (params->std & V4L2_STD_SECAM_LC) {
Michael Krufky255b5112008-01-01 22:52:09 -0300902 std = std_map->atv_lc.std_bits;
903 sgIF = std_map->atv_lc.if_freq;
Michael Krufky95af8a22008-01-01 18:31:34 -0300904 mode = "L'";
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300905 } else {
Michael Krufky255b5112008-01-01 22:52:09 -0300906 std = std_map->atv_i.std_bits;
907 sgIF = std_map->atv_i.if_freq;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300908 mode = "xx";
909 }
910
Michael Krufky182519f2007-12-25 15:10:11 -0300911 tda_dbg("setting tda18271 to system %s\n", mode);
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300912
Michael Krufkyccbac9b2008-01-06 00:55:21 -0300913 ret = tda18271_tune(fe, sgIF * 1000, freq, 0, std);
914
915 if (ret < 0)
916 goto fail;
917
918 priv->frequency = freq;
919 priv->bandwidth = 0;
920fail:
921 return ret;
Michael Krufky5bea1cd2007-10-22 09:56:38 -0300922}
923
924static int tda18271_release(struct dvb_frontend *fe)
925{
926 kfree(fe->tuner_priv);
927 fe->tuner_priv = NULL;
928 return 0;
929}
930
931static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
932{
933 struct tda18271_priv *priv = fe->tuner_priv;
934 *frequency = priv->frequency;
935 return 0;
936}
937
938static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
939{
940 struct tda18271_priv *priv = fe->tuner_priv;
941 *bandwidth = priv->bandwidth;
942 return 0;
943}
944
Michael Krufkyf21e0d72008-01-02 03:01:54 -0300945/* ------------------------------------------------------------------ */
946
947#define tda18271_update_std(std_cfg, name) do { \
948 if (map->std_cfg.if_freq + map->std_cfg.std_bits > 0) { \
949 tda_dbg("Using custom std config for %s\n", name); \
950 memcpy(&std->std_cfg, &map->std_cfg, \
951 sizeof(struct tda18271_std_map_item)); \
952 } } while (0)
953
954#define tda18271_dump_std_item(std_cfg, name) do { \
955 tda_dbg("(%s) if freq = %d, std bits = 0x%02x\n", \
956 name, std->std_cfg.if_freq, std->std_cfg.std_bits); \
957 } while (0)
958
959static int tda18271_dump_std_map(struct dvb_frontend *fe)
960{
961 struct tda18271_priv *priv = fe->tuner_priv;
962 struct tda18271_std_map *std = &priv->std;
963
964 tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
965 tda18271_dump_std_item(atv_b, "pal b");
966 tda18271_dump_std_item(atv_dk, "pal dk");
967 tda18271_dump_std_item(atv_gh, "pal gh");
968 tda18271_dump_std_item(atv_i, "pal i");
969 tda18271_dump_std_item(atv_l, "pal l");
970 tda18271_dump_std_item(atv_lc, "pal l'");
971 tda18271_dump_std_item(atv_mn, "atv mn");
972 tda18271_dump_std_item(atsc_6, "atsc 6");
973 tda18271_dump_std_item(dvbt_6, "dvbt 6");
974 tda18271_dump_std_item(dvbt_7, "dvbt 7");
975 tda18271_dump_std_item(dvbt_8, "dvbt 8");
976 tda18271_dump_std_item(qam_6, "qam 6");
977 tda18271_dump_std_item(qam_8, "qam 8");
978
979 return 0;
980}
981
982static int tda18271_update_std_map(struct dvb_frontend *fe,
983 struct tda18271_std_map *map)
984{
985 struct tda18271_priv *priv = fe->tuner_priv;
986 struct tda18271_std_map *std = &priv->std;
987
988 if (!map)
989 return -EINVAL;
990
991 tda18271_update_std(atv_b, "atv b");
992 tda18271_update_std(atv_dk, "atv dk");
993 tda18271_update_std(atv_gh, "atv gh");
994 tda18271_update_std(atv_i, "atv i");
995 tda18271_update_std(atv_l, "atv l");
996 tda18271_update_std(atv_lc, "atv l'");
997 tda18271_update_std(atv_mn, "atv mn");
998 tda18271_update_std(atsc_6, "atsc 6");
999 tda18271_update_std(dvbt_6, "dvbt 6");
1000 tda18271_update_std(dvbt_7, "dvbt 7");
1001 tda18271_update_std(dvbt_8, "dvbt 8");
1002 tda18271_update_std(qam_6, "qam 6");
1003 tda18271_update_std(qam_8, "qam 8");
1004
1005 return 0;
1006}
1007
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001008static int tda18271_get_id(struct dvb_frontend *fe)
1009{
1010 struct tda18271_priv *priv = fe->tuner_priv;
1011 unsigned char *regs = priv->tda18271_regs;
1012 char *name;
1013 int ret = 0;
1014
1015 tda18271_read_regs(fe);
1016
1017 switch (regs[R_ID] & 0x7f) {
1018 case 3:
1019 name = "TDA18271HD/C1";
Michael Krufky255b5112008-01-01 22:52:09 -03001020 priv->id = TDA18271HDC1;
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001021 break;
1022 case 4:
1023 name = "TDA18271HD/C2";
Michael Krufky255b5112008-01-01 22:52:09 -03001024 priv->id = TDA18271HDC2;
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001025 break;
1026 default:
1027 name = "Unknown device";
1028 ret = -EINVAL;
1029 break;
1030 }
1031
Michael Krufky182519f2007-12-25 15:10:11 -03001032 tda_info("%s detected @ %d-%04x%s\n", name,
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001033 i2c_adapter_id(priv->i2c_adap), priv->i2c_addr,
1034 (0 == ret) ? "" : ", device not supported.");
1035
1036 return ret;
1037}
1038
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001039static struct dvb_tuner_ops tda18271_tuner_ops = {
1040 .info = {
1041 .name = "NXP TDA18271HD",
1042 .frequency_min = 45000000,
1043 .frequency_max = 864000000,
1044 .frequency_step = 62500
1045 },
Michael Krufkyefce8412007-12-01 17:40:16 -03001046 .init = tda18271_init,
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001047 .set_params = tda18271_set_params,
1048 .set_analog_params = tda18271_set_analog_params,
1049 .release = tda18271_release,
1050 .get_frequency = tda18271_get_frequency,
1051 .get_bandwidth = tda18271_get_bandwidth,
1052};
1053
1054struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
Michael Krufkye435f952007-12-09 22:23:30 -03001055 struct i2c_adapter *i2c,
Michael Krufkyf21e0d72008-01-02 03:01:54 -03001056 struct tda18271_config *cfg)
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001057{
1058 struct tda18271_priv *priv = NULL;
1059
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001060 priv = kzalloc(sizeof(struct tda18271_priv), GFP_KERNEL);
1061 if (priv == NULL)
1062 return NULL;
1063
1064 priv->i2c_addr = addr;
1065 priv->i2c_adap = i2c;
Michael Krufkyf21e0d72008-01-02 03:01:54 -03001066 priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
Michael Krufky255b5112008-01-01 22:52:09 -03001067 priv->cal_initialized = false;
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001068
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001069 fe->tuner_priv = priv;
1070
1071 if (tda18271_get_id(fe) < 0)
1072 goto fail;
1073
Michael Krufky255b5112008-01-01 22:52:09 -03001074 if (tda18271_assign_map_layout(fe) < 0)
1075 goto fail;
1076
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001077 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1078 sizeof(struct dvb_tuner_ops));
1079
Michael Krufkyf21e0d72008-01-02 03:01:54 -03001080 /* override default std map with values in config struct */
1081 if ((cfg) && (cfg->std_map))
1082 tda18271_update_std_map(fe, cfg->std_map);
1083
1084 if (tda18271_debug & DBG_MAP)
1085 tda18271_dump_std_map(fe);
1086
Michael Krufkyefce8412007-12-01 17:40:16 -03001087 tda18271_init_regs(fe);
1088
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001089 return fe;
Michael Krufky49e7aaf2007-12-24 04:15:20 -03001090fail:
1091 tda18271_release(fe);
1092 return NULL;
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001093}
1094EXPORT_SYMBOL_GPL(tda18271_attach);
1095MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1096MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1097MODULE_LICENSE("GPL");
Michael Krufky255b5112008-01-01 22:52:09 -03001098MODULE_VERSION("0.2");
Michael Krufky5bea1cd2007-10-22 09:56:38 -03001099
1100/*
1101 * Overrides for Emacs so that we follow Linus's tabbing style.
1102 * ---------------------------------------------------------------------------
1103 * Local variables:
1104 * c-basic-offset: 8
1105 * End:
1106 */