| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. | 
 | 3 |  * | 
 | 4 |  * This program is free software; you can redistribute it and/or modify | 
 | 5 |  * it under the terms of the GNU General Public License as published by | 
 | 6 |  * the Free Software Foundation; either version 2 of the License, or | 
 | 7 |  * (at your option) any later version. | 
 | 8 |  * | 
 | 9 |  * This program is distributed in the hope that it will be useful, | 
 | 10 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 11 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 12 |  * GNU General Public License for more details. | 
 | 13 |  * | 
 | 14 |  * You should have received a copy of the GNU General Public License along | 
 | 15 |  * with this program; if not, write to the Free Software Foundation, Inc., | 
 | 16 |  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | 
 | 17 |  */ | 
 | 18 |  | 
 | 19 | #include <linux/kernel.h> | 
 | 20 | #include <linux/init.h> | 
 | 21 | #include <linux/irq.h> | 
 | 22 | #include <linux/io.h> | 
 | 23 |  | 
 | 24 | #include <mach/mxs.h> | 
 | 25 | #include <mach/common.h> | 
 | 26 |  | 
 | 27 | #define HW_ICOLL_VECTOR				0x0000 | 
 | 28 | #define HW_ICOLL_LEVELACK			0x0010 | 
 | 29 | #define HW_ICOLL_CTRL				0x0020 | 
 | 30 | #define HW_ICOLL_INTERRUPTn_SET(n)		(0x0124 + (n) * 0x10) | 
 | 31 | #define HW_ICOLL_INTERRUPTn_CLR(n)		(0x0128 + (n) * 0x10) | 
 | 32 | #define BM_ICOLL_INTERRUPTn_ENABLE		0x00000004 | 
 | 33 | #define BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0	0x1 | 
 | 34 |  | 
 | 35 | static void __iomem *icoll_base = MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR); | 
 | 36 |  | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 37 | static void icoll_ack_irq(struct irq_data *d) | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 38 | { | 
 | 39 | 	/* | 
 | 40 | 	 * The Interrupt Collector is able to prioritize irqs. | 
 | 41 | 	 * Currently only level 0 is used. So acking can use | 
 | 42 | 	 * BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0 unconditionally. | 
 | 43 | 	 */ | 
 | 44 | 	__raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0, | 
 | 45 | 			icoll_base + HW_ICOLL_LEVELACK); | 
 | 46 | } | 
 | 47 |  | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 48 | static void icoll_mask_irq(struct irq_data *d) | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 49 | { | 
 | 50 | 	__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 51 | 			icoll_base + HW_ICOLL_INTERRUPTn_CLR(d->irq)); | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 52 | } | 
 | 53 |  | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 54 | static void icoll_unmask_irq(struct irq_data *d) | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 55 | { | 
 | 56 | 	__raw_writel(BM_ICOLL_INTERRUPTn_ENABLE, | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 57 | 			icoll_base + HW_ICOLL_INTERRUPTn_SET(d->irq)); | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 58 | } | 
 | 59 |  | 
 | 60 | static struct irq_chip mxs_icoll_chip = { | 
| Uwe Kleine-König | bf0c111 | 2011-02-18 21:31:41 +0100 | [diff] [blame] | 61 | 	.irq_ack = icoll_ack_irq, | 
 | 62 | 	.irq_mask = icoll_mask_irq, | 
 | 63 | 	.irq_unmask = icoll_unmask_irq, | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 64 | }; | 
 | 65 |  | 
 | 66 | void __init icoll_init_irq(void) | 
 | 67 | { | 
 | 68 | 	int i; | 
 | 69 |  | 
 | 70 | 	/* | 
 | 71 | 	 * Interrupt Collector reset, which initializes the priority | 
 | 72 | 	 * for each irq to level 0. | 
 | 73 | 	 */ | 
 | 74 | 	mxs_reset_block(icoll_base + HW_ICOLL_CTRL); | 
 | 75 |  | 
 | 76 | 	for (i = 0; i < MXS_INTERNAL_IRQS; i++) { | 
| Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 77 | 		irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq); | 
| Shawn Guo | 289569f | 2010-12-18 21:39:28 +0800 | [diff] [blame] | 78 | 		set_irq_flags(i, IRQF_VALID); | 
 | 79 | 	} | 
 | 80 | } |