| H. J. Lu | 36d57ac | 2005-09-06 15:16:49 -0700 | [diff] [blame] | 1 | #ifndef __ASM_SH_AUXVEC_H |
| 2 | #define __ASM_SH_AUXVEC_H |
| 3 | |
| Paul Mundt | 19f9a34 | 2006-09-27 18:33:49 +0900 | [diff] [blame] | 4 | /* |
| 5 | * Architecture-neutral AT_ values in 0-17, leave some room |
| 6 | * for more of them. |
| 7 | */ |
| 8 | |
| 9 | #ifdef CONFIG_VSYSCALL |
| 10 | /* |
| 11 | * Only define this in the vsyscall case, the entry point to |
| 12 | * the vsyscall page gets placed here. The kernel will attempt |
| 13 | * to build a gate VMA we don't care about otherwise.. |
| 14 | */ |
| 15 | #define AT_SYSINFO_EHDR 33 |
| 16 | #endif |
| 17 | |
| Paul Mundt | cd01204 | 2007-12-10 15:50:28 +0900 | [diff] [blame^] | 18 | /* |
| 19 | * More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the |
| 20 | * value is -1, then the cache doesn't exist. Otherwise: |
| 21 | * |
| 22 | * bit 0-3: Cache set-associativity; 0 means fully associative. |
| 23 | * bit 4-7: Log2 of cacheline size. |
| 24 | * bit 8-31: Size of the entire cache >> 8. |
| 25 | */ |
| 26 | #define AT_L1I_CACHESHAPE 34 |
| 27 | #define AT_L1D_CACHESHAPE 35 |
| 28 | #define AT_L2_CACHESHAPE 36 |
| 29 | |
| H. J. Lu | 36d57ac | 2005-09-06 15:16:49 -0700 | [diff] [blame] | 30 | #endif /* __ASM_SH_AUXVEC_H */ |