blob: a22f8da2acbc84e701e9b20923f743f956e59408 [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070021#include <linux/wait.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053022#include <linux/mfd/wcd9xxx/core.h>
23#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
24#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
25#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053026#include <sound/pcm.h>
27#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <sound/soc.h>
29#include <sound/soc-dapm.h>
30#include <sound/tlv.h>
31#include <linux/bitops.h>
32#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080033#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070034#include <linux/kernel.h>
35#include <linux/gpio.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036#include "wcd9310.h"
37
Joonwoo Parkc1c67a92012-08-07 16:05:36 -070038static int cfilt_adjust_ms = 10;
39module_param(cfilt_adjust_ms, int, 0644);
40MODULE_PARM_DESC(cfilt_adjust_ms, "delay after adjusting cfilt voltage in ms");
41
Kiran Kandi1e6371d2012-03-29 11:48:57 -070042#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
43 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
44 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
45
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070046
47#define NUM_DECIMATORS 10
48#define NUM_INTERPOLATORS 7
49#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080050#define TABLA_CFILT_FAST_MODE 0x00
51#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080052#define MBHC_FW_READ_ATTEMPTS 15
53#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070054
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070055#define SLIM_CLOSE_TIMEOUT 1000
56
Joonwoo Park03324832012-03-19 19:36:16 -070057enum {
58 MBHC_USE_HPHL_TRIGGER = 1,
59 MBHC_USE_MB_TRIGGER = 2
60};
61
62#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070063#define NUM_ATTEMPTS_INSERT_DETECT 25
64#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070065
Joonwoo Park2cc13f02012-05-09 12:44:25 -070066#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | \
67 SND_JACK_OC_HPHR | SND_JACK_UNSUPPORTED)
Patrick Lai49efeac2011-11-03 11:01:12 -070068
Santosh Mardie15e2302011-11-15 10:39:23 +053069#define TABLA_I2S_MASTER_MODE_MASK 0x08
70
Patrick Laic7cae882011-11-18 11:52:49 -080071#define TABLA_OCP_ATTEMPT 1
72
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080073#define AIF1_PB 1
74#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080075#define AIF2_PB 3
Kiran Kandi1e6371d2012-03-29 11:48:57 -070076#define AIF2_CAP 4
Neema Shetty3fb1b802012-04-27 13:53:24 -070077#define AIF3_CAP 5
Kiran Kandia9fffe92012-05-20 23:42:30 -070078#define AIF3_PB 6
Kiran Kandi1e6371d2012-03-29 11:48:57 -070079
Kiran Kandia9fffe92012-05-20 23:42:30 -070080#define NUM_CODEC_DAIS 6
Kuirong Wang0f8ade32012-02-27 16:29:45 -080081#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080082
83struct tabla_codec_dai_data {
84 u32 rate;
85 u32 *ch_num;
86 u32 ch_act;
87 u32 ch_tot;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -070088 u32 ch_mask;
89 wait_queue_head_t dai_wait;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080090};
91
Joonwoo Park0976d012011-12-22 11:48:18 -080092#define TABLA_MCLK_RATE_12288KHZ 12288000
93#define TABLA_MCLK_RATE_9600KHZ 9600000
94
Joonwoo Parkf4267c22012-01-10 13:25:24 -080095#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080096#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080097
Joonwoo Park03324832012-03-19 19:36:16 -070098#define TABLA_MBHC_BUTTON_MIN 0x8000
99
Joonwoo Park03324832012-03-19 19:36:16 -0700100#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700101#define TABLA_MBHC_FAKE_INSERT_HIGH 80
102#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -0700103
104#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
105
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700106#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 200
107
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700108#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
109#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700110
111#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
112#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
113
114#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
115
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700116#define TABLA_MBHC_GND_MIC_SWAP_THRESHOLD 2
117
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700118#define TABLA_ACQUIRE_LOCK(x) do { mutex_lock(&x); } while (0)
119#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
120
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
122static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
123static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800124static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800125static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Kiran Kandi93923902012-06-20 17:00:25 -0700126static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
127 struct snd_kcontrol *kcontrol, int event);
128static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
129 struct snd_kcontrol *kcontrol, int event);
130
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700131
132enum tabla_bandgap_type {
133 TABLA_BANDGAP_OFF = 0,
134 TABLA_BANDGAP_AUDIO_MODE,
135 TABLA_BANDGAP_MBHC_MODE,
136};
137
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700138struct mbhc_micbias_regs {
139 u16 cfilt_val;
140 u16 cfilt_ctl;
141 u16 mbhc_reg;
142 u16 int_rbias;
143 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800144 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700145};
146
Ben Romberger1f045a72011-11-04 10:14:57 -0700147/* Codec supports 2 IIR filters */
148enum {
149 IIR1 = 0,
150 IIR2,
151 IIR_MAX,
152};
153/* Codec supports 5 bands */
154enum {
155 BAND1 = 0,
156 BAND2,
157 BAND3,
158 BAND4,
159 BAND5,
160 BAND_MAX,
161};
162
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800163enum {
164 COMPANDER_1 = 0,
165 COMPANDER_2,
166 COMPANDER_MAX,
167};
168
169enum {
170 COMPANDER_FS_8KHZ = 0,
171 COMPANDER_FS_16KHZ,
172 COMPANDER_FS_32KHZ,
173 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700174 COMPANDER_FS_96KHZ,
175 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800176 COMPANDER_FS_MAX,
177};
178
Joonwoo Parka9444452011-12-08 18:48:27 -0800179/* Flags to track of PA and DAC state.
180 * PA and DAC should be tracked separately as AUXPGA loopback requires
181 * only PA to be turned on without DAC being on. */
182enum tabla_priv_ack_flags {
183 TABLA_HPHL_PA_OFF_ACK = 0,
184 TABLA_HPHR_PA_OFF_ACK,
185 TABLA_HPHL_DAC_OFF_ACK,
186 TABLA_HPHR_DAC_OFF_ACK
187};
188
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800189
190struct comp_sample_dependent_params {
191 u32 peak_det_timeout;
192 u32 rms_meter_div_fact;
193 u32 rms_meter_resamp_fact;
194};
195
Joonwoo Park0976d012011-12-22 11:48:18 -0800196/* Data used by MBHC */
197struct mbhc_internal_cal_data {
198 u16 dce_z;
199 u16 dce_mb;
200 u16 sta_z;
201 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800202 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800203 u32 t_dce;
204 u32 t_sta;
205 u32 micb_mv;
206 u16 v_ins_hu;
207 u16 v_ins_h;
208 u16 v_b1_hu;
209 u16 v_b1_h;
210 u16 v_b1_huc;
211 u16 v_brh;
212 u16 v_brl;
213 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800214 u8 npoll;
215 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700216 s16 adj_v_hs_max;
217 u16 adj_v_ins_hu;
218 u16 adj_v_ins_h;
219 s16 v_inval_ins_low;
220 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800221};
222
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800223struct tabla_reg_address {
224 u16 micb_4_ctl;
225 u16 micb_4_int_rbias;
226 u16 micb_4_mbhc;
227};
228
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700229enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700230 PLUG_TYPE_INVALID = -1,
231 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700232 PLUG_TYPE_HEADSET,
233 PLUG_TYPE_HEADPHONE,
234 PLUG_TYPE_HIGH_HPH,
Joonwoo Park2cc13f02012-05-09 12:44:25 -0700235 PLUG_TYPE_GND_MIC_SWAP,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700236};
237
238enum tabla_mbhc_state {
239 MBHC_STATE_NONE = -1,
240 MBHC_STATE_POTENTIAL,
241 MBHC_STATE_POTENTIAL_RECOVERY,
242 MBHC_STATE_RELEASE,
243};
244
Kiran Kandid8cf5212012-03-02 15:34:53 -0800245struct hpf_work {
246 struct tabla_priv *tabla;
247 u32 decimator;
248 u8 tx_hpf_cut_of_freq;
249 struct delayed_work dwork;
250};
251
252static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
253
Bradley Rubin229c6a52011-07-12 16:18:48 -0700254struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700255 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800256 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700257 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700258 u32 cfilt1_cnt;
259 u32 cfilt2_cnt;
260 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700261 u32 rx_bias_count;
Kiran Kandi0ba468f2012-05-08 11:45:05 -0700262 s32 dmic_1_2_clk_cnt;
263 s32 dmic_3_4_clk_cnt;
264 s32 dmic_5_6_clk_cnt;
265
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700266 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700267 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700268 bool clock_active;
269 bool config_mode_active;
270 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800271 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700272 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700273 enum tabla_mbhc_state mbhc_state;
274 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800275 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530277 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700278 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700279
280 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700281 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700282 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700283
284 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700285 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700286
Joonwoo Parka9444452011-12-08 18:48:27 -0800287 /* track PA/DAC state */
288 unsigned long hph_pa_dac_state;
289
Santosh Mardie15e2302011-11-15 10:39:23 +0530290 /*track tabla interface type*/
291 u8 intf_type;
292
Patrick Lai49efeac2011-11-03 11:01:12 -0700293 u32 hph_status; /* track headhpone status */
294 /* define separate work for left and right headphone OCP to avoid
295 * additional checking on which OCP event to report so no locking
296 * to ensure synchronization is required
297 */
298 struct work_struct hphlocp_work; /* reporting left hph ocp off */
299 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800300
Patrick Laic7cae882011-11-18 11:52:49 -0800301 u8 hphlocp_cnt; /* headphone left ocp retry */
302 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800303
Patrick Lai64b43262011-12-06 17:29:15 -0800304 /* Work to perform MBHC Firmware Read */
305 struct delayed_work mbhc_firmware_dwork;
306 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800307
308 /* num of slim ports required */
309 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800310
311 /*compander*/
312 int comp_enabled[COMPANDER_MAX];
313 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800314
315 /* Maintain the status of AUX PGA */
316 int aux_pga_cnt;
317 u8 aux_l_gain;
318 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700319
Joonwoo Park03324832012-03-19 19:36:16 -0700320 struct delayed_work mbhc_insert_dwork;
321 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700322
323 u8 current_plug;
324 struct work_struct hs_correct_plug_work;
325 bool hs_detect_work_stop;
326 bool hs_polling_irq_prepared;
327 bool lpi_enabled; /* low power insertion detection */
328 bool in_gpio_handler;
329 /* Currently, only used for mbhc purpose, to protect
330 * concurrent execution of mbhc threaded irq handlers and
331 * kill race between DAPM and MBHC.But can serve as a
332 * general lock to protect codec resource
333 */
334 struct mutex codec_resource_lock;
335
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -0700336 /* Work to perform polling on microphone voltage
337 * in order to correct plug type once plug type
338 * is detected as headphone
339 */
340 struct work_struct hs_correct_plug_work_nogpio;
341
Bradley Rubincb3950a2011-08-18 13:07:26 -0700342#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700343 struct dentry *debugfs_poke;
344 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700345#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700346};
347
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800348static const u32 comp_shift[] = {
349 0,
350 2,
351};
352
353static const int comp_rx_path[] = {
354 COMPANDER_1,
355 COMPANDER_1,
356 COMPANDER_2,
357 COMPANDER_2,
358 COMPANDER_2,
359 COMPANDER_2,
360 COMPANDER_MAX,
361};
362
363static const struct comp_sample_dependent_params comp_samp_params[] = {
364 {
365 .peak_det_timeout = 0x2,
366 .rms_meter_div_fact = 0x8 << 4,
367 .rms_meter_resamp_fact = 0x21,
368 },
369 {
370 .peak_det_timeout = 0x3,
371 .rms_meter_div_fact = 0x9 << 4,
372 .rms_meter_resamp_fact = 0x28,
373 },
374
375 {
376 .peak_det_timeout = 0x5,
377 .rms_meter_div_fact = 0xB << 4,
378 .rms_meter_resamp_fact = 0x28,
379 },
380
381 {
382 .peak_det_timeout = 0x5,
383 .rms_meter_div_fact = 0xB << 4,
384 .rms_meter_resamp_fact = 0x28,
385 },
386};
387
Kuirong Wange9c8a222012-03-28 16:24:09 -0700388static unsigned short rx_digital_gain_reg[] = {
389 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
390 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
391 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
392 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
393 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
394 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
395 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
396};
397
398
399static unsigned short tx_digital_gain_reg[] = {
400 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
401 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
402 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
403 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
404 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
405 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
406 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
407 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
408 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
409 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
410};
411
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700412static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
413 struct snd_kcontrol *kcontrol, int event)
414{
415 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700416
417 pr_debug("%s %d\n", __func__, event);
418 switch (event) {
419 case SND_SOC_DAPM_POST_PMU:
ty.leecd34e122012-08-23 21:33:19 +0900420 msleep(15);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
422 0x01);
423 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
424 usleep_range(200, 200);
425 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
426 break;
427 case SND_SOC_DAPM_PRE_PMD:
428 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
429 0x10);
430 usleep_range(20, 20);
431 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
432 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
433 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
434 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
435 0x00);
436 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 break;
438 }
439 return 0;
440}
441
Bradley Rubina7096d02011-08-03 18:29:02 -0700442static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
443 struct snd_ctl_elem_value *ucontrol)
444{
445 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
446 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
447 ucontrol->value.integer.value[0] = tabla->anc_slot;
448 return 0;
449}
450
451static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
452 struct snd_ctl_elem_value *ucontrol)
453{
454 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
455 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
456 tabla->anc_slot = ucontrol->value.integer.value[0];
457 return 0;
458}
459
Kiran Kandid2d86b52011-09-09 17:44:28 -0700460static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
461 struct snd_ctl_elem_value *ucontrol)
462{
463 u8 ear_pa_gain;
464 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
465
466 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
467
468 ear_pa_gain = ear_pa_gain >> 5;
469
470 if (ear_pa_gain == 0x00) {
471 ucontrol->value.integer.value[0] = 0;
472 } else if (ear_pa_gain == 0x04) {
473 ucontrol->value.integer.value[0] = 1;
474 } else {
475 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
476 __func__, ear_pa_gain);
477 return -EINVAL;
478 }
479
480 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
481
482 return 0;
483}
484
485static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
486 struct snd_ctl_elem_value *ucontrol)
487{
488 u8 ear_pa_gain;
489 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
490
491 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
492 ucontrol->value.integer.value[0]);
493
494 switch (ucontrol->value.integer.value[0]) {
495 case 0:
496 ear_pa_gain = 0x00;
497 break;
498 case 1:
499 ear_pa_gain = 0x80;
500 break;
501 default:
502 return -EINVAL;
503 }
504
505 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
506 return 0;
507}
508
Ben Romberger1f045a72011-11-04 10:14:57 -0700509static int tabla_get_iir_enable_audio_mixer(
510 struct snd_kcontrol *kcontrol,
511 struct snd_ctl_elem_value *ucontrol)
512{
513 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
514 int iir_idx = ((struct soc_multi_mixer_control *)
515 kcontrol->private_value)->reg;
516 int band_idx = ((struct soc_multi_mixer_control *)
517 kcontrol->private_value)->shift;
518
519 ucontrol->value.integer.value[0] =
520 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
521 (1 << band_idx);
522
523 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
524 iir_idx, band_idx,
525 (uint32_t)ucontrol->value.integer.value[0]);
526 return 0;
527}
528
529static int tabla_put_iir_enable_audio_mixer(
530 struct snd_kcontrol *kcontrol,
531 struct snd_ctl_elem_value *ucontrol)
532{
533 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
534 int iir_idx = ((struct soc_multi_mixer_control *)
535 kcontrol->private_value)->reg;
536 int band_idx = ((struct soc_multi_mixer_control *)
537 kcontrol->private_value)->shift;
538 int value = ucontrol->value.integer.value[0];
539
540 /* Mask first 5 bits, 6-8 are reserved */
541 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
542 (1 << band_idx), (value << band_idx));
543
544 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
545 iir_idx, band_idx, value);
546 return 0;
547}
548static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
549 int iir_idx, int band_idx,
550 int coeff_idx)
551{
552 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800553 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700554 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800555 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700556
557 /* Mask bits top 2 bits since they are reserved */
558 return ((snd_soc_read(codec,
559 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
560 (snd_soc_read(codec,
561 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
562 (snd_soc_read(codec,
563 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
564 (snd_soc_read(codec,
565 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
566 0x3FFFFFFF;
567}
568
569static int tabla_get_iir_band_audio_mixer(
570 struct snd_kcontrol *kcontrol,
571 struct snd_ctl_elem_value *ucontrol)
572{
573 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
574 int iir_idx = ((struct soc_multi_mixer_control *)
575 kcontrol->private_value)->reg;
576 int band_idx = ((struct soc_multi_mixer_control *)
577 kcontrol->private_value)->shift;
578
579 ucontrol->value.integer.value[0] =
580 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
581 ucontrol->value.integer.value[1] =
582 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
583 ucontrol->value.integer.value[2] =
584 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
585 ucontrol->value.integer.value[3] =
586 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
587 ucontrol->value.integer.value[4] =
588 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
589
590 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
591 "%s: IIR #%d band #%d b1 = 0x%x\n"
592 "%s: IIR #%d band #%d b2 = 0x%x\n"
593 "%s: IIR #%d band #%d a1 = 0x%x\n"
594 "%s: IIR #%d band #%d a2 = 0x%x\n",
595 __func__, iir_idx, band_idx,
596 (uint32_t)ucontrol->value.integer.value[0],
597 __func__, iir_idx, band_idx,
598 (uint32_t)ucontrol->value.integer.value[1],
599 __func__, iir_idx, band_idx,
600 (uint32_t)ucontrol->value.integer.value[2],
601 __func__, iir_idx, band_idx,
602 (uint32_t)ucontrol->value.integer.value[3],
603 __func__, iir_idx, band_idx,
604 (uint32_t)ucontrol->value.integer.value[4]);
605 return 0;
606}
607
608static void set_iir_band_coeff(struct snd_soc_codec *codec,
609 int iir_idx, int band_idx,
610 int coeff_idx, uint32_t value)
611{
612 /* Mask top 3 bits, 6-8 are reserved */
613 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800614 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700615 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800616 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700617
618 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800619 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700620 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800621 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700622
623 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800624 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700625 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800626 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700627
Ben Romberger0915aae2012-02-06 23:32:43 -0800628 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700629 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800630 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700631
Ben Romberger0915aae2012-02-06 23:32:43 -0800632 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700633 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800634 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700635}
636
637static int tabla_put_iir_band_audio_mixer(
638 struct snd_kcontrol *kcontrol,
639 struct snd_ctl_elem_value *ucontrol)
640{
641 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
642 int iir_idx = ((struct soc_multi_mixer_control *)
643 kcontrol->private_value)->reg;
644 int band_idx = ((struct soc_multi_mixer_control *)
645 kcontrol->private_value)->shift;
646
647 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
648 ucontrol->value.integer.value[0]);
649 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
650 ucontrol->value.integer.value[1]);
651 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
652 ucontrol->value.integer.value[2]);
653 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
654 ucontrol->value.integer.value[3]);
655 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
656 ucontrol->value.integer.value[4]);
657
658 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
659 "%s: IIR #%d band #%d b1 = 0x%x\n"
660 "%s: IIR #%d band #%d b2 = 0x%x\n"
661 "%s: IIR #%d band #%d a1 = 0x%x\n"
662 "%s: IIR #%d band #%d a2 = 0x%x\n",
663 __func__, iir_idx, band_idx,
664 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
665 __func__, iir_idx, band_idx,
666 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
667 __func__, iir_idx, band_idx,
668 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
669 __func__, iir_idx, band_idx,
670 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
671 __func__, iir_idx, band_idx,
672 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
673 return 0;
674}
675
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800676static int tabla_compander_gain_offset(
677 struct snd_soc_codec *codec, u32 enable,
678 unsigned int reg, int mask, int event)
679{
680 int pa_mode = snd_soc_read(codec, reg) & mask;
681 int gain_offset = 0;
682 /* if PMU && enable is 1-> offset is 3
683 * if PMU && enable is 0-> offset is 0
684 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
685 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
686 */
687
688 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
689 gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
690 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
691 gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
692 return gain_offset;
693}
694
695
696static int tabla_config_gain_compander(
697 struct snd_soc_codec *codec,
698 u32 compander, u32 enable, int event)
699{
700 int value = 0;
701 int mask = 1 << 4;
702 int gain = 0;
703 int gain_offset;
704 if (compander >= COMPANDER_MAX) {
705 pr_err("%s: Error, invalid compander channel\n", __func__);
706 return -EINVAL;
707 }
708
709 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
710 value = 1 << 4;
711
712 if (compander == COMPANDER_1) {
713 gain_offset = tabla_compander_gain_offset(codec, enable,
714 TABLA_A_RX_HPH_L_GAIN, mask, event);
715 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
716 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
717 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
718 0xFF, gain - gain_offset);
719 gain_offset = tabla_compander_gain_offset(codec, enable,
720 TABLA_A_RX_HPH_R_GAIN, mask, event);
721 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
722 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
723 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
724 0xFF, gain - gain_offset);
725 } else if (compander == COMPANDER_2) {
726 gain_offset = tabla_compander_gain_offset(codec, enable,
727 TABLA_A_RX_LINE_1_GAIN, mask, event);
728 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
729 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
730 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
731 0xFF, gain - gain_offset);
732 gain_offset = tabla_compander_gain_offset(codec, enable,
733 TABLA_A_RX_LINE_3_GAIN, mask, event);
734 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
735 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
736 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
737 0xFF, gain - gain_offset);
738 gain_offset = tabla_compander_gain_offset(codec, enable,
739 TABLA_A_RX_LINE_2_GAIN, mask, event);
740 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
741 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
742 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
743 0xFF, gain - gain_offset);
744 gain_offset = tabla_compander_gain_offset(codec, enable,
745 TABLA_A_RX_LINE_4_GAIN, mask, event);
746 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
747 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
748 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
749 0xFF, gain - gain_offset);
750 }
751 return 0;
752}
753static int tabla_get_compander(struct snd_kcontrol *kcontrol,
754 struct snd_ctl_elem_value *ucontrol)
755{
756
757 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
758 int comp = ((struct soc_multi_mixer_control *)
759 kcontrol->private_value)->max;
760 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
761
762 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
763
764 return 0;
765}
766
767static int tabla_set_compander(struct snd_kcontrol *kcontrol,
768 struct snd_ctl_elem_value *ucontrol)
769{
770 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
771 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
772 int comp = ((struct soc_multi_mixer_control *)
773 kcontrol->private_value)->max;
774 int value = ucontrol->value.integer.value[0];
775
776 if (value == tabla->comp_enabled[comp]) {
777 pr_debug("%s: compander #%d enable %d no change\n",
778 __func__, comp, value);
779 return 0;
780 }
781 tabla->comp_enabled[comp] = value;
782 return 0;
783}
784
785
786static int tabla_config_compander(struct snd_soc_dapm_widget *w,
787 struct snd_kcontrol *kcontrol,
788 int event)
789{
790 struct snd_soc_codec *codec = w->codec;
791 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
792 u32 rate = tabla->comp_fs[w->shift];
793
794 switch (event) {
795 case SND_SOC_DAPM_PRE_PMU:
796 if (tabla->comp_enabled[w->shift] != 0) {
797 /* Enable both L/R compander clocks */
798 snd_soc_update_bits(codec,
799 TABLA_A_CDC_CLK_RX_B2_CTL,
800 0x03 << comp_shift[w->shift],
801 0x03 << comp_shift[w->shift]);
802 /* Clar the HALT for the compander*/
803 snd_soc_update_bits(codec,
804 TABLA_A_CDC_COMP1_B1_CTL +
805 w->shift * 8, 1 << 2, 0);
806 /* Toggle compander reset bits*/
807 snd_soc_update_bits(codec,
808 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
809 0x03 << comp_shift[w->shift],
810 0x03 << comp_shift[w->shift]);
811 snd_soc_update_bits(codec,
812 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
813 0x03 << comp_shift[w->shift], 0);
814 tabla_config_gain_compander(codec, w->shift, 1, event);
815 /* Update the RMS meter resampling*/
816 snd_soc_update_bits(codec,
817 TABLA_A_CDC_COMP1_B3_CTL +
818 w->shift * 8, 0xFF, 0x01);
819 /* Wait for 1ms*/
820 usleep_range(1000, 1000);
821 }
822 break;
823 case SND_SOC_DAPM_POST_PMU:
824 /* Set sample rate dependent paramater*/
825 if (tabla->comp_enabled[w->shift] != 0) {
826 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
827 w->shift * 8, 0x03, rate);
828 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
829 w->shift * 8, 0x0F,
830 comp_samp_params[rate].peak_det_timeout);
831 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
832 w->shift * 8, 0xF0,
833 comp_samp_params[rate].rms_meter_div_fact);
834 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
835 w->shift * 8, 0xFF,
836 comp_samp_params[rate].rms_meter_resamp_fact);
837 /* Compander enable -> 0x370/0x378*/
838 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
839 w->shift * 8, 0x03, 0x03);
840 }
841 break;
842 case SND_SOC_DAPM_PRE_PMD:
843 /* Halt the compander*/
844 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
845 w->shift * 8, 1 << 2, 1 << 2);
846 break;
847 case SND_SOC_DAPM_POST_PMD:
848 /* Restore the gain */
849 tabla_config_gain_compander(codec, w->shift,
850 tabla->comp_enabled[w->shift], event);
851 /* Disable the compander*/
852 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
853 w->shift * 8, 0x03, 0x00);
854 /* Turn off the clock for compander in pair*/
855 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
856 0x03 << comp_shift[w->shift], 0);
857 break;
858 }
859 return 0;
860}
861
Kiran Kandid2d86b52011-09-09 17:44:28 -0700862static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
863static const struct soc_enum tabla_ear_pa_gain_enum[] = {
864 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
865};
866
Santosh Mardi024010f2011-10-18 06:27:21 +0530867/*cut of frequency for high pass filter*/
868static const char *cf_text[] = {
869 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
870};
871
872static const struct soc_enum cf_dec1_enum =
873 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
874
875static const struct soc_enum cf_dec2_enum =
876 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
877
878static const struct soc_enum cf_dec3_enum =
879 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
880
881static const struct soc_enum cf_dec4_enum =
882 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
883
884static const struct soc_enum cf_dec5_enum =
885 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
886
887static const struct soc_enum cf_dec6_enum =
888 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
889
890static const struct soc_enum cf_dec7_enum =
891 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
892
893static const struct soc_enum cf_dec8_enum =
894 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
895
896static const struct soc_enum cf_dec9_enum =
897 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
898
899static const struct soc_enum cf_dec10_enum =
900 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
901
902static const struct soc_enum cf_rxmix1_enum =
903 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
904
905static const struct soc_enum cf_rxmix2_enum =
906 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
907
908static const struct soc_enum cf_rxmix3_enum =
909 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
910
911static const struct soc_enum cf_rxmix4_enum =
912 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
913
914static const struct soc_enum cf_rxmix5_enum =
915 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
916;
917static const struct soc_enum cf_rxmix6_enum =
918 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
919
920static const struct soc_enum cf_rxmix7_enum =
921 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
922
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700923static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700924
925 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
926 tabla_pa_gain_get, tabla_pa_gain_put),
927
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700928 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
929 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700930 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
931 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700932 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
933 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700934 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
935 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700936 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
937 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700938
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700939 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
940 line_gain),
941 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
942 line_gain),
943
Bradley Rubin410383f2011-07-22 13:44:23 -0700944 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
945 -84, 40, digital_gain),
946 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
947 -84, 40, digital_gain),
948 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
949 -84, 40, digital_gain),
950 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
951 -84, 40, digital_gain),
952 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
953 -84, 40, digital_gain),
954 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
955 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800956 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
957 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700958
Bradley Rubin410383f2011-07-22 13:44:23 -0700959 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700960 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700961 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700962 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700963 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
964 digital_gain),
965 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
966 digital_gain),
967 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
968 digital_gain),
969 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
970 digital_gain),
971 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
972 digital_gain),
973 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
974 digital_gain),
975 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
976 digital_gain),
977 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
978 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700979 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
980 40, digital_gain),
981 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
982 40, digital_gain),
983 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
984 40, digital_gain),
985 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
986 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700987 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
988 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700989 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
990 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700991 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
992 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700993
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800994 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
995 aux_pga_gain),
996 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
997 aux_pga_gain),
998
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700999 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -08001000 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001001 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -07001002
1003 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
1004 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +05301005 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
1006 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
1007 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
1008 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
1009 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
1010 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
1011 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
1012 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
1013 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
1014 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
1015
1016 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
1017 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
1018 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
1019 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
1020 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
1021 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
1022 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
1023 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
1024 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
1025 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
1026
1027 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
1028 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1029 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1030 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1031 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1032 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1033 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1034
1035 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1036 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1037 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1038 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1039 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1040 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1041 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001042
1043 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1044 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1045 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1046 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1047 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1048 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1049 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1050 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1051 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1052 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1053 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1054 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1055 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1056 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1057 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1058 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1059 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1060 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1061 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1062 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1063
1064 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1065 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1066 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1067 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1068 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1069 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1070 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1071 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1072 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1073 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1074 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1075 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1076 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1077 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1078 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1079 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1080 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1081 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1082 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1083 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001084 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1085 tabla_get_compander, tabla_set_compander),
1086 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1087 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088};
1089
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001090static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1091 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1092};
1093
1094static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1095 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1096};
1097
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001098static const char *rx_mix1_text[] = {
1099 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1100 "RX5", "RX6", "RX7"
1101};
1102
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001103static const char *rx_mix2_text[] = {
1104 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1105};
1106
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001107static const char *rx_dsm_text[] = {
1108 "CIC_OUT", "DSM_INV"
1109};
1110
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001111static const char *sb_tx1_mux_text[] = {
1112 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1113 "DEC1"
1114};
1115
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001116static const char *sb_tx2_mux_text[] = {
1117 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1118 "DEC2"
1119};
1120
1121static const char *sb_tx3_mux_text[] = {
1122 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1123 "DEC3"
1124};
1125
1126static const char *sb_tx4_mux_text[] = {
1127 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1128 "DEC4"
1129};
1130
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001131static const char *sb_tx5_mux_text[] = {
1132 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1133 "DEC5"
1134};
1135
1136static const char *sb_tx6_mux_text[] = {
1137 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1138 "DEC6"
1139};
1140
1141static const char const *sb_tx7_to_tx10_mux_text[] = {
1142 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1143 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1144 "DEC9", "DEC10"
1145};
1146
1147static const char *dec1_mux_text[] = {
1148 "ZERO", "DMIC1", "ADC6",
1149};
1150
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001151static const char *dec2_mux_text[] = {
1152 "ZERO", "DMIC2", "ADC5",
1153};
1154
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001155static const char *dec3_mux_text[] = {
1156 "ZERO", "DMIC3", "ADC4",
1157};
1158
1159static const char *dec4_mux_text[] = {
1160 "ZERO", "DMIC4", "ADC3",
1161};
1162
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001163static const char *dec5_mux_text[] = {
1164 "ZERO", "DMIC5", "ADC2",
1165};
1166
1167static const char *dec6_mux_text[] = {
1168 "ZERO", "DMIC6", "ADC1",
1169};
1170
1171static const char const *dec7_mux_text[] = {
1172 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1173};
1174
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001175static const char *dec8_mux_text[] = {
1176 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1177};
1178
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001179static const char *dec9_mux_text[] = {
1180 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1181};
1182
1183static const char *dec10_mux_text[] = {
1184 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1185};
1186
Bradley Rubin229c6a52011-07-12 16:18:48 -07001187static const char const *anc_mux_text[] = {
1188 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1189 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1190};
1191
1192static const char const *anc1_fb_mux_text[] = {
1193 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1194};
1195
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001196static const char *iir1_inp1_text[] = {
1197 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1198 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1199};
1200
1201static const struct soc_enum rx_mix1_inp1_chain_enum =
1202 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1203
Bradley Rubin229c6a52011-07-12 16:18:48 -07001204static const struct soc_enum rx_mix1_inp2_chain_enum =
1205 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1206
Kiran Kandia9fffe92012-05-20 23:42:30 -07001207static const struct soc_enum rx_mix1_inp3_chain_enum =
1208 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B2_CTL, 0, 12, rx_mix1_text);
1209
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001210static const struct soc_enum rx2_mix1_inp1_chain_enum =
1211 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1212
Bradley Rubin229c6a52011-07-12 16:18:48 -07001213static const struct soc_enum rx2_mix1_inp2_chain_enum =
1214 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001216static const struct soc_enum rx3_mix1_inp1_chain_enum =
1217 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1218
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001219static const struct soc_enum rx3_mix1_inp2_chain_enum =
1220 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1221
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001222static const struct soc_enum rx4_mix1_inp1_chain_enum =
1223 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1224
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001225static const struct soc_enum rx4_mix1_inp2_chain_enum =
1226 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1227
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001228static const struct soc_enum rx5_mix1_inp1_chain_enum =
1229 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1230
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001231static const struct soc_enum rx5_mix1_inp2_chain_enum =
1232 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1233
1234static const struct soc_enum rx6_mix1_inp1_chain_enum =
1235 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1236
1237static const struct soc_enum rx6_mix1_inp2_chain_enum =
1238 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1239
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001240static const struct soc_enum rx7_mix1_inp1_chain_enum =
1241 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1242
1243static const struct soc_enum rx7_mix1_inp2_chain_enum =
1244 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1245
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001246static const struct soc_enum rx1_mix2_inp1_chain_enum =
1247 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1248
1249static const struct soc_enum rx1_mix2_inp2_chain_enum =
1250 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1251
1252static const struct soc_enum rx2_mix2_inp1_chain_enum =
1253 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1254
1255static const struct soc_enum rx2_mix2_inp2_chain_enum =
1256 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1257
1258static const struct soc_enum rx3_mix2_inp1_chain_enum =
1259 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1260
1261static const struct soc_enum rx3_mix2_inp2_chain_enum =
1262 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1263
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001264static const struct soc_enum rx4_dsm_enum =
1265 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1266
1267static const struct soc_enum rx6_dsm_enum =
1268 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1269
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001270static const struct soc_enum sb_tx1_mux_enum =
1271 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1272
1273static const struct soc_enum sb_tx2_mux_enum =
1274 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1275
1276static const struct soc_enum sb_tx3_mux_enum =
1277 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1278
1279static const struct soc_enum sb_tx4_mux_enum =
1280 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1281
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001282static const struct soc_enum sb_tx5_mux_enum =
1283 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1284
1285static const struct soc_enum sb_tx6_mux_enum =
1286 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1287
1288static const struct soc_enum sb_tx7_mux_enum =
1289 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1290 sb_tx7_to_tx10_mux_text);
1291
1292static const struct soc_enum sb_tx8_mux_enum =
1293 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1294 sb_tx7_to_tx10_mux_text);
1295
Kiran Kandi3426e512011-09-13 22:50:10 -07001296static const struct soc_enum sb_tx9_mux_enum =
1297 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1298 sb_tx7_to_tx10_mux_text);
1299
1300static const struct soc_enum sb_tx10_mux_enum =
1301 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1302 sb_tx7_to_tx10_mux_text);
1303
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001304static const struct soc_enum dec1_mux_enum =
1305 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1306
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001307static const struct soc_enum dec2_mux_enum =
1308 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1309
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001310static const struct soc_enum dec3_mux_enum =
1311 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1312
1313static const struct soc_enum dec4_mux_enum =
1314 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1315
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001316static const struct soc_enum dec5_mux_enum =
1317 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1318
1319static const struct soc_enum dec6_mux_enum =
1320 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1321
1322static const struct soc_enum dec7_mux_enum =
1323 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1324
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001325static const struct soc_enum dec8_mux_enum =
1326 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1327
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001328static const struct soc_enum dec9_mux_enum =
1329 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1330
1331static const struct soc_enum dec10_mux_enum =
1332 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1333
Bradley Rubin229c6a52011-07-12 16:18:48 -07001334static const struct soc_enum anc1_mux_enum =
1335 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1336
1337static const struct soc_enum anc2_mux_enum =
1338 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1339
1340static const struct soc_enum anc1_fb_mux_enum =
1341 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1342
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001343static const struct soc_enum iir1_inp1_mux_enum =
1344 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1345
1346static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1347 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1348
Bradley Rubin229c6a52011-07-12 16:18:48 -07001349static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1350 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1351
Kiran Kandia9fffe92012-05-20 23:42:30 -07001352static const struct snd_kcontrol_new rx_mix1_inp3_mux =
1353 SOC_DAPM_ENUM("RX1 MIX1 INP3 Mux", rx_mix1_inp3_chain_enum);
1354
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001355static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1356 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1357
Bradley Rubin229c6a52011-07-12 16:18:48 -07001358static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1359 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1360
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001361static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1362 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1363
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001364static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1365 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1366
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001367static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1368 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1369
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001370static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1371 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1372
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001373static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1374 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1375
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001376static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1377 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1378
1379static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1380 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1381
1382static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1383 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1384
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001385static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1386 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1387
1388static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1389 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1390
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001391static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1392 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1393
1394static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1395 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1396
1397static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1398 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1399
1400static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1401 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1402
1403static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1404 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1405
1406static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1407 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1408
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001409static const struct snd_kcontrol_new rx4_dsm_mux =
1410 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1411
1412static const struct snd_kcontrol_new rx6_dsm_mux =
1413 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1414
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001415static const struct snd_kcontrol_new sb_tx1_mux =
1416 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1417
1418static const struct snd_kcontrol_new sb_tx2_mux =
1419 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1420
1421static const struct snd_kcontrol_new sb_tx3_mux =
1422 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1423
1424static const struct snd_kcontrol_new sb_tx4_mux =
1425 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1426
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001427static const struct snd_kcontrol_new sb_tx5_mux =
1428 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1429
1430static const struct snd_kcontrol_new sb_tx6_mux =
1431 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1432
1433static const struct snd_kcontrol_new sb_tx7_mux =
1434 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1435
1436static const struct snd_kcontrol_new sb_tx8_mux =
1437 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1438
Kiran Kandi3426e512011-09-13 22:50:10 -07001439static const struct snd_kcontrol_new sb_tx9_mux =
1440 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1441
1442static const struct snd_kcontrol_new sb_tx10_mux =
1443 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1444
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445
Kiran Kandi59a96b12012-01-16 02:20:03 -08001446static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1447 struct snd_ctl_elem_value *ucontrol)
1448{
1449 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1450 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1451 struct snd_soc_codec *codec = w->codec;
1452 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1453 unsigned int dec_mux, decimator;
1454 char *dec_name = NULL;
1455 char *widget_name = NULL;
1456 char *temp;
1457 u16 tx_mux_ctl_reg;
1458 u8 adc_dmic_sel = 0x0;
1459 int ret = 0;
1460
1461 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1462 return -EINVAL;
1463
1464 dec_mux = ucontrol->value.enumerated.item[0];
1465
1466 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1467 if (!widget_name)
1468 return -ENOMEM;
1469 temp = widget_name;
1470
1471 dec_name = strsep(&widget_name, " ");
1472 widget_name = temp;
1473 if (!dec_name) {
1474 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1475 ret = -EINVAL;
1476 goto out;
1477 }
1478
1479 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1480 if (ret < 0) {
1481 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1482 ret = -EINVAL;
1483 goto out;
1484 }
1485
1486 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1487 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1488 dec_mux);
1489
1490
1491 switch (decimator) {
1492 case 1:
1493 case 2:
1494 case 3:
1495 case 4:
1496 case 5:
1497 case 6:
1498 if (dec_mux == 1)
1499 adc_dmic_sel = 0x1;
1500 else
1501 adc_dmic_sel = 0x0;
1502 break;
1503 case 7:
1504 case 8:
1505 case 9:
1506 case 10:
1507 if ((dec_mux == 1) || (dec_mux == 2))
1508 adc_dmic_sel = 0x1;
1509 else
1510 adc_dmic_sel = 0x0;
1511 break;
1512 default:
1513 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1514 ret = -EINVAL;
1515 goto out;
1516 }
1517
1518 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1519
1520 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1521
1522 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1523
1524out:
1525 kfree(widget_name);
1526 return ret;
1527}
1528
1529#define WCD9310_DEC_ENUM(xname, xenum) \
1530{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1531 .info = snd_soc_info_enum_double, \
1532 .get = snd_soc_dapm_get_enum_double, \
1533 .put = wcd9310_put_dec_enum, \
1534 .private_value = (unsigned long)&xenum }
1535
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001536static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001537 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001539static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001540 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001541
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001542static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001543 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001544
1545static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001546 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001547
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001548static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001549 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001550
1551static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001552 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001553
1554static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001555 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001556
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001557static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001558 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001559
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001560static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001561 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001562
1563static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001564 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001565
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001566static const struct snd_kcontrol_new iir1_inp1_mux =
1567 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1568
Kiran Kandi59a96b12012-01-16 02:20:03 -08001569static const struct snd_kcontrol_new anc1_mux =
1570 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1571
Bradley Rubin229c6a52011-07-12 16:18:48 -07001572static const struct snd_kcontrol_new anc2_mux =
1573 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001574
Bradley Rubin229c6a52011-07-12 16:18:48 -07001575static const struct snd_kcontrol_new anc1_fb_mux =
1576 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001577
Bradley Rubin229c6a52011-07-12 16:18:48 -07001578static const struct snd_kcontrol_new dac1_switch[] = {
1579 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1580};
1581static const struct snd_kcontrol_new hphl_switch[] = {
1582 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1583};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001584
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001585static const struct snd_kcontrol_new hphl_pa_mix[] = {
1586 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1587 7, 1, 0),
1588 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1589 7, 1, 0),
1590 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1591 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1592 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1593 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1594};
1595
1596static const struct snd_kcontrol_new hphr_pa_mix[] = {
1597 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1598 6, 1, 0),
1599 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1600 6, 1, 0),
1601 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1602 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1603 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1604 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1605};
1606
1607static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1608 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1609 5, 1, 0),
1610 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1611 5, 1, 0),
1612 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1613 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1614 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1615 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1616};
1617
1618static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1619 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1620 4, 1, 0),
1621 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1622 4, 1, 0),
1623 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1624 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1625 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1626 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1627};
1628
1629static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1630 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1631 3, 1, 0),
1632 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1633 3, 1, 0),
1634 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1635 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1636 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1637 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1638};
1639
1640static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1641 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1642 2, 1, 0),
1643 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1644 2, 1, 0),
1645 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1646 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1647 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1648 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1649};
1650
1651static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1652 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1653 1, 1, 0),
1654 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1655 1, 1, 0),
1656 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1657 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1658 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1659 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1660};
1661
1662static const struct snd_kcontrol_new ear_pa_mix[] = {
1663 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1664 0, 1, 0),
1665 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1666 0, 1, 0),
1667 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1668 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1669 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1670 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1671};
1672
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001673static const struct snd_kcontrol_new lineout3_ground_switch =
1674 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1675
1676static const struct snd_kcontrol_new lineout4_ground_switch =
1677 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001678
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001679static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001680 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001681{
1682 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1683
1684 pr_debug("%s %d\n", __func__, enable);
1685
1686 if (enable) {
1687 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001688 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1689 } else {
1690 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001691 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001692 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07001693 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001694 }
1695}
1696
1697static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1698 struct snd_kcontrol *kcontrol, int event)
1699{
1700 struct snd_soc_codec *codec = w->codec;
1701 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001702 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001703
1704 pr_debug("%s %d\n", __func__, event);
1705
1706 if (w->reg == TABLA_A_TX_1_2_EN)
1707 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1708 else if (w->reg == TABLA_A_TX_3_4_EN)
1709 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1710 else if (w->reg == TABLA_A_TX_5_6_EN)
1711 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1712 else {
1713 pr_err("%s: Error, invalid adc register\n", __func__);
1714 return -EINVAL;
1715 }
1716
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001717 if (w->shift == 3)
1718 init_bit_shift = 6;
1719 else if (w->shift == 7)
1720 init_bit_shift = 7;
1721 else {
1722 pr_err("%s: Error, invalid init bit postion adc register\n",
1723 __func__);
1724 return -EINVAL;
1725 }
1726
1727
1728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001729 switch (event) {
1730 case SND_SOC_DAPM_PRE_PMU:
1731 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001732 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1733 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001734 break;
1735 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001736
1737 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1738
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001739 break;
1740 case SND_SOC_DAPM_POST_PMD:
1741 tabla_codec_enable_adc_block(codec, 0);
1742 break;
1743 }
1744 return 0;
1745}
1746
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001747static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
1748{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001749 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1750 0x80);
1751 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
1752 0x04);
1753 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1754 0x01);
1755 usleep_range(1000, 1000);
1756 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1757 0x00);
1758}
1759
1760static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
1761 enum tabla_bandgap_type choice)
1762{
1763 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1764
1765 /* TODO lock resources accessed by audio streams and threaded
1766 * interrupt handlers
1767 */
1768
1769 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
1770 tabla->bandgap_type);
1771
1772 if (tabla->bandgap_type == choice)
1773 return;
1774
1775 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
1776 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1777 tabla_codec_enable_audio_mode_bandgap(codec);
1778 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001779 /* bandgap mode becomes fast,
1780 * mclk should be off or clk buff source souldn't be VBG
1781 * Let's turn off mclk always */
1782 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001783 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
1784 0x2);
1785 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1786 0x80);
1787 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
1788 0x4);
1789 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1790 0x01);
1791 usleep_range(1000, 1000);
1792 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1793 0x00);
1794 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
1795 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1796 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1797 usleep_range(100, 100);
1798 tabla_codec_enable_audio_mode_bandgap(codec);
1799 } else if (choice == TABLA_BANDGAP_OFF) {
1800 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1801 } else {
1802 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
1803 }
1804 tabla->bandgap_type = choice;
1805}
1806
1807static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
1808{
1809 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1810 pr_debug("%s\n", __func__);
1811 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001812 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001813 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
1814 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001815 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001816 tabla->clock_active = false;
1817}
1818
1819static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
1820{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001821 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001822 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001823 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001824 return 1;
1825 else {
1826 BUG_ON(1);
1827 return -EINVAL;
1828 }
1829}
1830
1831static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1832{
1833 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1834
1835 if (enable) {
1836 tabla->rx_bias_count++;
1837 if (tabla->rx_bias_count == 1)
1838 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1839 0x80, 0x80);
1840 } else {
1841 tabla->rx_bias_count--;
1842 if (!tabla->rx_bias_count)
1843 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1844 0x80, 0x00);
1845 }
1846}
1847
1848static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
1849 int enable)
1850{
1851 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1852
1853 pr_debug("%s: enable = %d\n", __func__, enable);
1854 if (enable) {
1855 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001856 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001857 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
1858 usleep_range(5, 5);
1859 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001860 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001861 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001862 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001863 usleep_range(10, 10);
1864 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001865 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001866 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
1867 } else {
1868 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001869 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001870 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001871 /* clk source to ext clk and clk buff ref to VBG */
1872 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001873 }
1874 tabla->config_mode_active = enable ? true : false;
1875
1876 return 0;
1877}
1878
1879static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001880 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001881{
1882 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1883
1884 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
1885
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001886 /* transit to RCO requires mclk off */
1887 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001888 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001889 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001890 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001891 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001892 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001893 } else {
1894 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001895 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
1896
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001897 if (tabla->mbhc_polling_active) {
1898 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
1899 tabla_codec_enable_config_mode(codec, 0);
1900 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001901 }
1902
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001903 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001904 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001905 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001906 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
1907 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
1908 usleep_range(50, 50);
1909 tabla->clock_active = true;
1910 return 0;
1911}
1912
1913static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
1914 struct snd_kcontrol *kcontrol, int event)
1915{
1916 struct snd_soc_codec *codec = w->codec;
1917 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1918
1919 pr_debug("%s: %d\n", __func__, event);
1920
1921 switch (event) {
1922 case SND_SOC_DAPM_PRE_PMU:
1923 tabla_codec_enable_bandgap(codec,
1924 TABLA_BANDGAP_AUDIO_MODE);
1925 tabla_enable_rx_bias(codec, 1);
1926
1927 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1928 0x08, 0x08);
1929 /* Enable Zero Cross detect for AUX PGA channel
1930 * and set the initial AUX PGA gain to NEG_0P0_DB
1931 * to avoid glitches.
1932 */
1933 if (w->reg == TABLA_A_AUX_L_EN) {
1934 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1935 0x20, 0x20);
1936 tabla->aux_l_gain = snd_soc_read(codec,
1937 TABLA_A_AUX_L_GAIN);
1938 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1939 } else {
1940 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1941 0x20, 0x20);
1942 tabla->aux_r_gain = snd_soc_read(codec,
1943 TABLA_A_AUX_R_GAIN);
1944 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1945 }
1946 if (tabla->aux_pga_cnt++ == 1
1947 && !tabla->mclk_enabled) {
1948 tabla_codec_enable_clock_block(codec, 1);
1949 pr_debug("AUX PGA enabled RC osc\n");
1950 }
1951 break;
1952
1953 case SND_SOC_DAPM_POST_PMU:
1954 if (w->reg == TABLA_A_AUX_L_EN)
1955 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1956 tabla->aux_l_gain);
1957 else
1958 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1959 tabla->aux_r_gain);
1960 break;
1961
1962 case SND_SOC_DAPM_PRE_PMD:
1963 /* Mute AUX PGA channel in use before disabling AUX PGA */
1964 if (w->reg == TABLA_A_AUX_L_EN) {
1965 tabla->aux_l_gain = snd_soc_read(codec,
1966 TABLA_A_AUX_L_GAIN);
1967 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1968 } else {
1969 tabla->aux_r_gain = snd_soc_read(codec,
1970 TABLA_A_AUX_R_GAIN);
1971 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1972 }
1973 break;
1974
1975 case SND_SOC_DAPM_POST_PMD:
1976 tabla_enable_rx_bias(codec, 0);
1977
1978 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1979 0x08, 0x00);
1980 if (w->reg == TABLA_A_AUX_L_EN) {
1981 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1982 tabla->aux_l_gain);
1983 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1984 0x20, 0x00);
1985 } else {
1986 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1987 tabla->aux_r_gain);
1988 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1989 0x20, 0x00);
1990 }
1991
1992 if (tabla->aux_pga_cnt-- == 0) {
1993 if (tabla->mbhc_polling_active)
1994 tabla_codec_enable_bandgap(codec,
1995 TABLA_BANDGAP_MBHC_MODE);
1996 else
1997 tabla_codec_enable_bandgap(codec,
1998 TABLA_BANDGAP_OFF);
1999
2000 if (!tabla->mclk_enabled &&
2001 !tabla->mbhc_polling_active) {
2002 tabla_codec_enable_clock_block(codec, 0);
2003 }
2004 }
2005 break;
2006 }
2007 return 0;
2008}
2009
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002010static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
2011 struct snd_kcontrol *kcontrol, int event)
2012{
2013 struct snd_soc_codec *codec = w->codec;
2014 u16 lineout_gain_reg;
2015
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002016 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002017
2018 switch (w->shift) {
2019 case 0:
2020 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
2021 break;
2022 case 1:
2023 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
2024 break;
2025 case 2:
2026 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
2027 break;
2028 case 3:
2029 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
2030 break;
2031 case 4:
2032 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
2033 break;
2034 default:
2035 pr_err("%s: Error, incorrect lineout register value\n",
2036 __func__);
2037 return -EINVAL;
2038 }
2039
2040 switch (event) {
2041 case SND_SOC_DAPM_PRE_PMU:
2042 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2043 break;
2044 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002045 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002046 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002047 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002048 break;
2049 case SND_SOC_DAPM_POST_PMD:
2050 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2051 break;
2052 }
2053 return 0;
2054}
2055
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002056
2057static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002058 struct snd_kcontrol *kcontrol, int event)
2059{
2060 struct snd_soc_codec *codec = w->codec;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002061 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2062 u8 dmic_clk_en;
2063 s32 *dmic_clk_cnt;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002064 unsigned int dmic;
2065 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002066
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002067 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2068 if (ret < 0) {
2069 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002070 return -EINVAL;
2071 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002072
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002073 switch (dmic) {
2074 case 1:
2075 case 2:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002076 dmic_clk_en = 0x01;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002077 dmic_clk_cnt = &(tabla->dmic_1_2_clk_cnt);
2078
2079 pr_debug("%s() event %d DMIC%d dmic_1_2_clk_cnt %d\n",
2080 __func__, event, dmic, *dmic_clk_cnt);
2081
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002082 break;
2083
2084 case 3:
2085 case 4:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002086 dmic_clk_en = 0x04;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002087 dmic_clk_cnt = &(tabla->dmic_3_4_clk_cnt);
2088
2089 pr_debug("%s() event %d DMIC%d dmic_3_4_clk_cnt %d\n",
2090 __func__, event, dmic, *dmic_clk_cnt);
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002091 break;
2092
2093 case 5:
2094 case 6:
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002095 dmic_clk_en = 0x10;
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002096 dmic_clk_cnt = &(tabla->dmic_5_6_clk_cnt);
2097
2098 pr_debug("%s() event %d DMIC%d dmic_5_6_clk_cnt %d\n",
2099 __func__, event, dmic, *dmic_clk_cnt);
2100
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002101 break;
2102
2103 default:
2104 pr_err("%s: Invalid DMIC Selection\n", __func__);
2105 return -EINVAL;
2106 }
2107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002108 switch (event) {
2109 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002110
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002111 (*dmic_clk_cnt)++;
2112 if (*dmic_clk_cnt == 1)
2113 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2114 dmic_clk_en, dmic_clk_en);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002116 break;
2117 case SND_SOC_DAPM_POST_PMD:
Kiran Kandi0ba468f2012-05-08 11:45:05 -07002118
2119 (*dmic_clk_cnt)--;
2120 if (*dmic_clk_cnt == 0)
2121 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2122 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002123 break;
2124 }
2125 return 0;
2126}
2127
Bradley Rubin229c6a52011-07-12 16:18:48 -07002128static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
2129 struct snd_kcontrol *kcontrol, int event)
2130{
2131 struct snd_soc_codec *codec = w->codec;
2132 const char *filename;
2133 const struct firmware *fw;
2134 int i;
2135 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07002136 int num_anc_slots;
2137 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002138 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07002139 u32 anc_writes_size = 0;
2140 int anc_size_remaining;
2141 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002142 u16 reg;
2143 u8 mask, val, old_val;
2144
2145 pr_debug("%s %d\n", __func__, event);
2146 switch (event) {
2147 case SND_SOC_DAPM_PRE_PMU:
2148
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002149 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07002150
2151 ret = request_firmware(&fw, filename, codec->dev);
2152 if (ret != 0) {
2153 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
2154 ret);
2155 return -ENODEV;
2156 }
2157
Bradley Rubina7096d02011-08-03 18:29:02 -07002158 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07002159 dev_err(codec->dev, "Not enough data\n");
2160 release_firmware(fw);
2161 return -ENOMEM;
2162 }
2163
2164 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07002165 anc_head = (struct anc_header *)(fw->data);
2166 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
2167 anc_size_remaining = fw->size - sizeof(struct anc_header);
2168 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002169
Bradley Rubina7096d02011-08-03 18:29:02 -07002170 if (tabla->anc_slot >= num_anc_slots) {
2171 dev_err(codec->dev, "Invalid ANC slot selected\n");
2172 release_firmware(fw);
2173 return -EINVAL;
2174 }
2175
2176 for (i = 0; i < num_anc_slots; i++) {
2177
2178 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
2179 dev_err(codec->dev, "Invalid register format\n");
2180 release_firmware(fw);
2181 return -EINVAL;
2182 }
2183 anc_writes_size = (u32)(*anc_ptr);
2184 anc_size_remaining -= sizeof(u32);
2185 anc_ptr += 1;
2186
2187 if (anc_writes_size * TABLA_PACKED_REG_SIZE
2188 > anc_size_remaining) {
2189 dev_err(codec->dev, "Invalid register format\n");
2190 release_firmware(fw);
2191 return -ENOMEM;
2192 }
2193
2194 if (tabla->anc_slot == i)
2195 break;
2196
2197 anc_size_remaining -= (anc_writes_size *
2198 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07002199 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07002200 }
2201 if (i == num_anc_slots) {
2202 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07002203 release_firmware(fw);
2204 return -ENOMEM;
2205 }
2206
Bradley Rubina7096d02011-08-03 18:29:02 -07002207 for (i = 0; i < anc_writes_size; i++) {
2208 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07002209 mask, val);
2210 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002211 snd_soc_write(codec, reg, (old_val & ~mask) |
2212 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07002213 }
2214 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002215
Joonwoo Park743d0e32012-05-17 15:11:58 -07002216 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
2217 /* if MBHC polling is active, set TX7_MBHC_EN bit 7 */
2218 if (tabla->mbhc_polling_active)
2219 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80,
2220 0x80);
2221 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002222 break;
2223 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park743d0e32012-05-17 15:11:58 -07002224 /* unset TX7_MBHC_EN bit 7 */
2225 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
2226
Bradley Rubin229c6a52011-07-12 16:18:48 -07002227 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
2228 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
2229 break;
2230 }
2231 return 0;
2232}
2233
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002234/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002235static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2236{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002237 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002238 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2239 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002240
Joonwoo Park03324832012-03-19 19:36:16 -07002241 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002242 if (!tabla->mbhc_polling_active) {
2243 pr_debug("Polling is not active, do not start polling\n");
2244 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002245 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002246 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002247
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07002248 if (tabla->no_mic_headset_override) {
2249 pr_debug("%s setting button threshold to min", __func__);
2250 /* set to min */
2251 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
2252 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
2253 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x80);
2254 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0x00);
2255 } else if (unlikely(mbhc_state == MBHC_STATE_POTENTIAL)) {
2256 pr_debug("%s recovering MBHC state machine\n", __func__);
2257 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
2258 /* set to max button press threshold */
2259 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL, 0x7F);
2260 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL, 0xFF);
2261 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2262 (TABLA_IS_1_X(tabla_core->version) ?
2263 0x07 : 0x7F));
2264 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0xFF);
2265 /* set to max */
2266 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL, 0x7F);
2267 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL, 0xFF);
Joonwoo Park03324832012-03-19 19:36:16 -07002268 }
2269
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002270 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2271 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2272 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002273 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002274}
2275
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002276/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002277static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2278{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002279 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2280
Joonwoo Park03324832012-03-19 19:36:16 -07002281 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002282 if (!tabla->mbhc_polling_active) {
2283 pr_debug("polling not active, nothing to pause\n");
2284 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002285 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002286
2287 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002288 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002289}
2290
Joonwoo Park03324832012-03-19 19:36:16 -07002291static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002292{
2293 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2294 u8 reg_mode_val, cur_mode_val;
2295 bool mbhc_was_polling = false;
2296
2297 if (mode)
2298 reg_mode_val = TABLA_CFILT_FAST_MODE;
2299 else
2300 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2301
2302 cur_mode_val = snd_soc_read(codec,
2303 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2304
2305 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002306 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002307 if (tabla->mbhc_polling_active) {
2308 tabla_codec_pause_hs_polling(codec);
2309 mbhc_was_polling = true;
2310 }
2311 snd_soc_update_bits(codec,
2312 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2313 if (mbhc_was_polling)
2314 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002315 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002316 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2317 cur_mode_val, reg_mode_val);
2318 } else {
2319 pr_debug("%s: CFILT Value is already %x\n",
2320 __func__, cur_mode_val);
2321 }
2322}
2323
2324static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2325 u8 cfilt_sel, int inc)
2326{
2327 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2328 u32 *cfilt_cnt_ptr = NULL;
2329 u16 micb_cfilt_reg;
2330
2331 switch (cfilt_sel) {
2332 case TABLA_CFILT1_SEL:
2333 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2334 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2335 break;
2336 case TABLA_CFILT2_SEL:
2337 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2338 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2339 break;
2340 case TABLA_CFILT3_SEL:
2341 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2342 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2343 break;
2344 default:
2345 return; /* should not happen */
2346 }
2347
2348 if (inc) {
2349 if (!(*cfilt_cnt_ptr)++) {
2350 /* Switch CFILT to slow mode if MBHC CFILT being used */
2351 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2352 tabla_codec_switch_cfilt_mode(codec, 0);
2353
2354 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2355 }
2356 } else {
2357 /* check if count not zero, decrement
2358 * then check if zero, go ahead disable cfilter
2359 */
2360 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2361 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2362
2363 /* Switch CFILT to fast mode if MBHC CFILT being used */
2364 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2365 tabla_codec_switch_cfilt_mode(codec, 1);
2366 }
2367 }
2368}
2369
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002370static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2371{
2372 int rc = -EINVAL;
2373 unsigned min_mv, max_mv;
2374
2375 switch (ldoh_v) {
2376 case TABLA_LDOH_1P95_V:
2377 min_mv = 160;
2378 max_mv = 1800;
2379 break;
2380 case TABLA_LDOH_2P35_V:
2381 min_mv = 200;
2382 max_mv = 2200;
2383 break;
2384 case TABLA_LDOH_2P75_V:
2385 min_mv = 240;
2386 max_mv = 2600;
2387 break;
2388 case TABLA_LDOH_2P85_V:
2389 min_mv = 250;
2390 max_mv = 2700;
2391 break;
2392 default:
2393 goto done;
2394 }
2395
2396 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2397 goto done;
2398
2399 for (rc = 4; rc <= 44; rc++) {
2400 min_mv = max_mv * (rc) / 44;
2401 if (min_mv >= cfilt_mv) {
2402 rc -= 4;
2403 break;
2404 }
2405 }
2406done:
2407 return rc;
2408}
2409
2410static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2411{
2412 u8 hph_reg_val = 0;
2413 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2414
2415 return (hph_reg_val & 0x30) ? true : false;
2416}
2417
Joonwoo Parka9444452011-12-08 18:48:27 -08002418static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2419{
2420 u8 hph_reg_val = 0;
2421 if (left)
2422 hph_reg_val = snd_soc_read(codec,
2423 TABLA_A_RX_HPH_L_DAC_CTL);
2424 else
2425 hph_reg_val = snd_soc_read(codec,
2426 TABLA_A_RX_HPH_R_DAC_CTL);
2427
2428 return (hph_reg_val & 0xC0) ? true : false;
2429}
2430
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002431static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2432{
2433 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2434}
2435
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002436/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002437static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2438 int usec)
2439{
2440 int cfilt_k_val;
2441 bool set = true;
2442 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2443
2444 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2445 tabla->mbhc_micbias_switched) {
2446 pr_debug("%s: set mic V to micbias V\n", __func__);
2447 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2448 tabla_turn_onoff_override(codec, true);
2449 while (1) {
2450 cfilt_k_val = tabla_find_k_value(
2451 tabla->pdata->micbias.ldoh_v,
2452 set ? tabla->mbhc_data.micb_mv :
2453 VDDIO_MICBIAS_MV);
2454 snd_soc_update_bits(codec,
2455 tabla->mbhc_bias_regs.cfilt_val,
2456 0xFC, (cfilt_k_val << 2));
2457 if (!set)
2458 break;
2459 usleep_range(usec, usec);
2460 set = false;
2461 }
2462 tabla_turn_onoff_override(codec, false);
2463 }
2464}
2465
2466/* called under codec_resource_lock acquisition */
2467static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2468 int vddio_switch, bool restartpolling,
2469 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002470{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002471 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002472 bool override;
2473 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002474
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002475 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2476 (!checkpolling || tabla->mbhc_polling_active)) {
2477 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002478 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002479 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2480 if (!override)
2481 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002482 /* Adjust threshold if Mic Bias voltage changes */
2483 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002484 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002485 tabla->pdata->micbias.ldoh_v,
2486 VDDIO_MICBIAS_MV);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002487 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002488 tabla->mbhc_bias_regs.cfilt_val,
2489 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002490 usleep_range(cfilt_adjust_ms * 1000,
2491 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002492 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2493 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2494 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2495 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2496 0xFF);
2497 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2498 __func__);
2499 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002500
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002501 /* enable MIC BIAS Switch to VDDIO */
2502 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2503 0x80, 0x80);
2504 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2505 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002506 if (!override)
2507 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002508 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002509 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002510
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002511 tabla->mbhc_micbias_switched = true;
2512 pr_debug("%s: VDDIO switch enabled\n", __func__);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002513 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2514 if ((!checkpolling || tabla->mbhc_polling_active) &&
2515 restartpolling)
2516 tabla_codec_pause_hs_polling(codec);
2517 /* Reprogram thresholds */
2518 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2519 cfilt_k_val = tabla_find_k_value(
2520 tabla->pdata->micbias.ldoh_v,
2521 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002522 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002523 tabla->mbhc_bias_regs.cfilt_val,
2524 0xFC, (cfilt_k_val << 2));
Joonwoo Parkc1c67a92012-08-07 16:05:36 -07002525 usleep_range(cfilt_adjust_ms * 1000,
2526 cfilt_adjust_ms * 1000);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002527 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2528 tabla->mbhc_data.v_ins_hu & 0xFF);
2529 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2530 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2531 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2532 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002533 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002534
2535 /* Disable MIC BIAS Switch to VDDIO */
2536 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2537 0x80, 0x00);
2538 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2539 0x10, 0x00);
2540
2541 if ((!checkpolling || tabla->mbhc_polling_active) &&
2542 restartpolling)
2543 tabla_codec_start_hs_polling(codec);
2544
2545 tabla->mbhc_micbias_switched = false;
2546 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002547 }
2548}
2549
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002550static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2551 int vddio_switch)
2552{
2553 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2554}
2555
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002556static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2557 struct snd_kcontrol *kcontrol, int event)
2558{
2559 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002560 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2561 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002562 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002563 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002564 char *internal1_text = "Internal1";
2565 char *internal2_text = "Internal2";
2566 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002567
2568 pr_debug("%s %d\n", __func__, event);
2569 switch (w->reg) {
2570 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002571 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002572 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002573 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002574 break;
2575 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002576 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002577 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002578 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002579 break;
2580 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002581 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002582 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002583 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002584 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002585 case TABLA_1_A_MICB_4_CTL:
2586 case TABLA_2_A_MICB_4_CTL:
2587 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002588 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002589 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002590 break;
2591 default:
2592 pr_err("%s: Error, invalid micbias register\n", __func__);
2593 return -EINVAL;
2594 }
2595
2596 switch (event) {
2597 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002598 /* Decide whether to switch the micbias for MBHC */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002599 if (w->reg == tabla->mbhc_bias_regs.ctl_reg) {
2600 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002601 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002602 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2603 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002604
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002605 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002606 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002607
2608 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002610 else if (strnstr(w->name, internal2_text, 30))
2611 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2612 else if (strnstr(w->name, internal3_text, 30))
2613 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2614
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002615 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002616 case SND_SOC_DAPM_POST_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002617
2618 usleep_range(20000, 20000);
2619
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002620 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002621 tabla->mbhc_cfg.micbias == micb_line) {
2622 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002623 tabla_codec_pause_hs_polling(codec);
2624 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002625 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002626 }
2627 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002628
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002629 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park03324832012-03-19 19:36:16 -07002630 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002631 tabla_is_hph_pa_on(codec)) {
2632 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002633 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002634 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2635 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002636
Bradley Rubin229c6a52011-07-12 16:18:48 -07002637 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002639 else if (strnstr(w->name, internal2_text, 30))
2640 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2641 else if (strnstr(w->name, internal3_text, 30))
2642 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2643
Patrick Lai3043fba2011-08-01 14:15:57 -07002644 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002645 break;
2646 }
2647
2648 return 0;
2649}
2650
Kiran Kandid8cf5212012-03-02 15:34:53 -08002651
2652static void tx_hpf_corner_freq_callback(struct work_struct *work)
2653{
2654 struct delayed_work *hpf_delayed_work;
2655 struct hpf_work *hpf_work;
2656 struct tabla_priv *tabla;
2657 struct snd_soc_codec *codec;
2658 u16 tx_mux_ctl_reg;
2659 u8 hpf_cut_of_freq;
2660
2661 hpf_delayed_work = to_delayed_work(work);
2662 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2663 tabla = hpf_work->tabla;
2664 codec = hpf_work->tabla->codec;
2665 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2666
2667 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2668 (hpf_work->decimator - 1) * 8;
2669
2670 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
2671 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
2672
2673 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
2674}
2675
2676#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
2677#define CF_MIN_3DB_4HZ 0x0
2678#define CF_MIN_3DB_75HZ 0x1
2679#define CF_MIN_3DB_150HZ 0x2
2680
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002681static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
2682 struct snd_kcontrol *kcontrol, int event)
2683{
2684 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08002685 unsigned int decimator;
2686 char *dec_name = NULL;
2687 char *widget_name = NULL;
2688 char *temp;
2689 int ret = 0;
2690 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
2691 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002692 int offset;
2693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002694
2695 pr_debug("%s %d\n", __func__, event);
2696
Kiran Kandid8cf5212012-03-02 15:34:53 -08002697 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
2698 if (!widget_name)
2699 return -ENOMEM;
2700 temp = widget_name;
2701
2702 dec_name = strsep(&widget_name, " ");
2703 widget_name = temp;
2704 if (!dec_name) {
2705 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
2706 ret = -EINVAL;
2707 goto out;
2708 }
2709
2710 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
2711 if (ret < 0) {
2712 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
2713 ret = -EINVAL;
2714 goto out;
2715 }
2716
2717 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
2718 w->name, dec_name, decimator);
2719
Kuirong Wange9c8a222012-03-28 16:24:09 -07002720 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002721 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002722 offset = 0;
2723 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002724 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002725 offset = 8;
2726 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002727 pr_err("%s: Error, incorrect dec\n", __func__);
2728 return -EINVAL;
2729 }
2730
Kiran Kandid8cf5212012-03-02 15:34:53 -08002731 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
2732 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
2733
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002734 switch (event) {
2735 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002736
2737 // Enableable TX digital mute */
2738 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2739
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002740 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
2741 1 << w->shift);
2742 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08002743
2744 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
2745
2746 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
2747
2748 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
2749 dec_hpf_cut_of_freq;
2750
2751 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
2752
2753 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
2754 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2755 CF_MIN_3DB_150HZ << 4);
2756 }
2757
2758 /* enable HPF */
2759 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
2760
2761 break;
2762
2763 case SND_SOC_DAPM_POST_PMU:
2764
2765 /* Disable TX digital mute */
2766 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
2767
2768 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
2769 CF_MIN_3DB_150HZ) {
2770
2771 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
2772 msecs_to_jiffies(300));
2773 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07002774 /* apply the digital gain after the decimator is enabled*/
2775 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2776 snd_soc_write(codec,
2777 tx_digital_gain_reg[w->shift + offset],
2778 snd_soc_read(codec,
2779 tx_digital_gain_reg[w->shift + offset])
2780 );
2781
Kiran Kandid8cf5212012-03-02 15:34:53 -08002782 break;
2783
2784 case SND_SOC_DAPM_PRE_PMD:
2785
2786 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2787 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
2788 break;
2789
2790 case SND_SOC_DAPM_POST_PMD:
2791
2792 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
2793 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2794 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
2795
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002796 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002797 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08002798out:
2799 kfree(widget_name);
2800 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002801}
2802
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002803static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804 struct snd_kcontrol *kcontrol, int event)
2805{
2806 struct snd_soc_codec *codec = w->codec;
2807
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002808 pr_debug("%s %d %s\n", __func__, event, w->name);
2809
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810 switch (event) {
2811 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002812 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2813 1 << w->shift, 1 << w->shift);
2814 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2815 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002816 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002817 case SND_SOC_DAPM_POST_PMU:
2818 /* apply the digital gain after the interpolator is enabled*/
2819 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2820 snd_soc_write(codec,
2821 rx_digital_gain_reg[w->shift],
2822 snd_soc_read(codec,
2823 rx_digital_gain_reg[w->shift])
2824 );
2825 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002826 }
2827 return 0;
2828}
2829
Bradley Rubin229c6a52011-07-12 16:18:48 -07002830static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
2831 struct snd_kcontrol *kcontrol, int event)
2832{
2833 switch (event) {
2834 case SND_SOC_DAPM_POST_PMU:
2835 case SND_SOC_DAPM_POST_PMD:
2836 usleep_range(1000, 1000);
2837 break;
2838 }
2839 return 0;
2840}
2841
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002842static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
2843 struct snd_kcontrol *kcontrol, int event)
2844{
2845 struct snd_soc_codec *codec = w->codec;
2846
2847 pr_debug("%s %d\n", __func__, event);
2848
2849 switch (event) {
2850 case SND_SOC_DAPM_PRE_PMU:
2851 tabla_enable_rx_bias(codec, 1);
2852 break;
2853 case SND_SOC_DAPM_POST_PMD:
2854 tabla_enable_rx_bias(codec, 0);
2855 break;
2856 }
2857 return 0;
2858}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002859static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
2860 struct snd_kcontrol *kcontrol, int event)
2861{
2862 struct snd_soc_codec *codec = w->codec;
2863
2864 pr_debug("%s %s %d\n", __func__, w->name, event);
2865
2866 switch (event) {
2867 case SND_SOC_DAPM_PRE_PMU:
2868 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
2869 break;
2870 case SND_SOC_DAPM_POST_PMD:
2871 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
2872 break;
2873 }
2874 return 0;
2875}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002876
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002877static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
2878 struct snd_soc_jack *jack, int status,
2879 int mask)
2880{
2881 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07002882 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002883}
2884
Patrick Lai49efeac2011-11-03 11:01:12 -07002885static void hphocp_off_report(struct tabla_priv *tabla,
2886 u32 jack_status, int irq)
2887{
2888 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07002889 if (!tabla) {
2890 pr_err("%s: Bad tabla private data\n", __func__);
2891 return;
2892 }
Patrick Lai49efeac2011-11-03 11:01:12 -07002893
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002894 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07002895 codec = tabla->codec;
2896 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07002897 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002898 if (tabla->mbhc_cfg.headset_jack)
2899 tabla_snd_soc_jack_report(tabla,
2900 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002901 tabla->hph_status,
2902 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08002903 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
2904 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08002905 /* reset retry counter as PA is turned off signifying
2906 * start of new OCP detection session
2907 */
2908 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
2909 tabla->hphlocp_cnt = 0;
2910 else
2911 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302912 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07002913 }
2914}
2915
2916static void hphlocp_off_report(struct work_struct *work)
2917{
2918 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2919 hphlocp_work);
2920 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
2921}
2922
2923static void hphrocp_off_report(struct work_struct *work)
2924{
2925 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2926 hphrocp_work);
2927 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
2928}
2929
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002930static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
2931 struct snd_kcontrol *kcontrol, int event)
2932{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002933 struct snd_soc_codec *codec = w->codec;
2934 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2935 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002936 pr_debug("%s: event = %d\n", __func__, event);
2937
2938 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002939 case SND_SOC_DAPM_PRE_PMU:
2940 mbhc_micb_ctl_val = snd_soc_read(codec,
2941 tabla->mbhc_bias_regs.ctl_reg);
2942
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002943 if (!(mbhc_micb_ctl_val & 0x80)) {
2944 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002945 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002946 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2947 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002948 break;
2949
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002950 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07002951 /* schedule work is required because at the time HPH PA DAPM
2952 * event callback is called by DAPM framework, CODEC dapm mutex
2953 * would have been locked while snd_soc_jack_report also
2954 * attempts to acquire same lock.
2955 */
Joonwoo Parka9444452011-12-08 18:48:27 -08002956 if (w->shift == 5) {
2957 clear_bit(TABLA_HPHL_PA_OFF_ACK,
2958 &tabla->hph_pa_dac_state);
2959 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
2960 &tabla->hph_pa_dac_state);
2961 if (tabla->hph_status & SND_JACK_OC_HPHL)
2962 schedule_work(&tabla->hphlocp_work);
2963 } else if (w->shift == 4) {
2964 clear_bit(TABLA_HPHR_PA_OFF_ACK,
2965 &tabla->hph_pa_dac_state);
2966 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
2967 &tabla->hph_pa_dac_state);
2968 if (tabla->hph_status & SND_JACK_OC_HPHR)
2969 schedule_work(&tabla->hphrocp_work);
2970 }
2971
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002972 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07002973 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002974 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002975
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002976 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
2977 w->name);
2978 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002979 break;
2980 }
2981 return 0;
2982}
2983
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002984static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002985 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002986{
2987 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002988 unsigned int cfilt;
2989
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002990 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002991 case TABLA_MICBIAS1:
2992 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
2993 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
2994 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
2995 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
2996 break;
2997 case TABLA_MICBIAS2:
2998 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
2999 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
3000 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
3001 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
3002 break;
3003 case TABLA_MICBIAS3:
3004 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
3005 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
3006 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
3007 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
3008 break;
3009 case TABLA_MICBIAS4:
3010 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003011 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
3012 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
3013 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003014 break;
3015 default:
3016 /* Should never reach here */
3017 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07003018 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003019 }
3020
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003021 micbias_regs->cfilt_sel = cfilt;
3022
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003023 switch (cfilt) {
3024 case TABLA_CFILT1_SEL:
3025 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
3026 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003027 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003028 break;
3029 case TABLA_CFILT2_SEL:
3030 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
3031 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003032 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003033 break;
3034 case TABLA_CFILT3_SEL:
3035 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
3036 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08003037 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003038 break;
3039 }
3040}
Santosh Mardie15e2302011-11-15 10:39:23 +05303041static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
3042 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
3043 4, 0, NULL, 0),
3044 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
3045 0, NULL, 0),
3046};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003047
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003048static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
3049 struct snd_kcontrol *kcontrol, int event)
3050{
3051 struct snd_soc_codec *codec = w->codec;
3052
3053 pr_debug("%s %s %d\n", __func__, w->name, event);
3054
3055 switch (event) {
3056 case SND_SOC_DAPM_PRE_PMU:
3057 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3058 break;
3059
3060 case SND_SOC_DAPM_POST_PMD:
3061 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3062 break;
3063 }
3064 return 0;
3065}
3066
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003067static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
3068 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303069 0, tabla_codec_enable_micbias,
3070 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3071 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003072};
3073
3074static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
3075 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303076 0, tabla_codec_enable_micbias,
3077 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3078 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003079};
3080
Santosh Mardie15e2302011-11-15 10:39:23 +05303081static const struct snd_soc_dapm_route audio_i2s_map[] = {
3082 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3083 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3084 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3085 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3086 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3087
3088 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3089 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3090 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3091 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3092};
3093
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003094static const struct snd_soc_dapm_route audio_map[] = {
3095 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003096
3097 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
3098 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
3099
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003100 {"SLIM TX2", NULL, "SLIM TX2 MUX"},
3101 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3102
3103 {"SLIM TX3", NULL, "SLIM TX3 MUX"},
3104 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003105 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3106 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3107 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3108 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3109 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3110 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3111 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003112
3113 {"SLIM TX4", NULL, "SLIM TX4 MUX"},
3114 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003116 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
3117 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003118 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3119 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3120 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3121 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3122 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3123 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3124 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003125
3126 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
3127 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3128
3129 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
3130 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003131 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003132 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3133 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003134 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3135 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003136 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3137 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003138 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3139 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003140 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3141 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3142 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3143 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3144 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3145 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3146 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003147
3148 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003149 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3150 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3151 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003152 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003153 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3154 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003155 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3156 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3157 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3158 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003159
Kiran Kandi3426e512011-09-13 22:50:10 -07003160 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
3161 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3162 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3163 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3164 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3165 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3166 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3167 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3168 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3169 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3170 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3171
3172 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
3173 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3174 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3175 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3176 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3177 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3178 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3179 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3180 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3181 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3182 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3183
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003184 /* Earpiece (RX MIX1) */
3185 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003186 {"EAR PA", NULL, "EAR_PA_MIXER"},
3187 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003188 {"DAC1", NULL, "CP"},
3189
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003190 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3191 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003192 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003193
3194 /* Headset (RX MIX1 and RX MIX2) */
3195 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003196 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003197
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003198 {"HPHL", NULL, "HPHL_PA_MIXER"},
3199 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3200
3201 {"HPHR", NULL, "HPHR_PA_MIXER"},
3202 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003203
3204 {"HPHL DAC", NULL, "CP"},
3205 {"HPHR DAC", NULL, "CP"},
3206
3207 {"ANC", NULL, "ANC1 MUX"},
3208 {"ANC", NULL, "ANC2 MUX"},
3209 {"ANC1 MUX", "ADC1", "ADC1"},
3210 {"ANC1 MUX", "ADC2", "ADC2"},
3211 {"ANC1 MUX", "ADC3", "ADC3"},
3212 {"ANC1 MUX", "ADC4", "ADC4"},
3213 {"ANC2 MUX", "ADC1", "ADC1"},
3214 {"ANC2 MUX", "ADC2", "ADC2"},
3215 {"ANC2 MUX", "ADC3", "ADC3"},
3216 {"ANC2 MUX", "ADC4", "ADC4"},
3217
Bradley Rubine1d08622011-07-20 18:01:35 -07003218 {"ANC", NULL, "CDC_CONN"},
3219
Bradley Rubin229c6a52011-07-12 16:18:48 -07003220 {"DAC1", "Switch", "RX1 CHAIN"},
3221 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003222 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003223
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003224 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3225 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3226 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3227 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3228 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003229
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003230 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3231 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3232 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3233 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3234 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3235 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3236 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3237 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3238 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3239 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003240
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003241 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003242 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3243
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003244 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3245 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003246 {"RX1 CHAIN", NULL, "ANC"},
3247 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003248
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003249 {"CP", NULL, "RX_BIAS"},
3250 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3251 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3252 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3253 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003254 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003255
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003256 {"RX1 MIX1", NULL, "COMP1_CLK"},
3257 {"RX2 MIX1", NULL, "COMP1_CLK"},
3258 {"RX3 MIX1", NULL, "COMP2_CLK"},
3259 {"RX5 MIX1", NULL, "COMP2_CLK"},
3260
3261
Bradley Rubin229c6a52011-07-12 16:18:48 -07003262 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3263 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003264 {"RX1 MIX1", NULL, "RX1 MIX1 INP3"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003265 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3266 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003267 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3268 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3269 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3270 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3271 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3272 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3273 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3274 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003275 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3276 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003277 {"RX1 MIX2", NULL, "RX1 MIX1"},
3278 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3279 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3280 {"RX2 MIX2", NULL, "RX2 MIX1"},
3281 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3282 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3283 {"RX3 MIX2", NULL, "RX3 MIX1"},
3284 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3285 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003286
Bradley Rubin229c6a52011-07-12 16:18:48 -07003287 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3288 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303289 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3290 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003291 {"RX1 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003292 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3293 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003294 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
3295 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3296 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303297 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3298 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003299 {"RX1 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003300 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3301 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003302 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003303 {"RX1 MIX1 INP3", "RX1", "SLIM RX1"},
3304 {"RX1 MIX1 INP3", "RX2", "SLIM RX2"},
3305 {"RX1 MIX1 INP3", "RX3", "SLIM RX3"},
3306 {"RX1 MIX1 INP3", "RX4", "SLIM RX4"},
3307 {"RX1 MIX1 INP3", "RX5", "SLIM RX5"},
3308 {"RX1 MIX1 INP3", "RX6", "SLIM RX6"},
3309 {"RX1 MIX1 INP3", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003310 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3311 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303312 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3313 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003314 {"RX2 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003315 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3316 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003317 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003318 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3319 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303320 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3321 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003322 {"RX2 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003323 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3324 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003325 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003326 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3327 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303328 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3329 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003330 {"RX3 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003331 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3332 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003333 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003334 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3335 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303336 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3337 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003338 {"RX3 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003339 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3340 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003341 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003342 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3343 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303344 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3345 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003346 {"RX4 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003347 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3348 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003349 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003350 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3351 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303352 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003353 {"RX4 MIX1 INP2", "RX5", "SLIM RX5"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303354 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003355 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3356 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003357 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003358 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3359 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303360 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3361 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003362 {"RX5 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003363 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3364 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003365 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003366 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
3367 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303368 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
3369 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003370 {"RX5 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003371 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
3372 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003373 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003374 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
3375 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303376 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
3377 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003378 {"RX6 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003379 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
3380 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003381 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003382 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
3383 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303384 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
3385 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003386 {"RX6 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003387 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
3388 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003389 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003390 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
3391 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303392 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
3393 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003394 {"RX7 MIX1 INP1", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003395 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
3396 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003397 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003398 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
3399 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303400 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
3401 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Kiran Kandia9fffe92012-05-20 23:42:30 -07003402 {"RX7 MIX1 INP2", "RX5", "SLIM RX5"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003403 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
3404 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003405 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003406 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
3407 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
3408 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
3409 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
3410 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
3411 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003412
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003413 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003414 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003415 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003416 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003417 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003418 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003419 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003420 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003421 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003422 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003423 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003424 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003425 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003426 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003427 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003428 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003429 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003430 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003431 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003432 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003433 {"DEC7 MUX", "DMIC6", "DMIC6"},
3434 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003435 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003436 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003437 {"DEC8 MUX", "DMIC2", "DMIC2"},
3438 {"DEC8 MUX", "DMIC5", "DMIC5"},
3439 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003440 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003441 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003442 {"DEC9 MUX", "DMIC4", "DMIC4"},
3443 {"DEC9 MUX", "DMIC5", "DMIC5"},
3444 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003445 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003446 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003447 {"DEC10 MUX", "DMIC3", "DMIC3"},
3448 {"DEC10 MUX", "DMIC6", "DMIC6"},
3449 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003450 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003451 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003452
3453 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003454 {"ADC1", NULL, "AMIC1"},
3455 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003456 {"ADC3", NULL, "AMIC3"},
3457 {"ADC4", NULL, "AMIC4"},
3458 {"ADC5", NULL, "AMIC5"},
3459 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003460
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003461 /* AUX PGA Connections */
3462 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3463 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3464 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3465 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3466 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3467 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3468 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3469 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3470 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3471 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3472 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3473 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3474 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3475 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3476 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3477 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3478 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3479 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3480 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3481 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3482 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3483 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3484 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3485 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3486 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3487 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3488 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3489 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3490 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3491 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3492 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3493 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3494 {"AUX_PGA_Left", NULL, "AMIC5"},
3495 {"AUX_PGA_Right", NULL, "AMIC6"},
3496
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003497 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003498 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
3499 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
3500 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
3501 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
3502 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003503 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003504 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
3505 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
3506 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
3507 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003508
3509 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
3510 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
3511 {"MIC BIAS1 External", NULL, "LDO_H"},
3512 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
3513 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
3514 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
3515 {"MIC BIAS2 External", NULL, "LDO_H"},
3516 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
3517 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
3518 {"MIC BIAS3 External", NULL, "LDO_H"},
3519 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003520};
3521
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003522static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
3523
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003524 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003525 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3526
3527 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
3528
3529 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003530 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003531 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
3532
3533 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3534 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3535
3536 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3537 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
3538 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
3539};
3540
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003541
3542static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
3543
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003544 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003545 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3546
3547 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
3548
3549 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
3550
3551 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3552 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3553
3554 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3555};
3556
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003557static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
3558{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003559 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303560 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003561
3562 if (TABLA_IS_1_X(tabla_core->version)) {
3563 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
3564 if (tabla_1_reg_readable[i] == reg)
3565 return 1;
3566 }
3567 } else {
3568 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
3569 if (tabla_2_reg_readable[i] == reg)
3570 return 1;
3571 }
3572 }
3573
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003574 return tabla_reg_readable[reg];
3575}
Kuirong Wange9c8a222012-03-28 16:24:09 -07003576static bool tabla_is_digital_gain_register(unsigned int reg)
3577{
3578 bool rtn = false;
3579 switch (reg) {
3580 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
3581 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
3582 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
3583 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
3584 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
3585 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
3586 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
3587 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
3588 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
3589 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
3590 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
3591 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
3592 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
3593 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
3594 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
3595 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
3596 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
3597 rtn = true;
3598 break;
3599 default:
3600 break;
3601 }
3602 return rtn;
3603}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003604static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
3605{
3606 /* Registers lower than 0x100 are top level registers which can be
3607 * written by the Tabla core driver.
3608 */
3609
3610 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
3611 return 1;
3612
Ben Romberger1f045a72011-11-04 10:14:57 -07003613 /* IIR Coeff registers are not cacheable */
3614 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
3615 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
3616 return 1;
3617
Kuirong Wange9c8a222012-03-28 16:24:09 -07003618 /* Digital gain register is not cacheable so we have to write
3619 * the setting even it is the same
3620 */
3621 if (tabla_is_digital_gain_register(reg))
3622 return 1;
3623
Joonwoo Parkab2c5872012-05-03 15:16:02 -07003624 /* HPH status registers */
3625 if (reg == TABLA_A_RX_HPH_L_STATUS || reg == TABLA_A_RX_HPH_R_STATUS)
3626 return 1;
3627
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003628 return 0;
3629}
3630
3631#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
3632static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
3633 unsigned int value)
3634{
3635 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003636 BUG_ON(reg > TABLA_MAX_REGISTER);
3637
3638 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003639 ret = snd_soc_cache_write(codec, reg, value);
3640 if (ret != 0)
3641 dev_err(codec->dev, "Cache write to %x failed: %d\n",
3642 reg, ret);
3643 }
3644
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303645 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003646}
3647static unsigned int tabla_read(struct snd_soc_codec *codec,
3648 unsigned int reg)
3649{
3650 unsigned int val;
3651 int ret;
3652
3653 BUG_ON(reg > TABLA_MAX_REGISTER);
3654
3655 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
3656 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003657 ret = snd_soc_cache_read(codec, reg, &val);
3658 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003659 return val;
3660 } else
3661 dev_err(codec->dev, "Cache read from %x failed: %d\n",
3662 reg, ret);
3663 }
3664
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303665 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003666 return val;
3667}
3668
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003669static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
3670{
3671 s16 v_ins;
3672 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3673 tabla->mbhc_micbias_switched)
3674 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
3675 (s16)tabla->mbhc_data.adj_v_ins_h;
3676 else
3677 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
3678 (s16)tabla->mbhc_data.v_ins_h;
3679 return v_ins;
3680}
3681
3682static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
3683{
3684 s16 v_hs_max;
3685 struct tabla_mbhc_plug_type_cfg *plug_type;
3686
3687 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
3688 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3689 tabla->mbhc_micbias_switched)
3690 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
3691 else
3692 v_hs_max = plug_type->v_hs_max;
3693 return v_hs_max;
3694}
3695
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07003696static void tabla_codec_calibrate_rel(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003697{
Joonwoo Park0976d012011-12-22 11:48:18 -08003698 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003699
Joonwoo Park0976d012011-12-22 11:48:18 -08003700 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
3701 tabla->mbhc_data.v_b1_hu & 0xFF);
3702 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
3703 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
3704
3705 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
3706 tabla->mbhc_data.v_b1_h & 0xFF);
3707 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
3708 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
3709
3710 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
3711 tabla->mbhc_data.v_brh & 0xFF);
3712 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
3713 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
3714
3715 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
3716 tabla->mbhc_data.v_brl & 0xFF);
3717 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
3718 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07003719}
3720
3721static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
3722{
3723 u8 *n_ready, *n_cic;
3724 struct tabla_mbhc_btn_detect_cfg *btn_det;
3725 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3726 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
3727
3728 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
3729
3730 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
3731 v_ins_hu & 0xFF);
3732 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
3733 (v_ins_hu >> 8) & 0xFF);
3734
3735 tabla_codec_calibrate_rel(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003736
Joonwoo Parkc0672392012-01-11 11:03:14 -08003737 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003738 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08003739 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003740 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
3741 tabla->mbhc_data.npoll);
3742 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
3743 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08003744 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003745 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
3746 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003747}
3748
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003749static int tabla_startup(struct snd_pcm_substream *substream,
3750 struct snd_soc_dai *dai)
3751{
Kuirong Wanga545e722012-02-06 19:12:54 -08003752 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003753 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3754 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003755 if ((tabla_core != NULL) &&
3756 (tabla_core->dev != NULL) &&
3757 (tabla_core->dev->parent != NULL))
3758 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003759
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003760 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003761}
3762
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003763int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003764{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003765 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3766
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003767 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
3768 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003769 if (dapm)
3770 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003771 if (mclk_enable) {
3772 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003773
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003774 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07003775 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003776 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003777 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003778 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003779 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003780 tabla_codec_calibrate_hs_polling(codec);
3781 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303782 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003783 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303784 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003785 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303786 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003787 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003788 } else {
3789
3790 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003791 if (dapm)
3792 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003793 pr_err("Error, MCLK already diabled\n");
3794 return -EINVAL;
3795 }
3796 tabla->mclk_enabled = false;
3797
3798 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003799 tabla_codec_pause_hs_polling(codec);
3800 tabla_codec_disable_clock_block(codec);
3801 tabla_codec_enable_bandgap(codec,
3802 TABLA_BANDGAP_MBHC_MODE);
3803 tabla_enable_rx_bias(codec, 1);
3804 tabla_codec_enable_clock_block(codec, 1);
3805 tabla_codec_calibrate_hs_polling(codec);
3806 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003807 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
3808 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303809 } else {
3810 tabla_codec_disable_clock_block(codec);
3811 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003812 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003813 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003814 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003815 if (dapm)
3816 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003817 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003818}
3819
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003820static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
3821 int clk_id, unsigned int freq, int dir)
3822{
3823 pr_debug("%s\n", __func__);
3824 return 0;
3825}
3826
3827static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3828{
Santosh Mardie15e2302011-11-15 10:39:23 +05303829 u8 val = 0;
3830 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3831
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003832 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05303833 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3834 case SND_SOC_DAIFMT_CBS_CFS:
3835 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303836 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003837 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303838 snd_soc_update_bits(dai->codec,
3839 TABLA_A_CDC_CLK_TX_I2S_CTL,
3840 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003841 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303842 snd_soc_update_bits(dai->codec,
3843 TABLA_A_CDC_CLK_RX_I2S_CTL,
3844 TABLA_I2S_MASTER_MODE_MASK, 0);
3845 }
3846 break;
3847 case SND_SOC_DAIFMT_CBM_CFM:
3848 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303849 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303850 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003851 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303852 snd_soc_update_bits(dai->codec,
3853 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003854 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303855 snd_soc_update_bits(dai->codec,
3856 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
3857 }
3858 break;
3859 default:
3860 return -EINVAL;
3861 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003862 return 0;
3863}
3864
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003865static int tabla_set_channel_map(struct snd_soc_dai *dai,
3866 unsigned int tx_num, unsigned int *tx_slot,
3867 unsigned int rx_num, unsigned int *rx_slot)
3868
3869{
3870 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3871 u32 i = 0;
3872 if (!tx_slot && !rx_slot) {
3873 pr_err("%s: Invalid\n", __func__);
3874 return -EINVAL;
3875 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07003876 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n",
3877 __func__, dai->name, dai->id, tx_num, rx_num);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003878
Kiran Kandia9fffe92012-05-20 23:42:30 -07003879 if (dai->id == AIF1_PB || dai->id == AIF2_PB || dai->id == AIF3_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003880 for (i = 0; i < rx_num; i++) {
3881 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
3882 tabla->dai[dai->id - 1].ch_act = 0;
3883 tabla->dai[dai->id - 1].ch_tot = rx_num;
3884 }
Neema Shetty3fb1b802012-04-27 13:53:24 -07003885 } else if (dai->id == AIF1_CAP || dai->id == AIF2_CAP ||
3886 dai->id == AIF3_CAP) {
Swaminathan Sathappan8644fb32012-08-01 12:53:03 -07003887 tabla->dai[dai->id - 1].ch_tot = tx_num;
3888 /* All channels are already active.
3889 * do not reset ch_act flag
3890 */
3891 if ((tabla->dai[dai->id - 1].ch_tot != 0)
3892 && (tabla->dai[dai->id - 1].ch_act ==
3893 tabla->dai[dai->id - 1].ch_tot)) {
3894 pr_info("%s: ch_act = %d, ch_tot = %d\n", __func__,
3895 tabla->dai[dai->id - 1].ch_act,
3896 tabla->dai[dai->id - 1].ch_tot);
3897 return 0;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003898 }
Swaminathan Sathappan8644fb32012-08-01 12:53:03 -07003899
3900 tabla->dai[dai->id - 1].ch_act = 0;
3901 for (i = 0; i < tx_num; i++)
3902 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003903 }
3904 return 0;
3905}
3906
3907static int tabla_get_channel_map(struct snd_soc_dai *dai,
3908 unsigned int *tx_num, unsigned int *tx_slot,
3909 unsigned int *rx_num, unsigned int *rx_slot)
3910
3911{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303912 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003913
3914 u32 cnt = 0;
3915 u32 tx_ch[SLIM_MAX_TX_PORTS];
3916 u32 rx_ch[SLIM_MAX_RX_PORTS];
3917
3918 if (!rx_slot && !tx_slot) {
3919 pr_err("%s: Invalid\n", __func__);
3920 return -EINVAL;
3921 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07003922
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003923 /* for virtual port, codec driver needs to do
3924 * housekeeping, for now should be ok
3925 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303926 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003927 if (dai->id == AIF1_PB) {
3928 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3929 while (cnt < *rx_num) {
3930 rx_slot[cnt] = rx_ch[cnt];
3931 cnt++;
3932 }
3933 } else if (dai->id == AIF1_CAP) {
3934 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3935 while (cnt < *tx_num) {
3936 tx_slot[cnt] = tx_ch[6 + cnt];
3937 cnt++;
3938 }
Neema Shettyd3a89262012-02-16 10:23:50 -08003939 } else if (dai->id == AIF2_PB) {
3940 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3941 while (cnt < *rx_num) {
3942 rx_slot[cnt] = rx_ch[5 + cnt];
3943 cnt++;
3944 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003945 } else if (dai->id == AIF2_CAP) {
3946 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3947 tx_slot[0] = tx_ch[cnt];
3948 tx_slot[1] = tx_ch[1 + cnt];
Kiran Kandi323d7102012-04-18 19:56:14 -07003949 tx_slot[2] = tx_ch[5 + cnt];
Kiran Kandie408b842012-05-17 19:48:04 -07003950 tx_slot[3] = tx_ch[3 + cnt];
Kiran Kandia9fffe92012-05-20 23:42:30 -07003951
3952 } else if (dai->id == AIF3_PB) {
3953 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3954 rx_slot[0] = rx_ch[3];
3955 rx_slot[1] = rx_ch[4];
3956
Neema Shetty3fb1b802012-04-27 13:53:24 -07003957 } else if (dai->id == AIF3_CAP) {
3958 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3959 tx_slot[cnt] = tx_ch[2 + cnt];
3960 tx_slot[cnt + 1] = tx_ch[4 + cnt];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003961 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07003962 pr_debug("%s(): dai_name = %s DAI-ID %x tx_ch %d rx_ch %d\n",
3963 __func__, dai->name, dai->id, *tx_num, *rx_num);
3964
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003965
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003966 return 0;
3967}
3968
Kiran Kandi93923902012-06-20 17:00:25 -07003969
3970static struct snd_soc_dapm_widget tabla_dapm_aif_in_widgets[] = {
3971
3972 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 1,
3973 0, tabla_codec_enable_slimrx,
3974 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3975
3976 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 2,
3977 0, tabla_codec_enable_slimrx,
3978 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3979
3980 SND_SOC_DAPM_AIF_IN_E("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 3,
3981 0, tabla_codec_enable_slimrx,
3982 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3983
3984 SND_SOC_DAPM_AIF_IN_E("SLIM RX4", "AIF3 Playback", 0, SND_SOC_NOPM, 4,
3985 0, tabla_codec_enable_slimrx,
3986 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3987
3988 SND_SOC_DAPM_AIF_IN_E("SLIM RX5", "AIF3 Playback", 0, SND_SOC_NOPM, 5,
3989 0, tabla_codec_enable_slimrx,
3990 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3991
3992 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 6,
3993 0, tabla_codec_enable_slimrx,
3994 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3995
3996 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 7,
3997 0, tabla_codec_enable_slimrx,
3998 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
3999};
4000
4001static struct snd_soc_dapm_widget tabla_dapm_aif_out_widgets[] = {
4002
4003 SND_SOC_DAPM_AIF_OUT_E("SLIM TX1", "AIF2 Capture", 0, SND_SOC_NOPM, 1,
4004 0, tabla_codec_enable_slimtx,
4005 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4006
4007 SND_SOC_DAPM_AIF_OUT_E("SLIM TX2", "AIF2 Capture", 0, SND_SOC_NOPM, 2,
4008 0, tabla_codec_enable_slimtx,
4009 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4010
4011 SND_SOC_DAPM_AIF_OUT_E("SLIM TX3", "AIF3 Capture", 0, SND_SOC_NOPM, 3,
4012 0, tabla_codec_enable_slimtx,
4013 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4014
4015 SND_SOC_DAPM_AIF_OUT_E("SLIM TX4", "AIF2 Capture", 0, SND_SOC_NOPM, 4,
4016 0, tabla_codec_enable_slimtx,
4017 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4018
4019 SND_SOC_DAPM_AIF_OUT_E("SLIM TX5", "AIF3 Capture", 0, SND_SOC_NOPM, 5,
4020 0, tabla_codec_enable_slimtx,
4021 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4022
4023 SND_SOC_DAPM_AIF_OUT_E("SLIM TX6", "AIF2 Capture", 0, SND_SOC_NOPM, 6,
4024 0, tabla_codec_enable_slimtx,
4025 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4026
4027 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 7,
4028 0, tabla_codec_enable_slimtx,
4029 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4030
4031 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 8,
4032 0, tabla_codec_enable_slimtx,
4033 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4034
4035 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", 0, SND_SOC_NOPM, 9,
4036 0, tabla_codec_enable_slimtx,
4037 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4038
4039 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", 0, SND_SOC_NOPM, 10,
4040 0, tabla_codec_enable_slimtx,
4041 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4042};
4043
4044static int tabla_set_interpolator_rate(struct snd_soc_dai *dai,
4045 u8 rx_fs_rate_reg_val, u32 compander_fs, u32 sample_rate)
4046{
4047 u32 i, j;
4048 u8 rx_mix1_inp;
4049 u16 rx_mix_1_reg_1, rx_mix_1_reg_2;
4050 u16 rx_fs_reg;
4051 u8 rx_mix_1_reg_1_val, rx_mix_1_reg_2_val;
4052 struct snd_soc_codec *codec = dai->codec;
4053 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4054 struct snd_soc_dapm_widget *w = tabla_dapm_aif_in_widgets;
4055
4056 for (i = 0; i < ARRAY_SIZE(tabla_dapm_aif_in_widgets); i++) {
4057
4058 if (strncmp(dai->driver->playback.stream_name, w[i].sname, 13))
4059 continue;
4060
4061 rx_mix1_inp = w[i].shift + 4;
4062
4063 if ((rx_mix1_inp < 0x5) || (rx_mix1_inp > 0xB)) {
4064
4065 pr_err("%s: Invalid SLIM RX%u port. widget = %s\n",
4066 __func__, rx_mix1_inp - 4 , w[i].name);
4067 return -EINVAL;
4068 }
4069
4070 rx_mix_1_reg_1 = TABLA_A_CDC_CONN_RX1_B1_CTL;
4071
4072 for (j = 0; j < NUM_INTERPOLATORS; j++) {
4073
4074 rx_mix_1_reg_2 = rx_mix_1_reg_1 + 1;
4075
4076 rx_mix_1_reg_1_val = snd_soc_read(codec,
4077 rx_mix_1_reg_1);
4078 rx_mix_1_reg_2_val = snd_soc_read(codec,
4079 rx_mix_1_reg_2);
4080
4081 if (((rx_mix_1_reg_1_val & 0x0F) == rx_mix1_inp) ||
4082 (((rx_mix_1_reg_1_val >> 4) & 0x0F) == rx_mix1_inp)
4083 || ((rx_mix_1_reg_2_val & 0x0F) == rx_mix1_inp)) {
4084
4085 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL + 8 * j;
4086
4087 pr_debug("%s: %s connected to RX%u\n", __func__,
4088 w[i].name, j + 1);
4089
4090 pr_debug("%s: set RX%u sample rate to %u\n",
4091 __func__, j + 1, sample_rate);
4092
4093 snd_soc_update_bits(codec, rx_fs_reg,
4094 0xE0, rx_fs_rate_reg_val);
4095
4096 if (comp_rx_path[j] < COMPANDER_MAX)
4097 tabla->comp_fs[comp_rx_path[j]]
4098 = compander_fs;
4099 }
4100 if (j <= 2)
4101 rx_mix_1_reg_1 += 3;
4102 else
4103 rx_mix_1_reg_1 += 2;
4104 }
4105 }
4106 return 0;
4107}
4108
4109static int tabla_set_decimator_rate(struct snd_soc_dai *dai,
4110 u8 tx_fs_rate_reg_val, u32 sample_rate)
4111{
4112 struct snd_soc_codec *codec = dai->codec;
4113 struct snd_soc_dapm_widget *w = tabla_dapm_aif_out_widgets;
4114
4115 u32 i, tx_port;
4116 u16 tx_port_reg, tx_fs_reg;
4117 u8 tx_port_reg_val;
4118 s8 decimator;
4119
4120 for (i = 0; i < ARRAY_SIZE(tabla_dapm_aif_out_widgets); i++) {
4121
4122 if (strncmp(dai->driver->capture.stream_name, w[i].sname, 12))
4123 continue;
4124
4125 tx_port = w[i].shift;
4126
4127 if ((tx_port < 1) || (tx_port > NUM_DECIMATORS)) {
4128 pr_err("%s: Invalid SLIM TX%u port. widget = %s\n",
4129 __func__, tx_port, w[i].name);
4130 return -EINVAL;
4131 }
4132
4133 tx_port_reg = TABLA_A_CDC_CONN_TX_SB_B1_CTL + (tx_port - 1);
4134 tx_port_reg_val = snd_soc_read(codec, tx_port_reg);
4135
4136 decimator = 0;
4137
4138 if ((tx_port >= 1) && (tx_port <= 6)) {
4139
4140 tx_port_reg_val = tx_port_reg_val & 0x0F;
4141 if (tx_port_reg_val == 0x8)
4142 decimator = tx_port;
4143
4144 } else if ((tx_port >= 7) && (tx_port <= NUM_DECIMATORS)) {
4145
4146 tx_port_reg_val = tx_port_reg_val & 0x1F;
4147
4148 if ((tx_port_reg_val >= 0x8) &&
4149 (tx_port_reg_val <= 0x11)) {
4150
4151 decimator = (tx_port_reg_val - 0x8) + 1;
4152 }
4153 }
4154
4155 if (decimator) { /* SLIM_TX port has a DEC as input */
4156
4157 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL +
4158 8 * (decimator - 1);
4159
4160 pr_debug("%s: set DEC%u (-> SLIM_TX%u) rate to %u\n",
4161 __func__, decimator, tx_port, sample_rate);
4162
4163 snd_soc_update_bits(codec, tx_fs_reg, 0x07,
4164 tx_fs_rate_reg_val);
4165
4166 } else {
4167 if ((tx_port_reg_val >= 0x1) &&
4168 (tx_port_reg_val <= 0x7)) {
4169
4170 pr_debug("%s: RMIX%u going to SLIM TX%u\n",
4171 __func__, tx_port_reg_val, tx_port);
4172
4173 } else if ((tx_port_reg_val >= 0x8) &&
4174 (tx_port_reg_val <= 0x11)) {
4175
4176 pr_err("%s: ERROR: Should not be here\n",
4177 __func__);
4178 pr_err("%s: ERROR: DEC connected to SLIM TX%u\n"
4179 , __func__, tx_port);
4180 return -EINVAL;
4181
4182 } else if (tx_port_reg_val == 0) {
4183 pr_debug("%s: no signal to SLIM TX%u\n",
4184 __func__, tx_port);
4185 } else {
4186 pr_err("%s: ERROR: wrong signal to SLIM TX%u\n"
4187 , __func__, tx_port);
4188 pr_err("%s: ERROR: wrong signal = %u\n"
4189 , __func__, tx_port_reg_val);
4190 return -EINVAL;
4191 }
4192 }
4193 }
4194 return 0;
4195}
4196
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004197static int tabla_hw_params(struct snd_pcm_substream *substream,
Kiran Kandi93923902012-06-20 17:00:25 -07004198 struct snd_pcm_hw_params *params,
4199 struct snd_soc_dai *dai)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004200{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004201 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05304202 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Kiran Kandi93923902012-06-20 17:00:25 -07004203 u8 tx_fs_rate_reg_val, rx_fs_rate_reg_val;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004204 u32 compander_fs;
Kiran Kandi93923902012-06-20 17:00:25 -07004205 int ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004206
Kiran Kandia9fffe92012-05-20 23:42:30 -07004207 pr_debug("%s: dai_name = %s DAI-ID %x rate %d num_ch %d\n", __func__,
Kiran Kandi93923902012-06-20 17:00:25 -07004208 dai->name, dai->id, params_rate(params),
4209 params_channels(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004210
4211 switch (params_rate(params)) {
4212 case 8000:
Kiran Kandi93923902012-06-20 17:00:25 -07004213 tx_fs_rate_reg_val = 0x00;
4214 rx_fs_rate_reg_val = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004215 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004216 break;
4217 case 16000:
Kiran Kandi93923902012-06-20 17:00:25 -07004218 tx_fs_rate_reg_val = 0x01;
4219 rx_fs_rate_reg_val = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004220 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004221 break;
4222 case 32000:
Kiran Kandi93923902012-06-20 17:00:25 -07004223 tx_fs_rate_reg_val = 0x02;
4224 rx_fs_rate_reg_val = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004225 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004226 break;
4227 case 48000:
Kiran Kandi93923902012-06-20 17:00:25 -07004228 tx_fs_rate_reg_val = 0x03;
4229 rx_fs_rate_reg_val = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004230 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004231 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004232 case 96000:
Kiran Kandi93923902012-06-20 17:00:25 -07004233 tx_fs_rate_reg_val = 0x04;
4234 rx_fs_rate_reg_val = 0x80;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004235 compander_fs = COMPANDER_FS_96KHZ;
4236 break;
4237 case 192000:
Kiran Kandi93923902012-06-20 17:00:25 -07004238 tx_fs_rate_reg_val = 0x05;
4239 rx_fs_rate_reg_val = 0xA0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004240 compander_fs = COMPANDER_FS_192KHZ;
4241 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004242 default:
4243 pr_err("%s: Invalid sampling rate %d\n", __func__,
4244 params_rate(params));
4245 return -EINVAL;
4246 }
4247
Kiran Kandi93923902012-06-20 17:00:25 -07004248 switch (substream->stream) {
4249 case SNDRV_PCM_STREAM_CAPTURE:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004250
Kiran Kandi93923902012-06-20 17:00:25 -07004251 ret = tabla_set_decimator_rate(dai, tx_fs_rate_reg_val,
4252 params_rate(params));
4253 if (ret < 0) {
4254 pr_err("%s: set decimator rate failed %d\n", __func__,
4255 ret);
4256 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004257 }
Kiran Kandi93923902012-06-20 17:00:25 -07004258
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304259 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304260 switch (params_format(params)) {
4261 case SNDRV_PCM_FORMAT_S16_LE:
4262 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004263 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304264 break;
4265 case SNDRV_PCM_FORMAT_S32_LE:
4266 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004267 TABLA_A_CDC_CLK_TX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304268 break;
4269 default:
Kiran Kandi93923902012-06-20 17:00:25 -07004270 pr_err("%s: invalid TX format %u\n", __func__,
4271 params_format(params));
4272 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304273 }
4274 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004275 0x07, tx_fs_rate_reg_val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004276 } else {
4277 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304278 }
Kiran Kandi93923902012-06-20 17:00:25 -07004279 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004280
Kiran Kandi93923902012-06-20 17:00:25 -07004281 case SNDRV_PCM_STREAM_PLAYBACK:
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004282
Kiran Kandi93923902012-06-20 17:00:25 -07004283 ret = tabla_set_interpolator_rate(dai, rx_fs_rate_reg_val,
4284 compander_fs, params_rate(params));
4285 if (ret < 0) {
4286 pr_err("%s: set decimator rate failed %d\n", __func__,
4287 ret);
4288 return ret;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004289 }
Kiran Kandi93923902012-06-20 17:00:25 -07004290
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304291 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304292 switch (params_format(params)) {
4293 case SNDRV_PCM_FORMAT_S16_LE:
4294 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004295 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x20);
Santosh Mardie15e2302011-11-15 10:39:23 +05304296 break;
4297 case SNDRV_PCM_FORMAT_S32_LE:
4298 snd_soc_update_bits(codec,
Kiran Kandi93923902012-06-20 17:00:25 -07004299 TABLA_A_CDC_CLK_RX_I2S_CTL, 0x20, 0x00);
Santosh Mardie15e2302011-11-15 10:39:23 +05304300 break;
4301 default:
Kiran Kandi93923902012-06-20 17:00:25 -07004302 pr_err("%s: invalid RX format %u\n", __func__,
4303 params_format(params));
4304 return -EINVAL;
Santosh Mardie15e2302011-11-15 10:39:23 +05304305 }
4306 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
Kiran Kandi93923902012-06-20 17:00:25 -07004307 0x03, (rx_fs_rate_reg_val >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004308 } else {
4309 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304310 }
Kiran Kandi93923902012-06-20 17:00:25 -07004311 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004312
Kiran Kandi93923902012-06-20 17:00:25 -07004313 default:
4314 pr_err("%s: Invalid stream type %d\n", __func__,
4315 substream->stream);
4316 return -EINVAL;
4317 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004318 return 0;
4319}
4320
4321static struct snd_soc_dai_ops tabla_dai_ops = {
4322 .startup = tabla_startup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004323 .hw_params = tabla_hw_params,
4324 .set_sysclk = tabla_set_dai_sysclk,
4325 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004326 .set_channel_map = tabla_set_channel_map,
4327 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004328};
4329
4330static struct snd_soc_dai_driver tabla_dai[] = {
4331 {
4332 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004333 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004334 .playback = {
4335 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004336 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004337 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004338 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004339 .rate_min = 8000,
4340 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004341 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004342 },
4343 .ops = &tabla_dai_ops,
4344 },
4345 {
4346 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004347 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004348 .capture = {
4349 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004350 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004351 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004352 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004353 .rate_min = 8000,
4354 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004355 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004356 },
4357 .ops = &tabla_dai_ops,
4358 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004359 {
4360 .name = "tabla_rx2",
4361 .id = AIF2_PB,
4362 .playback = {
4363 .stream_name = "AIF2 Playback",
4364 .rates = WCD9310_RATES,
4365 .formats = TABLA_FORMATS,
4366 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004367 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004368 .channels_min = 1,
4369 .channels_max = 2,
4370 },
4371 .ops = &tabla_dai_ops,
4372 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004373 {
4374 .name = "tabla_tx2",
4375 .id = AIF2_CAP,
4376 .capture = {
4377 .stream_name = "AIF2 Capture",
4378 .rates = WCD9310_RATES,
4379 .formats = TABLA_FORMATS,
4380 .rate_max = 192000,
4381 .rate_min = 8000,
4382 .channels_min = 1,
4383 .channels_max = 4,
4384 },
4385 .ops = &tabla_dai_ops,
4386 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07004387 {
4388 .name = "tabla_tx3",
4389 .id = AIF3_CAP,
4390 .capture = {
4391 .stream_name = "AIF3 Capture",
4392 .rates = WCD9310_RATES,
4393 .formats = TABLA_FORMATS,
4394 .rate_max = 48000,
4395 .rate_min = 8000,
4396 .channels_min = 1,
4397 .channels_max = 2,
4398 },
4399 .ops = &tabla_dai_ops,
4400 },
Kiran Kandia9fffe92012-05-20 23:42:30 -07004401 {
4402 .name = "tabla_rx3",
4403 .id = AIF3_PB,
4404 .playback = {
4405 .stream_name = "AIF3 Playback",
4406 .rates = WCD9310_RATES,
4407 .formats = TABLA_FORMATS,
4408 .rate_min = 8000,
4409 .rate_max = 192000,
4410 .channels_min = 1,
4411 .channels_max = 2,
4412 },
4413 .ops = &tabla_dai_ops,
4414 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004415};
Santosh Mardie15e2302011-11-15 10:39:23 +05304416
4417static struct snd_soc_dai_driver tabla_i2s_dai[] = {
4418 {
4419 .name = "tabla_i2s_rx1",
4420 .id = 1,
4421 .playback = {
4422 .stream_name = "AIF1 Playback",
4423 .rates = WCD9310_RATES,
4424 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004425 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304426 .rate_min = 8000,
4427 .channels_min = 1,
4428 .channels_max = 4,
4429 },
4430 .ops = &tabla_dai_ops,
4431 },
4432 {
4433 .name = "tabla_i2s_tx1",
4434 .id = 2,
4435 .capture = {
4436 .stream_name = "AIF1 Capture",
4437 .rates = WCD9310_RATES,
4438 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004439 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304440 .rate_min = 8000,
4441 .channels_min = 1,
4442 .channels_max = 4,
4443 },
4444 .ops = &tabla_dai_ops,
4445 },
4446};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004447
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004448static int tabla_codec_enable_chmask(struct tabla_priv *tabla_p,
4449 int event, int index)
4450{
4451 int ret = 0;
4452 u32 k = 0;
4453 switch (event) {
4454 case SND_SOC_DAPM_POST_PMU:
4455 for (k = 0; k < tabla_p->dai[index].ch_tot; k++) {
4456 ret = wcd9xxx_get_slave_port(
4457 tabla_p->dai[index].ch_num[k]);
4458 if (ret < 0) {
4459 pr_err("%s: Invalid slave port ID: %d\n",
4460 __func__, ret);
4461 ret = -EINVAL;
4462 break;
4463 }
4464 tabla_p->dai[index].ch_mask |= 1 << ret;
4465 }
4466 ret = 0;
4467 break;
4468 case SND_SOC_DAPM_POST_PMD:
4469 ret = wait_event_timeout(tabla_p->dai[index].dai_wait,
4470 (tabla_p->dai[index].ch_mask == 0),
4471 msecs_to_jiffies(SLIM_CLOSE_TIMEOUT));
4472 if (!ret) {
4473 pr_err("%s: Slim close tx/rx wait timeout\n",
4474 __func__);
4475 ret = -EINVAL;
4476 }
4477 ret = 0;
4478 break;
4479 }
4480 return ret;
4481}
4482
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004483static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
4484 struct snd_kcontrol *kcontrol, int event)
4485{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304486 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004487 struct snd_soc_codec *codec = w->codec;
4488 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4489 u32 j = 0;
4490 u32 ret = 0;
4491 codec->control_data = dev_get_drvdata(codec->dev->parent);
4492 tabla = codec->control_data;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004493
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004494 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004495 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
4496 if (event == SND_SOC_DAPM_POST_PMD && (tabla != NULL) &&
4497 (tabla->dev != NULL) &&
4498 (tabla->dev->parent != NULL)) {
4499 pm_runtime_mark_last_busy(tabla->dev->parent);
4500 pm_runtime_put(tabla->dev->parent);
4501 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004502 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004503 }
Kiran Kandia9fffe92012-05-20 23:42:30 -07004504
4505 pr_debug("%s: %s %d\n", __func__, w->name, event);
4506
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004507 switch (event) {
4508 case SND_SOC_DAPM_POST_PMU:
4509 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004510 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004511 (tabla_dai[j].id == AIF2_CAP) ||
4512 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004513 continue;
4514 if (!strncmp(w->sname,
4515 tabla_dai[j].playback.stream_name, 13)) {
4516 ++tabla_p->dai[j].ch_act;
4517 break;
4518 }
4519 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004520 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot) {
4521 ret = tabla_codec_enable_chmask(tabla_p,
4522 SND_SOC_DAPM_POST_PMU,
4523 j);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304524 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
4525 tabla_p->dai[j].ch_num,
4526 tabla_p->dai[j].ch_tot,
4527 tabla_p->dai[j].rate);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004528 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004529 break;
4530 case SND_SOC_DAPM_POST_PMD:
4531 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004532 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004533 (tabla_dai[j].id == AIF2_CAP) ||
4534 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004535 continue;
4536 if (!strncmp(w->sname,
4537 tabla_dai[j].playback.stream_name, 13)) {
Helen Zeng2aaa3c12012-06-08 20:29:21 -07004538 if (tabla_p->dai[j].ch_act)
4539 --tabla_p->dai[j].ch_act;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004540 break;
4541 }
4542 }
4543 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304544 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004545 tabla_p->dai[j].ch_num,
4546 tabla_p->dai[j].ch_tot);
4547 tabla_p->dai[j].rate = 0;
4548 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304549 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004550 tabla_p->dai[j].ch_tot = 0;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004551 ret = tabla_codec_enable_chmask(tabla_p,
4552 SND_SOC_DAPM_POST_PMD,
4553 j);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004554 if ((tabla != NULL) &&
4555 (tabla->dev != NULL) &&
4556 (tabla->dev->parent != NULL)) {
4557 pm_runtime_mark_last_busy(tabla->dev->parent);
4558 pm_runtime_put(tabla->dev->parent);
4559 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004560 }
4561 }
4562 return ret;
4563}
4564
4565static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
4566 struct snd_kcontrol *kcontrol, int event)
4567{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304568 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004569 struct snd_soc_codec *codec = w->codec;
4570 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4571 /* index to the DAI ID, for now hardcoding */
4572 u32 j = 0;
4573 u32 ret = 0;
4574
4575 codec->control_data = dev_get_drvdata(codec->dev->parent);
4576 tabla = codec->control_data;
4577
4578 /* Execute the callback only if interface type is slimbus */
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004579 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
4580 if (event == SND_SOC_DAPM_POST_PMD && (tabla != NULL) &&
4581 (tabla->dev != NULL) &&
4582 (tabla->dev->parent != NULL)) {
4583 pm_runtime_mark_last_busy(tabla->dev->parent);
4584 pm_runtime_put(tabla->dev->parent);
4585 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004586 return 0;
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004587 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004588
4589 pr_debug("%s(): %s %d\n", __func__, w->name, event);
4590
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004591 switch (event) {
4592 case SND_SOC_DAPM_POST_PMU:
4593 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004594 if (tabla_dai[j].id == AIF1_PB ||
Kiran Kandia9fffe92012-05-20 23:42:30 -07004595 tabla_dai[j].id == AIF2_PB ||
4596 tabla_dai[j].id == AIF3_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004597 continue;
4598 if (!strncmp(w->sname,
4599 tabla_dai[j].capture.stream_name, 13)) {
4600 ++tabla_p->dai[j].ch_act;
4601 break;
4602 }
4603 }
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004604 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot) {
4605 ret = tabla_codec_enable_chmask(tabla_p,
4606 SND_SOC_DAPM_POST_PMU,
4607 j);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304608 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004609 tabla_p->dai[j].ch_num,
4610 tabla_p->dai[j].ch_tot,
4611 tabla_p->dai[j].rate);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004612 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004613 break;
4614 case SND_SOC_DAPM_POST_PMD:
4615 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004616 if (tabla_dai[j].id == AIF1_PB ||
Kiran Kandia9fffe92012-05-20 23:42:30 -07004617 tabla_dai[j].id == AIF2_PB ||
4618 tabla_dai[j].id == AIF3_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004619 continue;
4620 if (!strncmp(w->sname,
4621 tabla_dai[j].capture.stream_name, 13)) {
4622 --tabla_p->dai[j].ch_act;
4623 break;
4624 }
4625 }
4626 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304627 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004628 tabla_p->dai[j].ch_num,
4629 tabla_p->dai[j].ch_tot);
4630 tabla_p->dai[j].rate = 0;
4631 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304632 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004633 tabla_p->dai[j].ch_tot = 0;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07004634 ret = tabla_codec_enable_chmask(tabla_p,
4635 SND_SOC_DAPM_POST_PMD,
4636 j);
Swaminathan Sathappanb74caaa2012-07-10 17:28:54 -07004637 if ((tabla != NULL) &&
4638 (tabla->dev != NULL) &&
4639 (tabla->dev->parent != NULL)) {
4640 pm_runtime_mark_last_busy(tabla->dev->parent);
4641 pm_runtime_put(tabla->dev->parent);
4642 }
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004643 }
4644 }
4645 return ret;
4646}
4647
4648/* Todo: Have seperate dapm widgets for I2S and Slimbus.
4649 * Might Need to have callbacks registered only for slimbus
4650 */
4651static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
4652 /*RX stuff */
4653 SND_SOC_DAPM_OUTPUT("EAR"),
4654
4655 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
4656
4657 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
4658 ARRAY_SIZE(dac1_switch)),
4659
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004660 /* Headphone */
4661 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
4662 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
4663 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4664 SND_SOC_DAPM_POST_PMD),
4665 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
4666 hphl_switch, ARRAY_SIZE(hphl_switch)),
4667
4668 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
4669 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4670 SND_SOC_DAPM_POST_PMD),
4671
4672 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
4673 tabla_hphr_dac_event,
4674 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4675
4676 /* Speaker */
4677 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
4678 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
4679 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
4680 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
4681 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
4682
4683 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
4684 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4685 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4686 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
4687 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4688 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4689 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
4690 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4691 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4692 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
4693 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4694 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4695 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
4696 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4697 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4698
4699 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
4700 , tabla_lineout_dac_event,
4701 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4702 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
4703 , tabla_lineout_dac_event,
4704 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4705 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
4706 , tabla_lineout_dac_event,
4707 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4708 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
4709 &lineout3_ground_switch),
4710 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
4711 , tabla_lineout_dac_event,
4712 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4713 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
4714 &lineout4_ground_switch),
4715 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
4716 , tabla_lineout_dac_event,
4717 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4718
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004719 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004720 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4721 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004722 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004723 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4724 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004725 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004726 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4727 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004728 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004729 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4730 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004731 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004732 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4733 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004734 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004735 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4736 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004737 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004738 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4739 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004740
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004741 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4742 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4743 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4744
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004745 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
4746 &rx4_dsm_mux, tabla_codec_reset_interpolator,
4747 SND_SOC_DAPM_PRE_PMU),
4748
4749 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
4750 &rx6_dsm_mux, tabla_codec_reset_interpolator,
4751 SND_SOC_DAPM_PRE_PMU),
4752
4753 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
4754 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
4755
4756 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4757 &rx_mix1_inp1_mux),
4758 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4759 &rx_mix1_inp2_mux),
Kiran Kandia9fffe92012-05-20 23:42:30 -07004760 SND_SOC_DAPM_MUX("RX1 MIX1 INP3", SND_SOC_NOPM, 0, 0,
4761 &rx_mix1_inp3_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004762 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4763 &rx2_mix1_inp1_mux),
4764 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4765 &rx2_mix1_inp2_mux),
4766 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4767 &rx3_mix1_inp1_mux),
4768 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4769 &rx3_mix1_inp2_mux),
4770 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4771 &rx4_mix1_inp1_mux),
4772 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4773 &rx4_mix1_inp2_mux),
4774 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4775 &rx5_mix1_inp1_mux),
4776 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4777 &rx5_mix1_inp2_mux),
4778 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4779 &rx6_mix1_inp1_mux),
4780 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4781 &rx6_mix1_inp2_mux),
4782 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4783 &rx7_mix1_inp1_mux),
4784 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4785 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004786 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4787 &rx1_mix2_inp1_mux),
4788 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4789 &rx1_mix2_inp2_mux),
4790 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4791 &rx2_mix2_inp1_mux),
4792 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4793 &rx2_mix2_inp2_mux),
4794 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4795 &rx3_mix2_inp1_mux),
4796 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4797 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004798
4799 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
4800 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
4801 SND_SOC_DAPM_PRE_PMD),
4802
4803 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
4804 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
4805 SND_SOC_DAPM_POST_PMD),
4806
4807 /* TX */
4808
4809 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
4810 0),
4811
4812 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
4813 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
4814
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004815 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
4816 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4817 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4818 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
4819 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4820 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4821
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004822 SND_SOC_DAPM_INPUT("AMIC1"),
4823 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
4824 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4825 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4826 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
4827 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4828 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4829 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
4830 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4831 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4832 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
4833 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4834 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4835
4836 SND_SOC_DAPM_INPUT("AMIC3"),
4837 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
4838 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4839 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4840
4841 SND_SOC_DAPM_INPUT("AMIC4"),
4842 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
4843 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4844 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4845
4846 SND_SOC_DAPM_INPUT("AMIC5"),
4847 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
4848 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4849
4850 SND_SOC_DAPM_INPUT("AMIC6"),
4851 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
4852 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4853
4854 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004855 &dec1_mux, tabla_codec_enable_dec,
4856 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4857 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004858
4859 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004860 &dec2_mux, tabla_codec_enable_dec,
4861 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4862 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004863
4864 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004865 &dec3_mux, tabla_codec_enable_dec,
4866 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4867 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004868
4869 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004870 &dec4_mux, tabla_codec_enable_dec,
4871 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4872 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004873
4874 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004875 &dec5_mux, tabla_codec_enable_dec,
4876 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4877 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004878
4879 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004880 &dec6_mux, tabla_codec_enable_dec,
4881 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4882 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004883
4884 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004885 &dec7_mux, tabla_codec_enable_dec,
4886 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4887 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004888
4889 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004890 &dec8_mux, tabla_codec_enable_dec,
4891 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4892 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004893
4894 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004895 &dec9_mux, tabla_codec_enable_dec,
4896 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4897 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004898
4899 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004900 &dec10_mux, tabla_codec_enable_dec,
4901 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4902 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004903
4904 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
4905 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
4906
4907 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
4908 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
4909 SND_SOC_DAPM_POST_PMD),
4910
4911 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
4912
4913 SND_SOC_DAPM_INPUT("AMIC2"),
4914 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
4915 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4916 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4917 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
4918 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4919 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4920 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
4921 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4922 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4923 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
4924 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4925 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4926 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
4927 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4928 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4929 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
4930 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4931 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4932 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
4933 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4934 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4935 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
4936 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4937 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4938
4939 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004940 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, 0, 0, &sb_tx2_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004941 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, 0, 0, &sb_tx3_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004942 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, 0, 0, &sb_tx4_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004943 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004944 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004945 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004946 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004947 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004948 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004949
4950 /* Digital Mic Inputs */
4951 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
4952 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4953 SND_SOC_DAPM_POST_PMD),
4954
4955 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
4956 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4957 SND_SOC_DAPM_POST_PMD),
4958
4959 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
4960 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4961 SND_SOC_DAPM_POST_PMD),
4962
4963 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
4964 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4965 SND_SOC_DAPM_POST_PMD),
4966
4967 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
4968 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4969 SND_SOC_DAPM_POST_PMD),
4970 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
4971 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4972 SND_SOC_DAPM_POST_PMD),
4973
4974 /* Sidetone */
4975 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
4976 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08004977
4978 /* AUX PGA */
4979 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
4980 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4981 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4982 SND_SOC_DAPM_POST_PMD),
4983
4984 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
4985 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4986 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4987 SND_SOC_DAPM_POST_PMD),
4988
4989 /* Lineout, ear and HPH PA Mixers */
4990 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
4991 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
4992
4993 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
4994 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
4995
4996 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
4997 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
4998
4999 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
5000 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
5001
5002 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
5003 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
5004
5005 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
5006 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
5007
5008 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
5009 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
5010
5011 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
5012 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08005013};
5014
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005015static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005016{
5017 u8 bias_msb, bias_lsb;
5018 short bias_value;
5019
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005020 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
5021 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
5022 bias_value = (bias_msb << 8) | bias_lsb;
5023 return bias_value;
5024}
5025
5026static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
5027{
5028 u8 bias_msb, bias_lsb;
5029 short bias_value;
5030
5031 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
5032 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
5033 bias_value = (bias_msb << 8) | bias_lsb;
5034 return bias_value;
5035}
5036
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005037static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005038{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005039 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
5040}
5041
5042static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5043 bool override_bypass, bool noreldetection)
5044{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005045 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005046 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5047
5048 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5049 if (noreldetection)
5050 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005051
Joonwoo Park925914c2012-01-05 13:35:18 -08005052 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005053 if (!override_bypass)
5054 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005055 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005056 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5057 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
5058 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005059 usleep_range(tabla->mbhc_data.t_sta_dce,
5060 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005061 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08005062 usleep_range(tabla->mbhc_data.t_dce,
5063 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005064 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005065 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005066 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005067 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5068 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08005069 usleep_range(tabla->mbhc_data.t_sta_dce,
5070 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08005071 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
5072 usleep_range(tabla->mbhc_data.t_sta,
5073 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005074 bias_value = tabla_codec_read_sta_result(codec);
5075 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5076 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005077 }
Joonwoo Park925914c2012-01-05 13:35:18 -08005078 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005079 if (!override_bypass)
5080 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5081
5082 if (noreldetection)
5083 tabla_turn_onoff_rel_detection(codec, true);
5084 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005085
Bradley Rubincb1e2732011-06-23 16:49:20 -07005086 return bias_value;
5087}
5088
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005089static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
5090 bool norel)
5091{
5092 return __tabla_codec_sta_dce(codec, dce, false, norel);
5093}
5094
5095/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005096static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005097{
5098 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005099 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005100 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005101
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005102 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005103 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005104 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07005105 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005106 }
5107
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005108 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07005109 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005110 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005111 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005112 tabla_codec_enable_clock_block(codec, 1);
5113 }
5114
5115 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
5116
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08005117 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005118 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
5119 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07005120
Joonwoo Parkf4267c22012-01-10 13:25:24 -08005121 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005122
5123 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005124 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005125
5126 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
5127 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
5128 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
5129
5130 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005131 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5132 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005133
Joonwoo Park925914c2012-01-05 13:35:18 -08005134 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005135 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
5136
Bradley Rubincb1e2732011-06-23 16:49:20 -07005137 tabla_codec_calibrate_hs_polling(codec);
5138
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005139 /* don't flip override */
5140 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005141 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5142 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005143 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005144
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07005145 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005146}
5147
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005148static int tabla_cancel_btn_work(struct tabla_priv *tabla)
5149{
5150 int r = 0;
5151 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
5152
5153 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
5154 /* if scheduled mbhc_btn_dwork is canceled from here,
5155 * we have to unlock from here instead btn_work */
5156 wcd9xxx_unlock_sleep(core);
5157 r = 1;
5158 }
5159 return r;
5160}
5161
5162/* called under codec_resource_lock acquisition */
5163void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07005164{
5165 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005166 u8 wg_time;
5167
5168 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5169 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07005170
5171 /* If headphone PA is on, check if userspace receives
5172 * removal event to sync-up PA's state */
5173 if (tabla_is_hph_pa_on(codec)) {
5174 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
5175 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5176 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
5177 } else {
5178 pr_debug("%s PA is off\n", __func__);
5179 }
5180
5181 if (tabla_is_hph_dac_on(codec, 1))
5182 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
5183 if (tabla_is_hph_dac_on(codec, 0))
5184 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005185
5186 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
5187 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
5188 0xC0, 0x00);
5189 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
5190 0xC0, 0x00);
5191 usleep_range(wg_time * 1000, wg_time * 1000);
5192}
5193
5194static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
5195{
5196 bool pa_turned_on = false;
5197 struct snd_soc_codec *codec = tabla->codec;
5198 u8 wg_time;
5199
5200 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
5201 wg_time += 1;
5202
5203 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
5204 &tabla->hph_pa_dac_state)) {
5205 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
5206 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
5207 0xC0, 0xC0);
5208 }
5209 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
5210 &tabla->hph_pa_dac_state)) {
5211 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
5212 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
5213 0xC0, 0xC0);
5214 }
5215
5216 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
5217 &tabla->hph_pa_dac_state)) {
5218 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
5219 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
5220 1 << 4);
5221 pa_turned_on = true;
5222 }
5223 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
5224 &tabla->hph_pa_dac_state)) {
5225 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
5226 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
5227 1 << 5);
5228 pa_turned_on = true;
5229 }
5230
5231 if (pa_turned_on) {
5232 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
5233 __func__);
5234 usleep_range(wg_time * 1000, wg_time * 1000);
5235 }
5236}
5237
5238/* called under codec_resource_lock acquisition */
5239static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
5240 enum snd_jack_types jack_type)
5241{
5242 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5243
5244 if (!insertion) {
5245 /* Report removal */
5246 tabla->hph_status &= ~jack_type;
5247 if (tabla->mbhc_cfg.headset_jack) {
5248 /* cancel possibly scheduled btn work and
5249 * report release if we reported button press */
5250 if (tabla_cancel_btn_work(tabla)) {
5251 pr_debug("%s: button press is canceled\n",
5252 __func__);
5253 } else if (tabla->buttons_pressed) {
5254 pr_debug("%s: Reporting release for reported "
5255 "button press %d\n", __func__,
5256 jack_type);
5257 tabla_snd_soc_jack_report(tabla,
5258 tabla->mbhc_cfg.button_jack, 0,
5259 tabla->buttons_pressed);
5260 tabla->buttons_pressed &=
5261 ~TABLA_JACK_BUTTON_MASK;
5262 }
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005263 pr_debug("%s: Reporting removal %d(%x)\n", __func__,
5264 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005265 tabla_snd_soc_jack_report(tabla,
5266 tabla->mbhc_cfg.headset_jack,
5267 tabla->hph_status,
5268 TABLA_JACK_MASK);
5269 }
5270 tabla_set_and_turnoff_hph_padac(codec);
5271 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
5272 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5273 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
5274 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5275 tabla->current_plug = PLUG_TYPE_NONE;
5276 tabla->mbhc_polling_active = false;
5277 } else {
5278 /* Report insertion */
5279 tabla->hph_status |= jack_type;
5280
5281 if (jack_type == SND_JACK_HEADPHONE)
5282 tabla->current_plug = PLUG_TYPE_HEADPHONE;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005283 else if (jack_type == SND_JACK_UNSUPPORTED)
5284 tabla->current_plug = PLUG_TYPE_GND_MIC_SWAP;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005285 else if (jack_type == SND_JACK_HEADSET) {
5286 tabla->mbhc_polling_active = true;
5287 tabla->current_plug = PLUG_TYPE_HEADSET;
5288 }
5289 if (tabla->mbhc_cfg.headset_jack) {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07005290 pr_debug("%s: Reporting insertion %d(%x)\n", __func__,
5291 jack_type, tabla->hph_status);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005292 tabla_snd_soc_jack_report(tabla,
5293 tabla->mbhc_cfg.headset_jack,
5294 tabla->hph_status,
5295 TABLA_JACK_MASK);
5296 }
5297 tabla_clr_and_turnon_hph_padac(tabla);
5298 }
Joonwoo Park03324832012-03-19 19:36:16 -07005299}
5300
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005301static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07005302 int insertion, int trigger,
5303 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005304{
5305 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005306 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08005307 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005308 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005309 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005310 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005311
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005312 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005313 pr_err("Error, no tabla calibration\n");
5314 return -EINVAL;
5315 }
5316
5317 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
5318
Joonwoo Park03324832012-03-19 19:36:16 -07005319 /* Make sure mic bias and Mic line schmitt trigger
5320 * are turned OFF
5321 */
5322 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
5323 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
5324
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005325 if (insertion) {
Joonwoo Park03324832012-03-19 19:36:16 -07005326 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005327
Joonwoo Park03324832012-03-19 19:36:16 -07005328 /* DAPM can manipulate PA/DAC bits concurrently */
5329 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005330 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005331 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005332
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005333 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005334 /* Enable HPH Schmitt Trigger */
5335 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
5336 0x11);
5337 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
5338 plug_det->hph_current << 2);
5339 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
5340 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005341 }
5342 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005343 /* enable the mic line schmitt trigger */
5344 snd_soc_update_bits(codec,
5345 tabla->mbhc_bias_regs.mbhc_reg,
5346 0x60, plug_det->mic_current << 5);
5347 snd_soc_update_bits(codec,
5348 tabla->mbhc_bias_regs.mbhc_reg,
5349 0x80, 0x80);
5350 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
5351 snd_soc_update_bits(codec,
5352 tabla->mbhc_bias_regs.ctl_reg, 0x01,
5353 0x00);
5354 snd_soc_update_bits(codec,
5355 tabla->mbhc_bias_regs.mbhc_reg,
5356 0x10, 0x10);
5357 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005358
5359 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005360 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005361 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005362 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005363 /* Make sure the HPH schmitt trigger is OFF */
5364 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
5365
5366 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07005367 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
5368 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005369 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08005370 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005371 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5372 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005373 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005374 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5375 0x10, 0x10);
5376
5377 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005378 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005379 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005380
5381 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005382 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005383 if (!(tabla->clock_active)) {
5384 tabla_codec_enable_config_mode(codec, 1);
5385 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005386 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005387 usleep_range(generic->t_shutdown_plug_rem,
5388 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005389 tabla_codec_enable_config_mode(codec, 0);
5390 } else
5391 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005392 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005393 }
5394
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005395 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005396
5397 /* If central bandgap disabled */
5398 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
5399 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005400 usleep_range(generic->t_bg_fast_settle,
5401 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005402 central_bias_enabled = 1;
5403 }
5404
5405 /* If LDO_H disabled */
5406 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
5407 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
5408 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005409 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005410 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
5411
5412 if (central_bias_enabled)
5413 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
5414 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005415
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005416 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005417 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005418
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305419 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005420 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
5421 return 0;
5422}
5423
Joonwoo Park0976d012011-12-22 11:48:18 -08005424static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
5425 s16 vin_mv)
5426{
Joonwoo Park0976d012011-12-22 11:48:18 -08005427 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005428 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08005429 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07005430 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005431
5432 tabla = snd_soc_codec_get_drvdata(codec);
5433 mb_mv = tabla->mbhc_data.micb_mv;
5434
5435 if (mb_mv == 0) {
5436 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
5437 return -EINVAL;
5438 }
5439
5440 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005441 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
5442 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005443 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005444 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
5445 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005446 }
5447 in = (u32) diff * vin_mv;
5448
Joonwoo Park03324832012-03-19 19:36:16 -07005449 value = (u16) (in / mb_mv) + zero;
5450 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005451}
5452
5453static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
5454 u16 bias_value)
5455{
5456 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005457 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08005458 s32 mv;
5459
5460 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005461 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005462 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005463 z = (tabla->mbhc_data.dce_z);
5464 mb = (tabla->mbhc_data.dce_mb);
5465 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005466 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005467 z = (tabla->mbhc_data.sta_z);
5468 mb = (tabla->mbhc_data.sta_mb);
5469 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005470 }
5471
5472 return mv;
5473}
5474
Joonwoo Park03324832012-03-19 19:36:16 -07005475static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005476{
5477 struct delayed_work *delayed_work;
5478 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005479 short bias_value;
5480 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07005481 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005482
5483 pr_debug("%s:\n", __func__);
5484
5485 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07005486 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005487 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005488
5489 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005490 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005491 bias_value = tabla_codec_read_sta_result(tabla->codec);
5492 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305493 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005494 bias_value = tabla_codec_read_dce_result(tabla->codec);
5495 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305496 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005497 pr_debug("%s: Reporting long button press event"
5498 " STA: %d, DCE: %d\n", __func__,
5499 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005500 tabla_snd_soc_jack_report(tabla,
5501 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07005502 tabla->buttons_pressed,
5503 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005504 }
5505 } else {
5506 pr_err("%s: Bad tabla private data\n", __func__);
5507 }
5508
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005509 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005510 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005511}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07005512
Joonwoo Parke067b232012-06-14 13:11:30 -07005513static u16 tabla_get_cfilt_reg(struct snd_soc_codec *codec, u8 cfilt)
5514{
5515 u16 reg;
5516
5517 switch (cfilt) {
5518 case TABLA_CFILT1_SEL:
5519 reg = TABLA_A_MICB_CFILT_1_CTL;
5520 break;
5521 case TABLA_CFILT2_SEL:
5522 reg = TABLA_A_MICB_CFILT_2_CTL;
5523 break;
5524 case TABLA_CFILT3_SEL:
5525 reg = TABLA_A_MICB_CFILT_3_CTL;
5526 break;
5527 default:
5528 BUG();
5529 }
5530 return reg;
5531}
5532
Joonwoo Park0976d012011-12-22 11:48:18 -08005533void tabla_mbhc_cal(struct snd_soc_codec *codec)
5534{
5535 struct tabla_priv *tabla;
5536 struct tabla_mbhc_btn_detect_cfg *btn_det;
Joonwoo Parke067b232012-06-14 13:11:30 -07005537 u8 cfilt_mode, micbias2_cfilt_mode, bg_mode;
Joonwoo Park0976d012011-12-22 11:48:18 -08005538 u8 ncic, nmeas, navg;
5539 u32 mclk_rate;
5540 u32 dce_wait, sta_wait;
5541 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005542 void *calibration;
Joonwoo Parke067b232012-06-14 13:11:30 -07005543 u16 bias2_ctl;
Joonwoo Park0976d012011-12-22 11:48:18 -08005544
5545 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005546 calibration = tabla->mbhc_cfg.calibration;
5547
5548 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5549 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08005550
5551 /* First compute the DCE / STA wait times
5552 * depending on tunable parameters.
5553 * The value is computed in microseconds
5554 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005555 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005556 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08005557 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005558 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
5559 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
5560 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08005561 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
5562 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08005563
5564 tabla->mbhc_data.t_dce = dce_wait;
5565 tabla->mbhc_data.t_sta = sta_wait;
5566
5567 /* LDOH and CFILT are already configured during pdata handling.
5568 * Only need to make sure CFILT and bandgap are in Fast mode.
5569 * Need to restore defaults once calculation is done.
5570 */
5571 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
Joonwoo Parke067b232012-06-14 13:11:30 -07005572 micbias2_cfilt_mode =
5573 snd_soc_read(codec, tabla_get_cfilt_reg(codec,
5574 tabla->pdata->micbias.bias2_cfilt_sel));
5575 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5576 TABLA_CFILT_FAST_MODE);
5577 snd_soc_update_bits(codec,
5578 tabla_get_cfilt_reg(codec,
5579 tabla->pdata->micbias.bias2_cfilt_sel),
5580 0x40, TABLA_CFILT_FAST_MODE);
5581
Joonwoo Park0976d012011-12-22 11:48:18 -08005582 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
5583 0x02);
5584
5585 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
5586 * to perform ADC calibration
5587 */
5588 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005589 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08005590 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
5591 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
5592 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
5593 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
5594
Joonwoo Parke067b232012-06-14 13:11:30 -07005595 /* MICBIAS2 routing for calibration */
5596 bias2_ctl = snd_soc_read(codec, TABLA_A_MICB_2_CTL);
5597 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03, TABLA_MICBIAS2);
5598 snd_soc_write(codec, TABLA_A_MICB_2_CTL,
5599 snd_soc_read(codec, tabla->mbhc_bias_regs.ctl_reg));
5600
Joonwoo Park0976d012011-12-22 11:48:18 -08005601 /* DCE measurement for 0 volts */
5602 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5603 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5604 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005605 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5606 usleep_range(100, 100);
5607 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5608 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5609 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
5610
5611 /* DCE measurment for MB voltage */
5612 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5613 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
5614 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5615 usleep_range(100, 100);
5616 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5617 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5618 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
5619
5620 /* Sta measuremnt for 0 volts */
5621 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5622 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5623 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005624 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5625 usleep_range(100, 100);
5626 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5627 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5628 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
5629
5630 /* STA Measurement for MB Voltage */
5631 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5632 usleep_range(100, 100);
5633 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5634 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5635 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
5636
5637 /* Restore default settings. */
Joonwoo Parke067b232012-06-14 13:11:30 -07005638 snd_soc_write(codec, TABLA_A_MICB_2_CTL, bias2_ctl);
5639 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
5640 tabla->mbhc_cfg.micbias);
5641
Joonwoo Park0976d012011-12-22 11:48:18 -08005642 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Joonwoo Parke067b232012-06-14 13:11:30 -07005643 snd_soc_update_bits(codec,
5644 tabla_get_cfilt_reg(codec,
5645 tabla->pdata->micbias.bias2_cfilt_sel), 0x40,
5646 micbias2_cfilt_mode);
Joonwoo Park0976d012011-12-22 11:48:18 -08005647 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5648 cfilt_mode);
5649 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
5650
5651 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
5652 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005653
5654 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5655 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005656}
5657
5658void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
5659 const enum tabla_mbhc_btn_det_mem mem)
5660{
5661 void *ret = &btn_det->_v_btn_low;
5662
5663 switch (mem) {
5664 case TABLA_BTN_DET_GAIN:
5665 ret += sizeof(btn_det->_n_cic);
5666 case TABLA_BTN_DET_N_CIC:
5667 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08005668 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08005669 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
5670 case TABLA_BTN_DET_V_BTN_HIGH:
5671 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
5672 case TABLA_BTN_DET_V_BTN_LOW:
5673 /* do nothing */
5674 break;
5675 default:
5676 ret = NULL;
5677 }
5678
5679 return ret;
5680}
5681
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005682static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
5683 bool tovddio)
5684{
5685 int r;
5686 int vddio_k, mb_k;
5687 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5688 VDDIO_MICBIAS_MV);
5689 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5690 tabla->mbhc_data.micb_mv);
5691 if (tovddio)
5692 r = v * vddio_k / mb_k;
5693 else
5694 r = v * mb_k / vddio_k;
5695 return r;
5696}
5697
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005698static void tabla_mbhc_calc_rel_thres(struct snd_soc_codec *codec, s16 mv)
5699{
5700 s16 deltamv;
5701 struct tabla_priv *tabla;
5702 struct tabla_mbhc_btn_detect_cfg *btn_det;
5703
5704 tabla = snd_soc_codec_get_drvdata(codec);
5705 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5706
5707 tabla->mbhc_data.v_b1_h =
5708 tabla_codec_v_sta_dce(codec, DCE,
5709 mv + btn_det->v_btn_press_delta_cic);
5710
5711 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
5712
5713 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
5714
5715 deltamv = mv + btn_det->v_btn_press_delta_sta;
5716 tabla->mbhc_data.v_b1_hu = tabla_codec_v_sta_dce(codec, STA, deltamv);
5717
5718 deltamv = mv + btn_det->v_btn_press_delta_cic;
5719 tabla->mbhc_data.v_b1_huc = tabla_codec_v_sta_dce(codec, DCE, deltamv);
5720}
5721
5722static void tabla_mbhc_set_rel_thres(struct snd_soc_codec *codec, s16 mv)
5723{
5724 tabla_mbhc_calc_rel_thres(codec, mv);
5725 tabla_codec_calibrate_rel(codec);
5726}
5727
5728static s16 tabla_mbhc_highest_btn_mv(struct snd_soc_codec *codec)
5729{
5730 struct tabla_priv *tabla;
5731 struct tabla_mbhc_btn_detect_cfg *btn_det;
5732 u16 *btn_high;
5733
5734 tabla = snd_soc_codec_get_drvdata(codec);
5735 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5736 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
5737
5738 return btn_high[btn_det->num_btn - 1];
5739}
5740
Joonwoo Park0976d012011-12-22 11:48:18 -08005741static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
5742{
5743 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005744 struct tabla_mbhc_btn_detect_cfg *btn_det;
5745 struct tabla_mbhc_plug_type_cfg *plug_type;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005746 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08005747
5748 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005749 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5750 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005751
Joonwoo Parkc0672392012-01-11 11:03:14 -08005752 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005753 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07005754 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08005755 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005756 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005757 tabla->mbhc_data.npoll = 7;
5758 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005759 }
Joonwoo Park0976d012011-12-22 11:48:18 -08005760
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005761 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
5762 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08005763 n_ready[tabla_codec_mclk_index(tabla)]) +
5764 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08005765 tabla->mbhc_data.v_ins_hu =
5766 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
5767 tabla->mbhc_data.v_ins_h =
5768 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
5769
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005770 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
5771 if (tabla->mbhc_cfg.gpio)
5772 tabla->mbhc_data.v_inval_ins_high =
5773 TABLA_MBHC_FAKE_INSERT_HIGH;
5774 else
5775 tabla->mbhc_data.v_inval_ins_high =
5776 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
5777
5778 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
5779 tabla->mbhc_data.adj_v_hs_max =
5780 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
5781 tabla->mbhc_data.adj_v_ins_hu =
5782 tabla_codec_v_sta_dce(codec, STA,
5783 tabla->mbhc_data.adj_v_hs_max);
5784 tabla->mbhc_data.adj_v_ins_h =
5785 tabla_codec_v_sta_dce(codec, DCE,
5786 tabla->mbhc_data.adj_v_hs_max);
5787 tabla->mbhc_data.v_inval_ins_low =
5788 tabla_scale_v_micb_vddio(tabla,
5789 tabla->mbhc_data.v_inval_ins_low,
5790 false);
5791 tabla->mbhc_data.v_inval_ins_high =
5792 tabla_scale_v_micb_vddio(tabla,
5793 tabla->mbhc_data.v_inval_ins_high,
5794 false);
5795 }
5796
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005797 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park0976d012011-12-22 11:48:18 -08005798
5799 tabla->mbhc_data.v_no_mic =
5800 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
5801}
5802
5803void tabla_mbhc_init(struct snd_soc_codec *codec)
5804{
5805 struct tabla_priv *tabla;
5806 struct tabla_mbhc_general_cfg *generic;
5807 struct tabla_mbhc_btn_detect_cfg *btn_det;
5808 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08005809 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305810 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08005811
5812 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005813 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
5814 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005815
Joonwoo Park0976d012011-12-22 11:48:18 -08005816 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005817 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005818 snd_soc_update_bits(codec,
5819 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
5820 0x07, n);
5821 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
5822 btn_det->c[n]);
5823 }
5824 }
5825 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
5826 btn_det->nc);
5827
5828 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
5829 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08005830 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08005831
5832 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08005833 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
5834 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005835
5836 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
5837 generic->mbhc_nsa << 4);
5838
5839 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
5840 btn_det->n_meas);
5841
5842 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
5843
5844 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
5845
5846 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
5847 btn_det->mbhc_nsc << 3);
5848
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005849 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
5850 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08005851
5852 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07005853
5854 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Parke067b232012-06-14 13:11:30 -07005855
5856 /* override mbhc's micbias */
5857 snd_soc_update_bits(codec, TABLA_A_MICB_1_MBHC, 0x03,
5858 tabla->mbhc_cfg.micbias);
Joonwoo Park0976d012011-12-22 11:48:18 -08005859}
5860
Patrick Lai64b43262011-12-06 17:29:15 -08005861static bool tabla_mbhc_fw_validate(const struct firmware *fw)
5862{
5863 u32 cfg_offset;
5864 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
5865 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
5866
5867 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
5868 return false;
5869
5870 /* previous check guarantees that there is enough fw data up
5871 * to num_btn
5872 */
5873 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
5874 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
5875 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
5876 return false;
5877
5878 /* previous check guarantees that there is enough fw data up
5879 * to start of impedance detection configuration
5880 */
5881 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
5882 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
5883
5884 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
5885 return false;
5886
5887 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
5888 return false;
5889
5890 return true;
5891}
Joonwoo Park03324832012-03-19 19:36:16 -07005892
Joonwoo Parkfee17432012-04-16 16:33:55 -07005893/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005894static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07005895 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005896{
5897 s16 *v_btn_low, *v_btn_high;
5898 struct tabla_mbhc_btn_detect_cfg *btn_det;
5899 int i, btn = -1;
5900
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005901 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005902 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
5903 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305904 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07005905
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005906 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07005907 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005908 btn = i;
5909 break;
5910 }
5911 }
5912
5913 if (btn == -1)
5914 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07005915 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005916
5917 return btn;
5918}
5919
5920static int tabla_get_button_mask(const int btn)
5921{
5922 int mask = 0;
5923 switch (btn) {
5924 case 0:
5925 mask = SND_JACK_BTN_0;
5926 break;
5927 case 1:
5928 mask = SND_JACK_BTN_1;
5929 break;
5930 case 2:
5931 mask = SND_JACK_BTN_2;
5932 break;
5933 case 3:
5934 mask = SND_JACK_BTN_3;
5935 break;
5936 case 4:
5937 mask = SND_JACK_BTN_4;
5938 break;
5939 case 5:
5940 mask = SND_JACK_BTN_5;
5941 break;
5942 case 6:
5943 mask = SND_JACK_BTN_6;
5944 break;
5945 case 7:
5946 mask = SND_JACK_BTN_7;
5947 break;
5948 }
5949 return mask;
5950}
5951
Bradley Rubincb1e2732011-06-23 16:49:20 -07005952static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005953{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005954 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07005955 short dce, sta;
Joonwoo Park12334832012-07-23 19:27:52 -07005956 s32 mv, mv_s, stamv, stamv_s;
Joonwoo Parkfee17432012-04-16 16:33:55 -07005957 bool vddio;
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005958 u16 *btn_high;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005959 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005960 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005961 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005962 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005963 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005964 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305965 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07005966 int n_btn_meas = d->n_btn_meas;
5967 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07005968
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005969 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005970
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07005971 btn_high = tabla_mbhc_cal_btn_det_mp(d, TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005972 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
5973 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
5974 pr_debug("%s: mbhc is being recovered, skip button press\n",
5975 __func__);
5976 goto done;
5977 }
5978
5979 priv->mbhc_state = MBHC_STATE_POTENTIAL;
5980
5981 if (!priv->mbhc_polling_active) {
5982 pr_warn("%s: mbhc polling is not active, skip button press\n",
5983 __func__);
5984 goto done;
5985 }
Joonwoo Park03324832012-03-19 19:36:16 -07005986
5987 dce = tabla_codec_read_dce_result(codec);
5988 mv = tabla_codec_sta_dce_v(codec, 1, dce);
5989
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005990 /* If GPIO interrupt already kicked in, ignore button press */
5991 if (priv->in_gpio_handler) {
5992 pr_debug("%s: GPIO State Changed, ignore button press\n",
5993 __func__);
5994 btn = -1;
5995 goto done;
5996 }
5997
Joonwoo Parkfee17432012-04-16 16:33:55 -07005998 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
5999 priv->mbhc_micbias_switched);
6000 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6001
Joonwoo Park03324832012-03-19 19:36:16 -07006002 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
6003 if (priv->mbhc_last_resume &&
6004 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
6005 pr_debug("%s: Button is already released shortly after "
6006 "resume\n", __func__);
6007 n_btn_meas = 0;
Joonwoo Park03324832012-03-19 19:36:16 -07006008 }
6009 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006010
Joonwoo Park12334832012-07-23 19:27:52 -07006011 /* save hw dce */
Joonwoo Parkfee17432012-04-16 16:33:55 -07006012 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006013 pr_debug("%s: meas HW - DCE %x,%d,%d button %d\n", __func__,
6014 dce, mv, mv_s, btnmeas[0]);
6015 if (n_btn_meas == 0) {
6016 sta = tabla_codec_read_sta_result(codec);
6017 stamv_s = stamv = tabla_codec_sta_dce_v(codec, 0, sta);
6018 if (vddio)
6019 stamv_s = tabla_scale_v_micb_vddio(priv, stamv, false);
6020 btn = tabla_determine_button(priv, stamv_s);
6021 pr_debug("%s: meas HW - STA %x,%d,%d button %d\n", __func__,
6022 sta, stamv, stamv_s, btn);
6023 BUG_ON(meas != 1);
6024 if (btnmeas[0] != btn)
6025 btn = -1;
6026 }
6027
6028 /* determine pressed button */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006029 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07006030 dce = tabla_codec_sta_dce(codec, 1, false);
6031 mv = tabla_codec_sta_dce_v(codec, 1, dce);
6032 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
6033
6034 btnmeas[meas] = tabla_determine_button(priv, mv_s);
Joonwoo Park12334832012-07-23 19:27:52 -07006035 pr_debug("%s: meas %d - DCE %x,%d,%d button %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07006036 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006037 /* if large enough measurements are collected,
6038 * start to check if last all n_btn_con measurements were
6039 * in same button low/high range */
6040 if (meas + 1 >= d->n_btn_con) {
6041 for (i = 0; i < d->n_btn_con; i++)
6042 if ((btnmeas[meas] < 0) ||
6043 (btnmeas[meas] != btnmeas[meas - i]))
6044 break;
6045 if (i == d->n_btn_con) {
6046 /* button pressed */
6047 btn = btnmeas[meas];
6048 break;
Joonwoo Park03324832012-03-19 19:36:16 -07006049 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
6050 /* if left measurements are less than n_btn_con,
6051 * it's impossible to find button number */
6052 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006053 }
6054 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006055 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006056
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006057 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006058 if (priv->in_gpio_handler) {
6059 pr_debug("%s: GPIO already triggered, ignore button "
6060 "press\n", __func__);
6061 goto done;
6062 }
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006063 /* narrow down release threshold */
6064 tabla_mbhc_set_rel_thres(codec, btn_high[btn]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006065 mask = tabla_get_button_mask(btn);
6066 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07006067 wcd9xxx_lock_sleep(core);
6068 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
6069 msecs_to_jiffies(400)) == 0) {
6070 WARN(1, "Button pressed twice without release"
6071 "event\n");
6072 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006073 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08006074 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006075 pr_debug("%s: bogus button press, too short press?\n",
6076 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08006077 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006078
Joonwoo Park03324832012-03-19 19:36:16 -07006079 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006080 pr_debug("%s: leave\n", __func__);
6081 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006082 return IRQ_HANDLED;
6083}
6084
Joonwoo Park03324832012-03-19 19:36:16 -07006085static int tabla_is_fake_press(struct tabla_priv *priv)
6086{
6087 int i;
6088 int r = 0;
6089 struct snd_soc_codec *codec = priv->codec;
6090 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006091 s16 mb_v, v_ins_hu, v_ins_h;
6092
6093 v_ins_hu = tabla_get_current_v_ins(priv, true);
6094 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006095
6096 for (i = 0; i < dces; i++) {
6097 usleep_range(10000, 10000);
6098 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006099 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006100 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
6101 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006102 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
6103 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07006104 r = 1;
6105 break;
6106 }
6107 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006108 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006109 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
6110 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006111 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
6112 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07006113 r = 1;
6114 break;
6115 }
6116 }
6117 }
6118
6119 return r;
6120}
6121
Bradley Rubincb1e2732011-06-23 16:49:20 -07006122static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006123{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08006124 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08006125 struct tabla_priv *priv = data;
6126 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006127
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006128 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07006129
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006130 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6131 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006132
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006133 tabla_codec_drive_v_to_micbias(codec, 10000);
6134
Joonwoo Park03324832012-03-19 19:36:16 -07006135 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006136 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006137 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07006138 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006139 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006140 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006141 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006142 priv->mbhc_cfg.button_jack, 0,
6143 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006144 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07006145 if (tabla_is_fake_press(priv)) {
6146 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006147 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006148 } else if (priv->mbhc_cfg.button_jack) {
6149 if (priv->in_gpio_handler) {
6150 pr_debug("%s: GPIO kicked in, ignore\n",
6151 __func__);
6152 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006153 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006154 "press and release\n",
6155 __func__);
6156 tabla_snd_soc_jack_report(priv,
6157 priv->mbhc_cfg.button_jack,
6158 priv->buttons_pressed,
6159 priv->buttons_pressed);
6160 tabla_snd_soc_jack_report(priv,
6161 priv->mbhc_cfg.button_jack, 0,
6162 priv->buttons_pressed);
6163 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07006164 }
6165 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006166
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006167 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
6168 }
6169
Joonwoo Parkdd9d2962012-07-23 19:24:20 -07006170 /* revert narrowed release threshold */
6171 tabla_mbhc_calc_rel_thres(codec, tabla_mbhc_highest_btn_mv(codec));
Joonwoo Park03324832012-03-19 19:36:16 -07006172 tabla_codec_calibrate_hs_polling(codec);
6173
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006174 if (priv->mbhc_cfg.gpio)
6175 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07006176
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006177 tabla_codec_start_hs_polling(codec);
6178
6179 pr_debug("%s: leave\n", __func__);
6180 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006181 return IRQ_HANDLED;
6182}
6183
Bradley Rubincb1e2732011-06-23 16:49:20 -07006184static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
6185{
6186 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08006187 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006188 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006189
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006190 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006191 tabla_codec_enable_config_mode(codec, 1);
6192
6193 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
6194 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006195
Joonwoo Park0976d012011-12-22 11:48:18 -08006196 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
6197
6198 usleep_range(generic->t_shutdown_plug_rem,
6199 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006200
6201 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006202 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006203 tabla_codec_enable_config_mode(codec, 0);
6204
6205 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
6206}
6207
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006208static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006209{
6210 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006211
6212 tabla_codec_shutdown_hs_removal_detect(codec);
6213
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07006214 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05306215 tabla_codec_disable_clock_block(codec);
6216 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006217 }
6218
6219 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006220 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006221}
6222
Patrick Lai49efeac2011-11-03 11:01:12 -07006223static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
6224{
6225 struct tabla_priv *tabla = data;
6226 struct snd_soc_codec *codec;
6227
6228 pr_info("%s: received HPHL OCP irq\n", __func__);
6229
6230 if (tabla) {
6231 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08006232 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
6233 pr_info("%s: retry\n", __func__);
6234 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6235 0x00);
6236 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6237 0x10);
6238 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306239 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08006240 TABLA_IRQ_HPH_PA_OCPL_FAULT);
6241 tabla->hphlocp_cnt = 0;
6242 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006243 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006244 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006245 tabla->mbhc_cfg.headset_jack,
6246 tabla->hph_status,
6247 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006248 }
6249 } else {
6250 pr_err("%s: Bad tabla private data\n", __func__);
6251 }
6252
6253 return IRQ_HANDLED;
6254}
6255
6256static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
6257{
6258 struct tabla_priv *tabla = data;
6259 struct snd_soc_codec *codec;
6260
6261 pr_info("%s: received HPHR OCP irq\n", __func__);
6262
6263 if (tabla) {
6264 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08006265 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
6266 pr_info("%s: retry\n", __func__);
6267 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6268 0x00);
6269 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
6270 0x10);
6271 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306272 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08006273 TABLA_IRQ_HPH_PA_OCPR_FAULT);
6274 tabla->hphrocp_cnt = 0;
6275 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006276 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08006277 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006278 tabla->mbhc_cfg.headset_jack,
6279 tabla->hph_status,
6280 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07006281 }
6282 } else {
6283 pr_err("%s: Bad tabla private data\n", __func__);
6284 }
6285
6286 return IRQ_HANDLED;
6287}
6288
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006289static bool tabla_is_inval_ins_range(struct snd_soc_codec *codec,
6290 s32 mic_volt, bool highhph, bool *highv)
Joonwoo Park03324832012-03-19 19:36:16 -07006291{
6292 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006293 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006294 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006295
6296 /* Perform this check only when the high voltage headphone
6297 * needs to be considered as invalid
6298 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006299 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006300 *highv = mic_volt > v_hs_max;
6301 if (!highhph && *highv)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006302 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006303 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
6304 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006305 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006306
6307 return invalid;
6308}
6309
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006310static bool tabla_is_inval_ins_delta(struct snd_soc_codec *codec,
6311 int mic_volt, int mic_volt_prev,
6312 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006313{
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006314 return abs(mic_volt - mic_volt_prev) > threshold;
Joonwoo Park03324832012-03-19 19:36:16 -07006315}
6316
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006317/* called under codec_resource_lock acquisition */
6318void tabla_find_plug_and_report(struct snd_soc_codec *codec,
6319 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07006320{
6321 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006322
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006323 if (plug_type == PLUG_TYPE_HEADPHONE &&
6324 tabla->current_plug == PLUG_TYPE_NONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006325 /* Nothing was reported previously
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006326 * report a headphone or unsupported
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006327 */
6328 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6329 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006330 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6331 if (tabla->current_plug == PLUG_TYPE_HEADSET)
6332 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6333 else if (tabla->current_plug == PLUG_TYPE_HEADPHONE)
6334 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6335
6336 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6337 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006338 } else if (plug_type == PLUG_TYPE_HEADSET) {
6339 /* If Headphone was reported previously, this will
6340 * only report the mic line
6341 */
6342 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6343 msleep(100);
6344 tabla_codec_start_hs_polling(codec);
6345 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
6346 if (tabla->current_plug == PLUG_TYPE_NONE)
6347 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6348 tabla_codec_cleanup_hs_polling(codec);
6349 pr_debug("setup mic trigger for further detection\n");
6350 tabla->lpi_enabled = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006351 tabla_codec_enable_hs_detect(codec, 1,
6352 MBHC_USE_MB_TRIGGER |
6353 MBHC_USE_HPHL_TRIGGER,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006354 false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006355 } else {
6356 WARN(1, "Unexpected current plug_type %d, plug_type %d\n",
6357 tabla->current_plug, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006358 }
6359}
6360
6361/* should be called under interrupt context that hold suspend */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006362static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla,
6363 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006364{
6365 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
6366 tabla->hs_detect_work_stop = false;
6367 wcd9xxx_lock_sleep(tabla->codec->control_data);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006368 schedule_work(correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006369}
6370
6371/* called under codec_resource_lock acquisition */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006372static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla,
6373 struct work_struct *correct_plug_work)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006374{
6375 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
6376 tabla->hs_detect_work_stop = true;
6377 wmb();
6378 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006379 if (cancel_work_sync(correct_plug_work)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006380 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
6381 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6382 }
6383 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6384}
6385
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006386static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
6387{
6388 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
6389 tabla->mbhc_cfg.gpio_level_insert);
6390}
6391
Joonwoo Park41956722012-04-18 13:13:07 -07006392/* called under codec_resource_lock acquisition */
6393static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
6394{
6395 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
6396 if (on)
6397 usleep_range(5000, 5000);
6398}
6399
6400/* called under codec_resource_lock acquisition and mbhc override = 1 */
6401static enum tabla_mbhc_plug_type
6402tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
6403{
6404 int i;
6405 bool gndswitch, vddioswitch;
6406 int scaled;
6407 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
6408 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006409 int num_det = MBHC_NUM_DCE_PLUG_DETECT + 1;
Joonwoo Park41956722012-04-18 13:13:07 -07006410 enum tabla_mbhc_plug_type plug_type[num_det];
6411 s16 mb_v[num_det];
6412 s32 mic_mv[num_det];
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006413 bool inval;
6414 bool highdelta;
6415 bool ahighv = false, highv;
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006416 bool gndmicswapped = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006417
6418 /* make sure override is on */
6419 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
6420
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006421 /* GND and MIC swap detection requires at least 2 rounds of DCE */
6422 BUG_ON(num_det < 2);
6423
6424 plug_type_ptr =
6425 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6426
6427 plug_type[0] = PLUG_TYPE_INVALID;
6428
Joonwoo Park41956722012-04-18 13:13:07 -07006429 /* performs DCEs for N times
6430 * 1st: check if voltage is in invalid range
6431 * 2nd - N-2nd: check voltage range and delta
6432 * N-1st: check voltage range, delta with HPHR GND switch
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006433 * Nth: check voltage range with VDDIO switch */
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006434 for (i = 0; i < num_det; i++) {
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006435 gndswitch = (i == (num_det - 2));
6436 vddioswitch = (i == (num_det - 1)) || (i == (num_det - 2));
Joonwoo Park41956722012-04-18 13:13:07 -07006437 if (i == 0) {
6438 mb_v[i] = tabla_codec_setup_hs_polling(codec);
6439 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006440 inval = tabla_is_inval_ins_range(codec, mic_mv[i],
6441 highhph, &highv);
6442 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006443 scaled = mic_mv[i];
Joonwoo Park41956722012-04-18 13:13:07 -07006444 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006445 if (vddioswitch)
6446 __tabla_codec_switch_micbias(tabla->codec, 1,
6447 false, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006448 if (gndswitch)
6449 tabla_codec_hphr_gnd_switch(codec, true);
6450 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
6451 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006452 if (vddioswitch)
6453 scaled = tabla_scale_v_micb_vddio(tabla,
Joonwoo Park41956722012-04-18 13:13:07 -07006454 mic_mv[i],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006455 false);
6456 else
6457 scaled = mic_mv[i];
6458 /* !gndswitch & vddioswitch means the previous DCE
6459 * was done with gndswitch, don't compare with DCE
6460 * with gndswitch */
6461 highdelta = tabla_is_inval_ins_delta(codec, scaled,
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006462 mic_mv[i - 1],
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006463 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV);
6464 inval = (tabla_is_inval_ins_range(codec, mic_mv[i],
6465 highhph, &highv) ||
6466 highdelta);
6467 ahighv |= highv;
Joonwoo Park41956722012-04-18 13:13:07 -07006468 if (gndswitch)
6469 tabla_codec_hphr_gnd_switch(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006470 if (vddioswitch)
6471 __tabla_codec_switch_micbias(tabla->codec, 0,
6472 false, false);
6473 /* claim UNSUPPORTED plug insertion when
6474 * good headset is detected but HPHR GND switch makes
6475 * delta difference */
6476 if (i == (num_det - 2) && highdelta && !ahighv)
Joonwoo Park6a5a4f12012-06-15 15:56:25 -07006477 gndmicswapped = true;
6478 else if (i == (num_det - 1) && inval) {
6479 if (gndmicswapped)
6480 plug_type[0] = PLUG_TYPE_GND_MIC_SWAP;
6481 else
6482 plug_type[0] = PLUG_TYPE_INVALID;
6483 }
Joonwoo Park41956722012-04-18 13:13:07 -07006484 }
6485 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006486 "VDDIO %d, inval %d\n", __func__,
Joonwoo Park41956722012-04-18 13:13:07 -07006487 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006488 vddioswitch, inval);
6489 /* don't need to run further DCEs */
6490 if (ahighv && inval)
6491 break;
6492 mic_mv[i] = scaled;
Joonwoo Park41956722012-04-18 13:13:07 -07006493 }
6494
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006495 for (i = 0; (plug_type[0] != PLUG_TYPE_GND_MIC_SWAP && !inval) &&
6496 i < num_det; i++) {
Joonwoo Park41956722012-04-18 13:13:07 -07006497 /*
6498 * If we are here, means none of the all
6499 * measurements are fake, continue plug type detection.
6500 * If all three measurements do not produce same
6501 * plug type, restart insertion detection
6502 */
6503 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
6504 plug_type[i] = PLUG_TYPE_HEADPHONE;
6505 pr_debug("%s: Detect attempt %d, detected Headphone\n",
6506 __func__, i);
6507 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
6508 plug_type[i] = PLUG_TYPE_HIGH_HPH;
6509 pr_debug("%s: Detect attempt %d, detected High "
6510 "Headphone\n", __func__, i);
6511 } else {
6512 plug_type[i] = PLUG_TYPE_HEADSET;
6513 pr_debug("%s: Detect attempt %d, detected Headset\n",
6514 __func__, i);
6515 }
6516
6517 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
6518 pr_err("%s: Detect attempt %d and %d are not same",
6519 __func__, i - 1, i);
6520 plug_type[0] = PLUG_TYPE_INVALID;
6521 inval = true;
6522 break;
6523 }
6524 }
6525
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006526 pr_debug("%s: Detected plug type %d\n", __func__, plug_type[0]);
Joonwoo Park41956722012-04-18 13:13:07 -07006527 return plug_type[0];
6528}
6529
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006530static void tabla_hs_correct_gpio_plug(struct work_struct *work)
6531{
6532 struct tabla_priv *tabla;
6533 struct snd_soc_codec *codec;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006534 int retry = 0, pt_gnd_mic_swap_cnt = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006535 bool correction = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006536 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006537 unsigned long timeout;
6538
6539 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
6540 codec = tabla->codec;
6541
6542 pr_debug("%s: enter\n", __func__);
6543 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6544
6545 /* Keep override on during entire plug type correction work.
6546 *
6547 * This is okay under the assumption that any GPIO irqs which use
6548 * MBHC block cancel and sync this work so override is off again
6549 * prior to GPIO interrupt handler's MBHC block usage.
6550 * Also while this correction work is running, we can guarantee
6551 * DAPM doesn't use any MBHC block as this work only runs with
6552 * headphone detection.
6553 */
6554 tabla_turn_onoff_override(codec, true);
6555
6556 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6557 while (!time_after(jiffies, timeout)) {
6558 ++retry;
6559 rmb();
6560 if (tabla->hs_detect_work_stop) {
6561 pr_debug("%s: stop requested\n", __func__);
6562 break;
6563 }
6564
6565 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
6566 if (tabla_hs_gpio_level_remove(tabla)) {
6567 pr_debug("%s: GPIO value is low\n", __func__);
6568 break;
6569 }
6570
6571 /* can race with removal interrupt */
6572 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07006573 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006574 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6575
Joonwoo Park41956722012-04-18 13:13:07 -07006576 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006577 pr_debug("Invalid plug in attempt # %d\n", retry);
6578 if (retry == NUM_ATTEMPTS_TO_REPORT &&
6579 tabla->current_plug == PLUG_TYPE_NONE) {
6580 tabla_codec_report_plug(codec, 1,
6581 SND_JACK_HEADPHONE);
6582 }
Joonwoo Park41956722012-04-18 13:13:07 -07006583 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006584 pr_debug("Good headphone detected, continue polling mic\n");
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006585 if (tabla->current_plug == PLUG_TYPE_NONE)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006586 tabla_codec_report_plug(codec, 1,
6587 SND_JACK_HEADPHONE);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006588 } else {
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006589 if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6590 pt_gnd_mic_swap_cnt++;
6591 if (pt_gnd_mic_swap_cnt <
6592 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD)
6593 continue;
6594 else if (pt_gnd_mic_swap_cnt >
6595 TABLA_MBHC_GND_MIC_SWAP_THRESHOLD) {
6596 /* This is due to GND/MIC switch didn't
6597 * work, Report unsupported plug */
6598 } else if (tabla->mbhc_cfg.swap_gnd_mic) {
6599 /* if switch is toggled, check again,
6600 * otherwise report unsupported plug */
6601 if (tabla->mbhc_cfg.swap_gnd_mic(codec))
6602 continue;
6603 }
6604 } else
6605 pt_gnd_mic_swap_cnt = 0;
6606
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006607 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6608 /* Turn off override */
6609 tabla_turn_onoff_override(codec, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006610 /* The valid plug also includes PLUG_TYPE_GND_MIC_SWAP
6611 */
Joonwoo Park41956722012-04-18 13:13:07 -07006612 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006613 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6614 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07006615 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006616 correction = true;
6617 break;
6618 }
6619 }
6620
6621 /* Turn off override */
6622 if (!correction)
6623 tabla_turn_onoff_override(codec, false);
6624
6625 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
6626 pr_debug("%s: leave\n", __func__);
6627 /* unlock sleep */
6628 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6629}
6630
6631/* called under codec_resource_lock acquisition */
6632static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
6633{
Joonwoo Park41956722012-04-18 13:13:07 -07006634 enum tabla_mbhc_plug_type plug_type;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006635 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006636
6637 pr_debug("%s: enter\n", __func__);
6638
6639 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07006640 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006641 tabla_turn_onoff_override(codec, false);
6642
6643 if (tabla_hs_gpio_level_remove(tabla)) {
6644 pr_debug("%s: GPIO value is low when determining plug\n",
6645 __func__);
6646 return;
6647 }
6648
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006649 if (plug_type == PLUG_TYPE_INVALID ||
6650 plug_type == PLUG_TYPE_GND_MIC_SWAP) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006651 tabla_schedule_hs_detect_plug(tabla,
6652 &tabla->hs_correct_plug_work);
Joonwoo Park41956722012-04-18 13:13:07 -07006653 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006654 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6655
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006656 tabla_schedule_hs_detect_plug(tabla,
6657 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006658 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07006659 pr_debug("%s: Valid plug found, determine plug type %d\n",
6660 __func__, plug_type);
6661 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006662 }
6663}
6664
6665/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006666static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
6667{
Joonwoo Park41956722012-04-18 13:13:07 -07006668 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006669 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6670 const struct tabla_mbhc_plug_detect_cfg *plug_det =
6671 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park03324832012-03-19 19:36:16 -07006672
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006673 /* Turn on the override,
6674 * tabla_codec_setup_hs_polling requires override on */
6675 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006676
6677 if (plug_det->t_ins_complete > 20)
6678 msleep(plug_det->t_ins_complete);
6679 else
6680 usleep_range(plug_det->t_ins_complete * 1000,
6681 plug_det->t_ins_complete * 1000);
6682
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006683 if (tabla->mbhc_cfg.gpio) {
6684 /* Turn off the override */
6685 tabla_turn_onoff_override(codec, false);
6686 if (tabla_hs_gpio_level_remove(tabla))
6687 pr_debug("%s: GPIO value is low when determining "
6688 "plug\n", __func__);
6689 else
6690 tabla_codec_decide_gpio_plug(codec);
6691 return;
6692 }
6693
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006694 plug_type = tabla_codec_get_plug_type(codec, false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006695 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006696
Joonwoo Park41956722012-04-18 13:13:07 -07006697 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006698 pr_debug("%s: Invalid plug type detected\n", __func__);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006699 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006700 tabla_codec_cleanup_hs_polling(codec);
6701 tabla_codec_enable_hs_detect(codec, 1,
6702 MBHC_USE_MB_TRIGGER |
6703 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006704 } else if (plug_type == PLUG_TYPE_GND_MIC_SWAP) {
6705 pr_debug("%s: GND-MIC swapped plug type detected\n", __func__);
6706 tabla_codec_report_plug(codec, 1, SND_JACK_UNSUPPORTED);
6707 tabla_codec_cleanup_hs_polling(codec);
6708 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006709 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07006710 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006711 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6712 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006713 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006714 tabla_schedule_hs_detect_plug(tabla,
6715 &tabla->hs_correct_plug_work_nogpio);
Joonwoo Park41956722012-04-18 13:13:07 -07006716 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07006717 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006718 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6719
Joonwoo Park03324832012-03-19 19:36:16 -07006720 /* avoid false button press detect */
6721 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07006722 tabla_codec_start_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006723 }
6724}
6725
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006726/* called only from interrupt which is under codec_resource_lock acquisition */
6727static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006728{
Bradley Rubincb1e2732011-06-23 16:49:20 -07006729 struct snd_soc_codec *codec = priv->codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006730
6731 if (!is_removal) {
6732 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
6733
6734 rmb();
6735 if (priv->lpi_enabled)
6736 msleep(100);
6737
6738 rmb();
6739 if (!priv->lpi_enabled) {
6740 pr_debug("%s: lpi is disabled\n", __func__);
6741 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
6742 priv->mbhc_cfg.gpio_level_insert) {
6743 pr_debug("%s: Valid insertion, "
6744 "detect plug type\n", __func__);
6745 tabla_codec_decide_gpio_plug(codec);
6746 } else {
6747 pr_debug("%s: Invalid insertion, "
6748 "stop plug detection\n", __func__);
6749 }
6750 } else {
6751 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
6752 }
6753}
6754
6755/* called only from interrupt which is under codec_resource_lock acquisition */
6756static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
6757 bool is_mb_trigger)
6758{
Joonwoo Park03324832012-03-19 19:36:16 -07006759 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006760 struct snd_soc_codec *codec = priv->codec;
6761 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006762 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6763
6764 /* Cancel possibly running hs_detect_work */
6765 tabla_cancel_hs_detect_plug(tabla,
6766 &tabla->hs_correct_plug_work_nogpio);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006767
6768 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006769
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006770 /*
6771 * If headphone is removed while playback is in progress,
6772 * it is possible that micbias will be switched to VDDIO.
6773 */
Joonwoo Park03324832012-03-19 19:36:16 -07006774 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07006775 if (priv->current_plug == PLUG_TYPE_HEADPHONE)
6776 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6777 else if (priv->current_plug == PLUG_TYPE_GND_MIC_SWAP)
6778 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
6779 else
6780 WARN(1, "%s: Unexpected current plug type %d\n",
6781 __func__, priv->current_plug);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006782 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006783 tabla_codec_enable_hs_detect(codec, 1,
6784 MBHC_USE_MB_TRIGGER |
6785 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006786 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006787 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07006788 pr_debug("%s: Waiting for Headphone left trigger\n",
6789 __func__);
6790 wcd9xxx_lock_sleep(core);
6791 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
6792 usecs_to_jiffies(1000000)) == 0) {
6793 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
6794 __func__);
6795 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08006796 }
Joonwoo Park03324832012-03-19 19:36:16 -07006797 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
6798 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006799 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006800 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
6801 if (ret != 0) {
6802 pr_debug("%s: Complete plug insertion, Detecting plug "
6803 "type\n", __func__);
6804 tabla_codec_detect_plug_type(codec);
6805 wcd9xxx_unlock_sleep(core);
6806 } else {
6807 wcd9xxx_enable_irq(codec->control_data,
6808 TABLA_IRQ_MBHC_INSERTION);
6809 pr_err("%s: Error detecting plug insertion\n",
6810 __func__);
6811 }
Joonwoo Park03324832012-03-19 19:36:16 -07006812 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006813}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08006814
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006815static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
6816{
6817 bool is_mb_trigger, is_removal;
6818 struct tabla_priv *priv = data;
6819 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006820
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006821 pr_debug("%s: enter\n", __func__);
6822 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6823 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
6824
6825 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
6826 0x10);
6827 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
6828 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
6829
6830 /* Turn off both HPH and MIC line schmitt triggers */
6831 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6832 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
6833 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6834
6835 if (priv->mbhc_cfg.gpio)
6836 tabla_hs_insert_irq_gpio(priv, is_removal);
6837 else
6838 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
6839
6840 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006841 return IRQ_HANDLED;
6842}
6843
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006844static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
6845{
6846 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006847 const struct tabla_mbhc_plug_type_cfg *plug_type =
6848 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6849 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006850
6851 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006852 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006853}
6854
6855/* called under codec_resource_lock acquisition
6856 * returns true if mic voltage range is back to normal insertion
6857 * returns false either if timedout or removed */
6858static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
6859{
6860 int i;
6861 bool timedout, settled = false;
6862 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
6863 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
6864 unsigned long retry = 0, timeout;
6865 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006866 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006867
6868 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6869 while (!(timedout = time_after(jiffies, timeout))) {
6870 retry++;
6871 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6872 pr_debug("%s: GPIO indicates removal\n", __func__);
6873 break;
6874 }
6875
6876 if (tabla->mbhc_cfg.gpio) {
6877 if (retry > 1)
6878 msleep(250);
6879 else
6880 msleep(50);
6881 }
6882
6883 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6884 pr_debug("%s: GPIO indicates removal\n", __func__);
6885 break;
6886 }
6887
6888 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
6889 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
6890 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6891 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
6892 __func__, retry, mic_mv[i], mb_v[i]);
6893 }
6894
6895 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6896 pr_debug("%s: GPIO indicates removal\n", __func__);
6897 break;
6898 }
6899
6900 if (tabla->current_plug == PLUG_TYPE_NONE) {
6901 pr_debug("%s : headset/headphone is removed\n",
6902 __func__);
6903 break;
6904 }
6905
6906 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
6907 if (!is_valid_mic_voltage(codec, mic_mv[i]))
6908 break;
6909
6910 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6911 pr_debug("%s: MIC voltage settled\n", __func__);
6912 settled = true;
6913 msleep(200);
6914 break;
6915 }
6916
6917 /* only for non-GPIO remove irq */
6918 if (!tabla->mbhc_cfg.gpio) {
6919 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006920 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006921 break;
6922 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6923 pr_debug("%s: Headset is removed\n", __func__);
6924 break;
6925 }
6926 }
6927 }
6928
6929 if (timedout)
6930 pr_debug("%s: Microphone did not settle in %d seconds\n",
6931 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
6932 return settled;
6933}
6934
6935/* called only from interrupt which is under codec_resource_lock acquisition */
6936static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
6937{
6938 struct snd_soc_codec *codec = priv->codec;
6939
6940 if (tabla_hs_remove_settle(codec))
6941 tabla_codec_start_hs_polling(codec);
6942 pr_debug("%s: remove settle done\n", __func__);
6943}
6944
6945/* called only from interrupt which is under codec_resource_lock acquisition */
6946static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006947{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006948 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006949 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006950 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08006951 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006952 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006953 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006954
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006955 if (priv->current_plug != PLUG_TYPE_HEADSET) {
6956 pr_debug("%s(): Headset is not inserted, ignore removal\n",
6957 __func__);
6958 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6959 0x08, 0x08);
6960 return;
6961 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006962
Joonwoo Park0976d012011-12-22 11:48:18 -08006963 usleep_range(generic->t_shutdown_plug_rem,
6964 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006965
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006966 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006967 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006968 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
6969 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006970 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006971 pr_debug("%s: checking false removal\n", __func__);
6972 msleep(500);
6973 removed = !tabla_hs_remove_settle(codec);
6974 pr_debug("%s: headset %sactually removed\n", __func__,
6975 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006976 break;
6977 }
6978 min_us -= priv->mbhc_data.t_dce;
6979 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006980
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006981 if (removed) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07006982 /* Cancel possibly running hs_detect_work */
6983 tabla_cancel_hs_detect_plug(priv,
6984 &priv->hs_correct_plug_work_nogpio);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006985 /*
6986 * If this removal is not false, first check the micbias
6987 * switch status and switch it to LDOH if it is already
6988 * switched to VDDIO.
6989 */
Joonwoo Park03324832012-03-19 19:36:16 -07006990 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07006991
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006992 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6993 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006994 tabla_codec_enable_hs_detect(codec, 1,
6995 MBHC_USE_MB_TRIGGER |
6996 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006997 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006998 } else {
6999 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007000 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007001}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007002
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007003static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
7004{
7005 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007006 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007007 pr_debug("%s: enter, removal interrupt\n", __func__);
7008
7009 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007010 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
7011 priv->mbhc_micbias_switched);
7012 if (vddio)
7013 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
7014
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007015 if (priv->mbhc_cfg.gpio)
7016 tabla_hs_remove_irq_gpio(priv);
7017 else
7018 tabla_hs_remove_irq_nogpio(priv);
7019
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007020 /* if driver turned off vddio switch and headset is not removed,
7021 * turn on the vddio switch back, if headset is removed then vddio
7022 * switch is off by time now and shouldn't be turn on again from here */
7023 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
7024 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007025 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007026
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007027 return IRQ_HANDLED;
7028}
7029
Joonwoo Park03324832012-03-19 19:36:16 -07007030void mbhc_insert_work(struct work_struct *work)
7031{
7032 struct delayed_work *dwork;
7033 struct tabla_priv *tabla;
7034 struct snd_soc_codec *codec;
7035 struct wcd9xxx *tabla_core;
7036
7037 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007038 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07007039 codec = tabla->codec;
7040 tabla_core = dev_get_drvdata(codec->dev->parent);
7041
7042 pr_debug("%s:\n", __func__);
7043
7044 /* Turn off both HPH and MIC line schmitt triggers */
7045 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
7046 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
7047 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
7048 wcd9xxx_disable_irq_sync(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
7049 tabla_codec_detect_plug_type(codec);
7050 wcd9xxx_unlock_sleep(tabla_core);
7051}
7052
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007053static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
7054{
7055 bool insert;
7056 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
7057 bool is_removed = false;
7058
7059 pr_debug("%s: enter\n", __func__);
7060
7061 tabla->in_gpio_handler = true;
7062 /* Wait here for debounce time */
7063 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
7064 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
7065
7066 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7067
7068 /* cancel pending button press */
7069 if (tabla_cancel_btn_work(tabla))
7070 pr_debug("%s: button press is canceled\n", __func__);
7071
7072 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
7073 tabla->mbhc_cfg.gpio_level_insert);
7074 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
7075 tabla->lpi_enabled = false;
7076 wmb();
7077
7078 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007079 tabla_cancel_hs_detect_plug(tabla,
7080 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007081
7082 /* Disable Mic Bias pull down and HPH Switch to GND */
7083 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
7084 0x00);
7085 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
7086 tabla_codec_detect_plug_type(codec);
7087 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
7088 tabla->lpi_enabled = false;
7089 wmb();
7090
7091 /* cancel detect plug */
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007092 tabla_cancel_hs_detect_plug(tabla,
7093 &tabla->hs_correct_plug_work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007094
7095 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
7096 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
7097 is_removed = true;
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007098 } else if (tabla->current_plug == PLUG_TYPE_GND_MIC_SWAP) {
7099 tabla_codec_report_plug(codec, 0, SND_JACK_UNSUPPORTED);
7100 is_removed = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007101 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
7102 tabla_codec_pause_hs_polling(codec);
7103 tabla_codec_cleanup_hs_polling(codec);
7104 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
7105 is_removed = true;
7106 }
7107
7108 if (is_removed) {
7109 /* Enable Mic Bias pull down and HPH Switch to GND */
7110 snd_soc_update_bits(codec,
7111 tabla->mbhc_bias_regs.ctl_reg, 0x01,
7112 0x01);
7113 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
7114 0x01);
7115 /* Make sure mic trigger is turned off */
7116 snd_soc_update_bits(codec,
7117 tabla->mbhc_bias_regs.ctl_reg,
7118 0x01, 0x01);
7119 snd_soc_update_bits(codec,
7120 tabla->mbhc_bias_regs.mbhc_reg,
7121 0x90, 0x00);
7122 /* Reset MBHC State Machine */
7123 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7124 0x08, 0x08);
7125 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
7126 0x08, 0x00);
7127 /* Turn off override */
7128 tabla_turn_onoff_override(codec, false);
7129 }
7130 }
7131
7132 tabla->in_gpio_handler = false;
7133 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7134 pr_debug("%s: leave\n", __func__);
7135}
7136
7137static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
7138{
7139 int r = IRQ_HANDLED;
7140 struct snd_soc_codec *codec = data;
7141
7142 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
7143 pr_warn("%s: failed to hold suspend\n", __func__);
7144 r = IRQ_NONE;
7145 } else {
7146 tabla_hs_gpio_handler(codec);
7147 wcd9xxx_unlock_sleep(codec->control_data);
7148 }
7149
7150 return r;
7151}
7152
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007153static void tabla_hs_correct_plug_nogpio(struct work_struct *work)
7154{
7155 struct tabla_priv *tabla;
7156 struct snd_soc_codec *codec;
7157 unsigned long timeout;
7158 int retry = 0;
7159 enum tabla_mbhc_plug_type plug_type;
7160 bool is_headset = false;
7161
7162 pr_debug("%s(): Poll Microphone voltage for %d seconds\n",
7163 __func__, TABLA_HS_DETECT_PLUG_TIME_MS / 1000);
7164
7165 tabla = container_of(work, struct tabla_priv,
7166 hs_correct_plug_work_nogpio);
7167 codec = tabla->codec;
7168
7169 /* Make sure the MBHC mux is connected to MIC Path */
7170 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
7171
7172 /* setup for microphone polling */
7173 tabla_turn_onoff_override(codec, true);
7174 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7175
7176 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
7177 while (!time_after(jiffies, timeout)) {
7178 ++retry;
7179
7180 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
7181 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7182 plug_type = tabla_codec_get_plug_type(codec, false);
7183 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7184
7185 if (plug_type == PLUG_TYPE_HIGH_HPH
7186 || plug_type == PLUG_TYPE_INVALID) {
7187
7188 /* this means the plug is removed
7189 * End microphone polling and setup
7190 * for low power removal detection.
7191 */
7192 pr_debug("%s(): Plug may be removed, setup removal\n",
7193 __func__);
7194 break;
7195 } else if (plug_type == PLUG_TYPE_HEADSET) {
7196 /* Plug is corrected from headphone to headset,
7197 * report headset and end the polling
7198 */
7199 is_headset = true;
7200 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7201 tabla_turn_onoff_override(codec, false);
7202 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
7203 tabla_codec_start_hs_polling(codec);
7204 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7205 pr_debug("%s(): corrected from headphone to headset\n",
7206 __func__);
7207 break;
7208 }
7209 }
7210
7211 /* Undo setup for microphone polling depending
7212 * result from polling
7213 */
7214 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7215 if (!is_headset) {
7216 tabla_turn_onoff_override(codec, false);
7217 tabla_codec_cleanup_hs_polling(codec);
7218 tabla_codec_enable_hs_detect(codec, 0, 0, false);
7219 }
7220 wcd9xxx_unlock_sleep(codec->control_data);
7221}
7222
Joonwoo Park1305bab2012-05-21 15:08:42 -07007223static int tabla_mbhc_init_and_calibrate(struct tabla_priv *tabla)
7224{
7225 int ret = 0;
7226 struct snd_soc_codec *codec = tabla->codec;
7227
7228 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
7229 tabla_mbhc_init(codec);
7230 tabla_mbhc_cal(codec);
7231 tabla_mbhc_calc_thres(codec);
7232 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
7233 tabla_codec_calibrate_hs_polling(codec);
7234 if (!tabla->mbhc_cfg.gpio) {
Bhalchandra Gajareac0bddf2012-04-06 12:33:54 -07007235 INIT_WORK(&tabla->hs_correct_plug_work_nogpio,
7236 tabla_hs_correct_plug_nogpio);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007237 ret = tabla_codec_enable_hs_detect(codec, 1,
7238 MBHC_USE_MB_TRIGGER |
7239 MBHC_USE_HPHL_TRIGGER,
7240 false);
7241
7242 if (IS_ERR_VALUE(ret))
7243 pr_err("%s: Failed to setup MBHC detection\n",
7244 __func__);
7245 } else {
7246 /* Enable Mic Bias pull down and HPH Switch to GND */
7247 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
7248 0x01, 0x01);
7249 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x01);
7250 INIT_WORK(&tabla->hs_correct_plug_work,
7251 tabla_hs_correct_gpio_plug);
7252 }
7253
7254 if (!IS_ERR_VALUE(ret)) {
7255 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
7256 wcd9xxx_enable_irq(codec->control_data,
7257 TABLA_IRQ_HPH_PA_OCPL_FAULT);
7258 wcd9xxx_enable_irq(codec->control_data,
7259 TABLA_IRQ_HPH_PA_OCPR_FAULT);
7260
7261 if (tabla->mbhc_cfg.gpio) {
7262 ret = request_threaded_irq(tabla->mbhc_cfg.gpio_irq,
7263 NULL,
7264 tabla_mechanical_plug_detect_irq,
7265 (IRQF_TRIGGER_RISING |
7266 IRQF_TRIGGER_FALLING),
7267 "tabla-gpio", codec);
7268 if (!IS_ERR_VALUE(ret)) {
7269 ret = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
7270 /* Bootup time detection */
7271 tabla_hs_gpio_handler(codec);
7272 }
7273 }
7274 }
7275
7276 return ret;
7277}
7278
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007279static void mbhc_fw_read(struct work_struct *work)
7280{
7281 struct delayed_work *dwork;
7282 struct tabla_priv *tabla;
7283 struct snd_soc_codec *codec;
7284 const struct firmware *fw;
Joonwoo Park1305bab2012-05-21 15:08:42 -07007285 int ret = -1, retry = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007286
7287 dwork = to_delayed_work(work);
Joonwoo Park1305bab2012-05-21 15:08:42 -07007288 tabla = container_of(dwork, struct tabla_priv, mbhc_firmware_dwork);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007289 codec = tabla->codec;
7290
7291 while (retry < MBHC_FW_READ_ATTEMPTS) {
7292 retry++;
7293 pr_info("%s:Attempt %d to request MBHC firmware\n",
7294 __func__, retry);
7295 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
7296 codec->dev);
7297
7298 if (ret != 0) {
7299 usleep_range(MBHC_FW_READ_TIMEOUT,
Joonwoo Park1305bab2012-05-21 15:08:42 -07007300 MBHC_FW_READ_TIMEOUT);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007301 } else {
7302 pr_info("%s: MBHC Firmware read succesful\n", __func__);
7303 break;
7304 }
7305 }
7306
7307 if (ret != 0) {
7308 pr_err("%s: Cannot load MBHC firmware use default cal\n",
7309 __func__);
7310 } else if (tabla_mbhc_fw_validate(fw) == false) {
7311 pr_err("%s: Invalid MBHC cal data size use default cal\n",
7312 __func__);
7313 release_firmware(fw);
7314 } else {
7315 tabla->mbhc_cfg.calibration = (void *)fw->data;
7316 tabla->mbhc_fw = fw;
7317 }
7318
Joonwoo Park1305bab2012-05-21 15:08:42 -07007319 (void) tabla_mbhc_init_and_calibrate(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007320}
7321
Joonwoo Park03324832012-03-19 19:36:16 -07007322int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007323 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07007324{
7325 struct tabla_priv *tabla;
7326 int rc = 0;
7327
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007328 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07007329 pr_err("Error: no codec or calibration\n");
7330 return -EINVAL;
7331 }
7332
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007333 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
7334 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07007335 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007336 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07007337 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007338 pr_err("Error: unsupported clock rate %d\n",
7339 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07007340 return -EINVAL;
7341 }
7342
7343 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007344 tabla->mbhc_cfg = *cfg;
7345 tabla->in_gpio_handler = false;
7346 tabla->current_plug = PLUG_TYPE_NONE;
7347 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07007348 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
7349
7350 /* Put CFILT in fast mode by default */
7351 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
7352 0x40, TABLA_CFILT_FAST_MODE);
7353 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
7354 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
7355 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
7356 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
7357 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
7358
Joonwoo Park1305bab2012-05-21 15:08:42 -07007359 if (!tabla->mbhc_cfg.read_fw_bin)
7360 rc = tabla_mbhc_init_and_calibrate(tabla);
7361 else
Joonwoo Park03324832012-03-19 19:36:16 -07007362 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
7363 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007364
Joonwoo Park03324832012-03-19 19:36:16 -07007365 return rc;
7366}
7367EXPORT_SYMBOL_GPL(tabla_hs_detect);
7368
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007369static irqreturn_t tabla_slimbus_irq(int irq, void *data)
7370{
7371 struct tabla_priv *priv = data;
7372 struct snd_soc_codec *codec = priv->codec;
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07007373 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
7374 int i, j, port_id, k, ch_mask_temp;
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07007375 unsigned long slimbus_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007376 u8 val;
7377
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307378 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
7379 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007380 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
7381 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307382 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007383 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
7384 if (val & 0x1)
7385 pr_err_ratelimited("overflow error on port %x,"
7386 " value %x\n", i*8 + j, val);
7387 if (val & 0x2)
7388 pr_err_ratelimited("underflow error on port %x,"
7389 " value %x\n", i*8 + j, val);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07007390 if (val & 0x4) {
7391 pr_debug("%s: port %x disconnect value %x\n",
7392 __func__, i*8 + j, val);
7393 port_id = i*8 + j;
7394 for (k = 0; k < ARRAY_SIZE(tabla_dai); k++) {
7395 ch_mask_temp = 1 << port_id;
7396 if (ch_mask_temp &
7397 tabla_p->dai[k].ch_mask) {
7398 tabla_p->dai[k].ch_mask &=
7399 ~ch_mask_temp;
7400 if (!tabla_p->dai[k].ch_mask)
7401 wake_up(
7402 &tabla_p->dai[k].dai_wait);
7403 }
7404 }
7405 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007406 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307407 wcd9xxx_interface_reg_write(codec->control_data,
Swaminathan Sathappan4bd38942012-07-17 11:31:31 -07007408 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, slimbus_value);
7409 val = 0x0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007410 }
7411
7412 return IRQ_HANDLED;
7413}
7414
Patrick Lai3043fba2011-08-01 14:15:57 -07007415static int tabla_handle_pdata(struct tabla_priv *tabla)
7416{
7417 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307418 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07007419 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05307420 u8 leg_mode = pdata->amic_settings.legacy_mode;
7421 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
7422 u8 txfe_buff = pdata->amic_settings.txfe_buff;
7423 u8 flag = pdata->amic_settings.use_pdata;
7424 u8 i = 0, j = 0;
7425 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07007426
7427 if (!pdata) {
7428 rc = -ENODEV;
7429 goto done;
7430 }
7431
7432 /* Make sure settings are correct */
7433 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
7434 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
7435 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
7436 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
7437 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
7438 rc = -EINVAL;
7439 goto done;
7440 }
7441
7442 /* figure out k value */
7443 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
7444 pdata->micbias.cfilt1_mv);
7445 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
7446 pdata->micbias.cfilt2_mv);
7447 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
7448 pdata->micbias.cfilt3_mv);
7449
7450 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
7451 rc = -EINVAL;
7452 goto done;
7453 }
7454
7455 /* Set voltage level and always use LDO */
7456 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
7457 (pdata->micbias.ldoh_v << 2));
7458
7459 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
7460 (k1 << 2));
7461 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
7462 (k2 << 2));
7463 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
7464 (k3 << 2));
7465
7466 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
7467 (pdata->micbias.bias1_cfilt_sel << 5));
7468 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
7469 (pdata->micbias.bias2_cfilt_sel << 5));
7470 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
7471 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007472 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
7473 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07007474
Santosh Mardi22920282011-10-26 02:38:40 +05307475 for (i = 0; i < 6; j++, i += 2) {
7476 if (flag & (0x01 << i)) {
7477 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
7478 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
7479 val_txfe = val_txfe |
7480 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
7481 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
7482 0x10, value);
7483 snd_soc_update_bits(codec,
7484 TABLA_A_TX_1_2_TEST_EN + j * 10,
7485 0x30, val_txfe);
7486 }
7487 if (flag & (0x01 << (i + 1))) {
7488 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
7489 val_txfe = (txfe_bypass &
7490 (0x01 << (i + 1))) ? 0x02 : 0x00;
7491 val_txfe |= (txfe_buff &
7492 (0x01 << (i + 1))) ? 0x01 : 0x00;
7493 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
7494 0x01, value);
7495 snd_soc_update_bits(codec,
7496 TABLA_A_TX_1_2_TEST_EN + j * 10,
7497 0x03, val_txfe);
7498 }
7499 }
7500 if (flag & 0x40) {
7501 value = (leg_mode & 0x40) ? 0x10 : 0x00;
7502 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
7503 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
7504 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
7505 0x13, value);
7506 }
Patrick Lai49efeac2011-11-03 11:01:12 -07007507
7508 if (pdata->ocp.use_pdata) {
7509 /* not defined in CODEC specification */
7510 if (pdata->ocp.hph_ocp_limit == 1 ||
7511 pdata->ocp.hph_ocp_limit == 5) {
7512 rc = -EINVAL;
7513 goto done;
7514 }
7515 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
7516 0x0F, pdata->ocp.num_attempts);
7517 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
7518 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
7519 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
7520 0xE0, (pdata->ocp.hph_ocp_limit << 5));
7521 }
Joonwoo Park03324832012-03-19 19:36:16 -07007522
7523 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
7524 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
7525 if (pdata->regulator[i].min_uV == 1800000 &&
7526 pdata->regulator[i].max_uV == 1800000) {
7527 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7528 0x1C);
7529 } else if (pdata->regulator[i].min_uV == 2200000 &&
7530 pdata->regulator[i].max_uV == 2200000) {
7531 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
7532 0x1E);
7533 } else {
7534 pr_err("%s: unsupported CDC_VDDA_RX voltage "
7535 "min %d, max %d\n", __func__,
7536 pdata->regulator[i].min_uV,
7537 pdata->regulator[i].max_uV);
7538 rc = -EINVAL;
7539 }
7540 break;
7541 }
7542 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007543done:
7544 return rc;
7545}
7546
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007547static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
7548
7549 /* Tabla 1.1 MICBIAS changes */
7550 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
7551 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
7552 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007553
7554 /* Tabla 1.1 HPH changes */
7555 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
7556 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
7557
7558 /* Tabla 1.1 EAR PA changes */
7559 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
7560 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
7561 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
7562
7563 /* Tabla 1.1 Lineout_5 Changes */
7564 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
7565
7566 /* Tabla 1.1 RX Changes */
7567 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
7568 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
7569 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
7570 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
7571 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
7572 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
7573 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
7574
7575 /* Tabla 1.1 RX1 and RX2 Changes */
7576 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
7577 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
7578
7579 /* Tabla 1.1 RX3 to RX7 Changes */
7580 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
7581 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
7582 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
7583 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
7584 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
7585
7586 /* Tabla 1.1 CLASSG Changes */
7587 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
7588};
7589
7590static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007591 /* Tabla 2.0 MICBIAS changes */
7592 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
7593};
7594
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007595static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
7596 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
7597};
7598
7599static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
7600 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
7601};
7602
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007603static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
7604{
7605 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307606 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007607
7608 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
7609 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
7610 tabla_1_1_reg_defaults[i].val);
7611
7612 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
7613 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
7614 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007615
7616 if (TABLA_IS_1_X(tabla_core->version)) {
7617 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
7618 i++)
7619 snd_soc_write(codec,
7620 tabla_1_x_only_reg_2_0_defaults[i].reg,
7621 tabla_1_x_only_reg_2_0_defaults[i].val);
7622 } else {
7623 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
7624 snd_soc_write(codec,
7625 tabla_2_only_reg_2_0_defaults[i].reg,
7626 tabla_2_only_reg_2_0_defaults[i].val);
7627 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007628}
7629
7630static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08007631 /* Initialize current threshold to 350MA
7632 * number of wait and run cycles to 4096
7633 */
Patrick Lai49efeac2011-11-03 11:01:12 -07007634 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08007635 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007636
Santosh Mardi32171012011-10-28 23:32:06 +05307637 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
7638
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007639 /* Initialize gain registers to use register gain */
7640 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
7641 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
7642 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
7643 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
7644 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
7645 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
7646
Kuirong Wangccb29c62012-06-15 11:09:07 -07007647 /* Set the MICBIAS default output as pull down*/
7648 {TABLA_A_MICB_1_CTL, 0x01, 0x01},
7649 {TABLA_A_MICB_2_CTL, 0x01, 0x01},
7650 {TABLA_A_MICB_3_CTL, 0x01, 0x01},
7651
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007652 /* Initialize mic biases to differential mode */
7653 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
7654 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
7655 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007656
7657 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
7658
7659 /* Use 16 bit sample size for TX1 to TX6 */
7660 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
7661 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
7662 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
7663 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
7664 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
7665 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
7666
7667 /* Use 16 bit sample size for TX7 to TX10 */
7668 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
7669 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
7670 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
7671 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
7672
7673 /* Use 16 bit sample size for RX */
7674 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
7675 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
7676
7677 /*enable HPF filter for TX paths */
7678 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
7679 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
7680 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
7681 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
7682 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
7683 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
7684 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
7685 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
7686 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
7687 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
Kiran Kandi0ba468f2012-05-08 11:45:05 -07007688
7689 /* config Decimator for DMIC CLK_MODE_1(3.072Mhz@12.88Mhz mclk) */
7690 {TABLA_A_CDC_TX1_DMIC_CTL, 0x1, 0x1},
7691 {TABLA_A_CDC_TX2_DMIC_CTL, 0x1, 0x1},
7692 {TABLA_A_CDC_TX3_DMIC_CTL, 0x1, 0x1},
7693 {TABLA_A_CDC_TX4_DMIC_CTL, 0x1, 0x1},
7694 {TABLA_A_CDC_TX5_DMIC_CTL, 0x1, 0x1},
7695 {TABLA_A_CDC_TX6_DMIC_CTL, 0x1, 0x1},
7696 {TABLA_A_CDC_TX7_DMIC_CTL, 0x1, 0x1},
7697 {TABLA_A_CDC_TX8_DMIC_CTL, 0x1, 0x1},
7698 {TABLA_A_CDC_TX9_DMIC_CTL, 0x1, 0x1},
7699 {TABLA_A_CDC_TX10_DMIC_CTL, 0x1, 0x1},
7700
7701 /* config DMIC clk to CLK_MODE_1 (3.072Mhz@12.88Mhz mclk) */
7702 {TABLA_A_CDC_CLK_DMIC_CTL, 0x2A, 0x2A},
7703
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007704};
7705
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007706static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07007707 /* Set the MICBIAS default output as pull down*/
7708 {TABLA_1_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007709 /* Initialize mic biases to differential mode */
7710 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7711};
7712
7713static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
Kuirong Wangccb29c62012-06-15 11:09:07 -07007714
7715 /* Set the MICBIAS default output as pull down*/
7716 {TABLA_2_A_MICB_4_CTL, 0x01, 0x01},
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007717 /* Initialize mic biases to differential mode */
7718 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7719};
7720
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007721static void tabla_codec_init_reg(struct snd_soc_codec *codec)
7722{
7723 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307724 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007725
7726 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
7727 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
7728 tabla_codec_reg_init_val[i].mask,
7729 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007730 if (TABLA_IS_1_X(tabla_core->version)) {
7731 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
7732 snd_soc_update_bits(codec,
7733 tabla_1_x_codec_reg_init_val[i].reg,
7734 tabla_1_x_codec_reg_init_val[i].mask,
7735 tabla_1_x_codec_reg_init_val[i].val);
7736 } else {
7737 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
7738 i++)
7739 snd_soc_update_bits(codec,
7740 tabla_2_higher_codec_reg_init_val[i].reg,
7741 tabla_2_higher_codec_reg_init_val[i].mask,
7742 tabla_2_higher_codec_reg_init_val[i].val);
7743 }
7744}
7745
7746static void tabla_update_reg_address(struct tabla_priv *priv)
7747{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307748 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007749 struct tabla_reg_address *reg_addr = &priv->reg_addr;
7750
7751 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007752 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
7753 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007754 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007755 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007756 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
7757 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007758 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007759 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007760}
7761
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007762#ifdef CONFIG_DEBUG_FS
7763static int codec_debug_open(struct inode *inode, struct file *file)
7764{
7765 file->private_data = inode->i_private;
7766 return 0;
7767}
7768
7769static ssize_t codec_debug_write(struct file *filp,
7770 const char __user *ubuf, size_t cnt, loff_t *ppos)
7771{
7772 char lbuf[32];
7773 char *buf;
7774 int rc;
7775 struct tabla_priv *tabla = filp->private_data;
7776
7777 if (cnt > sizeof(lbuf) - 1)
7778 return -EINVAL;
7779
7780 rc = copy_from_user(lbuf, ubuf, cnt);
7781 if (rc)
7782 return -EFAULT;
7783
7784 lbuf[cnt] = '\0';
7785 buf = (char *)lbuf;
Joonwoo Park5bbcb0c2012-08-07 17:25:52 -07007786 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
7787 tabla->no_mic_headset_override =
7788 (*strsep(&buf, " ") == '0') ? false : true;
7789 if (tabla->no_mic_headset_override && tabla->mbhc_polling_active) {
7790 tabla_codec_pause_hs_polling(tabla->codec);
7791 tabla_codec_start_hs_polling(tabla->codec);
7792 }
7793 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
7794 return cnt;
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007795}
7796
7797static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
7798 size_t count, loff_t *pos)
7799{
7800 const int size = 768;
7801 char buffer[size];
7802 int n = 0;
7803 struct tabla_priv *tabla = file->private_data;
7804 struct snd_soc_codec *codec = tabla->codec;
7805 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007806 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
7807 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007808
7809 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
7810 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
7811 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
7812 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
7813 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
7814 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
7815 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
7816 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
7817 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
7818 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
7819 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
7820 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007821 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007822 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007823 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
7824 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
7825 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
7826 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
7827 p->v_ins_h == v_ins_h_cur ? "*" : "");
7828 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
7829 p->adj_v_ins_hu,
7830 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
7831 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
7832 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
7833 p->adj_v_ins_h,
7834 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
7835 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007836 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
7837 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
7838 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
7839 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
7840 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
7841 p->v_b1_huc,
7842 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
7843 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
7844 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
7845 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
7846 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
7847 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
7848 p->v_no_mic,
7849 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
7850 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
7851 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
7852 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007853 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
7854 p->v_inval_ins_low);
7855 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
7856 p->v_inval_ins_high);
Joonwoo Park2cc13f02012-05-09 12:44:25 -07007857 if (tabla->mbhc_cfg.gpio)
7858 n += scnprintf(buffer + n, size - n, "GPIO insert = %d\n",
7859 tabla_hs_gpio_level_remove(tabla));
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007860 buffer[n] = 0;
7861
7862 return simple_read_from_buffer(buf, count, pos, buffer, n);
7863}
7864
7865static const struct file_operations codec_debug_ops = {
7866 .open = codec_debug_open,
7867 .write = codec_debug_write,
7868};
7869
7870static const struct file_operations codec_mbhc_debug_ops = {
7871 .open = codec_debug_open,
7872 .read = codec_mbhc_debug_read,
7873};
7874#endif
7875
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007876static int tabla_codec_probe(struct snd_soc_codec *codec)
7877{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307878 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007879 struct tabla_priv *tabla;
7880 struct snd_soc_dapm_context *dapm = &codec->dapm;
7881 int ret = 0;
7882 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007883 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007884
7885 codec->control_data = dev_get_drvdata(codec->dev->parent);
7886 control = codec->control_data;
7887
7888 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
7889 if (!tabla) {
7890 dev_err(codec->dev, "Failed to allocate private data\n");
7891 return -ENOMEM;
7892 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08007893 for (i = 0 ; i < NUM_DECIMATORS; i++) {
7894 tx_hpf_work[i].tabla = tabla;
7895 tx_hpf_work[i].decimator = i + 1;
7896 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
7897 tx_hpf_corner_freq_callback);
7898 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007899
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007900 /* Make sure mbhc micbias register addresses are zeroed out */
7901 memset(&tabla->mbhc_bias_regs, 0,
7902 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07007903 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007904
Joonwoo Park0976d012011-12-22 11:48:18 -08007905 /* Make sure mbhc intenal calibration data is zeroed out */
7906 memset(&tabla->mbhc_data, 0,
7907 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08007908 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08007909 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
7910 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007911 snd_soc_codec_set_drvdata(codec, tabla);
7912
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07007913 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007914 tabla->bandgap_type = TABLA_BANDGAP_OFF;
7915 tabla->clock_active = false;
7916 tabla->config_mode_active = false;
7917 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08007918 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07007919 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007920 tabla->hs_polling_irq_prepared = false;
7921 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007922 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007923 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07007924 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08007925 for (i = 0; i < COMPANDER_MAX; i++) {
7926 tabla->comp_enabled[i] = 0;
7927 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
7928 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007929 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307930 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08007931 tabla->aux_pga_cnt = 0;
7932 tabla->aux_l_gain = 0x1F;
7933 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007934 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05307935 tabla_update_reg_defaults(codec);
7936 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05307937 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07007938 if (IS_ERR_VALUE(ret)) {
7939 pr_err("%s: bad pdata\n", __func__);
7940 goto err_pdata;
7941 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007942
Steve Mucklef132c6c2012-06-06 18:30:57 -07007943// snd_soc_add_codec_controls(codec, tabla_snd_controls,
7944// ARRAY_SIZE(tabla_snd_controls));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007945 if (TABLA_IS_1_X(control->version))
Steve Mucklef132c6c2012-06-06 18:30:57 -07007946 snd_soc_add_codec_controls(codec, tabla_1_x_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007947 ARRAY_SIZE(tabla_1_x_snd_controls));
7948 else
Steve Mucklef132c6c2012-06-06 18:30:57 -07007949 snd_soc_add_codec_controls(codec, tabla_2_higher_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007950 ARRAY_SIZE(tabla_2_higher_snd_controls));
7951
Steve Mucklef132c6c2012-06-06 18:30:57 -07007952// snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
7953// ARRAY_SIZE(tabla_dapm_widgets));
Kiran Kandi93923902012-06-20 17:00:25 -07007954
7955 snd_soc_dapm_new_controls(dapm, tabla_dapm_aif_in_widgets,
7956 ARRAY_SIZE(tabla_dapm_aif_in_widgets));
7957
7958 snd_soc_dapm_new_controls(dapm, tabla_dapm_aif_out_widgets,
7959 ARRAY_SIZE(tabla_dapm_aif_out_widgets));
7960
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007961 if (TABLA_IS_1_X(control->version))
7962 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
7963 ARRAY_SIZE(tabla_1_x_dapm_widgets));
7964 else
7965 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
7966 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
7967
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307968 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05307969 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
7970 ARRAY_SIZE(tabla_dapm_i2s_widgets));
7971 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
7972 ARRAY_SIZE(audio_i2s_map));
7973 }
Steve Mucklef132c6c2012-06-06 18:30:57 -07007974// snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07007975
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007976 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007977 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007978 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
7979 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007980 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007981 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007982 } else {
7983 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307984 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007985 goto err_pdata;
7986 }
7987
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007988 snd_soc_dapm_sync(dapm);
7989
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307990 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007991 tabla_hs_insert_irq, "Headset insert detect", tabla);
7992 if (ret) {
7993 pr_err("%s: Failed to request irq %d\n", __func__,
7994 TABLA_IRQ_MBHC_INSERTION);
7995 goto err_insert_irq;
7996 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307997 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007998
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307999 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008000 tabla_hs_remove_irq, "Headset remove detect", tabla);
8001 if (ret) {
8002 pr_err("%s: Failed to request irq %d\n", __func__,
8003 TABLA_IRQ_MBHC_REMOVAL);
8004 goto err_remove_irq;
8005 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008006
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308007 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07008008 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008009 if (ret) {
8010 pr_err("%s: Failed to request irq %d\n", __func__,
8011 TABLA_IRQ_MBHC_POTENTIAL);
8012 goto err_potential_irq;
8013 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008014
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308015 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07008016 tabla_release_handler, "Button Release detect", tabla);
8017 if (ret) {
8018 pr_err("%s: Failed to request irq %d\n", __func__,
8019 TABLA_IRQ_MBHC_RELEASE);
8020 goto err_release_irq;
8021 }
8022
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308023 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008024 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
8025 if (ret) {
8026 pr_err("%s: Failed to request irq %d\n", __func__,
8027 TABLA_IRQ_SLIMBUS);
8028 goto err_slimbus_irq;
8029 }
8030
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308031 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
8032 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008033 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
8034
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308035 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07008036 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
8037 "HPH_L OCP detect", tabla);
8038 if (ret) {
8039 pr_err("%s: Failed to request irq %d\n", __func__,
8040 TABLA_IRQ_HPH_PA_OCPL_FAULT);
8041 goto err_hphl_ocp_irq;
8042 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308043 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07008044
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308045 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07008046 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
8047 "HPH_R OCP detect", tabla);
8048 if (ret) {
8049 pr_err("%s: Failed to request irq %d\n", __func__,
8050 TABLA_IRQ_HPH_PA_OCPR_FAULT);
8051 goto err_hphr_ocp_irq;
8052 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308053 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008054 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
8055 switch (tabla_dai[i].id) {
8056 case AIF1_PB:
8057 ch_cnt = tabla_dai[i].playback.channels_max;
8058 break;
8059 case AIF1_CAP:
8060 ch_cnt = tabla_dai[i].capture.channels_max;
8061 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08008062 case AIF2_PB:
8063 ch_cnt = tabla_dai[i].playback.channels_max;
8064 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07008065 case AIF2_CAP:
8066 ch_cnt = tabla_dai[i].capture.channels_max;
8067 break;
Kiran Kandia9fffe92012-05-20 23:42:30 -07008068 case AIF3_PB:
8069 ch_cnt = tabla_dai[i].playback.channels_max;
8070 break;
Neema Shetty3fb1b802012-04-27 13:53:24 -07008071 case AIF3_CAP:
8072 ch_cnt = tabla_dai[i].capture.channels_max;
8073 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008074 default:
8075 continue;
8076 }
8077 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
8078 ch_cnt), GFP_KERNEL);
Swaminathan Sathappan2aa4c042012-06-26 13:08:45 -07008079 init_waitqueue_head(&tabla->dai[i].dai_wait);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008080 }
Patrick Lai49efeac2011-11-03 11:01:12 -07008081
Bradley Rubincb3950a2011-08-18 13:07:26 -07008082#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008083 if (ret == 0) {
8084 tabla->debugfs_poke =
8085 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
8086 &codec_debug_ops);
8087 tabla->debugfs_mbhc =
8088 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
8089 NULL, tabla, &codec_mbhc_debug_ops);
8090 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07008091#endif
Steve Mucklef132c6c2012-06-06 18:30:57 -07008092 codec->ignore_pmdown_time = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008093 return ret;
8094
Patrick Lai49efeac2011-11-03 11:01:12 -07008095err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308096 wcd9xxx_free_irq(codec->control_data,
8097 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07008098err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308099 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008100err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308101 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07008102err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308103 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008104err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308105 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008106err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308107 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008108err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07008109err_pdata:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008110 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008111 kfree(tabla);
8112 return ret;
8113}
8114static int tabla_codec_remove(struct snd_soc_codec *codec)
8115{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008116 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008117 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308118 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
8119 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
8120 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
8121 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
8122 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008123 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008124 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008125 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008126 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08008127 if (tabla->mbhc_fw)
8128 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08008129 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
8130 kfree(tabla->dai[i].ch_num);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07008131 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07008132#ifdef CONFIG_DEBUG_FS
8133 debugfs_remove(tabla->debugfs_poke);
8134 debugfs_remove(tabla->debugfs_mbhc);
8135#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008136 kfree(tabla);
8137 return 0;
8138}
8139static struct snd_soc_codec_driver soc_codec_dev_tabla = {
8140 .probe = tabla_codec_probe,
8141 .remove = tabla_codec_remove,
8142 .read = tabla_read,
8143 .write = tabla_write,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008144 .readable_register = tabla_readable,
8145 .volatile_register = tabla_volatile,
8146
8147 .reg_cache_size = TABLA_CACHE_SIZE,
8148 .reg_cache_default = tabla_reg_defaults,
8149 .reg_word_size = 1,
Steve Mucklef132c6c2012-06-06 18:30:57 -07008150 .controls = tabla_snd_controls,
8151 .num_controls = ARRAY_SIZE(tabla_snd_controls),
8152 .dapm_widgets = tabla_dapm_widgets,
8153 .num_dapm_widgets = ARRAY_SIZE(tabla_dapm_widgets),
8154 .dapm_routes = audio_map,
8155 .num_dapm_routes = ARRAY_SIZE(audio_map),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008156};
Bradley Rubincb3950a2011-08-18 13:07:26 -07008157
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008158#ifdef CONFIG_PM
8159static int tabla_suspend(struct device *dev)
8160{
Joonwoo Park816b8e62012-01-23 16:03:21 -08008161 dev_dbg(dev, "%s: system suspend\n", __func__);
8162 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008163}
8164
8165static int tabla_resume(struct device *dev)
8166{
Joonwoo Park03324832012-03-19 19:36:16 -07008167 struct platform_device *pdev = to_platform_device(dev);
8168 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Park816b8e62012-01-23 16:03:21 -08008169 dev_dbg(dev, "%s: system resume\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07008170 tabla->mbhc_last_resume = jiffies;
Joonwoo Park816b8e62012-01-23 16:03:21 -08008171 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008172}
8173
8174static const struct dev_pm_ops tabla_pm_ops = {
8175 .suspend = tabla_suspend,
8176 .resume = tabla_resume,
8177};
8178#endif
8179
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008180static int __devinit tabla_probe(struct platform_device *pdev)
8181{
Santosh Mardie15e2302011-11-15 10:39:23 +05308182 int ret = 0;
Steve Mucklef132c6c2012-06-06 18:30:57 -07008183 pr_err("tabla_probe\n");
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308184 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05308185 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8186 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05308187 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05308188 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
8189 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
8190 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008191}
8192static int __devexit tabla_remove(struct platform_device *pdev)
8193{
8194 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008195 return 0;
8196}
8197static struct platform_driver tabla_codec_driver = {
8198 .probe = tabla_probe,
8199 .remove = tabla_remove,
8200 .driver = {
8201 .name = "tabla_codec",
8202 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08008203#ifdef CONFIG_PM
8204 .pm = &tabla_pm_ops,
8205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008206 },
8207};
8208
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008209static struct platform_driver tabla1x_codec_driver = {
8210 .probe = tabla_probe,
8211 .remove = tabla_remove,
8212 .driver = {
8213 .name = "tabla1x_codec",
8214 .owner = THIS_MODULE,
8215#ifdef CONFIG_PM
8216 .pm = &tabla_pm_ops,
8217#endif
8218 },
8219};
8220
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008221static int __init tabla_codec_init(void)
8222{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008223 int rtn = platform_driver_register(&tabla_codec_driver);
8224 if (rtn == 0) {
8225 rtn = platform_driver_register(&tabla1x_codec_driver);
8226 if (rtn != 0)
8227 platform_driver_unregister(&tabla_codec_driver);
8228 }
8229 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008230}
8231
8232static void __exit tabla_codec_exit(void)
8233{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08008234 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008235 platform_driver_unregister(&tabla_codec_driver);
8236}
8237
8238module_init(tabla_codec_init);
8239module_exit(tabla_codec_exit);
8240
8241MODULE_DESCRIPTION("Tabla codec driver");
8242MODULE_VERSION("1.0");
8243MODULE_LICENSE("GPL v2");