blob: 2a0700293ad27fc1e85b4d88dda6ab9b01300711 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700207#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
208 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
209
210#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
212
Kiran Kumar H N90785902012-07-05 13:59:38 -0700213#define MSM_CAM_IOCTL_GET_INST_HANDLE \
214 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
215
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700216#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
218
219
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700220struct msm_stats_reqbuf {
221 int num_buf; /* how many buffers requested */
222 int stats_type; /* stats type */
223};
224
225struct msm_stats_flush_bufq {
226 int stats_type; /* enum msm_stats_enum_type */
227};
228
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700229struct msm_mctl_pp_cmd {
230 int32_t id;
231 uint16_t length;
232 void *value;
233};
234
235struct msm_mctl_post_proc_cmd {
236 int32_t type;
237 struct msm_mctl_pp_cmd cmd;
238};
239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700240#define MSM_CAMERA_LED_OFF 0
241#define MSM_CAMERA_LED_LOW 1
242#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530243#define MSM_CAMERA_LED_INIT 3
244#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245
246#define MSM_CAMERA_STROBE_FLASH_NONE 0
247#define MSM_CAMERA_STROBE_FLASH_XENON 1
248
249#define MSM_MAX_CAMERA_SENSORS 5
250#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800251#define MAX_CAM_NAME_SIZE 32
252#define MAX_ACT_MOD_NAME_SIZE 32
253#define MAX_ACT_NAME_SIZE 32
254#define NUM_ACTUATOR_DIR 2
255#define MAX_ACTUATOR_SCENARIO 8
256#define MAX_ACTUATOR_REGION 5
257#define MAX_ACTUATOR_INIT_SET 12
258#define MAX_ACTUATOR_TYPE_SIZE 32
259#define MAX_ACTUATOR_REG_TBL_SIZE 8
260
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261
262#define MSM_MAX_CAMERA_CONFIGS 2
263
264#define PP_SNAP 0x01
265#define PP_RAW_SNAP ((0x01)<<1)
266#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800267#define PP_THUMB ((0x01)<<3)
268#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700269
270#define MSM_CAM_CTRL_CMD_DONE 0
271#define MSM_CAM_SENSOR_VFE_CMD 1
272
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700273/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
274#define MAX_PLANES 8
275
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700276/*****************************************************
277 * structure
278 *****************************************************/
279
280/* define five type of structures for userspace <==> kernel
281 * space communication:
282 * command 1 - 2 are from userspace ==> kernel
283 * command 3 - 4 are from kernel ==> userspace
284 *
285 * 1. control command: control command(from control thread),
286 * control status (from config thread);
287 */
288struct msm_ctrl_cmd {
289 uint16_t type;
290 uint16_t length;
291 void *value;
292 uint16_t status;
293 uint32_t timeout_ms;
294 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
295 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800296 int queue_idx;
297 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700298 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700299 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700300};
301
302struct msm_cam_evt_msg {
303 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
304 unsigned short msg_id;
305 unsigned int len; /* size in, number of bytes out */
306 uint32_t frame_id;
307 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700308 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700309};
310
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700311struct msm_pp_frame_sp {
312 /* phy addr of the buffer */
313 unsigned long phy_addr;
314 uint32_t y_off;
315 uint32_t cbcr_off;
316 /* buffer length */
317 uint32_t length;
318 int32_t fd;
319 uint32_t addr_offset;
320 /* mapped addr */
321 unsigned long vaddr;
322};
323
324struct msm_pp_frame_mp {
325 /* phy addr of the plane */
326 unsigned long phy_addr;
327 /* offset of plane data */
328 uint32_t data_offset;
329 /* plane length */
330 uint32_t length;
331 int32_t fd;
332 uint32_t addr_offset;
333 /* mapped addr */
334 unsigned long vaddr;
335};
336
337struct msm_pp_frame {
338 uint32_t handle; /* stores vb cookie */
339 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800340 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700341 int path;
342 unsigned short image_type;
343 unsigned short num_planes; /* 1 for sp */
344 struct timeval timestamp;
345 union {
346 struct msm_pp_frame_sp sp;
347 struct msm_pp_frame_mp mp[MAX_PLANES];
348 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800349 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700350 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700351};
352
Mingcheng Zhu49505502011-07-19 20:44:36 -0700353struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700354 unsigned short image_mode;
355 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700356 unsigned short inst_idx;
357 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700358 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700359 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700360};
361
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700362struct msm_mctl_pp_cmd_ack_event {
363 uint32_t cmd; /* VPE_CMD_ZOOM? */
364 int status; /* 0 done, < 0 err */
365 uint32_t cookie; /* daemon's cookie */
366};
367
368struct msm_mctl_pp_event_info {
369 int32_t event;
370 union {
371 struct msm_mctl_pp_cmd_ack_event ack;
372 };
373};
374
375struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700376 unsigned short resptype;
377 union {
378 struct msm_cam_evt_msg isp_msg;
379 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700380 struct msm_cam_evt_divert_frame div_frame;
381 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700382 } isp_data;
383};
384
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700385#define MSM_CAM_RESP_CTRL 0
386#define MSM_CAM_RESP_STAT_EVT_MSG 1
387#define MSM_CAM_RESP_STEREO_OP_1 2
388#define MSM_CAM_RESP_STEREO_OP_2 3
389#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700390#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700391#define MSM_CAM_RESP_DONE_EVENT 6
392#define MSM_CAM_RESP_MCTL_PP_EVENT 7
393#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700394
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700395#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800396#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700397
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700398/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700399
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700400struct msm_stats_event_ctrl {
401 /* 0 - ctrl_cmd from control thread,
402 * 1 - stats/event kernel,
403 * 2 - V4L control or read request */
404 int resptype;
405 int timeout_ms;
406 struct msm_ctrl_cmd ctrl_cmd;
407 /* struct vfe_event_t stats_event; */
408 struct msm_cam_evt_msg stats_event;
409};
410
411/* 2. config command: config command(from config thread); */
412struct msm_camera_cfg_cmd {
413 /* what to config:
414 * 1 - sensor config, 2 - vfe config */
415 uint16_t cfg_type;
416
417 /* sensor config type */
418 uint16_t cmd_type;
419 uint16_t queue;
420 uint16_t length;
421 void *value;
422};
423
424#define CMD_GENERAL 0
425#define CMD_AXI_CFG_OUT1 1
426#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
427#define CMD_AXI_CFG_OUT2 3
428#define CMD_PICT_T_AXI_CFG 4
429#define CMD_PICT_M_AXI_CFG 5
430#define CMD_RAW_PICT_AXI_CFG 6
431
432#define CMD_FRAME_BUF_RELEASE 7
433#define CMD_PREV_BUF_CFG 8
434#define CMD_SNAP_BUF_RELEASE 9
435#define CMD_SNAP_BUF_CFG 10
436#define CMD_STATS_DISABLE 11
437#define CMD_STATS_AEC_AWB_ENABLE 12
438#define CMD_STATS_AF_ENABLE 13
439#define CMD_STATS_AEC_ENABLE 14
440#define CMD_STATS_AWB_ENABLE 15
441#define CMD_STATS_ENABLE 16
442
443#define CMD_STATS_AXI_CFG 17
444#define CMD_STATS_AEC_AXI_CFG 18
445#define CMD_STATS_AF_AXI_CFG 19
446#define CMD_STATS_AWB_AXI_CFG 20
447#define CMD_STATS_RS_AXI_CFG 21
448#define CMD_STATS_CS_AXI_CFG 22
449#define CMD_STATS_IHIST_AXI_CFG 23
450#define CMD_STATS_SKIN_AXI_CFG 24
451
452#define CMD_STATS_BUF_RELEASE 25
453#define CMD_STATS_AEC_BUF_RELEASE 26
454#define CMD_STATS_AF_BUF_RELEASE 27
455#define CMD_STATS_AWB_BUF_RELEASE 28
456#define CMD_STATS_RS_BUF_RELEASE 29
457#define CMD_STATS_CS_BUF_RELEASE 30
458#define CMD_STATS_IHIST_BUF_RELEASE 31
459#define CMD_STATS_SKIN_BUF_RELEASE 32
460
461#define UPDATE_STATS_INVALID 33
462#define CMD_AXI_CFG_SNAP_GEMINI 34
463#define CMD_AXI_CFG_SNAP 35
464#define CMD_AXI_CFG_PREVIEW 36
465#define CMD_AXI_CFG_VIDEO 37
466
467#define CMD_STATS_IHIST_ENABLE 38
468#define CMD_STATS_RS_ENABLE 39
469#define CMD_STATS_CS_ENABLE 40
470#define CMD_VPE 41
471#define CMD_AXI_CFG_VPE 42
472#define CMD_AXI_CFG_ZSL 43
473#define CMD_AXI_CFG_SNAP_VPE 44
474#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700475
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530476#define CMD_CONFIG_PING_ADDR 46
477#define CMD_CONFIG_PONG_ADDR 47
478#define CMD_CONFIG_FREE_BUF_ADDR 48
479#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
480#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530481#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700482#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700483#define CMD_STATS_BG_ENABLE 53
484#define CMD_STATS_BF_ENABLE 54
485#define CMD_STATS_BHIST_ENABLE 55
486#define CMD_STATS_BG_BUF_RELEASE 56
487#define CMD_STATS_BF_BUF_RELEASE 57
488#define CMD_STATS_BHIST_BUF_RELEASE 58
489
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700490
Nishant Pandit5dd54422012-06-26 22:52:44 +0530491#define CMD_AXI_CFG_PRIM BIT(8)
492#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
493#define CMD_AXI_CFG_SEC BIT(10)
494#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
495#define CMD_AXI_CFG_TERT1 BIT(12)
496#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800497
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700498#define CMD_AXI_START 0xE1
499#define CMD_AXI_STOP 0xE2
500
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700501
502#define AXI_CMD_PREVIEW BIT(0)
503#define AXI_CMD_CAPTURE BIT(1)
504#define AXI_CMD_RECORD BIT(2)
505#define AXI_CMD_ZSL BIT(3)
506#define AXI_CMD_RAW_CAPTURE BIT(4)
507
508
509
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700510/* vfe config command: config command(from config thread)*/
511struct msm_vfe_cfg_cmd {
512 int cmd_type;
513 uint16_t length;
514 void *value;
515};
516
517struct msm_vpe_cfg_cmd {
518 int cmd_type;
519 uint16_t length;
520 void *value;
521};
522
523#define MAX_CAMERA_ENABLE_NAME_LEN 32
524struct camera_enable_cmd {
525 char name[MAX_CAMERA_ENABLE_NAME_LEN];
526};
527
528#define MSM_PMEM_OUTPUT1 0
529#define MSM_PMEM_OUTPUT2 1
530#define MSM_PMEM_OUTPUT1_OUTPUT2 2
531#define MSM_PMEM_THUMBNAIL 3
532#define MSM_PMEM_MAINIMG 4
533#define MSM_PMEM_RAW_MAINIMG 5
534#define MSM_PMEM_AEC_AWB 6
535#define MSM_PMEM_AF 7
536#define MSM_PMEM_AEC 8
537#define MSM_PMEM_AWB 9
538#define MSM_PMEM_RS 10
539#define MSM_PMEM_CS 11
540#define MSM_PMEM_IHIST 12
541#define MSM_PMEM_SKIN 13
542#define MSM_PMEM_VIDEO 14
543#define MSM_PMEM_PREVIEW 15
544#define MSM_PMEM_VIDEO_VPE 16
545#define MSM_PMEM_C2D 17
546#define MSM_PMEM_MAINIMG_VPE 18
547#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700548#define MSM_PMEM_BAYER_GRID 20
549#define MSM_PMEM_BAYER_FOCUS 21
550#define MSM_PMEM_BAYER_HIST 22
551#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700552
553#define STAT_AEAW 0
554#define STAT_AEC 1
555#define STAT_AF 2
556#define STAT_AWB 3
557#define STAT_RS 4
558#define STAT_CS 5
559#define STAT_IHIST 6
560#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700561#define STAT_BG 8
562#define STAT_BF 9
563#define STAT_BHIST 10
564#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565
566#define FRAME_PREVIEW_OUTPUT1 0
567#define FRAME_PREVIEW_OUTPUT2 1
568#define FRAME_SNAPSHOT 2
569#define FRAME_THUMBNAIL 3
570#define FRAME_RAW_SNAPSHOT 4
571#define FRAME_MAX 5
572
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700573enum msm_stats_enum_type {
574 MSM_STATS_TYPE_AEC, /* legacy based AEC */
575 MSM_STATS_TYPE_AF, /* legacy based AF */
576 MSM_STATS_TYPE_AWB, /* legacy based AWB */
577 MSM_STATS_TYPE_RS, /* legacy based RS */
578 MSM_STATS_TYPE_CS, /* legacy based CS */
579 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
580 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
581 MSM_STATS_TYPE_BG, /* Bayer Grids */
582 MSM_STATS_TYPE_BF, /* Bayer Focus */
583 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
584 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
585 MSM_STATS_TYPE_MAX /* MAX */
586};
587
588struct msm_stats_buf_info {
589 int type; /* msm_stats_enum_type */
590 int fd;
591 void *vaddr;
592 uint32_t offset;
593 uint32_t len;
594 uint32_t y_off;
595 uint32_t cbcr_off;
596 uint32_t planar0_off;
597 uint32_t planar1_off;
598 uint32_t planar2_off;
599 uint8_t active;
600 int buf_idx;
601};
602
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603struct msm_pmem_info {
604 int type;
605 int fd;
606 void *vaddr;
607 uint32_t offset;
608 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700609 uint32_t y_off;
610 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530611 uint32_t planar0_off;
612 uint32_t planar1_off;
613 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700614 uint8_t active;
615};
616
617struct outputCfg {
618 uint32_t height;
619 uint32_t width;
620
621 uint32_t window_height_firstline;
622 uint32_t window_height_lastline;
623};
624
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800625#define VIDEO_NODE 0
626#define MCTL_NODE 1
627
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700628#define OUTPUT_1 0
629#define OUTPUT_2 1
630#define OUTPUT_1_AND_2 2 /* snapshot only */
631#define OUTPUT_1_AND_3 3 /* video */
632#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
633#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
634#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
635#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700636#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530637#define OUTPUT_VIDEO_ALL_CHNLS 9
638#define OUTPUT_ZSL_ALL_CHNLS 10
639#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700640
Nishant Pandit5dd54422012-06-26 22:52:44 +0530641#define OUTPUT_PRIM BIT(8)
642#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
643#define OUTPUT_SEC BIT(10)
644#define OUTPUT_SEC_ALL_CHNLS BIT(11)
645#define OUTPUT_TERT1 BIT(12)
646#define OUTPUT_TERT2 BIT(13)
647
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800648
649
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700650#define MSM_FRAME_PREV_1 0
651#define MSM_FRAME_PREV_2 1
652#define MSM_FRAME_ENC 2
653
Nishant Pandit5dd54422012-06-26 22:52:44 +0530654#define OUTPUT_TYPE_P BIT(0)
655#define OUTPUT_TYPE_T BIT(1)
656#define OUTPUT_TYPE_S BIT(2)
657#define OUTPUT_TYPE_V BIT(3)
658#define OUTPUT_TYPE_L BIT(4)
659#define OUTPUT_TYPE_ST_L BIT(5)
660#define OUTPUT_TYPE_ST_R BIT(6)
661#define OUTPUT_TYPE_ST_D BIT(7)
662#define OUTPUT_TYPE_R BIT(8)
663#define OUTPUT_TYPE_R1 BIT(9)
664
665
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700666
667struct fd_roi_info {
668 void *info;
669 int info_len;
670};
671
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700672struct msm_mem_map_info {
673 uint32_t cookie;
674 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700675 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700676};
677
Mingcheng Zhu49505502011-07-19 20:44:36 -0700678#define MSM_MEM_MMAP 0
679#define MSM_MEM_USERPTR 1
680#define MSM_PLANE_MAX 8
681#define MSM_PLANE_Y 0
682#define MSM_PLANE_UV 1
683
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700684struct msm_frame {
685 struct timespec ts;
686 int path;
687 int type;
688 unsigned long buffer;
689 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700690 uint32_t y_off;
691 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530692 uint32_t planar0_off;
693 uint32_t planar1_off;
694 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700695 int fd;
696
697 void *cropinfo;
698 int croplen;
699 uint32_t error_code;
700 struct fd_roi_info roi_info;
701 uint32_t frame_id;
702 int stcam_quality_ind;
703 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700704
705 struct ion_allocation_data ion_alloc;
706 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700707 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700708};
709
710enum msm_st_frame_packing {
711 SIDE_BY_SIDE_HALF,
712 SIDE_BY_SIDE_FULL,
713 TOP_DOWN_HALF,
714 TOP_DOWN_FULL,
715};
716
717struct msm_st_crop {
718 uint32_t in_w;
719 uint32_t in_h;
720 uint32_t out_w;
721 uint32_t out_h;
722};
723
724struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530725 uint32_t buf_p0_off;
726 uint32_t buf_p1_off;
727 uint32_t buf_p0_stride;
728 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700729 uint32_t pix_x_off;
730 uint32_t pix_y_off;
731 struct msm_st_crop stCropInfo;
732};
733
734struct msm_st_frame {
735 struct msm_frame buf_info;
736 int type;
737 enum msm_st_frame_packing packing;
738 struct msm_st_half L;
739 struct msm_st_half R;
740 int frame_id;
741};
742
743#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
744
745struct stats_buff {
746 unsigned long buff;
747 int fd;
748};
749
750struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700751 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700752 struct stats_buff aec;
753 struct stats_buff awb;
754 struct stats_buff af;
755 struct stats_buff ihist;
756 struct stats_buff rs;
757 struct stats_buff cs;
758 struct stats_buff skin;
759 int type;
760 uint32_t status_bits;
761 unsigned long buffer;
762 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800763 int length;
764 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700765 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700766 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700767};
768#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
769/* video capture mode in VIDIOC_S_PARM */
770#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
771 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
772/* extendedmode for video recording in VIDIOC_S_PARM */
773#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
774 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
775/* extendedmode for the full size main image in VIDIOC_S_PARM */
776#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
777/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
778#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
779 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
780#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
781 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530782#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
783 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
784#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
785 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
786#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
787 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
788#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700789
790
791#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
792#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
793#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
794#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
795#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
796#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
797#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
798#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
799#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
800#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
801#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
802#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
803#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
804#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
805#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700806#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700807#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700808#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800809#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
810#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700811
812/* camera operation mode for video recording - two frame output queues */
813#define MSM_V4L2_CAM_OP_DEFAULT 0
814/* camera operation mode for video recording - two frame output queues */
815#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
816/* camera operation mode for video recording - two frame output queues */
817#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
818/* camera operation mode for standard shapshot - two frame output queues */
819#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
820/* camera operation mode for zsl shapshot - three output queues */
821#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
822/* camera operation mode for raw snapshot - one frame output queue */
823#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800824/* camera operation mode for jpeg snapshot - one frame output queue */
825#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
826
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700827
828#define MSM_V4L2_VID_CAP_TYPE 0
829#define MSM_V4L2_STREAM_ON 1
830#define MSM_V4L2_STREAM_OFF 2
831#define MSM_V4L2_SNAPSHOT 3
832#define MSM_V4L2_QUERY_CTRL 4
833#define MSM_V4L2_GET_CTRL 5
834#define MSM_V4L2_SET_CTRL 6
835#define MSM_V4L2_QUERY 7
836#define MSM_V4L2_GET_CROP 8
837#define MSM_V4L2_SET_CROP 9
838#define MSM_V4L2_OPEN 10
839#define MSM_V4L2_CLOSE 11
840#define MSM_V4L2_SET_CTRL_CMD 12
841#define MSM_V4L2_EVT_SUB_MASK 13
842#define MSM_V4L2_MAX 14
843#define V4L2_CAMERA_EXIT 43
844
845struct crop_info {
846 void *info;
847 int len;
848};
849
850struct msm_postproc {
851 int ftnum;
852 struct msm_frame fthumnail;
853 int fmnum;
854 struct msm_frame fmain;
855};
856
857struct msm_snapshot_pp_status {
858 void *status;
859};
860
861#define CFG_SET_MODE 0
862#define CFG_SET_EFFECT 1
863#define CFG_START 2
864#define CFG_PWR_UP 3
865#define CFG_PWR_DOWN 4
866#define CFG_WRITE_EXPOSURE_GAIN 5
867#define CFG_SET_DEFAULT_FOCUS 6
868#define CFG_MOVE_FOCUS 7
869#define CFG_REGISTER_TO_REAL_GAIN 8
870#define CFG_REAL_TO_REGISTER_GAIN 9
871#define CFG_SET_FPS 10
872#define CFG_SET_PICT_FPS 11
873#define CFG_SET_BRIGHTNESS 12
874#define CFG_SET_CONTRAST 13
875#define CFG_SET_ZOOM 14
876#define CFG_SET_EXPOSURE_MODE 15
877#define CFG_SET_WB 16
878#define CFG_SET_ANTIBANDING 17
879#define CFG_SET_EXP_GAIN 18
880#define CFG_SET_PICT_EXP_GAIN 19
881#define CFG_SET_LENS_SHADING 20
882#define CFG_GET_PICT_FPS 21
883#define CFG_GET_PREV_L_PF 22
884#define CFG_GET_PREV_P_PL 23
885#define CFG_GET_PICT_L_PF 24
886#define CFG_GET_PICT_P_PL 25
887#define CFG_GET_AF_MAX_STEPS 26
888#define CFG_GET_PICT_MAX_EXP_LC 27
889#define CFG_SEND_WB_INFO 28
890#define CFG_SENSOR_INIT 29
891#define CFG_GET_3D_CALI_DATA 30
892#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700893#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700894#define CFG_GET_EEPROM_INFO 33
895#define CFG_GET_EEPROM_DATA 34
896#define CFG_SET_ACTUATOR_INFO 35
897#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530898/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700899#define CFG_SET_SATURATION 37
900#define CFG_SET_SHARPNESS 38
901#define CFG_SET_TOUCHAEC 39
902#define CFG_SET_AUTO_FOCUS 40
903#define CFG_SET_AUTOFLASH 41
904#define CFG_SET_EXPOSURE_COMPENSATION 42
905#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530906#define CFG_START_STREAM 44
907#define CFG_STOP_STREAM 45
908#define CFG_GET_CSI_PARAMS 46
909#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700910
911
912#define MOVE_NEAR 0
913#define MOVE_FAR 1
914
915#define SENSOR_PREVIEW_MODE 0
916#define SENSOR_SNAPSHOT_MODE 1
917#define SENSOR_RAW_SNAPSHOT_MODE 2
918#define SENSOR_HFR_60FPS_MODE 3
919#define SENSOR_HFR_90FPS_MODE 4
920#define SENSOR_HFR_120FPS_MODE 5
921
922#define SENSOR_QTR_SIZE 0
923#define SENSOR_FULL_SIZE 1
924#define SENSOR_QVGA_SIZE 2
925#define SENSOR_INVALID_SIZE 3
926
927#define CAMERA_EFFECT_OFF 0
928#define CAMERA_EFFECT_MONO 1
929#define CAMERA_EFFECT_NEGATIVE 2
930#define CAMERA_EFFECT_SOLARIZE 3
931#define CAMERA_EFFECT_SEPIA 4
932#define CAMERA_EFFECT_POSTERIZE 5
933#define CAMERA_EFFECT_WHITEBOARD 6
934#define CAMERA_EFFECT_BLACKBOARD 7
935#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700936#define CAMERA_EFFECT_EMBOSS 9
937#define CAMERA_EFFECT_SKETCH 10
938#define CAMERA_EFFECT_NEON 11
939#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700940
Taniya Dasa9bdb012011-09-08 11:21:33 +0530941/* QRD */
942#define CAMERA_EFFECT_BW 10
943#define CAMERA_EFFECT_BLUISH 12
944#define CAMERA_EFFECT_REDDISH 13
945#define CAMERA_EFFECT_GREENISH 14
946
947/* QRD */
948#define CAMERA_ANTIBANDING_OFF 0
949#define CAMERA_ANTIBANDING_50HZ 2
950#define CAMERA_ANTIBANDING_60HZ 1
951#define CAMERA_ANTIBANDING_AUTO 3
952
953#define CAMERA_CONTRAST_LV0 0
954#define CAMERA_CONTRAST_LV1 1
955#define CAMERA_CONTRAST_LV2 2
956#define CAMERA_CONTRAST_LV3 3
957#define CAMERA_CONTRAST_LV4 4
958#define CAMERA_CONTRAST_LV5 5
959#define CAMERA_CONTRAST_LV6 6
960#define CAMERA_CONTRAST_LV7 7
961#define CAMERA_CONTRAST_LV8 8
962#define CAMERA_CONTRAST_LV9 9
963
964#define CAMERA_BRIGHTNESS_LV0 0
965#define CAMERA_BRIGHTNESS_LV1 1
966#define CAMERA_BRIGHTNESS_LV2 2
967#define CAMERA_BRIGHTNESS_LV3 3
968#define CAMERA_BRIGHTNESS_LV4 4
969#define CAMERA_BRIGHTNESS_LV5 5
970#define CAMERA_BRIGHTNESS_LV6 6
971#define CAMERA_BRIGHTNESS_LV7 7
972#define CAMERA_BRIGHTNESS_LV8 8
973
974
975#define CAMERA_SATURATION_LV0 0
976#define CAMERA_SATURATION_LV1 1
977#define CAMERA_SATURATION_LV2 2
978#define CAMERA_SATURATION_LV3 3
979#define CAMERA_SATURATION_LV4 4
980#define CAMERA_SATURATION_LV5 5
981#define CAMERA_SATURATION_LV6 6
982#define CAMERA_SATURATION_LV7 7
983#define CAMERA_SATURATION_LV8 8
984
985#define CAMERA_SHARPNESS_LV0 0
986#define CAMERA_SHARPNESS_LV1 3
987#define CAMERA_SHARPNESS_LV2 6
988#define CAMERA_SHARPNESS_LV3 9
989#define CAMERA_SHARPNESS_LV4 12
990#define CAMERA_SHARPNESS_LV5 15
991#define CAMERA_SHARPNESS_LV6 18
992#define CAMERA_SHARPNESS_LV7 21
993#define CAMERA_SHARPNESS_LV8 24
994#define CAMERA_SHARPNESS_LV9 27
995#define CAMERA_SHARPNESS_LV10 30
996
997#define CAMERA_SETAE_AVERAGE 0
998#define CAMERA_SETAE_CENWEIGHT 1
999
Taniya Dasa9bdb012011-09-08 11:21:33 +05301000#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1001#define CAMERA_WB_CUSTOM 2
1002#define CAMERA_WB_INCANDESCENT 3
1003#define CAMERA_WB_FLUORESCENT 4
1004#define CAMERA_WB_DAYLIGHT 5
1005#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1006#define CAMERA_WB_TWILIGHT 7
1007#define CAMERA_WB_SHADE 8
1008
1009#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1010#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1011#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1012#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1013#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1014
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001015enum msm_v4l2_saturation_level {
1016 MSM_V4L2_SATURATION_L0,
1017 MSM_V4L2_SATURATION_L1,
1018 MSM_V4L2_SATURATION_L2,
1019 MSM_V4L2_SATURATION_L3,
1020 MSM_V4L2_SATURATION_L4,
1021 MSM_V4L2_SATURATION_L5,
1022 MSM_V4L2_SATURATION_L6,
1023 MSM_V4L2_SATURATION_L7,
1024 MSM_V4L2_SATURATION_L8,
1025 MSM_V4L2_SATURATION_L9,
1026 MSM_V4L2_SATURATION_L10,
1027};
1028
Suresh Vankadara212d9722012-05-30 15:51:20 +05301029enum msm_v4l2_contrast_level {
1030 MSM_V4L2_CONTRAST_L0,
1031 MSM_V4L2_CONTRAST_L1,
1032 MSM_V4L2_CONTRAST_L2,
1033 MSM_V4L2_CONTRAST_L3,
1034 MSM_V4L2_CONTRAST_L4,
1035 MSM_V4L2_CONTRAST_L5,
1036 MSM_V4L2_CONTRAST_L6,
1037 MSM_V4L2_CONTRAST_L7,
1038 MSM_V4L2_CONTRAST_L8,
1039 MSM_V4L2_CONTRAST_L9,
1040 MSM_V4L2_CONTRAST_L10,
1041};
1042
1043
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001044enum msm_v4l2_exposure_level {
1045 MSM_V4L2_EXPOSURE_N2,
1046 MSM_V4L2_EXPOSURE_N1,
1047 MSM_V4L2_EXPOSURE_D,
1048 MSM_V4L2_EXPOSURE_P1,
1049 MSM_V4L2_EXPOSURE_P2,
1050};
1051
1052enum msm_v4l2_sharpness_level {
1053 MSM_V4L2_SHARPNESS_L0,
1054 MSM_V4L2_SHARPNESS_L1,
1055 MSM_V4L2_SHARPNESS_L2,
1056 MSM_V4L2_SHARPNESS_L3,
1057 MSM_V4L2_SHARPNESS_L4,
1058 MSM_V4L2_SHARPNESS_L5,
1059 MSM_V4L2_SHARPNESS_L6,
1060};
1061
1062enum msm_v4l2_expo_metering_mode {
1063 MSM_V4L2_EXP_FRAME_AVERAGE,
1064 MSM_V4L2_EXP_CENTER_WEIGHTED,
1065 MSM_V4L2_EXP_SPOT_METERING,
1066};
1067
1068enum msm_v4l2_iso_mode {
1069 MSM_V4L2_ISO_AUTO = 0,
1070 MSM_V4L2_ISO_DEBLUR,
1071 MSM_V4L2_ISO_100,
1072 MSM_V4L2_ISO_200,
1073 MSM_V4L2_ISO_400,
1074 MSM_V4L2_ISO_800,
1075 MSM_V4L2_ISO_1600,
1076};
1077
1078enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301079 MSM_V4L2_WB_OFF,
1080 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001081 MSM_V4L2_WB_CUSTOM,
1082 MSM_V4L2_WB_INCANDESCENT,
1083 MSM_V4L2_WB_FLUORESCENT,
1084 MSM_V4L2_WB_DAYLIGHT,
1085 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301086};
1087
1088enum msm_v4l2_special_effect {
1089 MSM_V4L2_EFFECT_OFF,
1090 MSM_V4L2_EFFECT_MONO,
1091 MSM_V4L2_EFFECT_NEGATIVE,
1092 MSM_V4L2_EFFECT_SOLARIZE,
1093 MSM_V4L2_EFFECT_SEPIA,
1094 MSM_V4L2_EFFECT_POSTERAIZE,
1095 MSM_V4L2_EFFECT_WHITEBOARD,
1096 MSM_V4L2_EFFECT_BLACKBOARD,
1097 MSM_V4L2_EFFECT_AQUA,
1098 MSM_V4L2_EFFECT_EMBOSS,
1099 MSM_V4L2_EFFECT_SKETCH,
1100 MSM_V4L2_EFFECT_NEON,
1101 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001102};
1103
1104enum msm_v4l2_power_line_frequency {
1105 MSM_V4L2_POWER_LINE_OFF,
1106 MSM_V4L2_POWER_LINE_60HZ,
1107 MSM_V4L2_POWER_LINE_50HZ,
1108 MSM_V4L2_POWER_LINE_AUTO,
1109};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301110
Su Liu6c3bb322012-02-14 02:15:05 +05301111#define CAMERA_ISO_TYPE_AUTO 0
1112#define CAMEAR_ISO_TYPE_HJR 1
1113#define CAMEAR_ISO_TYPE_100 2
1114#define CAMERA_ISO_TYPE_200 3
1115#define CAMERA_ISO_TYPE_400 4
1116#define CAMEAR_ISO_TYPE_800 5
1117#define CAMERA_ISO_TYPE_1600 6
1118
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119struct sensor_pict_fps {
1120 uint16_t prevfps;
1121 uint16_t pictfps;
1122};
1123
1124struct exp_gain_cfg {
1125 uint16_t gain;
1126 uint32_t line;
1127};
1128
1129struct focus_cfg {
1130 int32_t steps;
1131 int dir;
1132};
1133
1134struct fps_cfg {
1135 uint16_t f_mult;
1136 uint16_t fps_div;
1137 uint32_t pict_fps_div;
1138};
1139struct wb_info_cfg {
1140 uint16_t red_gain;
1141 uint16_t green_gain;
1142 uint16_t blue_gain;
1143};
1144struct sensor_3d_exp_cfg {
1145 uint16_t gain;
1146 uint32_t line;
1147 uint16_t r_gain;
1148 uint16_t b_gain;
1149 uint16_t gr_gain;
1150 uint16_t gb_gain;
1151 uint16_t gain_adjust;
1152};
1153struct sensor_3d_cali_data_t{
1154 unsigned char left_p_matrix[3][4][8];
1155 unsigned char right_p_matrix[3][4][8];
1156 unsigned char square_len[8];
1157 unsigned char focal_len[8];
1158 unsigned char pixel_pitch[8];
1159 uint16_t left_r;
1160 uint16_t left_b;
1161 uint16_t left_gb;
1162 uint16_t left_af_far;
1163 uint16_t left_af_mid;
1164 uint16_t left_af_short;
1165 uint16_t left_af_5um;
1166 uint16_t left_af_50up;
1167 uint16_t left_af_50down;
1168 uint16_t right_r;
1169 uint16_t right_b;
1170 uint16_t right_gb;
1171 uint16_t right_af_far;
1172 uint16_t right_af_mid;
1173 uint16_t right_af_short;
1174 uint16_t right_af_5um;
1175 uint16_t right_af_50up;
1176 uint16_t right_af_50down;
1177};
1178struct sensor_init_cfg {
1179 uint8_t prev_res;
1180 uint8_t pict_res;
1181};
1182
1183struct sensor_calib_data {
1184 /* Color Related Measurements */
1185 uint16_t r_over_g;
1186 uint16_t b_over_g;
1187 uint16_t gr_over_gb;
1188
1189 /* Lens Related Measurements */
1190 uint16_t macro_2_inf;
1191 uint16_t inf_2_macro;
1192 uint16_t stroke_amt;
1193 uint16_t af_pos_1m;
1194 uint16_t af_pos_inf;
1195};
1196
Kevin Chana980f392011-08-01 20:55:00 -07001197enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001198 MSM_SENSOR_RES_FULL,
1199 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001200 MSM_SENSOR_RES_2,
1201 MSM_SENSOR_RES_3,
1202 MSM_SENSOR_RES_4,
1203 MSM_SENSOR_RES_5,
1204 MSM_SENSOR_RES_6,
1205 MSM_SENSOR_RES_7,
1206 MSM_SENSOR_INVALID_RES,
1207};
1208
1209struct msm_sensor_output_info_t {
1210 uint16_t x_output;
1211 uint16_t y_output;
1212 uint16_t line_length_pclk;
1213 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001214 uint32_t vt_pixel_clk;
1215 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001216 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001217};
1218
1219struct sensor_output_info_t {
1220 struct msm_sensor_output_info_t *output_info;
1221 uint16_t num_info;
1222};
1223
Taniya Dasa9bdb012011-09-08 11:21:33 +05301224struct mirror_flip {
1225 int32_t x_mirror;
1226 int32_t y_flip;
1227};
1228
1229struct cord {
1230 uint32_t x;
1231 uint32_t y;
1232};
1233
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001234struct msm_eeprom_data_t {
1235 void *eeprom_data;
1236 uint16_t index;
1237};
1238
Nishant Panditb2157c92012-04-25 01:09:28 +05301239struct msm_camera_csid_vc_cfg {
1240 uint8_t cid;
1241 uint8_t dt;
1242 uint8_t decode_format;
1243};
1244
1245struct csi_lane_params_t {
1246 uint8_t csi_lane_assign;
1247 uint8_t csi_lane_mask;
1248 uint8_t csi_if;
1249 uint8_t csid_core;
1250 uint32_t csid_version;
1251};
1252
1253#define CSI_EMBED_DATA 0x12
1254#define CSI_RESERVED_DATA_0 0x13
1255#define CSI_YUV422_8 0x1E
1256#define CSI_RAW8 0x2A
1257#define CSI_RAW10 0x2B
1258#define CSI_RAW12 0x2C
1259
1260#define CSI_DECODE_6BIT 0
1261#define CSI_DECODE_8BIT 1
1262#define CSI_DECODE_10BIT 2
1263#define CSI_DECODE_DPCM_10_8_10 5
1264
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001265#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1266 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1267#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1268#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1269#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1270#define ISPIF_S_STREAM_SHIFT 4
1271#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301272
1273#define PIX_0 (0x01 << 0)
1274#define RDI_0 (0x01 << 1)
1275#define PIX_1 (0x01 << 2)
1276#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001277#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301278
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001279enum msm_ispif_vfe_intf {
1280 VFE0,
1281 VFE1,
1282 VFE_MAX,
1283};
Nishant Panditb2157c92012-04-25 01:09:28 +05301284
1285enum msm_ispif_intftype {
1286 PIX0,
1287 RDI0,
1288 PIX1,
1289 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301290 RDI2,
1291 INTF_MAX,
1292};
1293
1294enum msm_ispif_vc {
1295 VC0,
1296 VC1,
1297 VC2,
1298 VC3,
1299};
1300
1301enum msm_ispif_cid {
1302 CID0,
1303 CID1,
1304 CID2,
1305 CID3,
1306 CID4,
1307 CID5,
1308 CID6,
1309 CID7,
1310 CID8,
1311 CID9,
1312 CID10,
1313 CID11,
1314 CID12,
1315 CID13,
1316 CID14,
1317 CID15,
1318};
1319
1320struct msm_ispif_params {
1321 uint8_t intftype;
1322 uint16_t cid_mask;
1323 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001324 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301325};
1326
1327struct msm_ispif_params_list {
1328 uint32_t len;
1329 struct msm_ispif_params params[4];
1330};
1331
1332enum ispif_cfg_type_t {
1333 ISPIF_INIT,
1334 ISPIF_SET_CFG,
1335 ISPIF_SET_ON_FRAME_BOUNDARY,
1336 ISPIF_SET_OFF_FRAME_BOUNDARY,
1337 ISPIF_SET_OFF_IMMEDIATELY,
1338 ISPIF_RELEASE,
1339};
1340
1341struct ispif_cfg_data {
1342 enum ispif_cfg_type_t cfgtype;
1343 union {
1344 uint32_t csid_version;
1345 int cmd;
1346 struct msm_ispif_params_list ispif_params;
1347 } cfg;
1348};
1349
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001350struct sensor_cfg_data {
1351 int cfgtype;
1352 int mode;
1353 int rs;
1354 uint8_t max_steps;
1355
1356 union {
1357 int8_t effect;
1358 uint8_t lens_shading;
1359 uint16_t prevl_pf;
1360 uint16_t prevp_pl;
1361 uint16_t pictl_pf;
1362 uint16_t pictp_pl;
1363 uint32_t pict_max_exp_lc;
1364 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301365 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001366 struct sensor_init_cfg init_info;
1367 struct sensor_pict_fps gfps;
1368 struct exp_gain_cfg exp_gain;
1369 struct focus_cfg focus;
1370 struct fps_cfg fps;
1371 struct wb_info_cfg wb_info;
1372 struct sensor_3d_exp_cfg sensor_3d_exp;
1373 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001374 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001375 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301376 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301377 /* QRD */
1378 uint16_t antibanding;
1379 uint8_t contrast;
1380 uint8_t saturation;
1381 uint8_t sharpness;
1382 int8_t brightness;
1383 int ae_mode;
1384 uint8_t wb_val;
1385 int8_t exp_compensation;
1386 struct cord aec_cord;
1387 int is_autoflash;
1388 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001389 } cfg;
1390};
1391
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001392struct damping_params_t {
1393 uint32_t damping_step;
1394 uint32_t damping_delay;
1395 uint32_t hw_params;
1396};
1397
1398enum actuator_type {
1399 ACTUATOR_VCM,
1400 ACTUATOR_PIEZO,
1401};
1402
1403enum msm_actuator_data_type {
1404 MSM_ACTUATOR_BYTE_DATA = 1,
1405 MSM_ACTUATOR_WORD_DATA,
1406};
1407
1408enum msm_actuator_addr_type {
1409 MSM_ACTUATOR_BYTE_ADDR = 1,
1410 MSM_ACTUATOR_WORD_ADDR,
1411};
1412
1413enum msm_actuator_write_type {
1414 MSM_ACTUATOR_WRITE_HW_DAMP,
1415 MSM_ACTUATOR_WRITE_DAC,
1416};
1417
1418struct msm_actuator_reg_params_t {
1419 enum msm_actuator_write_type reg_write_type;
1420 uint32_t hw_mask;
1421 uint16_t reg_addr;
1422 uint16_t hw_shift;
1423 uint16_t data_shift;
1424};
1425
1426struct reg_settings_t {
1427 uint16_t reg_addr;
1428 uint16_t reg_data;
1429};
1430
1431struct region_params_t {
1432 /* [0] = ForwardDirection Macro boundary
1433 [1] = ReverseDirection Inf boundary
1434 */
1435 uint16_t step_bound[2];
1436 uint16_t code_per_step;
1437};
1438
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001439struct msm_actuator_move_params_t {
1440 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001441 int8_t sign_dir;
1442 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001443 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001444 struct damping_params_t *ringing_params;
1445};
1446
1447struct msm_actuator_tuning_params_t {
1448 int16_t initial_code;
1449 uint16_t pwd_step;
1450 uint16_t region_size;
1451 uint32_t total_steps;
1452 struct region_params_t *region_params;
1453};
1454
1455struct msm_actuator_params_t {
1456 enum actuator_type act_type;
1457 uint8_t reg_tbl_size;
1458 uint16_t data_size;
1459 uint16_t init_setting_size;
1460 uint32_t i2c_addr;
1461 enum msm_actuator_addr_type i2c_addr_type;
1462 enum msm_actuator_data_type i2c_data_type;
1463 struct msm_actuator_reg_params_t *reg_tbl_params;
1464 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001465};
1466
1467struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001468 struct msm_actuator_params_t actuator_params;
1469 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001470};
1471
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001472struct msm_actuator_get_info_t {
1473 uint32_t focal_length_num;
1474 uint32_t focal_length_den;
1475 uint32_t f_number_num;
1476 uint32_t f_number_den;
1477 uint32_t f_pix_num;
1478 uint32_t f_pix_den;
1479 uint32_t total_f_dist_num;
1480 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001481 uint32_t hor_view_angle_num;
1482 uint32_t hor_view_angle_den;
1483 uint32_t ver_view_angle_num;
1484 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001485};
1486
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001487enum af_camera_name {
1488 ACTUATOR_MAIN_CAM_0,
1489 ACTUATOR_MAIN_CAM_1,
1490 ACTUATOR_MAIN_CAM_2,
1491 ACTUATOR_MAIN_CAM_3,
1492 ACTUATOR_MAIN_CAM_4,
1493 ACTUATOR_MAIN_CAM_5,
1494 ACTUATOR_WEB_CAM_0,
1495 ACTUATOR_WEB_CAM_1,
1496 ACTUATOR_WEB_CAM_2,
1497};
1498
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001499struct msm_actuator_cfg_data {
1500 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001501 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001502 union {
1503 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001504 struct msm_actuator_set_info_t set_info;
1505 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001506 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001507 } cfg;
1508};
1509
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001510struct msm_eeprom_support {
1511 uint16_t is_supported;
1512 uint16_t size;
1513 uint16_t index;
1514 uint16_t qvalue;
1515};
1516
1517struct msm_calib_wb {
1518 uint16_t r_over_g;
1519 uint16_t b_over_g;
1520 uint16_t gr_over_gb;
1521};
1522
1523struct msm_calib_af {
1524 uint16_t macro_dac;
1525 uint16_t inf_dac;
1526 uint16_t start_dac;
1527};
1528
1529struct msm_calib_lsc {
1530 uint16_t r_gain[221];
1531 uint16_t b_gain[221];
1532 uint16_t gr_gain[221];
1533 uint16_t gb_gain[221];
1534};
1535
1536struct pixel_t {
1537 int x;
1538 int y;
1539};
1540
1541struct msm_calib_dpc {
1542 uint16_t validcount;
1543 struct pixel_t snapshot_coord[128];
1544 struct pixel_t preview_coord[128];
1545 struct pixel_t video_coord[128];
1546};
1547
1548struct msm_camera_eeprom_info_t {
1549 struct msm_eeprom_support af;
1550 struct msm_eeprom_support wb;
1551 struct msm_eeprom_support lsc;
1552 struct msm_eeprom_support dpc;
1553};
1554
1555struct msm_eeprom_cfg_data {
1556 int cfgtype;
1557 uint8_t is_eeprom_supported;
1558 union {
1559 struct msm_eeprom_data_t get_data;
1560 struct msm_camera_eeprom_info_t get_info;
1561 } cfg;
1562};
1563
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564struct sensor_large_data {
1565 int cfgtype;
1566 union {
1567 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1568 } data;
1569};
1570
1571enum sensor_type_t {
1572 BAYER,
1573 YUV,
1574 JPEG_SOC,
1575};
1576
1577enum flash_type {
1578 LED_FLASH,
1579 STROBE_FLASH,
1580};
1581
1582enum strobe_flash_ctrl_type {
1583 STROBE_FLASH_CTRL_INIT,
1584 STROBE_FLASH_CTRL_CHARGE,
1585 STROBE_FLASH_CTRL_RELEASE
1586};
1587
1588struct strobe_flash_ctrl_data {
1589 enum strobe_flash_ctrl_type type;
1590 int charge_en;
1591};
1592
1593struct msm_camera_info {
1594 int num_cameras;
1595 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1596 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1597 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1598 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1599 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001600};
1601
1602struct msm_cam_config_dev_info {
1603 int num_config_nodes;
1604 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001605 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001606};
1607
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001608struct msm_mctl_node_info {
1609 int num_mctl_nodes;
1610 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1611};
1612
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001613struct flash_ctrl_data {
1614 int flashtype;
1615 union {
1616 int led_state;
1617 struct strobe_flash_ctrl_data strobe_ctrl;
1618 } ctrl_data;
1619};
1620
1621#define GET_NAME 0
1622#define GET_PREVIEW_LINE_PER_FRAME 1
1623#define GET_PREVIEW_PIXELS_PER_LINE 2
1624#define GET_SNAPSHOT_LINE_PER_FRAME 3
1625#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1626#define GET_SNAPSHOT_FPS 5
1627#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1628
1629struct msm_camsensor_info {
1630 char name[MAX_SENSOR_NAME];
1631 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001632 uint8_t strobe_flash_enabled;
1633 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301634 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001635 int8_t total_steps;
1636 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001637 enum flash_type flashtype;
1638 enum sensor_type_t sensor_type;
1639 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1640 uint32_t camera_type; /* msm_camera_type */
1641 int mount_angle;
1642 uint32_t max_width;
1643 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001644};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001645
1646#define V4L2_SINGLE_PLANE 0
1647#define V4L2_MULTI_PLANE_Y 0
1648#define V4L2_MULTI_PLANE_CBCR 1
1649#define V4L2_MULTI_PLANE_CB 1
1650#define V4L2_MULTI_PLANE_CR 2
1651
1652struct plane_data {
1653 int plane_id;
1654 uint32_t offset;
1655 unsigned long size;
1656};
1657
1658struct img_plane_info {
1659 uint32_t width;
1660 uint32_t height;
1661 uint32_t pixelformat;
1662 uint8_t buffer_type; /*Single/Multi planar*/
1663 uint8_t output_port;
1664 uint32_t ext_mode;
1665 uint8_t num_planes;
1666 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001667 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001668 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001669};
1670
Kevin Chan210061f2012-02-14 20:56:16 -08001671#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001672#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001673#define QCAMERA_DEVICE_GROUP_ID 1
1674#define QCAMERA_VNODE_GROUP_ID 2
1675
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001676enum msm_cam_subdev_type {
1677 CSIPHY_DEV,
1678 CSID_DEV,
1679 CSIC_DEV,
1680 ISPIF_DEV,
1681 VFE_DEV,
1682 AXI_DEV,
1683 VPE_DEV,
1684 SENSOR_DEV,
1685 ACTUATOR_DEV,
1686 EEPROM_DEV,
1687 GESTURE_DEV,
1688 IRQ_ROUTER_DEV,
1689 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07001690 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001691};
1692
1693struct msm_mctl_set_sdev_data {
1694 uint32_t revision;
1695 enum msm_cam_subdev_type sdev_type;
1696};
1697
Kevin Chan94b4c832012-03-02 21:27:16 -08001698#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001699 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001700
1701#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001702 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001703
1704#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001705 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001706
1707#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001708 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001709
1710#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001711 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001712
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001713#define MSM_CAM_IOCTL_SEND_EVENT \
1714 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1715
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001716#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1717 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1718
Kevin Chan41a38702012-06-06 22:25:41 -07001719#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1720 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1721
Kiran Kumar H N90785902012-07-05 13:59:38 -07001722#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
1723 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
1724
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001725#define VIDIOC_MSM_VPE_INIT \
1726 _IO('V', BASE_VIDIOC_PRIVATE + 15)
1727
1728#define VIDIOC_MSM_VPE_RELEASE \
1729 _IO('V', BASE_VIDIOC_PRIVATE + 16)
1730
1731#define VIDIOC_MSM_VPE_CFG \
1732 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
1733
1734#define VIDIOC_MSM_AXI_INIT \
1735 _IO('V', BASE_VIDIOC_PRIVATE + 18)
1736
1737#define VIDIOC_MSM_AXI_RELEASE \
1738 _IO('V', BASE_VIDIOC_PRIVATE + 19)
1739
1740#define VIDIOC_MSM_AXI_CFG \
1741 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
1742
1743#define VIDIOC_MSM_AXI_IRQ \
1744 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
1745
1746#define VIDIOC_MSM_AXI_BUF_CFG \
1747 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
1748
1749#define VIDIOC_MSM_VFE_INIT \
1750 _IO('V', BASE_VIDIOC_PRIVATE + 22)
1751
1752#define VIDIOC_MSM_VFE_RELEASE \
1753 _IO('V', BASE_VIDIOC_PRIVATE + 23)
1754
Kevin Chan94b4c832012-03-02 21:27:16 -08001755struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001756 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001757 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001758 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001759};
1760
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07001761struct msm_camera_vfe_params_t {
1762 uint32_t operation_mode;
1763 uint32_t capture_count;
1764 uint32_t skip_abort;
1765 uint16_t port_info;
1766 uint16_t cmd_type;
1767};
1768
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001769enum msm_camss_irq_idx {
1770 CAMERA_SS_IRQ_0,
1771 CAMERA_SS_IRQ_1,
1772 CAMERA_SS_IRQ_2,
1773 CAMERA_SS_IRQ_3,
1774 CAMERA_SS_IRQ_4,
1775 CAMERA_SS_IRQ_5,
1776 CAMERA_SS_IRQ_6,
1777 CAMERA_SS_IRQ_7,
1778 CAMERA_SS_IRQ_8,
1779 CAMERA_SS_IRQ_9,
1780 CAMERA_SS_IRQ_10,
1781 CAMERA_SS_IRQ_11,
1782 CAMERA_SS_IRQ_12,
1783 CAMERA_SS_IRQ_MAX
1784};
1785
1786enum msm_cam_hw_idx {
1787 MSM_CAM_HW_MICRO,
1788 MSM_CAM_HW_CCI,
1789 MSM_CAM_HW_CSI0,
1790 MSM_CAM_HW_CSI1,
1791 MSM_CAM_HW_CSI2,
1792 MSM_CAM_HW_CSI3,
1793 MSM_CAM_HW_ISPIF,
1794 MSM_CAM_HW_CPP,
1795 MSM_CAM_HW_VFE0,
1796 MSM_CAM_HW_VFE1,
1797 MSM_CAM_HW_JPEG0,
1798 MSM_CAM_HW_JPEG1,
1799 MSM_CAM_HW_JPEG2,
1800 MSM_CAM_HW_MAX
1801};
1802
1803struct msm_camera_irq_cfg {
1804 /* Bit mask of all the camera hardwares that needs to
1805 * be composited into a single IRQ to the MSM.
1806 * Current usage: (may be updated based on hw changes)
1807 * Bits 31:13 - Reserved.
1808 * Bits 12:0
1809 * 12 - MSM_CAM_HW_JPEG2
1810 * 11 - MSM_CAM_HW_JPEG1
1811 * 10 - MSM_CAM_HW_JPEG0
1812 * 9 - MSM_CAM_HW_VFE1
1813 * 8 - MSM_CAM_HW_VFE0
1814 * 7 - MSM_CAM_HW_CPP
1815 * 6 - MSM_CAM_HW_ISPIF
1816 * 5 - MSM_CAM_HW_CSI3
1817 * 4 - MSM_CAM_HW_CSI2
1818 * 3 - MSM_CAM_HW_CSI1
1819 * 2 - MSM_CAM_HW_CSI0
1820 * 1 - MSM_CAM_HW_CCI
1821 * 0 - MSM_CAM_HW_MICRO
1822 */
1823 uint32_t cam_hw_mask;
1824 uint8_t irq_idx;
1825 uint8_t num_hwcore;
1826};
1827
1828#define MSM_IRQROUTER_CFG_COMPIRQ \
1829 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1830
Kevin Chan73ec7282012-06-07 01:32:00 -07001831#define MAX_NUM_CPP_STRIPS 8
1832
1833enum msm_cpp_frame_type {
1834 MSM_CPP_OFFLINE_FRAME,
1835 MSM_CPP_REALTIME_FRAME,
1836};
1837
1838struct msm_cpp_frame_strip_info {
1839 int scale_v_en;
1840 int scale_h_en;
1841
1842 int upscale_v_en;
1843 int upscale_h_en;
1844
1845 int src_start_x;
1846 int src_end_x;
1847 int src_start_y;
1848 int src_end_y;
1849
1850 /* Padding is required for upscaler because it does not
1851 * pad internally like other blocks, also needed for rotation
1852 * rotation expects all the blocks in the stripe to be the same size
1853 * Padding is done such that all the extra padded pixels
1854 * are on the right and bottom
1855 */
1856 int pad_bottom;
1857 int pad_top;
1858 int pad_right;
1859 int pad_left;
1860
1861 int v_init_phase;
1862 int h_init_phase;
1863 int h_phase_step;
1864 int v_phase_step;
1865
1866 int prescale_crop_width_first_pixel;
1867 int prescale_crop_width_last_pixel;
1868 int prescale_crop_height_first_line;
1869 int prescale_crop_height_last_line;
1870
1871 int postscale_crop_height_first_line;
1872 int postscale_crop_height_last_line;
1873 int postscale_crop_width_first_pixel;
1874 int postscale_crop_width_last_pixel;
1875
1876 int dst_start_x;
1877 int dst_end_x;
1878 int dst_start_y;
1879 int dst_end_y;
1880
1881 int bytes_per_pixel;
1882 unsigned int source_address;
1883 unsigned int destination_address;
1884 unsigned int src_stride;
1885 unsigned int dst_stride;
1886 int rotate_270;
1887 int horizontal_flip;
1888 int vertical_flip;
1889 int scale_output_width;
1890 int scale_output_height;
1891};
1892
1893struct msm_cpp_frame_info_t {
1894 int32_t frame_id;
1895 uint32_t inst_id;
1896 uint32_t client_id;
1897 enum msm_cpp_frame_type frame_type;
1898 uint32_t num_strips;
1899 struct msm_cpp_frame_strip_info *strip_info;
1900};
1901
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07001902struct msm_ver_num_info {
1903 uint32_t main;
1904 uint32_t minor;
1905 uint32_t rev;
1906};
1907
Kevin Chan73ec7282012-06-07 01:32:00 -07001908#define VIDIOC_MSM_CPP_CFG \
1909 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1910
1911#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1912 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1913
1914#define VIDIOC_MSM_CPP_GET_INST_INFO \
1915 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1916
1917#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1918
Kiran Kumar H N90785902012-07-05 13:59:38 -07001919/* Instance Handle - inst_handle
1920 * Data bundle containing the information about where
1921 * to get a buffer for a particular camera instance.
1922 * This is a bitmask containing the following data:
1923 * Buffer Handle Bitmask:
1924 * ------------------------------------
1925 * Bits : Purpose
1926 * ------------------------------------
1927 * 31 - 24 : Reserved.
1928 * 23 : is Image mode valid?
1929 * 22 - 16 : Image mode.
1930 * 15 : is MCTL PP inst idx valid?
1931 * 14 - 8 : MCTL PP inst idx.
1932 * 7 : is Video inst idx valid?
1933 * 6 - 0 : Video inst idx.
1934 */
1935#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
1936#define SET_IMG_MODE(handle, data) \
1937 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
1938#define GET_IMG_MODE(handle) \
1939 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
1940
1941#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
1942#define SET_MCTLPP_INST_IDX(handle, data) \
1943 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
1944#define GET_MCTLPP_INST_IDX(handle) \
1945 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
1946
1947#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
1948#define GET_VIDEO_INST_IDX(handle) \
1949 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
1950#define SET_VIDEO_INST_IDX(handle, data) \
1951 (handle |= (0x1 << 7) | (data & 0x7F))
1952
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001953#endif /* __LINUX_MSM_CAMERA_H */