blob: a048306e5d7d8860562fcfc9f23cbdc9dc665e39 [file] [log] [blame]
Ido Shayevitzcdeef4c2012-05-29 13:17:41 +02001/**
2 * dwc3_otg.h - DesignWare USB3 DRD Controller OTG
3 *
4 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 and
8 * only version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __LINUX_USB_DWC3_OTG_H
17#define __LINUX_USB_DWC3_OTG_H
18
19#include <linux/workqueue.h>
20
21#include <linux/usb/otg.h>
22
23/**
24 * struct dwc3_otg: OTG driver data. Shared by HCD and DCD.
25 * @otg: USB OTG Transceiver structure.
26 * @irq: IRQ number assigned for HSUSB controller.
27 * @regs: ioremapped register base address.
28 * @sm_work: OTG state machine work.
29 * @osts: last value of the OSTS register, as read from HW.
30 */
31struct dwc3_otg {
32 struct usb_otg otg;
33 int irq;
34 void __iomem *regs;
35 struct work_struct sm_work;
36 u32 osts;
37};
38#endif /* __LINUX_USB_DWC3_OTG_H */