| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/include/asm-arm/arch-sa1100/debug-macro.S | 
 | 2 |  * | 
 | 3 |  * Debugging macro include header | 
 | 4 |  * | 
 | 5 |  *  Copyright (C) 1994-1999 Russell King | 
 | 6 |  *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | 
 | 7 |  * | 
 | 8 |  * This program is free software; you can redistribute it and/or modify | 
 | 9 |  * it under the terms of the GNU General Public License version 2 as | 
 | 10 |  * published by the Free Software Foundation. | 
 | 11 |  * | 
 | 12 | */ | 
| Russell King | 22398f5 | 2006-03-15 15:55:01 +0000 | [diff] [blame] | 13 | #include <asm/hardware.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 |  | 
 | 15 | 		.macro	addruart,rx | 
 | 16 | 		mrc	p15, 0, \rx, c1, c0 | 
 | 17 | 		tst	\rx, #1			@ MMU enabled? | 
 | 18 | 		moveq	\rx, #0x80000000	@ physical base address | 
 | 19 | 		movne	\rx, #0xf8000000	@ virtual address | 
 | 20 |  | 
 | 21 | 		@ We probe for the active serial port here, coherently with | 
 | 22 | 		@ the comment in include/asm-arm/arch-sa1100/uncompress.h. | 
 | 23 | 		@ We assume r1 can be clobbered. | 
 | 24 |  | 
 | 25 | 		@ see if Ser3 is active | 
 | 26 | 		add	\rx, \rx, #0x00050000 | 
 | 27 | 		ldr	r1, [\rx, #UTCR3] | 
 | 28 | 		tst	r1, #UTCR3_TXE | 
 | 29 |  | 
 | 30 | 		@ if Ser3 is inactive, then try Ser1 | 
 | 31 | 		addeq	\rx, \rx, #(0x00010000 - 0x00050000) | 
 | 32 | 		ldreq	r1, [\rx, #UTCR3] | 
 | 33 | 		tsteq	r1, #UTCR3_TXE | 
 | 34 |  | 
 | 35 | 		@ if Ser1 is inactive, then try Ser2 | 
 | 36 | 		addeq	\rx, \rx, #(0x00030000 - 0x00010000) | 
 | 37 | 		ldreq	r1, [\rx, #UTCR3] | 
 | 38 | 		tsteq	r1, #UTCR3_TXE | 
 | 39 |  | 
 | 40 | 		@ if all ports are inactive, then there is nothing we can do | 
 | 41 | 		moveq	pc, lr | 
 | 42 | 		.endm | 
 | 43 |  | 
 | 44 | 		.macro	senduart,rd,rx | 
 | 45 | 		str	\rd, [\rx, #UTDR] | 
 | 46 | 		.endm | 
 | 47 |  | 
 | 48 | 		.macro	waituart,rd,rx | 
 | 49 | 1001:		ldr	\rd, [\rx, #UTSR1] | 
 | 50 | 		tst	\rd, #UTSR1_TNF | 
 | 51 | 		beq	1001b | 
 | 52 | 		.endm | 
 | 53 |  | 
 | 54 | 		.macro	busyuart,rd,rx | 
 | 55 | 1001:		ldr	\rd, [\rx, #UTSR1] | 
 | 56 | 		tst	\rd, #UTSR1_TBY | 
 | 57 | 		bne	1001b | 
 | 58 | 		.endm |