| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | |
| 2 | #ifndef TRIDENTFB_DEBUG |
| 3 | #define TRIDENTFB_DEBUG 0 |
| 4 | #endif |
| 5 | |
| 6 | #if TRIDENTFB_DEBUG |
| 7 | #define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a);mdelay(1000); |
| 8 | #else |
| 9 | #define debug(f,a...) |
| 10 | #endif |
| 11 | |
| 12 | #define output(f, a...) pr_info("tridentfb: " f, ## a) |
| 13 | |
| 14 | #define Kb (1024) |
| 15 | #define Mb (Kb*Kb) |
| 16 | |
| 17 | /* PCI IDS of supported cards temporarily here */ |
| 18 | |
| 19 | #define CYBER9320 0x9320 |
| 20 | #define CYBER9388 0x9388 |
| 21 | #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */ |
| 22 | #define CYBER9385 0x9385 /* ditto */ |
| 23 | #define CYBER9397 0x9397 |
| 24 | #define CYBER9397DVD 0x939A |
| 25 | #define CYBER9520 0x9520 |
| 26 | #define CYBER9525DVD 0x9525 |
| 27 | #define TGUI9660 0x9660 |
| 28 | #define IMAGE975 0x9750 |
| 29 | #define IMAGE985 0x9850 |
| 30 | #define BLADE3D 0x9880 |
| 31 | #define CYBERBLADEE4 0x9540 |
| 32 | #define CYBERBLADEi7 0x8400 |
| 33 | #define CYBERBLADEi7D 0x8420 |
| 34 | #define CYBERBLADEi1 0x8500 |
| 35 | #define CYBERBLADEi1D 0x8520 |
| 36 | #define CYBERBLADEAi1 0x8600 |
| 37 | #define CYBERBLADEAi1D 0x8620 |
| 38 | #define CYBERBLADEXPAi1 0x8820 |
| 39 | #define CYBERBLADEXPm8 0x9910 |
| 40 | #define CYBERBLADEXPm16 0x9930 |
| 41 | |
| 42 | /* acceleration families */ |
| 43 | #define IMAGE 0 |
| 44 | #define BLADE 1 |
| 45 | #define XP 2 |
| 46 | |
| 47 | #define is_image(id) |
| 48 | #define is_xp(id) ((id == CYBERBLADEXPAi1) ||\ |
| 49 | (id == CYBERBLADEXPm8) ||\ |
| 50 | (id == CYBERBLADEXPm16)) |
| 51 | |
| 52 | #define is_blade(id) ((id == BLADE3D) ||\ |
| 53 | (id == CYBERBLADEE4) ||\ |
| 54 | (id == CYBERBLADEi7) ||\ |
| 55 | (id == CYBERBLADEi7D) ||\ |
| 56 | (id == CYBERBLADEi1) ||\ |
| 57 | (id == CYBERBLADEi1D) ||\ |
| 58 | (id == CYBERBLADEAi1) ||\ |
| 59 | (id == CYBERBLADEAi1D)) |
| 60 | |
| 61 | /* these defines are for 'lcd' variable */ |
| 62 | #define LCD_STRETCH 0 |
| 63 | #define LCD_CENTER 1 |
| 64 | #define LCD_BIOS 2 |
| 65 | |
| 66 | /* display types */ |
| 67 | #define DISPLAY_CRT 0 |
| 68 | #define DISPLAY_FP 1 |
| 69 | |
| 70 | #define flatpanel (displaytype == DISPLAY_FP) |
| 71 | |
| 72 | /* General Registers */ |
| 73 | #define SPR 0x1F /* Software Programming Register (videoram) */ |
| 74 | |
| 75 | /* 3C4 */ |
| 76 | #define RevisionID 0x09 |
| 77 | #define OldOrNew 0x0B |
| 78 | #define ConfPort1 0x0C |
| 79 | #define ConfPort2 0x0C |
| 80 | #define NewMode2 0x0D |
| 81 | #define NewMode1 0x0E |
| 82 | #define Protection 0x11 |
| 83 | #define MCLKLow 0x16 |
| 84 | #define MCLKHigh 0x17 |
| 85 | #define ClockLow 0x18 |
| 86 | #define ClockHigh 0x19 |
| 87 | #define SSetup 0x20 |
| 88 | #define SKey 0x37 |
| 89 | #define SPKey 0x57 |
| 90 | |
| 91 | /* 0x3x4 */ |
| 92 | #define CRTHTotal 0x00 |
| 93 | #define CRTHDispEnd 0x01 |
| 94 | #define CRTHBlankStart 0x02 |
| 95 | #define CRTHBlankEnd 0x03 |
| 96 | #define CRTHSyncStart 0x04 |
| 97 | #define CRTHSyncEnd 0x05 |
| 98 | |
| 99 | #define CRTVTotal 0x06 |
| 100 | #define CRTVDispEnd 0x12 |
| 101 | #define CRTVBlankStart 0x15 |
| 102 | #define CRTVBlankEnd 0x16 |
| 103 | #define CRTVSyncStart 0x10 |
| 104 | #define CRTVSyncEnd 0x11 |
| 105 | |
| 106 | #define CRTOverflow 0x07 |
| 107 | #define CRTPRowScan 0x08 |
| 108 | #define CRTMaxScanLine 0x09 |
| 109 | #define CRTModeControl 0x17 |
| 110 | #define CRTLineCompare 0x18 |
| 111 | |
| 112 | /* 3x4 */ |
| 113 | #define StartAddrHigh 0x0C |
| 114 | #define StartAddrLow 0x0D |
| 115 | #define Offset 0x13 |
| 116 | #define Underline 0x14 |
| 117 | #define CRTCMode 0x17 |
| 118 | #define CRTCModuleTest 0x1E |
| 119 | #define FIFOControl 0x20 |
| 120 | #define LinearAddReg 0x21 |
| 121 | #define DRAMTiming 0x23 |
| 122 | #define New32 0x23 |
| 123 | #define RAMDACTiming 0x25 |
| 124 | #define CRTHiOrd 0x27 |
| 125 | #define AddColReg 0x29 |
| 126 | #define InterfaceSel 0x2A |
| 127 | #define HorizOverflow 0x2B |
| 128 | #define GETest 0x2D |
| 129 | #define Performance 0x2F |
| 130 | #define GraphEngReg 0x36 |
| 131 | #define I2C 0x37 |
| 132 | #define PixelBusReg 0x38 |
| 133 | #define PCIReg 0x39 |
| 134 | #define DRAMControl 0x3A |
| 135 | #define MiscContReg 0x3C |
| 136 | #define CursorXLow 0x40 |
| 137 | #define CursorXHigh 0x41 |
| 138 | #define CursorYLow 0x42 |
| 139 | #define CursorYHigh 0x43 |
| 140 | #define CursorLocLow 0x44 |
| 141 | #define CursorLocHigh 0x45 |
| 142 | #define CursorXOffset 0x46 |
| 143 | #define CursorYOffset 0x47 |
| 144 | #define CursorFG1 0x48 |
| 145 | #define CursorFG2 0x49 |
| 146 | #define CursorFG3 0x4A |
| 147 | #define CursorFG4 0x4B |
| 148 | #define CursorBG1 0x4C |
| 149 | #define CursorBG2 0x4D |
| 150 | #define CursorBG3 0x4E |
| 151 | #define CursorBG4 0x4F |
| 152 | #define CursorControl 0x50 |
| 153 | #define PCIRetry 0x55 |
| 154 | #define PreEndControl 0x56 |
| 155 | #define PreEndFetch 0x57 |
| 156 | #define PCIMaster 0x60 |
| 157 | #define Enhancement0 0x62 |
| 158 | #define NewEDO 0x64 |
| 159 | #define TVinterface 0xC0 |
| 160 | #define TVMode 0xC1 |
| 161 | #define ClockControl 0xCF |
| 162 | |
| 163 | |
| 164 | /* 3CE */ |
| 165 | #define MiscExtFunc 0x0F |
| 166 | #define PowerStatus 0x23 |
| 167 | #define MiscIntContReg 0x2F |
| 168 | #define CyberControl 0x30 |
| 169 | #define CyberEnhance 0x31 |
| 170 | #define FPConfig 0x33 |
| 171 | #define VertStretch 0x52 |
| 172 | #define HorStretch 0x53 |
| 173 | #define BiosMode 0x5c |
| 174 | #define BiosReg 0x5d |
| 175 | |