Aravind Venkateswaran | ca82bd6 | 2012-01-10 15:57:53 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #ifndef __EXTERNAL_COMMON_H__ |
| 14 | #define __EXTERNAL_COMMON_H__ |
Saurabh Shah | 79d05a6 | 2012-01-09 15:18:33 -0800 | [diff] [blame] | 15 | #include <linux/switch.h> |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 16 | |
| 17 | #ifdef DEBUG |
| 18 | #ifndef DEV_DBG_PREFIX |
| 19 | #define DEV_DBG_PREFIX "EXT_INTERFACE: " |
| 20 | #endif |
| 21 | #define DEV_DBG(args...) pr_debug(DEV_DBG_PREFIX args) |
| 22 | #else |
| 23 | #define DEV_DBG(args...) (void)0 |
| 24 | #endif /* DEBUG */ |
| 25 | #define DEV_INFO(args...) dev_info(external_common_state->dev, args) |
| 26 | #define DEV_WARN(args...) dev_warn(external_common_state->dev, args) |
| 27 | #define DEV_ERR(args...) dev_err(external_common_state->dev, args) |
| 28 | |
| 29 | #ifdef CONFIG_FB_MSM_TVOUT |
| 30 | #define TVOUT_VFRMT_NTSC_M_720x480i 0 |
| 31 | #define TVOUT_VFRMT_NTSC_J_720x480i 1 |
| 32 | #define TVOUT_VFRMT_PAL_BDGHIN_720x576i 2 |
| 33 | #define TVOUT_VFRMT_PAL_M_720x480i 3 |
| 34 | #define TVOUT_VFRMT_PAL_N_720x480i 4 |
| 35 | #elif defined(CONFIG_FB_MSM_HDMI_COMMON) |
| 36 | /* all video formats defined by EIA CEA 861D */ |
| 37 | #define HDMI_VFRMT_640x480p60_4_3 0 |
| 38 | #define HDMI_VFRMT_720x480p60_4_3 1 |
| 39 | #define HDMI_VFRMT_720x480p60_16_9 2 |
| 40 | #define HDMI_VFRMT_1280x720p60_16_9 3 |
| 41 | #define HDMI_VFRMT_1920x1080i60_16_9 4 |
| 42 | #define HDMI_VFRMT_720x480i60_4_3 5 |
| 43 | #define HDMI_VFRMT_1440x480i60_4_3 HDMI_VFRMT_720x480i60_4_3 |
| 44 | #define HDMI_VFRMT_720x480i60_16_9 6 |
| 45 | #define HDMI_VFRMT_1440x480i60_16_9 HDMI_VFRMT_720x480i60_16_9 |
| 46 | #define HDMI_VFRMT_720x240p60_4_3 7 |
| 47 | #define HDMI_VFRMT_1440x240p60_4_3 HDMI_VFRMT_720x240p60_4_3 |
| 48 | #define HDMI_VFRMT_720x240p60_16_9 8 |
| 49 | #define HDMI_VFRMT_1440x240p60_16_9 HDMI_VFRMT_720x240p60_16_9 |
| 50 | #define HDMI_VFRMT_2880x480i60_4_3 9 |
| 51 | #define HDMI_VFRMT_2880x480i60_16_9 10 |
| 52 | #define HDMI_VFRMT_2880x240p60_4_3 11 |
| 53 | #define HDMI_VFRMT_2880x240p60_16_9 12 |
| 54 | #define HDMI_VFRMT_1440x480p60_4_3 13 |
| 55 | #define HDMI_VFRMT_1440x480p60_16_9 14 |
| 56 | #define HDMI_VFRMT_1920x1080p60_16_9 15 |
| 57 | #define HDMI_VFRMT_720x576p50_4_3 16 |
| 58 | #define HDMI_VFRMT_720x576p50_16_9 17 |
| 59 | #define HDMI_VFRMT_1280x720p50_16_9 18 |
| 60 | #define HDMI_VFRMT_1920x1080i50_16_9 19 |
| 61 | #define HDMI_VFRMT_720x576i50_4_3 20 |
| 62 | #define HDMI_VFRMT_1440x576i50_4_3 HDMI_VFRMT_720x576i50_4_3 |
| 63 | #define HDMI_VFRMT_720x576i50_16_9 21 |
| 64 | #define HDMI_VFRMT_1440x576i50_16_9 HDMI_VFRMT_720x576i50_16_9 |
| 65 | #define HDMI_VFRMT_720x288p50_4_3 22 |
| 66 | #define HDMI_VFRMT_1440x288p50_4_3 HDMI_VFRMT_720x288p50_4_3 |
| 67 | #define HDMI_VFRMT_720x288p50_16_9 23 |
| 68 | #define HDMI_VFRMT_1440x288p50_16_9 HDMI_VFRMT_720x288p50_16_9 |
| 69 | #define HDMI_VFRMT_2880x576i50_4_3 24 |
| 70 | #define HDMI_VFRMT_2880x576i50_16_9 25 |
| 71 | #define HDMI_VFRMT_2880x288p50_4_3 26 |
| 72 | #define HDMI_VFRMT_2880x288p50_16_9 27 |
| 73 | #define HDMI_VFRMT_1440x576p50_4_3 28 |
| 74 | #define HDMI_VFRMT_1440x576p50_16_9 29 |
| 75 | #define HDMI_VFRMT_1920x1080p50_16_9 30 |
| 76 | #define HDMI_VFRMT_1920x1080p24_16_9 31 |
| 77 | #define HDMI_VFRMT_1920x1080p25_16_9 32 |
| 78 | #define HDMI_VFRMT_1920x1080p30_16_9 33 |
| 79 | #define HDMI_VFRMT_2880x480p60_4_3 34 |
| 80 | #define HDMI_VFRMT_2880x480p60_16_9 35 |
| 81 | #define HDMI_VFRMT_2880x576p50_4_3 36 |
| 82 | #define HDMI_VFRMT_2880x576p50_16_9 37 |
| 83 | #define HDMI_VFRMT_1920x1250i50_16_9 38 |
| 84 | #define HDMI_VFRMT_1920x1080i100_16_9 39 |
| 85 | #define HDMI_VFRMT_1280x720p100_16_9 40 |
| 86 | #define HDMI_VFRMT_720x576p100_4_3 41 |
| 87 | #define HDMI_VFRMT_720x576p100_16_9 42 |
| 88 | #define HDMI_VFRMT_720x576i100_4_3 43 |
| 89 | #define HDMI_VFRMT_1440x576i100_4_3 HDMI_VFRMT_720x576i100_4_3 |
| 90 | #define HDMI_VFRMT_720x576i100_16_9 44 |
| 91 | #define HDMI_VFRMT_1440x576i100_16_9 HDMI_VFRMT_720x576i100_16_9 |
| 92 | #define HDMI_VFRMT_1920x1080i120_16_9 45 |
| 93 | #define HDMI_VFRMT_1280x720p120_16_9 46 |
| 94 | #define HDMI_VFRMT_720x480p120_4_3 47 |
| 95 | #define HDMI_VFRMT_720x480p120_16_9 48 |
| 96 | #define HDMI_VFRMT_720x480i120_4_3 49 |
| 97 | #define HDMI_VFRMT_1440x480i120_4_3 HDMI_VFRMT_720x480i120_4_3 |
| 98 | #define HDMI_VFRMT_720x480i120_16_9 50 |
| 99 | #define HDMI_VFRMT_1440x480i120_16_9 HDMI_VFRMT_720x480i120_16_9 |
| 100 | #define HDMI_VFRMT_720x576p200_4_3 51 |
| 101 | #define HDMI_VFRMT_720x576p200_16_9 52 |
| 102 | #define HDMI_VFRMT_720x576i200_4_3 53 |
| 103 | #define HDMI_VFRMT_1440x576i200_4_3 HDMI_VFRMT_720x576i200_4_3 |
| 104 | #define HDMI_VFRMT_720x576i200_16_9 54 |
| 105 | #define HDMI_VFRMT_1440x576i200_16_9 HDMI_VFRMT_720x576i200_16_9 |
| 106 | #define HDMI_VFRMT_720x480p240_4_3 55 |
| 107 | #define HDMI_VFRMT_720x480p240_16_9 56 |
| 108 | #define HDMI_VFRMT_720x480i240_4_3 57 |
| 109 | #define HDMI_VFRMT_1440x480i240_4_3 HDMI_VFRMT_720x480i240_4_3 |
| 110 | #define HDMI_VFRMT_720x480i240_16_9 58 |
| 111 | #define HDMI_VFRMT_1440x480i240_16_9 HDMI_VFRMT_720x480i240_16_9 |
| 112 | #define HDMI_VFRMT_MAX 59 |
| 113 | #define HDMI_VFRMT_FORCE_32BIT 0x7FFFFFFF |
| 114 | |
Ajay Singh Parmar | 6b82d2b | 2012-07-19 17:23:26 +0530 | [diff] [blame] | 115 | extern int ext_resolution; |
| 116 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 117 | struct hdmi_disp_mode_timing_type { |
| 118 | uint32 video_format; |
| 119 | uint32 active_h; |
| 120 | uint32 front_porch_h; |
| 121 | uint32 pulse_width_h; |
| 122 | uint32 back_porch_h; |
| 123 | boolean active_low_h; |
| 124 | uint32 active_v; |
| 125 | uint32 front_porch_v; |
| 126 | uint32 pulse_width_v; |
| 127 | uint32 back_porch_v; |
| 128 | boolean active_low_v; |
| 129 | /* Must divide by 1000 to get the actual frequency in MHZ */ |
| 130 | uint32 pixel_freq; |
| 131 | /* Must divide by 1000 to get the actual frequency in HZ */ |
| 132 | uint32 refresh_rate; |
| 133 | boolean interlaced; |
| 134 | boolean supported; |
| 135 | }; |
| 136 | |
| 137 | #define HDMI_SETTINGS_640x480p60_4_3 \ |
| 138 | {HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, TRUE, \ |
| 139 | 480, 10, 2, 33, TRUE, 25200, 60000, FALSE, TRUE} |
| 140 | #define HDMI_SETTINGS_720x480p60_4_3 \ |
| 141 | {HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, TRUE, \ |
Aravind Venkateswaran | ca82bd6 | 2012-01-10 15:57:53 -0800 | [diff] [blame] | 142 | 480, 9, 6, 30, TRUE, 27030, 60000, FALSE, TRUE} |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 143 | #define HDMI_SETTINGS_720x480p60_16_9 \ |
| 144 | {HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, TRUE, \ |
Aravind Venkateswaran | ca82bd6 | 2012-01-10 15:57:53 -0800 | [diff] [blame] | 145 | 480, 9, 6, 30, TRUE, 27030, 60000, FALSE, TRUE} |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 146 | #define HDMI_SETTINGS_1280x720p60_16_9 \ |
| 147 | {HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, FALSE, \ |
| 148 | 720, 5, 5, 20, FALSE, 74250, 60000, FALSE, TRUE} |
| 149 | #define HDMI_SETTINGS_1920x1080i60_16_9 \ |
| 150 | {HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, FALSE, \ |
| 151 | 540, 2, 5, 5, FALSE, 74250, 60000, FALSE, TRUE} |
| 152 | #define HDMI_SETTINGS_1440x480i60_4_3 \ |
| 153 | {HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, TRUE, \ |
| 154 | 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE} |
| 155 | #define HDMI_SETTINGS_1440x480i60_16_9 \ |
| 156 | {HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, TRUE, \ |
| 157 | 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE} |
| 158 | #define HDMI_SETTINGS_1920x1080p60_16_9 \ |
| 159 | {HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, FALSE, \ |
| 160 | 1080, 4, 5, 36, FALSE, 148500, 60000, FALSE, TRUE} |
| 161 | #define HDMI_SETTINGS_720x576p50_4_3 \ |
| 162 | {HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, TRUE, \ |
| 163 | 576, 5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE} |
| 164 | #define HDMI_SETTINGS_720x576p50_16_9 \ |
| 165 | {HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, TRUE, \ |
| 166 | 576, 5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE} |
| 167 | #define HDMI_SETTINGS_1280x720p50_16_9 \ |
| 168 | {HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, FALSE, \ |
| 169 | 720, 5, 5, 20, FALSE, 74250, 50000, FALSE, TRUE} |
| 170 | #define HDMI_SETTINGS_1440x576i50_4_3 \ |
| 171 | {HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, TRUE, \ |
| 172 | 288, 2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE} |
| 173 | #define HDMI_SETTINGS_1440x576i50_16_9 \ |
| 174 | {HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, TRUE, \ |
| 175 | 288, 2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE} |
| 176 | #define HDMI_SETTINGS_1920x1080p50_16_9 \ |
| 177 | {HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, FALSE, \ |
| 178 | 1080, 4, 5, 36, FALSE, 148500, 50000, FALSE, TRUE} |
| 179 | #define HDMI_SETTINGS_1920x1080p24_16_9 \ |
| 180 | {HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, FALSE, \ |
| 181 | 1080, 4, 5, 36, FALSE, 74250, 24000, FALSE, TRUE} |
| 182 | #define HDMI_SETTINGS_1920x1080p25_16_9 \ |
| 183 | {HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, FALSE, \ |
| 184 | 1080, 4, 5, 36, FALSE, 74250, 25000, FALSE, TRUE} |
| 185 | #define HDMI_SETTINGS_1920x1080p30_16_9 \ |
| 186 | {HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, FALSE, \ |
| 187 | 1080, 4, 5, 36, FALSE, 74250, 30000, FALSE, TRUE} |
| 188 | |
| 189 | /* A lookup table for all the supported display modes by the HDMI |
| 190 | * hardware and driver. Use HDMI_SETUP_LUT in the module init to |
| 191 | * setup the LUT with the supported modes. */ |
| 192 | extern struct hdmi_disp_mode_timing_type |
| 193 | hdmi_common_supported_video_mode_lut[HDMI_VFRMT_MAX]; |
| 194 | |
| 195 | /* Structure that encapsulates all the supported display modes by the HDMI sink |
| 196 | * device */ |
| 197 | struct hdmi_disp_mode_list_type { |
| 198 | uint32 disp_mode_list[HDMI_VFRMT_MAX]; |
Aravind Venkateswaran | 5479cc1 | 2012-03-16 15:40:40 -0700 | [diff] [blame] | 199 | #define TOP_AND_BOTTOM 0x10 |
| 200 | #define FRAME_PACKING 0x20 |
| 201 | #define SIDE_BY_SIDE_HALF 0x40 |
| 202 | uint32 disp_3d_mode_list[HDMI_VFRMT_MAX]; |
| 203 | uint32 disp_multi_3d_mode_list[16]; |
| 204 | uint32 disp_multi_3d_mode_list_cnt; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 205 | uint32 num_of_elements; |
| 206 | }; |
| 207 | #endif |
| 208 | |
Naseer Ahmed | 5cd6b86 | 2012-09-26 23:56:24 -0400 | [diff] [blame] | 209 | /* |
| 210 | * As per the CEA-861E spec, there can be a total of 10 short audio |
| 211 | * descriptors with each SAD being 3 bytes long. |
| 212 | * Thus, the maximum length of the audio data block would be 30 bytes |
| 213 | */ |
| 214 | #define MAX_AUDIO_DATA_BLOCK_SIZE 30 |
| 215 | #define MAX_SPKR_ALLOC_DATA_BLOCK_SIZE 3 |
| 216 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 217 | struct external_common_state_type { |
| 218 | boolean hpd_state; |
| 219 | struct kobject *uevent_kobj; |
| 220 | uint32 video_resolution; |
| 221 | struct device *dev; |
Saurabh Shah | 79d05a6 | 2012-01-09 15:18:33 -0800 | [diff] [blame] | 222 | struct switch_dev sdev; |
Aravind Venkateswaran | cf44e5f | 2012-10-26 18:11:23 -0700 | [diff] [blame^] | 223 | struct switch_dev audio_sdev; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 224 | #ifdef CONFIG_FB_MSM_HDMI_3D |
| 225 | boolean format_3d; |
| 226 | void (*switch_3d)(boolean on); |
| 227 | #endif |
| 228 | #ifdef CONFIG_FB_MSM_HDMI_COMMON |
| 229 | boolean hdcp_active; |
| 230 | boolean hpd_feature_on; |
| 231 | boolean hdmi_sink; |
| 232 | struct hdmi_disp_mode_list_type disp_mode_list; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 233 | uint16 video_latency, audio_latency; |
Aravind Venkateswaran | 226b429 | 2012-03-16 15:35:31 -0700 | [diff] [blame] | 234 | uint16 physical_address; |
Aravind Venkateswaran | 5066a5f | 2012-03-16 15:29:32 -0700 | [diff] [blame] | 235 | uint32 preferred_video_format; |
| 236 | uint8 pt_scan_info; |
| 237 | uint8 it_scan_info; |
| 238 | uint8 ce_scan_info; |
Aravind Venkateswaran | fff7a7d | 2012-03-16 15:27:19 -0700 | [diff] [blame] | 239 | uint8 spd_vendor_name[8]; |
| 240 | uint8 spd_product_description[16]; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 241 | boolean present_3d; |
| 242 | boolean present_hdcp; |
Naseer Ahmed | 5cd6b86 | 2012-09-26 23:56:24 -0400 | [diff] [blame] | 243 | uint8 audio_data_block[MAX_AUDIO_DATA_BLOCK_SIZE]; |
| 244 | int adb_size; |
| 245 | uint8 spkr_alloc_data_block[MAX_SPKR_ALLOC_DATA_BLOCK_SIZE]; |
| 246 | int sadb_size; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 247 | int (*read_edid_block)(int block, uint8 *edid_buf); |
| 248 | int (*hpd_feature)(int on); |
| 249 | #endif |
| 250 | }; |
| 251 | |
| 252 | /* The external interface driver needs to initialize the common state. */ |
| 253 | extern struct external_common_state_type *external_common_state; |
| 254 | extern struct mutex external_common_state_hpd_mutex; |
Manoj Rao | a2c2767 | 2011-08-30 17:19:39 -0700 | [diff] [blame] | 255 | extern struct mutex hdmi_msm_state_mutex; |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 256 | |
| 257 | #ifdef CONFIG_FB_MSM_HDMI_COMMON |
| 258 | #define VFRMT_NOT_SUPPORTED(VFRMT) \ |
| 259 | {VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FALSE} |
| 260 | #define HDMI_SETUP_LUT(MODE) do { \ |
| 261 | struct hdmi_disp_mode_timing_type mode \ |
| 262 | = HDMI_SETTINGS_ ## MODE; \ |
| 263 | hdmi_common_supported_video_mode_lut[mode.video_format] \ |
| 264 | = mode; \ |
| 265 | } while (0) |
| 266 | |
| 267 | int hdmi_common_read_edid(void); |
| 268 | const char *video_format_2string(uint32 format); |
| 269 | bool hdmi_common_get_video_format_from_drv_data(struct msm_fb_data_type *mfd); |
| 270 | const struct hdmi_disp_mode_timing_type *hdmi_common_get_mode(uint32 mode); |
| 271 | const struct hdmi_disp_mode_timing_type *hdmi_common_get_supported_mode( |
| 272 | uint32 mode); |
Eugene Yasman | d0de5f9 | 2011-12-20 13:57:28 +0200 | [diff] [blame] | 273 | const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_mode(uint32 mode); |
| 274 | const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_supported_mode( |
| 275 | uint32 mode); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 276 | void hdmi_common_init_panel_info(struct msm_panel_info *pinfo); |
Aravind Venkateswaran | 5479cc1 | 2012-03-16 15:40:40 -0700 | [diff] [blame] | 277 | |
| 278 | ssize_t video_3d_format_2string(uint32 format, char *buf); |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 279 | #endif |
| 280 | |
| 281 | int external_common_state_create(struct platform_device *pdev); |
| 282 | void external_common_state_remove(void); |
| 283 | |
| 284 | #endif /* __EXTERNAL_COMMON_H__ */ |