blob: 812e8f9916019626f6c690435b7e89dff36b32ef [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysinger43f73fe2007-12-24 19:35:35 +080010#include <linux/etherdevice.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080016#include <linux/irq.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080017#include <asm/dma.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <asm/bfin5xx_spi.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080019#include <asm/portmux.h>
Bryan Wu1394f032007-05-06 14:50:22 -070020
21#include <linux/spi/ad7877.h>
22
23/*
24 * Name the Board for the /proc/cpuinfo
25 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080026const char bfin_board_name[] = "ADI PNAV-1.0";
Bryan Wu1394f032007-05-06 14:50:22 -070027
28/*
29 * Driver needs to know address, irq and flag pin.
30 */
31
32#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
33static struct resource bfin_pcmcia_cf_resources[] = {
34 {
35 .start = 0x20310000, /* IO PORT */
36 .end = 0x20312000,
37 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080038 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +080039 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -070040 .end = 0x20311FFF,
41 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080042 }, {
Bryan Wu1394f032007-05-06 14:50:22 -070043 .start = IRQ_PF4,
44 .end = IRQ_PF4,
45 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080046 }, {
Bryan Wu1394f032007-05-06 14:50:22 -070047 .start = 6, /* Card Detect PF6 */
48 .end = 6,
49 .flags = IORESOURCE_IRQ,
50 },
51};
52
53static struct platform_device bfin_pcmcia_cf_device = {
54 .name = "bfin_cf_pcmcia",
55 .id = -1,
56 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
57 .resource = bfin_pcmcia_cf_resources,
58};
59#endif
60
61#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
62static struct platform_device rtc_device = {
63 .name = "rtc-bfin",
64 .id = -1,
65};
66#endif
67
68#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +000069#include <linux/smc91x.h>
70
71static struct smc91x_platdata smc91x_info = {
72 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
73 .leda = RPC_LED_100_10,
74 .ledb = RPC_LED_TX_RX,
75};
76
Bryan Wu1394f032007-05-06 14:50:22 -070077static struct resource smc91x_resources[] = {
78 {
79 .name = "smc91x-regs",
80 .start = 0x20300300,
81 .end = 0x20300300 + 16,
82 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080083 }, {
Bryan Wu1394f032007-05-06 14:50:22 -070084
85 .start = IRQ_PF7,
86 .end = IRQ_PF7,
87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
88 },
89};
90static struct platform_device smc91x_device = {
91 .name = "smc91x",
92 .id = 0,
93 .num_resources = ARRAY_SIZE(smc91x_resources),
94 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +000095 .dev = {
96 .platform_data = &smc91x_info,
97 },
Bryan Wu1394f032007-05-06 14:50:22 -070098};
99#endif
100
Bryan Wu1394f032007-05-06 14:50:22 -0700101#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800102static struct platform_device bfin_mii_bus = {
103 .name = "bfin_mii_bus",
104};
105
Bryan Wu1394f032007-05-06 14:50:22 -0700106static struct platform_device bfin_mac_device = {
107 .name = "bfin_mac",
Graf Yang65319622009-02-04 16:49:45 +0800108 .dev.platform_data = &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -0700109};
110#endif
111
112#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
113static struct resource net2272_bfin_resources[] = {
114 {
115 .start = 0x20300000,
116 .end = 0x20300000 + 0x100,
117 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800118 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700119 .start = IRQ_PF7,
120 .end = IRQ_PF7,
121 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
122 },
123};
124
125static struct platform_device net2272_bfin_device = {
126 .name = "net2272",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
129 .resource = net2272_bfin_resources,
130};
131#endif
132
133#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
134/* all SPI peripherals info goes here */
135
136#if defined(CONFIG_MTD_M25P80) \
137 || defined(CONFIG_MTD_M25P80_MODULE)
138static struct mtd_partition bfin_spi_flash_partitions[] = {
139 {
Robin Getzaa582972008-08-05 17:47:29 +0800140 .name = "bootloader(spi)",
Bryan Wu1394f032007-05-06 14:50:22 -0700141 .size = 0x00020000,
142 .offset = 0,
143 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800144 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800145 .name = "linux kernel(spi)",
Bryan Wu1394f032007-05-06 14:50:22 -0700146 .size = 0xe0000,
147 .offset = 0x20000
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800148 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800149 .name = "file system(spi)",
Bryan Wu1394f032007-05-06 14:50:22 -0700150 .size = 0x700000,
151 .offset = 0x00100000,
152 }
153};
154
155static struct flash_platform_data bfin_spi_flash_data = {
156 .name = "m25p80",
157 .parts = bfin_spi_flash_partitions,
158 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
159 .type = "m25p64",
160};
161
162/* SPI flash chip (m25p64) */
163static struct bfin5xx_spi_chip spi_flash_chip_info = {
164 .enable_dma = 0, /* use dma transfer with this chip*/
165 .bits_per_word = 8,
166};
167#endif
168
Mike Frysingera261eec2009-05-20 14:05:36 +0000169#if defined(CONFIG_BFIN_SPI_ADC) \
170 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700171/* SPI ADC chip */
172static struct bfin5xx_spi_chip spi_adc_chip_info = {
173 .enable_dma = 1, /* use dma transfer with this chip*/
174 .bits_per_word = 16,
175};
176#endif
177
Barry Songd40bd712010-02-22 10:31:06 +0000178#if defined(CONFIG_SND_BLACKFIN_AD183X) \
179 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700180static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
181 .enable_dma = 0,
182 .bits_per_word = 16,
183};
184#endif
185
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800186#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
187static struct bfin5xx_spi_chip mmc_spi_chip_info = {
188 .enable_dma = 0,
Bryan Wu1394f032007-05-06 14:50:22 -0700189 .bits_per_word = 8,
190};
191#endif
192
Bryan Wu1394f032007-05-06 14:50:22 -0700193#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
194static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700195 .enable_dma = 0,
196 .bits_per_word = 16,
197};
198
199static const struct ad7877_platform_data bfin_ad7877_ts_info = {
200 .model = 7877,
201 .vref_delay_usecs = 50, /* internal, no capacitor */
202 .x_plate_ohms = 419,
203 .y_plate_ohms = 486,
204 .pressure_max = 1000,
205 .pressure_min = 0,
206 .stopacq_polarity = 1,
207 .first_conversion_delay = 3,
208 .acquisition_time = 1,
209 .averaging = 1,
210 .pen_down_acc_interval = 1,
211};
212#endif
213
214static struct spi_board_info bfin_spi_board_info[] __initdata = {
215#if defined(CONFIG_MTD_M25P80) \
216 || defined(CONFIG_MTD_M25P80_MODULE)
217 {
218 /* the modalias must be the same as spi device driver name */
219 .modalias = "m25p80", /* Name of spi_driver for this device */
220 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800221 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700222 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
223 .platform_data = &bfin_spi_flash_data,
224 .controller_data = &spi_flash_chip_info,
225 .mode = SPI_MODE_3,
226 },
227#endif
228
Mike Frysingera261eec2009-05-20 14:05:36 +0000229#if defined(CONFIG_BFIN_SPI_ADC) \
230 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700231 {
232 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
233 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800234 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700235 .chip_select = 1, /* Framework chip select. */
236 .platform_data = NULL, /* No spi_driver specific config */
237 .controller_data = &spi_adc_chip_info,
238 },
239#endif
240
Barry Songd40bd712010-02-22 10:31:06 +0000241#if defined(CONFIG_SND_BLACKFIN_AD183X) \
242 || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700243 {
Barry Songdac98172009-08-13 21:07:37 +0000244 .modalias = "ad1836",
Bryan Wu1394f032007-05-06 14:50:22 -0700245 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800246 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -0700247 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
248 .controller_data = &ad1836_spi_chip_info,
249 },
250#endif
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800251#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700252 {
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800253 .modalias = "mmc_spi",
Bryan Wu1394f032007-05-06 14:50:22 -0700254 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800255 .bus_num = 0,
Michael Hennerichf3f704d2009-03-06 00:27:57 +0800256 .chip_select = 5,
257 .controller_data = &mmc_spi_chip_info,
Bryan Wu1394f032007-05-06 14:50:22 -0700258 .mode = SPI_MODE_3,
259 },
260#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700261#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
262{
263 .modalias = "ad7877",
264 .platform_data = &bfin_ad7877_ts_info,
265 .irq = IRQ_PF2,
266 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +0800267 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -0700268 .chip_select = 5,
269 .controller_data = &spi_ad7877_chip_info,
270},
271#endif
272
273};
274
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800275/* SPI (0) */
276static struct resource bfin_spi0_resource[] = {
277 [0] = {
278 .start = SPI0_REGBASE,
279 .end = SPI0_REGBASE + 0xFF,
280 .flags = IORESOURCE_MEM,
281 },
282 [1] = {
283 .start = CH_SPI,
284 .end = CH_SPI,
Yi Li53122692009-06-05 12:11:11 +0000285 .flags = IORESOURCE_DMA,
286 },
287 [2] = {
288 .start = IRQ_SPI,
289 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800290 .flags = IORESOURCE_IRQ,
Yi Li53122692009-06-05 12:11:11 +0000291 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800292};
293
Bryan Wu1394f032007-05-06 14:50:22 -0700294/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800295static struct bfin5xx_spi_master bfin_spi0_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700296 .num_chipselect = 8,
297 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +0800298 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -0700299};
300
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800301static struct platform_device bfin_spi0_device = {
302 .name = "bfin-spi",
303 .id = 0, /* Bus number */
304 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
305 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -0700306 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800307 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -0700308 },
309};
310#endif /* spi master and devices */
311
312#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
313static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800314 .name = "bf537-lq035",
Bryan Wu1394f032007-05-06 14:50:22 -0700315};
316#endif
317
318#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000319#ifdef CONFIG_SERIAL_BFIN_UART0
320static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -0700321 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000322 .start = UART0_THR,
323 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -0700324 .flags = IORESOURCE_MEM,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000325 },
326 {
327 .start = IRQ_UART0_RX,
328 .end = IRQ_UART0_RX+1,
329 .flags = IORESOURCE_IRQ,
330 },
331 {
332 .start = IRQ_UART0_ERROR,
333 .end = IRQ_UART0_ERROR,
334 .flags = IORESOURCE_IRQ,
335 },
336 {
337 .start = CH_UART0_TX,
338 .end = CH_UART0_TX,
339 .flags = IORESOURCE_DMA,
340 },
341 {
342 .start = CH_UART0_RX,
343 .end = CH_UART0_RX,
344 .flags = IORESOURCE_DMA,
Bryan Wu1394f032007-05-06 14:50:22 -0700345 },
346};
347
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000348unsigned short bfin_uart0_peripherals[] = {
349 P_UART0_TX, P_UART0_RX, 0
350};
351
352static struct platform_device bfin_uart0_device = {
353 .name = "bfin-uart",
354 .id = 0,
355 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
356 .resource = bfin_uart0_resources,
357 .dev = {
358 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
359 },
360};
361#endif
362#ifdef CONFIG_SERIAL_BFIN_UART1
363static struct resource bfin_uart1_resources[] = {
364 {
365 .start = UART1_THR,
366 .end = UART1_GCTL+2,
367 .flags = IORESOURCE_MEM,
368 },
369 {
370 .start = IRQ_UART1_RX,
371 .end = IRQ_UART1_RX+1,
372 .flags = IORESOURCE_IRQ,
373 },
374 {
375 .start = IRQ_UART1_ERROR,
376 .end = IRQ_UART1_ERROR,
377 .flags = IORESOURCE_IRQ,
378 },
379 {
380 .start = CH_UART1_TX,
381 .end = CH_UART1_TX,
382 .flags = IORESOURCE_DMA,
383 },
384 {
385 .start = CH_UART1_RX,
386 .end = CH_UART1_RX,
387 .flags = IORESOURCE_DMA,
388 },
389};
390
391unsigned short bfin_uart1_peripherals[] = {
392 P_UART1_TX, P_UART1_RX, 0
393};
394
395static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -0700396 .name = "bfin-uart",
397 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000398 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
399 .resource = bfin_uart1_resources,
400 .dev = {
401 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
402 },
Bryan Wu1394f032007-05-06 14:50:22 -0700403};
404#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000405#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700406
Graf Yang5be36d22008-04-25 03:09:15 +0800407#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800408#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800409static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800410 {
411 .start = 0xFFC00400,
412 .end = 0xFFC004FF,
413 .flags = IORESOURCE_MEM,
414 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800415 {
416 .start = IRQ_UART0_RX,
417 .end = IRQ_UART0_RX+1,
418 .flags = IORESOURCE_IRQ,
419 },
420 {
421 .start = CH_UART0_RX,
422 .end = CH_UART0_RX+1,
423 .flags = IORESOURCE_DMA,
424 },
425};
426
427static struct platform_device bfin_sir0_device = {
428 .name = "bfin_sir",
429 .id = 0,
430 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
431 .resource = bfin_sir0_resources,
432};
Graf Yang5be36d22008-04-25 03:09:15 +0800433#endif
434#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800435static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800436 {
437 .start = 0xFFC02000,
438 .end = 0xFFC020FF,
439 .flags = IORESOURCE_MEM,
440 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800441 {
442 .start = IRQ_UART1_RX,
443 .end = IRQ_UART1_RX+1,
444 .flags = IORESOURCE_IRQ,
445 },
446 {
447 .start = CH_UART1_RX,
448 .end = CH_UART1_RX+1,
449 .flags = IORESOURCE_DMA,
450 },
Graf Yang5be36d22008-04-25 03:09:15 +0800451};
452
Graf Yang42bd8bc2009-01-07 23:14:39 +0800453static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800454 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800455 .id = 1,
456 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
457 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800458};
459#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800460#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700461
462static struct platform_device *stamp_devices[] __initdata = {
463#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
464 &bfin_pcmcia_cf_device,
465#endif
466
467#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
468 &rtc_device,
469#endif
470
Bryan Wu1394f032007-05-06 14:50:22 -0700471#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
472 &smc91x_device,
473#endif
474
475#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800476 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -0700477 &bfin_mac_device,
478#endif
479
480#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
481 &net2272_bfin_device,
482#endif
483
484#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800485 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -0700486#endif
487
488#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
489 &bfin_fb_device,
490#endif
491
492#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000493#ifdef CONFIG_SERIAL_BFIN_UART0
494 &bfin_uart0_device,
495#endif
496#ifdef CONFIG_SERIAL_BFIN_UART1
497 &bfin_uart1_device,
498#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700499#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800500
501#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800502#ifdef CONFIG_BFIN_SIR0
503 &bfin_sir0_device,
504#endif
505#ifdef CONFIG_BFIN_SIR1
506 &bfin_sir1_device,
507#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800508#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700509};
510
Mike Frysinger7f6678c2009-02-04 16:49:45 +0800511static int __init pnav_init(void)
Bryan Wu1394f032007-05-06 14:50:22 -0700512{
Harvey Harrisonb85d8582008-04-23 09:39:01 +0800513 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Bryan Wu1394f032007-05-06 14:50:22 -0700514 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
515#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
516 spi_register_board_info(bfin_spi_board_info,
517 ARRAY_SIZE(bfin_spi_board_info));
518#endif
519 return 0;
520}
521
Mike Frysinger7f6678c2009-02-04 16:49:45 +0800522arch_initcall(pnav_init);
Mike Frysinger137b1522007-11-22 16:07:03 +0800523
Sonic Zhangc13ce9f2009-09-23 09:37:46 +0000524static struct platform_device *stamp_early_devices[] __initdata = {
525#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
526#ifdef CONFIG_SERIAL_BFIN_UART0
527 &bfin_uart0_device,
528#endif
529#ifdef CONFIG_SERIAL_BFIN_UART1
530 &bfin_uart1_device,
531#endif
532#endif
533};
534
535void __init native_machine_early_platform_add_devices(void)
536{
537 printk(KERN_INFO "register early platform devices\n");
538 early_platform_add_devices(stamp_early_devices,
539 ARRAY_SIZE(stamp_early_devices));
540}
541
Mike Frysinger9862cc52007-11-15 21:21:20 +0800542void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +0800543{
544 random_ether_addr(addr);
545 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
546}
Mike Frysinger9862cc52007-11-15 21:21:20 +0800547EXPORT_SYMBOL(bfin_get_ether_addr);