blob: 7241e9013fa191f0064348b648c69d59108dcab6 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080019#include <linux/videodev2.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/types.h>
21#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070022#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070024#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#ifdef MSM_CAMERA_GCC
26#include <time.h>
27#else
28#include <linux/time.h>
29#endif
30
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080031#include <linux/msm_ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070032
Nishant Pandit5dd54422012-06-26 22:52:44 +053033#define BIT(nr) (1UL << (nr))
34
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#define MSM_CAM_IOCTL_MAGIC 'm'
36
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -080037#define MAX_SERVER_PAYLOAD_LENGTH 8192
38
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
40 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
41
42#define MSM_CAM_IOCTL_REGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
44
45#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
47
48#define MSM_CAM_IOCTL_CTRL_COMMAND \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
50
51#define MSM_CAM_IOCTL_CONFIG_VFE \
52 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
53
54#define MSM_CAM_IOCTL_GET_STATS \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
56
57#define MSM_CAM_IOCTL_GETFRAME \
58 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
59
60#define MSM_CAM_IOCTL_ENABLE_VFE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
62
63#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_CONFIG_CMD \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
68
69#define MSM_CAM_IOCTL_DISABLE_VFE \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_VFE_APPS_RESET \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
80
81#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
83
84#define MSM_CAM_IOCTL_AXI_CONFIG \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
86
87#define MSM_CAM_IOCTL_GET_PICTURE \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
89
90#define MSM_CAM_IOCTL_SET_CROP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
92
93#define MSM_CAM_IOCTL_PICT_PP \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
95
96#define MSM_CAM_IOCTL_PICT_PP_DONE \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
98
99#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
101
102#define MSM_CAM_IOCTL_FLASH_LED_CFG \
103 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
104
105#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
106 _IO(MSM_CAM_IOCTL_MAGIC, 23)
107
108#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
109 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
110
111#define MSM_CAM_IOCTL_AF_CTRL \
112 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_AF_CTRL_DONE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
116
117#define MSM_CAM_IOCTL_CONFIG_VPE \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
127 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
128
129#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
130 _IO(MSM_CAM_IOCTL_MAGIC, 31)
131
132#define MSM_CAM_IOCTL_FLASH_CTRL \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
134
135#define MSM_CAM_IOCTL_ERROR_CONFIG \
136 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
137
138#define MSM_CAM_IOCTL_ABORT_CAPTURE \
139 _IO(MSM_CAM_IOCTL_MAGIC, 34)
140
141#define MSM_CAM_IOCTL_SET_FD_ROI \
142 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
143
144#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
145 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
146
147#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
148 _IO(MSM_CAM_IOCTL_MAGIC, 37)
149
150#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
152
153#define MSM_CAM_IOCTL_PUT_ST_FRAME \
154 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
155
Mansoor Aftab5d418372011-07-26 17:01:26 -0700156#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800157 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700158
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700159#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700161
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700162#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700164
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700165#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
171#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700173
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800174#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800176
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800177#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
180#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800182
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800183#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800185
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800186#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
189#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800191
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800192#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800193 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800194
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700195#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
196 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
197
Nishant Panditb2157c92012-04-25 01:09:28 +0530198#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
200
Brian Muramatsu6d869492012-08-01 22:46:50 -0700201#define MSM_CAM_IOCTL_STATS_REQBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
203
204#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
206
207#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
208 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
209
Ankit Premrajka4b3443f2012-06-11 14:06:31 -0700210#define MSM_CAM_IOCTL_SET_MCTL_SDEV \
211 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *)
212
213#define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \
214 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *)
215
Kiran Kumar H N90785902012-07-05 13:59:38 -0700216#define MSM_CAM_IOCTL_GET_INST_HANDLE \
217 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *)
218
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700219#define MSM_CAM_IOCTL_STATS_UNREG_BUF \
220 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *)
221
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800222#define MSM_CAM_IOCTL_CSIC_IO_CFG \
223 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *)
224
225#define MSM_CAM_IOCTL_CSID_IO_CFG \
226 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *)
227
228#define MSM_CAM_IOCTL_CSIPHY_IO_CFG \
229 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *)
230
231#define MSM_CAM_IOCTL_OEM \
232 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *)
233
234#define MSM_CAM_IOCTL_AXI_INIT \
235 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *)
236
237#define MSM_CAM_IOCTL_AXI_RELEASE \
238 _IO(MSM_CAM_IOCTL_MAGIC, 67)
239
240#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_CMD \
241 _IOWR(MSM_CAM_IOCTL_MAGIC, 68, struct msm_camera_v4l2_ioctl_t)
242
243#define MSM_CAM_IOCTL_V4L2_EVT_NATIVE_FRONT_CMD \
244 _IOWR(MSM_CAM_IOCTL_MAGIC, 69, struct msm_camera_v4l2_ioctl_t)
245
Nishant Panditd74a62d2012-12-13 14:22:31 +0530246#define MSM_CAM_IOCTL_AXI_LOW_POWER_MODE \
247 _IOWR(MSM_CAM_IOCTL_MAGIC, 70, uint8_t *)
248
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800249#define MSM_CAM_IOCTL_INTF_MCTL_MAPPING_CFG \
Nishant Panditd74a62d2012-12-13 14:22:31 +0530250 _IOR(MSM_CAM_IOCTL_MAGIC, 71, struct intf_mctl_mapping_cfg *)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800251
252struct ioctl_native_cmd {
253 unsigned short mode;
254 unsigned short address;
255 unsigned short value_1;
256 unsigned short value_2;
257 unsigned short value_3;
258};
259
260struct v4l2_event_and_payload {
261 struct v4l2_event evt;
262 uint32_t payload_length;
263 uint32_t transaction_id;
264 void *payload;
265};
Lakshmi Narayana Kalavala58243db2012-07-24 00:06:27 -0700266
Brian Muramatsu6d869492012-08-01 22:46:50 -0700267struct msm_stats_reqbuf {
268 int num_buf; /* how many buffers requested */
269 int stats_type; /* stats type */
270};
271
272struct msm_stats_flush_bufq {
273 int stats_type; /* enum msm_stats_enum_type */
274};
275
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700276struct msm_mctl_pp_cmd {
277 int32_t id;
278 uint16_t length;
279 void *value;
280};
281
282struct msm_mctl_post_proc_cmd {
283 int32_t type;
284 struct msm_mctl_pp_cmd cmd;
285};
286
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700287#define MSM_CAMERA_LED_OFF 0
288#define MSM_CAMERA_LED_LOW 1
289#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530290#define MSM_CAMERA_LED_INIT 3
291#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700292
293#define MSM_CAMERA_STROBE_FLASH_NONE 0
294#define MSM_CAMERA_STROBE_FLASH_XENON 1
295
296#define MSM_MAX_CAMERA_SENSORS 5
297#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800298#define MAX_CAM_NAME_SIZE 32
299#define MAX_ACT_MOD_NAME_SIZE 32
300#define MAX_ACT_NAME_SIZE 32
301#define NUM_ACTUATOR_DIR 2
302#define MAX_ACTUATOR_SCENARIO 8
303#define MAX_ACTUATOR_REGION 5
304#define MAX_ACTUATOR_INIT_SET 12
305#define MAX_ACTUATOR_TYPE_SIZE 32
306#define MAX_ACTUATOR_REG_TBL_SIZE 8
307
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700308
309#define MSM_MAX_CAMERA_CONFIGS 2
310
311#define PP_SNAP 0x01
312#define PP_RAW_SNAP ((0x01)<<1)
313#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800314#define PP_THUMB ((0x01)<<3)
315#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700316
317#define MSM_CAM_CTRL_CMD_DONE 0
318#define MSM_CAM_SENSOR_VFE_CMD 1
319
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700320/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
321#define MAX_PLANES 8
322
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700323/*****************************************************
324 * structure
325 *****************************************************/
326
327/* define five type of structures for userspace <==> kernel
328 * space communication:
329 * command 1 - 2 are from userspace ==> kernel
330 * command 3 - 4 are from kernel ==> userspace
331 *
332 * 1. control command: control command(from control thread),
333 * control status (from config thread);
334 */
335struct msm_ctrl_cmd {
336 uint16_t type;
337 uint16_t length;
338 void *value;
339 uint16_t status;
340 uint32_t timeout_ms;
341 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
342 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800343 int queue_idx;
344 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700345 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700346 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700347};
348
349struct msm_cam_evt_msg {
350 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
351 unsigned short msg_id;
352 unsigned int len; /* size in, number of bytes out */
353 uint32_t frame_id;
354 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700355 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700356};
357
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700358struct msm_pp_frame_sp {
359 /* phy addr of the buffer */
360 unsigned long phy_addr;
361 uint32_t y_off;
362 uint32_t cbcr_off;
363 /* buffer length */
364 uint32_t length;
365 int32_t fd;
366 uint32_t addr_offset;
367 /* mapped addr */
368 unsigned long vaddr;
369};
370
371struct msm_pp_frame_mp {
372 /* phy addr of the plane */
373 unsigned long phy_addr;
374 /* offset of plane data */
375 uint32_t data_offset;
376 /* plane length */
377 uint32_t length;
378 int32_t fd;
379 uint32_t addr_offset;
380 /* mapped addr */
381 unsigned long vaddr;
382};
383
384struct msm_pp_frame {
385 uint32_t handle; /* stores vb cookie */
386 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800387 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700388 int path;
389 unsigned short image_type;
390 unsigned short num_planes; /* 1 for sp */
391 struct timeval timestamp;
392 union {
393 struct msm_pp_frame_sp sp;
394 struct msm_pp_frame_mp mp[MAX_PLANES];
395 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800396 int node_type;
Kiran Kumar H N90785902012-07-05 13:59:38 -0700397 uint32_t inst_handle;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700398};
399
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800400struct msm_pp_crop {
401 uint32_t src_x;
402 uint32_t src_y;
403 uint32_t src_w;
404 uint32_t src_h;
405 uint32_t dst_x;
406 uint32_t dst_y;
407 uint32_t dst_w;
408 uint32_t dst_h;
409 uint8_t update_flag;
410};
411
412struct msm_mctl_pp_frame_cmd {
413 uint32_t cookie;
414 uint8_t vpe_output_action;
415 struct msm_pp_frame src_frame;
416 struct msm_pp_frame dest_frame;
417 struct msm_pp_crop crop;
418 int path;
419};
420
Mingcheng Zhu49505502011-07-19 20:44:36 -0700421struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700422 unsigned short image_mode;
423 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700424 unsigned short inst_idx;
425 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700426 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700427 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700428};
429
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700430struct msm_mctl_pp_cmd_ack_event {
431 uint32_t cmd; /* VPE_CMD_ZOOM? */
432 int status; /* 0 done, < 0 err */
433 uint32_t cookie; /* daemon's cookie */
434};
435
436struct msm_mctl_pp_event_info {
437 int32_t event;
438 union {
439 struct msm_mctl_pp_cmd_ack_event ack;
440 };
441};
442
443struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700444 unsigned short resptype;
445 union {
446 struct msm_cam_evt_msg isp_msg;
447 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700448 struct msm_cam_evt_divert_frame div_frame;
449 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700450 } isp_data;
451};
452
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700453#define MSM_CAM_RESP_CTRL 0
454#define MSM_CAM_RESP_STAT_EVT_MSG 1
455#define MSM_CAM_RESP_STEREO_OP_1 2
456#define MSM_CAM_RESP_STEREO_OP_2 3
457#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700458#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700459#define MSM_CAM_RESP_DONE_EVENT 6
460#define MSM_CAM_RESP_MCTL_PP_EVENT 7
461#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700462
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700463#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800464#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700465
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700466/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700467
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700468struct msm_stats_event_ctrl {
469 /* 0 - ctrl_cmd from control thread,
470 * 1 - stats/event kernel,
471 * 2 - V4L control or read request */
472 int resptype;
473 int timeout_ms;
474 struct msm_ctrl_cmd ctrl_cmd;
475 /* struct vfe_event_t stats_event; */
476 struct msm_cam_evt_msg stats_event;
477};
478
479/* 2. config command: config command(from config thread); */
480struct msm_camera_cfg_cmd {
481 /* what to config:
482 * 1 - sensor config, 2 - vfe config */
483 uint16_t cfg_type;
484
485 /* sensor config type */
486 uint16_t cmd_type;
487 uint16_t queue;
488 uint16_t length;
489 void *value;
490};
491
492#define CMD_GENERAL 0
493#define CMD_AXI_CFG_OUT1 1
494#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
495#define CMD_AXI_CFG_OUT2 3
496#define CMD_PICT_T_AXI_CFG 4
497#define CMD_PICT_M_AXI_CFG 5
498#define CMD_RAW_PICT_AXI_CFG 6
499
500#define CMD_FRAME_BUF_RELEASE 7
501#define CMD_PREV_BUF_CFG 8
502#define CMD_SNAP_BUF_RELEASE 9
503#define CMD_SNAP_BUF_CFG 10
504#define CMD_STATS_DISABLE 11
505#define CMD_STATS_AEC_AWB_ENABLE 12
506#define CMD_STATS_AF_ENABLE 13
507#define CMD_STATS_AEC_ENABLE 14
508#define CMD_STATS_AWB_ENABLE 15
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800509#define CMD_STATS_ENABLE 16
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700510
511#define CMD_STATS_AXI_CFG 17
512#define CMD_STATS_AEC_AXI_CFG 18
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800513#define CMD_STATS_AF_AXI_CFG 19
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700514#define CMD_STATS_AWB_AXI_CFG 20
515#define CMD_STATS_RS_AXI_CFG 21
516#define CMD_STATS_CS_AXI_CFG 22
517#define CMD_STATS_IHIST_AXI_CFG 23
518#define CMD_STATS_SKIN_AXI_CFG 24
519
520#define CMD_STATS_BUF_RELEASE 25
521#define CMD_STATS_AEC_BUF_RELEASE 26
522#define CMD_STATS_AF_BUF_RELEASE 27
523#define CMD_STATS_AWB_BUF_RELEASE 28
524#define CMD_STATS_RS_BUF_RELEASE 29
525#define CMD_STATS_CS_BUF_RELEASE 30
526#define CMD_STATS_IHIST_BUF_RELEASE 31
527#define CMD_STATS_SKIN_BUF_RELEASE 32
528
529#define UPDATE_STATS_INVALID 33
530#define CMD_AXI_CFG_SNAP_GEMINI 34
531#define CMD_AXI_CFG_SNAP 35
532#define CMD_AXI_CFG_PREVIEW 36
533#define CMD_AXI_CFG_VIDEO 37
534
535#define CMD_STATS_IHIST_ENABLE 38
536#define CMD_STATS_RS_ENABLE 39
537#define CMD_STATS_CS_ENABLE 40
538#define CMD_VPE 41
539#define CMD_AXI_CFG_VPE 42
540#define CMD_AXI_CFG_ZSL 43
541#define CMD_AXI_CFG_SNAP_VPE 44
542#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700543
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530544#define CMD_CONFIG_PING_ADDR 46
545#define CMD_CONFIG_PONG_ADDR 47
546#define CMD_CONFIG_FREE_BUF_ADDR 48
547#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
548#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530549#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700550#define CMD_VFE_PROCESS_IRQ 52
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700551#define CMD_STATS_BG_ENABLE 53
552#define CMD_STATS_BF_ENABLE 54
553#define CMD_STATS_BHIST_ENABLE 55
554#define CMD_STATS_BG_BUF_RELEASE 56
555#define CMD_STATS_BF_BUF_RELEASE 57
556#define CMD_STATS_BHIST_BUF_RELEASE 58
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800557#define CMD_VFE_PIX_SOF_COUNT_UPDATE 59
558#define CMD_VFE_COUNT_PIX_SOF_ENABLE 60
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700559
Nishant Pandit5dd54422012-06-26 22:52:44 +0530560#define CMD_AXI_CFG_PRIM BIT(8)
561#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
562#define CMD_AXI_CFG_SEC BIT(10)
563#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
564#define CMD_AXI_CFG_TERT1 BIT(12)
565#define CMD_AXI_CFG_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800566#define CMD_AXI_CFG_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800567
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700568#define CMD_AXI_START 0xE1
569#define CMD_AXI_STOP 0xE2
Shuzhen Wang109c2112012-07-23 17:28:11 -0700570#define CMD_AXI_RESET 0xE3
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800571#define CMD_AXI_ABORT 0xE4
572
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700573
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700574
575#define AXI_CMD_PREVIEW BIT(0)
576#define AXI_CMD_CAPTURE BIT(1)
577#define AXI_CMD_RECORD BIT(2)
578#define AXI_CMD_ZSL BIT(3)
579#define AXI_CMD_RAW_CAPTURE BIT(4)
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -0700580#define AXI_CMD_LIVESHOT BIT(5)
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -0700581
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700582/* vfe config command: config command(from config thread)*/
583struct msm_vfe_cfg_cmd {
584 int cmd_type;
585 uint16_t length;
586 void *value;
587};
588
589struct msm_vpe_cfg_cmd {
590 int cmd_type;
591 uint16_t length;
592 void *value;
593};
594
595#define MAX_CAMERA_ENABLE_NAME_LEN 32
596struct camera_enable_cmd {
597 char name[MAX_CAMERA_ENABLE_NAME_LEN];
598};
599
600#define MSM_PMEM_OUTPUT1 0
601#define MSM_PMEM_OUTPUT2 1
602#define MSM_PMEM_OUTPUT1_OUTPUT2 2
603#define MSM_PMEM_THUMBNAIL 3
604#define MSM_PMEM_MAINIMG 4
605#define MSM_PMEM_RAW_MAINIMG 5
606#define MSM_PMEM_AEC_AWB 6
607#define MSM_PMEM_AF 7
608#define MSM_PMEM_AEC 8
609#define MSM_PMEM_AWB 9
610#define MSM_PMEM_RS 10
611#define MSM_PMEM_CS 11
612#define MSM_PMEM_IHIST 12
613#define MSM_PMEM_SKIN 13
614#define MSM_PMEM_VIDEO 14
615#define MSM_PMEM_PREVIEW 15
616#define MSM_PMEM_VIDEO_VPE 16
617#define MSM_PMEM_C2D 17
618#define MSM_PMEM_MAINIMG_VPE 18
619#define MSM_PMEM_THUMBNAIL_VPE 19
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700620#define MSM_PMEM_BAYER_GRID 20
621#define MSM_PMEM_BAYER_FOCUS 21
622#define MSM_PMEM_BAYER_HIST 22
623#define MSM_PMEM_MAX 23
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700624
625#define STAT_AEAW 0
626#define STAT_AEC 1
627#define STAT_AF 2
628#define STAT_AWB 3
629#define STAT_RS 4
630#define STAT_CS 5
631#define STAT_IHIST 6
632#define STAT_SKIN 7
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -0700633#define STAT_BG 8
634#define STAT_BF 9
635#define STAT_BHIST 10
636#define STAT_MAX 11
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700637
638#define FRAME_PREVIEW_OUTPUT1 0
639#define FRAME_PREVIEW_OUTPUT2 1
640#define FRAME_SNAPSHOT 2
641#define FRAME_THUMBNAIL 3
642#define FRAME_RAW_SNAPSHOT 4
643#define FRAME_MAX 5
644
Brian Muramatsu6d869492012-08-01 22:46:50 -0700645enum msm_stats_enum_type {
646 MSM_STATS_TYPE_AEC, /* legacy based AEC */
647 MSM_STATS_TYPE_AF, /* legacy based AF */
648 MSM_STATS_TYPE_AWB, /* legacy based AWB */
649 MSM_STATS_TYPE_RS, /* legacy based RS */
650 MSM_STATS_TYPE_CS, /* legacy based CS */
651 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
652 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
653 MSM_STATS_TYPE_BG, /* Bayer Grids */
654 MSM_STATS_TYPE_BF, /* Bayer Focus */
655 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
656 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800657 MSM_STATS_TYPE_COMP, /* Composite stats */
Brian Muramatsu6d869492012-08-01 22:46:50 -0700658 MSM_STATS_TYPE_MAX /* MAX */
659};
660
661struct msm_stats_buf_info {
662 int type; /* msm_stats_enum_type */
663 int fd;
664 void *vaddr;
665 uint32_t offset;
666 uint32_t len;
667 uint32_t y_off;
668 uint32_t cbcr_off;
669 uint32_t planar0_off;
670 uint32_t planar1_off;
671 uint32_t planar2_off;
672 uint8_t active;
673 int buf_idx;
674};
675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700676struct msm_pmem_info {
677 int type;
678 int fd;
679 void *vaddr;
680 uint32_t offset;
681 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700682 uint32_t y_off;
683 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530684 uint32_t planar0_off;
685 uint32_t planar1_off;
686 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700687 uint8_t active;
688};
689
690struct outputCfg {
691 uint32_t height;
692 uint32_t width;
693
694 uint32_t window_height_firstline;
695 uint32_t window_height_lastline;
696};
697
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800698#define VIDEO_NODE 0
699#define MCTL_NODE 1
700
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700701#define OUTPUT_1 0
702#define OUTPUT_2 1
703#define OUTPUT_1_AND_2 2 /* snapshot only */
704#define OUTPUT_1_AND_3 3 /* video */
705#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
706#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
707#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
708#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700709#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530710#define OUTPUT_VIDEO_ALL_CHNLS 9
711#define OUTPUT_ZSL_ALL_CHNLS 10
712#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713
Nishant Pandit5dd54422012-06-26 22:52:44 +0530714#define OUTPUT_PRIM BIT(8)
715#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
716#define OUTPUT_SEC BIT(10)
717#define OUTPUT_SEC_ALL_CHNLS BIT(11)
718#define OUTPUT_TERT1 BIT(12)
719#define OUTPUT_TERT2 BIT(13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800720#define OUTPUT_TERT3 BIT(14)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800721
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700722#define MSM_FRAME_PREV_1 0
723#define MSM_FRAME_PREV_2 1
724#define MSM_FRAME_ENC 2
725
Nishant Pandit5dd54422012-06-26 22:52:44 +0530726#define OUTPUT_TYPE_P BIT(0)
727#define OUTPUT_TYPE_T BIT(1)
728#define OUTPUT_TYPE_S BIT(2)
729#define OUTPUT_TYPE_V BIT(3)
730#define OUTPUT_TYPE_L BIT(4)
731#define OUTPUT_TYPE_ST_L BIT(5)
732#define OUTPUT_TYPE_ST_R BIT(6)
733#define OUTPUT_TYPE_ST_D BIT(7)
734#define OUTPUT_TYPE_R BIT(8)
735#define OUTPUT_TYPE_R1 BIT(9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800736#define OUTPUT_TYPE_SAEC BIT(10)
737#define OUTPUT_TYPE_SAFC BIT(11)
738#define OUTPUT_TYPE_SAWB BIT(12)
739#define OUTPUT_TYPE_IHST BIT(13)
740#define OUTPUT_TYPE_CSTA BIT(14)
741#define OUTPUT_TYPE_R2 BIT(15)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700742
743struct fd_roi_info {
744 void *info;
745 int info_len;
746};
747
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700748struct msm_mem_map_info {
749 uint32_t cookie;
750 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700751 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700752};
753
Mingcheng Zhu49505502011-07-19 20:44:36 -0700754#define MSM_MEM_MMAP 0
755#define MSM_MEM_USERPTR 1
756#define MSM_PLANE_MAX 8
757#define MSM_PLANE_Y 0
758#define MSM_PLANE_UV 1
759
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700760struct msm_frame {
761 struct timespec ts;
762 int path;
763 int type;
764 unsigned long buffer;
765 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700766 uint32_t y_off;
767 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530768 uint32_t planar0_off;
769 uint32_t planar1_off;
770 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700771 int fd;
772
773 void *cropinfo;
774 int croplen;
775 uint32_t error_code;
776 struct fd_roi_info roi_info;
777 uint32_t frame_id;
778 int stcam_quality_ind;
779 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700780
781 struct ion_allocation_data ion_alloc;
782 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700783 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700784};
785
786enum msm_st_frame_packing {
787 SIDE_BY_SIDE_HALF,
788 SIDE_BY_SIDE_FULL,
789 TOP_DOWN_HALF,
790 TOP_DOWN_FULL,
791};
792
793struct msm_st_crop {
794 uint32_t in_w;
795 uint32_t in_h;
796 uint32_t out_w;
797 uint32_t out_h;
798};
799
800struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530801 uint32_t buf_p0_off;
802 uint32_t buf_p1_off;
803 uint32_t buf_p0_stride;
804 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700805 uint32_t pix_x_off;
806 uint32_t pix_y_off;
807 struct msm_st_crop stCropInfo;
808};
809
810struct msm_st_frame {
811 struct msm_frame buf_info;
812 int type;
813 enum msm_st_frame_packing packing;
814 struct msm_st_half L;
815 struct msm_st_half R;
816 int frame_id;
817};
818
819#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
820
821struct stats_buff {
822 unsigned long buff;
823 int fd;
824};
825
826struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700827 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700828 struct stats_buff aec;
829 struct stats_buff awb;
830 struct stats_buff af;
831 struct stats_buff ihist;
832 struct stats_buff rs;
833 struct stats_buff cs;
834 struct stats_buff skin;
835 int type;
836 uint32_t status_bits;
837 unsigned long buffer;
838 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800839 int length;
840 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700841 uint32_t frame_id;
Brian Muramatsu6d869492012-08-01 22:46:50 -0700842 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843};
844#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
845/* video capture mode in VIDIOC_S_PARM */
846#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
847 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
848/* extendedmode for video recording in VIDIOC_S_PARM */
849#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
850 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
851/* extendedmode for the full size main image in VIDIOC_S_PARM */
852#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
853/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
854#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
855 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800856/* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */
857#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800858 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800859/* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */
860#define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800861 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800862/* raw image type */
863#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800864 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800865/* RDI dump */
866#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800867 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800868/* RDI dump 1 */
869#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800870 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800871/* RDI dump 2 */
872#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800873 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800874#define MSM_V4L2_EXT_CAPTURE_MODE_AEC \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800875 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800876#define MSM_V4L2_EXT_CAPTURE_MODE_AWB \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800877 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800878#define MSM_V4L2_EXT_CAPTURE_MODE_AF \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800879 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800880#define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \
Sudhir Sharma4472ce52012-12-01 14:00:27 -0800881 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14)
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800882#define MSM_V4L2_EXT_CAPTURE_MODE_CS \
883 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15)
884#define MSM_V4L2_EXT_CAPTURE_MODE_RS \
885 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16)
886#define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \
887 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17)
888#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700889
890#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
891#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
892#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
893#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
894#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
895#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
896#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
897#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
898#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
899#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
900#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
901#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
902#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
903#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
904#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700905#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
Kiran Kumar H N90785902012-07-05 13:59:38 -0700906#define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700907#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800908#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
909#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700910
911/* camera operation mode for video recording - two frame output queues */
912#define MSM_V4L2_CAM_OP_DEFAULT 0
913/* camera operation mode for video recording - two frame output queues */
914#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
915/* camera operation mode for video recording - two frame output queues */
916#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
917/* camera operation mode for standard shapshot - two frame output queues */
918#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
919/* camera operation mode for zsl shapshot - three output queues */
920#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
921/* camera operation mode for raw snapshot - one frame output queue */
922#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800923/* camera operation mode for jpeg snapshot - one frame output queue */
924#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
925
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700926
927#define MSM_V4L2_VID_CAP_TYPE 0
928#define MSM_V4L2_STREAM_ON 1
929#define MSM_V4L2_STREAM_OFF 2
930#define MSM_V4L2_SNAPSHOT 3
931#define MSM_V4L2_QUERY_CTRL 4
932#define MSM_V4L2_GET_CTRL 5
933#define MSM_V4L2_SET_CTRL 6
934#define MSM_V4L2_QUERY 7
935#define MSM_V4L2_GET_CROP 8
936#define MSM_V4L2_SET_CROP 9
937#define MSM_V4L2_OPEN 10
938#define MSM_V4L2_CLOSE 11
939#define MSM_V4L2_SET_CTRL_CMD 12
940#define MSM_V4L2_EVT_SUB_MASK 13
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -0800941#define MSM_V4L2_PRIVATE_CMD 14
942#define MSM_V4L2_MAX 15
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700943#define V4L2_CAMERA_EXIT 43
944
945struct crop_info {
946 void *info;
947 int len;
948};
949
950struct msm_postproc {
951 int ftnum;
952 struct msm_frame fthumnail;
953 int fmnum;
954 struct msm_frame fmain;
955};
956
957struct msm_snapshot_pp_status {
958 void *status;
959};
960
961#define CFG_SET_MODE 0
962#define CFG_SET_EFFECT 1
963#define CFG_START 2
964#define CFG_PWR_UP 3
965#define CFG_PWR_DOWN 4
966#define CFG_WRITE_EXPOSURE_GAIN 5
967#define CFG_SET_DEFAULT_FOCUS 6
968#define CFG_MOVE_FOCUS 7
969#define CFG_REGISTER_TO_REAL_GAIN 8
970#define CFG_REAL_TO_REGISTER_GAIN 9
971#define CFG_SET_FPS 10
972#define CFG_SET_PICT_FPS 11
973#define CFG_SET_BRIGHTNESS 12
974#define CFG_SET_CONTRAST 13
975#define CFG_SET_ZOOM 14
976#define CFG_SET_EXPOSURE_MODE 15
977#define CFG_SET_WB 16
978#define CFG_SET_ANTIBANDING 17
979#define CFG_SET_EXP_GAIN 18
980#define CFG_SET_PICT_EXP_GAIN 19
981#define CFG_SET_LENS_SHADING 20
982#define CFG_GET_PICT_FPS 21
983#define CFG_GET_PREV_L_PF 22
984#define CFG_GET_PREV_P_PL 23
985#define CFG_GET_PICT_L_PF 24
986#define CFG_GET_PICT_P_PL 25
987#define CFG_GET_AF_MAX_STEPS 26
988#define CFG_GET_PICT_MAX_EXP_LC 27
989#define CFG_SEND_WB_INFO 28
990#define CFG_SENSOR_INIT 29
991#define CFG_GET_3D_CALI_DATA 30
992#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700993#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700994#define CFG_GET_EEPROM_INFO 33
995#define CFG_GET_EEPROM_DATA 34
996#define CFG_SET_ACTUATOR_INFO 35
997#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530998/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700999#define CFG_SET_SATURATION 37
1000#define CFG_SET_SHARPNESS 38
1001#define CFG_SET_TOUCHAEC 39
1002#define CFG_SET_AUTO_FOCUS 40
1003#define CFG_SET_AUTOFLASH 41
1004#define CFG_SET_EXPOSURE_COMPENSATION 42
1005#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +05301006#define CFG_START_STREAM 44
1007#define CFG_STOP_STREAM 45
1008#define CFG_GET_CSI_PARAMS 46
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001009#define CFG_POWER_UP 47
1010#define CFG_POWER_DOWN 48
1011#define CFG_WRITE_I2C_ARRAY 49
1012#define CFG_READ_I2C_ARRAY 50
1013#define CFG_PCLK_CHANGE 51
1014#define CFG_CONFIG_VREG_ARRAY 52
1015#define CFG_CONFIG_CLK_ARRAY 53
1016#define CFG_GPIO_OP 54
1017#define CFG_MAX 55
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001018
1019
1020#define MOVE_NEAR 0
1021#define MOVE_FAR 1
1022
1023#define SENSOR_PREVIEW_MODE 0
1024#define SENSOR_SNAPSHOT_MODE 1
1025#define SENSOR_RAW_SNAPSHOT_MODE 2
1026#define SENSOR_HFR_60FPS_MODE 3
1027#define SENSOR_HFR_90FPS_MODE 4
1028#define SENSOR_HFR_120FPS_MODE 5
1029
1030#define SENSOR_QTR_SIZE 0
1031#define SENSOR_FULL_SIZE 1
1032#define SENSOR_QVGA_SIZE 2
1033#define SENSOR_INVALID_SIZE 3
1034
1035#define CAMERA_EFFECT_OFF 0
1036#define CAMERA_EFFECT_MONO 1
1037#define CAMERA_EFFECT_NEGATIVE 2
1038#define CAMERA_EFFECT_SOLARIZE 3
1039#define CAMERA_EFFECT_SEPIA 4
1040#define CAMERA_EFFECT_POSTERIZE 5
1041#define CAMERA_EFFECT_WHITEBOARD 6
1042#define CAMERA_EFFECT_BLACKBOARD 7
1043#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -07001044#define CAMERA_EFFECT_EMBOSS 9
1045#define CAMERA_EFFECT_SKETCH 10
1046#define CAMERA_EFFECT_NEON 11
1047#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001048
Taniya Dasa9bdb012011-09-08 11:21:33 +05301049/* QRD */
1050#define CAMERA_EFFECT_BW 10
1051#define CAMERA_EFFECT_BLUISH 12
1052#define CAMERA_EFFECT_REDDISH 13
1053#define CAMERA_EFFECT_GREENISH 14
1054
1055/* QRD */
1056#define CAMERA_ANTIBANDING_OFF 0
1057#define CAMERA_ANTIBANDING_50HZ 2
1058#define CAMERA_ANTIBANDING_60HZ 1
1059#define CAMERA_ANTIBANDING_AUTO 3
1060
1061#define CAMERA_CONTRAST_LV0 0
1062#define CAMERA_CONTRAST_LV1 1
1063#define CAMERA_CONTRAST_LV2 2
1064#define CAMERA_CONTRAST_LV3 3
1065#define CAMERA_CONTRAST_LV4 4
1066#define CAMERA_CONTRAST_LV5 5
1067#define CAMERA_CONTRAST_LV6 6
1068#define CAMERA_CONTRAST_LV7 7
1069#define CAMERA_CONTRAST_LV8 8
1070#define CAMERA_CONTRAST_LV9 9
1071
1072#define CAMERA_BRIGHTNESS_LV0 0
1073#define CAMERA_BRIGHTNESS_LV1 1
1074#define CAMERA_BRIGHTNESS_LV2 2
1075#define CAMERA_BRIGHTNESS_LV3 3
1076#define CAMERA_BRIGHTNESS_LV4 4
1077#define CAMERA_BRIGHTNESS_LV5 5
1078#define CAMERA_BRIGHTNESS_LV6 6
1079#define CAMERA_BRIGHTNESS_LV7 7
1080#define CAMERA_BRIGHTNESS_LV8 8
1081
1082
1083#define CAMERA_SATURATION_LV0 0
1084#define CAMERA_SATURATION_LV1 1
1085#define CAMERA_SATURATION_LV2 2
1086#define CAMERA_SATURATION_LV3 3
1087#define CAMERA_SATURATION_LV4 4
1088#define CAMERA_SATURATION_LV5 5
1089#define CAMERA_SATURATION_LV6 6
1090#define CAMERA_SATURATION_LV7 7
1091#define CAMERA_SATURATION_LV8 8
1092
1093#define CAMERA_SHARPNESS_LV0 0
1094#define CAMERA_SHARPNESS_LV1 3
1095#define CAMERA_SHARPNESS_LV2 6
1096#define CAMERA_SHARPNESS_LV3 9
1097#define CAMERA_SHARPNESS_LV4 12
1098#define CAMERA_SHARPNESS_LV5 15
1099#define CAMERA_SHARPNESS_LV6 18
1100#define CAMERA_SHARPNESS_LV7 21
1101#define CAMERA_SHARPNESS_LV8 24
1102#define CAMERA_SHARPNESS_LV9 27
1103#define CAMERA_SHARPNESS_LV10 30
1104
1105#define CAMERA_SETAE_AVERAGE 0
1106#define CAMERA_SETAE_CENWEIGHT 1
1107
Taniya Dasa9bdb012011-09-08 11:21:33 +05301108#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
1109#define CAMERA_WB_CUSTOM 2
1110#define CAMERA_WB_INCANDESCENT 3
1111#define CAMERA_WB_FLUORESCENT 4
1112#define CAMERA_WB_DAYLIGHT 5
1113#define CAMERA_WB_CLOUDY_DAYLIGHT 6
1114#define CAMERA_WB_TWILIGHT 7
1115#define CAMERA_WB_SHADE 8
1116
1117#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
1118#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
1119#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
1120#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
1121#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
1122
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001123enum msm_v4l2_saturation_level {
1124 MSM_V4L2_SATURATION_L0,
1125 MSM_V4L2_SATURATION_L1,
1126 MSM_V4L2_SATURATION_L2,
1127 MSM_V4L2_SATURATION_L3,
1128 MSM_V4L2_SATURATION_L4,
1129 MSM_V4L2_SATURATION_L5,
1130 MSM_V4L2_SATURATION_L6,
1131 MSM_V4L2_SATURATION_L7,
1132 MSM_V4L2_SATURATION_L8,
1133 MSM_V4L2_SATURATION_L9,
1134 MSM_V4L2_SATURATION_L10,
1135};
1136
Suresh Vankadara212d9722012-05-30 15:51:20 +05301137enum msm_v4l2_contrast_level {
1138 MSM_V4L2_CONTRAST_L0,
1139 MSM_V4L2_CONTRAST_L1,
1140 MSM_V4L2_CONTRAST_L2,
1141 MSM_V4L2_CONTRAST_L3,
1142 MSM_V4L2_CONTRAST_L4,
1143 MSM_V4L2_CONTRAST_L5,
1144 MSM_V4L2_CONTRAST_L6,
1145 MSM_V4L2_CONTRAST_L7,
1146 MSM_V4L2_CONTRAST_L8,
1147 MSM_V4L2_CONTRAST_L9,
1148 MSM_V4L2_CONTRAST_L10,
1149};
1150
1151
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001152enum msm_v4l2_exposure_level {
1153 MSM_V4L2_EXPOSURE_N2,
1154 MSM_V4L2_EXPOSURE_N1,
1155 MSM_V4L2_EXPOSURE_D,
1156 MSM_V4L2_EXPOSURE_P1,
1157 MSM_V4L2_EXPOSURE_P2,
1158};
1159
1160enum msm_v4l2_sharpness_level {
1161 MSM_V4L2_SHARPNESS_L0,
1162 MSM_V4L2_SHARPNESS_L1,
1163 MSM_V4L2_SHARPNESS_L2,
1164 MSM_V4L2_SHARPNESS_L3,
1165 MSM_V4L2_SHARPNESS_L4,
1166 MSM_V4L2_SHARPNESS_L5,
1167 MSM_V4L2_SHARPNESS_L6,
1168};
1169
1170enum msm_v4l2_expo_metering_mode {
1171 MSM_V4L2_EXP_FRAME_AVERAGE,
1172 MSM_V4L2_EXP_CENTER_WEIGHTED,
1173 MSM_V4L2_EXP_SPOT_METERING,
1174};
1175
1176enum msm_v4l2_iso_mode {
1177 MSM_V4L2_ISO_AUTO = 0,
1178 MSM_V4L2_ISO_DEBLUR,
1179 MSM_V4L2_ISO_100,
1180 MSM_V4L2_ISO_200,
1181 MSM_V4L2_ISO_400,
1182 MSM_V4L2_ISO_800,
1183 MSM_V4L2_ISO_1600,
1184};
1185
1186enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301187 MSM_V4L2_WB_OFF,
1188 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001189 MSM_V4L2_WB_CUSTOM,
1190 MSM_V4L2_WB_INCANDESCENT,
1191 MSM_V4L2_WB_FLUORESCENT,
1192 MSM_V4L2_WB_DAYLIGHT,
1193 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301194};
1195
1196enum msm_v4l2_special_effect {
1197 MSM_V4L2_EFFECT_OFF,
1198 MSM_V4L2_EFFECT_MONO,
1199 MSM_V4L2_EFFECT_NEGATIVE,
1200 MSM_V4L2_EFFECT_SOLARIZE,
1201 MSM_V4L2_EFFECT_SEPIA,
1202 MSM_V4L2_EFFECT_POSTERAIZE,
1203 MSM_V4L2_EFFECT_WHITEBOARD,
1204 MSM_V4L2_EFFECT_BLACKBOARD,
1205 MSM_V4L2_EFFECT_AQUA,
1206 MSM_V4L2_EFFECT_EMBOSS,
1207 MSM_V4L2_EFFECT_SKETCH,
1208 MSM_V4L2_EFFECT_NEON,
1209 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001210};
1211
1212enum msm_v4l2_power_line_frequency {
1213 MSM_V4L2_POWER_LINE_OFF,
1214 MSM_V4L2_POWER_LINE_60HZ,
1215 MSM_V4L2_POWER_LINE_50HZ,
1216 MSM_V4L2_POWER_LINE_AUTO,
1217};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301218
Su Liu6c3bb322012-02-14 02:15:05 +05301219#define CAMERA_ISO_TYPE_AUTO 0
1220#define CAMEAR_ISO_TYPE_HJR 1
1221#define CAMEAR_ISO_TYPE_100 2
1222#define CAMERA_ISO_TYPE_200 3
1223#define CAMERA_ISO_TYPE_400 4
1224#define CAMEAR_ISO_TYPE_800 5
1225#define CAMERA_ISO_TYPE_1600 6
1226
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001227struct sensor_pict_fps {
1228 uint16_t prevfps;
1229 uint16_t pictfps;
1230};
1231
1232struct exp_gain_cfg {
1233 uint16_t gain;
1234 uint32_t line;
1235};
1236
1237struct focus_cfg {
1238 int32_t steps;
1239 int dir;
1240};
1241
1242struct fps_cfg {
1243 uint16_t f_mult;
1244 uint16_t fps_div;
1245 uint32_t pict_fps_div;
1246};
1247struct wb_info_cfg {
1248 uint16_t red_gain;
1249 uint16_t green_gain;
1250 uint16_t blue_gain;
1251};
1252struct sensor_3d_exp_cfg {
1253 uint16_t gain;
1254 uint32_t line;
1255 uint16_t r_gain;
1256 uint16_t b_gain;
1257 uint16_t gr_gain;
1258 uint16_t gb_gain;
1259 uint16_t gain_adjust;
1260};
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001261struct sensor_3d_cali_data_t {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001262 unsigned char left_p_matrix[3][4][8];
1263 unsigned char right_p_matrix[3][4][8];
1264 unsigned char square_len[8];
1265 unsigned char focal_len[8];
1266 unsigned char pixel_pitch[8];
1267 uint16_t left_r;
1268 uint16_t left_b;
1269 uint16_t left_gb;
1270 uint16_t left_af_far;
1271 uint16_t left_af_mid;
1272 uint16_t left_af_short;
1273 uint16_t left_af_5um;
1274 uint16_t left_af_50up;
1275 uint16_t left_af_50down;
1276 uint16_t right_r;
1277 uint16_t right_b;
1278 uint16_t right_gb;
1279 uint16_t right_af_far;
1280 uint16_t right_af_mid;
1281 uint16_t right_af_short;
1282 uint16_t right_af_5um;
1283 uint16_t right_af_50up;
1284 uint16_t right_af_50down;
1285};
1286struct sensor_init_cfg {
1287 uint8_t prev_res;
1288 uint8_t pict_res;
1289};
1290
1291struct sensor_calib_data {
1292 /* Color Related Measurements */
1293 uint16_t r_over_g;
1294 uint16_t b_over_g;
1295 uint16_t gr_over_gb;
1296
1297 /* Lens Related Measurements */
1298 uint16_t macro_2_inf;
1299 uint16_t inf_2_macro;
1300 uint16_t stroke_amt;
1301 uint16_t af_pos_1m;
1302 uint16_t af_pos_inf;
1303};
1304
Kevin Chana980f392011-08-01 20:55:00 -07001305enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001306 MSM_SENSOR_RES_FULL,
1307 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001308 MSM_SENSOR_RES_2,
1309 MSM_SENSOR_RES_3,
1310 MSM_SENSOR_RES_4,
1311 MSM_SENSOR_RES_5,
1312 MSM_SENSOR_RES_6,
1313 MSM_SENSOR_RES_7,
1314 MSM_SENSOR_INVALID_RES,
1315};
1316
1317struct msm_sensor_output_info_t {
1318 uint16_t x_output;
1319 uint16_t y_output;
1320 uint16_t line_length_pclk;
1321 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001322 uint32_t vt_pixel_clk;
1323 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001324 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001325};
1326
1327struct sensor_output_info_t {
1328 struct msm_sensor_output_info_t *output_info;
1329 uint16_t num_info;
1330};
1331
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001332struct msm_sensor_exp_gain_info_t {
1333 uint16_t coarse_int_time_addr;
1334 uint16_t global_gain_addr;
1335 uint16_t vert_offset;
1336};
1337
1338struct msm_sensor_output_reg_addr_t {
1339 uint16_t x_output;
1340 uint16_t y_output;
1341 uint16_t line_length_pclk;
1342 uint16_t frame_length_lines;
1343};
1344
1345struct sensor_driver_params_type {
1346 struct msm_camera_i2c_reg_setting *init_settings;
1347 uint16_t init_settings_size;
1348 struct msm_camera_i2c_reg_setting *mode_settings;
1349 uint16_t mode_settings_size;
1350 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr;
1351 struct msm_camera_i2c_reg_setting *start_settings;
1352 struct msm_camera_i2c_reg_setting *stop_settings;
1353 struct msm_camera_i2c_reg_setting *groupon_settings;
1354 struct msm_camera_i2c_reg_setting *groupoff_settings;
1355 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info;
1356 struct msm_sensor_output_info_t *output_info;
1357};
1358
Taniya Dasa9bdb012011-09-08 11:21:33 +05301359struct mirror_flip {
1360 int32_t x_mirror;
1361 int32_t y_flip;
1362};
1363
1364struct cord {
1365 uint32_t x;
1366 uint32_t y;
1367};
1368
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001369struct msm_eeprom_data_t {
1370 void *eeprom_data;
1371 uint16_t index;
1372};
1373
Nishant Panditb2157c92012-04-25 01:09:28 +05301374struct msm_camera_csid_vc_cfg {
1375 uint8_t cid;
1376 uint8_t dt;
1377 uint8_t decode_format;
1378};
1379
1380struct csi_lane_params_t {
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001381 uint16_t csi_lane_assign;
Nishant Panditb2157c92012-04-25 01:09:28 +05301382 uint8_t csi_lane_mask;
1383 uint8_t csi_if;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001384 uint8_t csid_core[2];
1385 uint8_t csi_phy_sel;
1386};
1387
1388struct msm_camera_csid_lut_params {
1389 uint8_t num_cid;
1390 struct msm_camera_csid_vc_cfg *vc_cfg;
1391};
1392
1393struct msm_camera_csid_params {
1394 uint8_t lane_cnt;
1395 uint16_t lane_assign;
1396 uint8_t phy_sel;
1397 struct msm_camera_csid_lut_params lut_params;
1398};
1399
1400struct msm_camera_csiphy_params {
1401 uint8_t lane_cnt;
1402 uint8_t settle_cnt;
1403 uint16_t lane_mask;
1404 uint8_t combo_mode;
1405};
1406
1407struct msm_camera_csi2_params {
1408 struct msm_camera_csid_params csid_params;
1409 struct msm_camera_csiphy_params csiphy_params;
1410};
1411
1412enum msm_camera_csi_data_format {
1413 CSI_8BIT,
1414 CSI_10BIT,
1415 CSI_12BIT,
1416};
1417
1418struct msm_camera_csi_params {
1419 enum msm_camera_csi_data_format data_format;
1420 uint8_t lane_cnt;
1421 uint8_t lane_assign;
1422 uint8_t settle_cnt;
1423 uint8_t dpcm_scheme;
1424};
1425
1426enum csic_cfg_type_t {
1427 CSIC_INIT,
1428 CSIC_CFG,
1429};
1430
1431struct csic_cfg_data {
1432 enum csic_cfg_type_t cfgtype;
1433 struct msm_camera_csi_params *csic_params;
1434};
1435
1436enum csid_cfg_type_t {
1437 CSID_INIT,
1438 CSID_CFG,
1439};
1440
1441struct csid_cfg_data {
1442 enum csid_cfg_type_t cfgtype;
1443 union {
1444 uint32_t csid_version;
1445 struct msm_camera_csid_params *csid_params;
1446 } cfg;
1447};
1448
1449enum csiphy_cfg_type_t {
1450 CSIPHY_INIT,
1451 CSIPHY_CFG,
1452};
1453
1454struct csiphy_cfg_data {
1455 enum csiphy_cfg_type_t cfgtype;
1456 struct msm_camera_csiphy_params *csiphy_params;
Nishant Panditb2157c92012-04-25 01:09:28 +05301457};
1458
1459#define CSI_EMBED_DATA 0x12
1460#define CSI_RESERVED_DATA_0 0x13
1461#define CSI_YUV422_8 0x1E
1462#define CSI_RAW8 0x2A
1463#define CSI_RAW10 0x2B
1464#define CSI_RAW12 0x2C
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001465#define CSI_YUV420_Y_8 0x30
1466#define CSI_YUV420_UV_8 0x31
1467#define CSI_YUV420_JM_8 0x32
Nishant Panditb2157c92012-04-25 01:09:28 +05301468
1469#define CSI_DECODE_6BIT 0
1470#define CSI_DECODE_8BIT 1
1471#define CSI_DECODE_10BIT 2
1472#define CSI_DECODE_DPCM_10_8_10 5
1473
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001474#define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\
1475 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT))
1476#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1477#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1478#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1479#define ISPIF_S_STREAM_SHIFT 4
1480#define ISPIF_VFE_INTF_SHIFT 12
Nishant Panditb2157c92012-04-25 01:09:28 +05301481
1482#define PIX_0 (0x01 << 0)
1483#define RDI_0 (0x01 << 1)
1484#define PIX_1 (0x01 << 2)
1485#define RDI_1 (0x01 << 3)
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001486#define RDI_2 (0x01 << 4)
Nishant Panditb2157c92012-04-25 01:09:28 +05301487
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001488enum msm_ispif_vfe_intf {
1489 VFE0,
1490 VFE1,
1491 VFE_MAX,
1492};
Nishant Panditb2157c92012-04-25 01:09:28 +05301493
1494enum msm_ispif_intftype {
1495 PIX0,
1496 RDI0,
1497 PIX1,
1498 RDI1,
Nishant Panditb2157c92012-04-25 01:09:28 +05301499 RDI2,
1500 INTF_MAX,
1501};
1502
1503enum msm_ispif_vc {
1504 VC0,
1505 VC1,
1506 VC2,
1507 VC3,
1508};
1509
1510enum msm_ispif_cid {
1511 CID0,
1512 CID1,
1513 CID2,
1514 CID3,
1515 CID4,
1516 CID5,
1517 CID6,
1518 CID7,
1519 CID8,
1520 CID9,
1521 CID10,
1522 CID11,
1523 CID12,
1524 CID13,
1525 CID14,
1526 CID15,
1527};
1528
1529struct msm_ispif_params {
1530 uint8_t intftype;
1531 uint16_t cid_mask;
1532 uint8_t csid;
Sreesudhan Ramakrish Ramkumard8123212012-06-30 13:15:27 -07001533 uint8_t vfe_intf;
Nishant Panditb2157c92012-04-25 01:09:28 +05301534};
1535
1536struct msm_ispif_params_list {
1537 uint32_t len;
1538 struct msm_ispif_params params[4];
1539};
1540
1541enum ispif_cfg_type_t {
1542 ISPIF_INIT,
1543 ISPIF_SET_CFG,
1544 ISPIF_SET_ON_FRAME_BOUNDARY,
1545 ISPIF_SET_OFF_FRAME_BOUNDARY,
1546 ISPIF_SET_OFF_IMMEDIATELY,
1547 ISPIF_RELEASE,
1548};
1549
1550struct ispif_cfg_data {
1551 enum ispif_cfg_type_t cfgtype;
1552 union {
1553 uint32_t csid_version;
1554 int cmd;
1555 struct msm_ispif_params_list ispif_params;
1556 } cfg;
1557};
1558
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001559enum msm_camera_i2c_reg_addr_type {
1560 MSM_CAMERA_I2C_BYTE_ADDR = 1,
1561 MSM_CAMERA_I2C_WORD_ADDR,
1562};
1563
1564struct msm_camera_i2c_reg_array {
1565 uint16_t reg_addr;
1566 uint16_t reg_data;
1567};
1568
1569enum msm_camera_i2c_data_type {
1570 MSM_CAMERA_I2C_BYTE_DATA = 1,
1571 MSM_CAMERA_I2C_WORD_DATA,
1572 MSM_CAMERA_I2C_SET_BYTE_MASK,
1573 MSM_CAMERA_I2C_UNSET_BYTE_MASK,
1574 MSM_CAMERA_I2C_SET_WORD_MASK,
1575 MSM_CAMERA_I2C_UNSET_WORD_MASK,
1576 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA,
1577};
1578
1579struct msm_camera_i2c_reg_setting {
1580 struct msm_camera_i2c_reg_array *reg_setting;
1581 uint16_t size;
1582 enum msm_camera_i2c_reg_addr_type addr_type;
1583 enum msm_camera_i2c_data_type data_type;
1584 uint16_t delay;
1585};
1586
1587enum oem_setting_type {
1588 I2C_READ = 1,
1589 I2C_WRITE,
1590 GPIO_OP,
1591 EEPROM_READ,
1592 VREG_SET,
1593 CLK_SET,
1594};
1595
1596struct sensor_oem_setting {
1597 enum oem_setting_type type;
1598 void *data;
1599};
1600
1601enum camera_vreg_type {
1602 REG_LDO,
1603 REG_VS,
1604 REG_GPIO,
1605};
1606
1607struct camera_vreg_t {
1608 const char *reg_name;
1609 enum camera_vreg_type type;
1610 int min_voltage;
1611 int max_voltage;
1612 int op_mode;
1613 uint32_t delay;
1614};
1615
1616struct msm_camera_vreg_setting {
1617 struct camera_vreg_t *cam_vreg;
1618 uint16_t num_vreg;
1619 uint8_t enable;
1620};
1621
1622struct msm_cam_clk_info {
1623 const char *clk_name;
1624 long clk_rate;
1625 uint32_t delay;
1626};
1627
1628struct msm_cam_clk_setting {
1629 struct msm_cam_clk_info *clk_info;
1630 uint16_t num_clk_info;
1631 uint8_t enable;
1632};
1633
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001634struct sensor_cfg_data {
1635 int cfgtype;
1636 int mode;
1637 int rs;
1638 uint8_t max_steps;
1639
1640 union {
1641 int8_t effect;
1642 uint8_t lens_shading;
1643 uint16_t prevl_pf;
1644 uint16_t prevp_pl;
1645 uint16_t pictl_pf;
1646 uint16_t pictp_pl;
1647 uint32_t pict_max_exp_lc;
1648 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301649 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001650 struct sensor_init_cfg init_info;
1651 struct sensor_pict_fps gfps;
1652 struct exp_gain_cfg exp_gain;
1653 struct focus_cfg focus;
1654 struct fps_cfg fps;
1655 struct wb_info_cfg wb_info;
1656 struct sensor_3d_exp_cfg sensor_3d_exp;
1657 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001658 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001659 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301660 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301661 /* QRD */
1662 uint16_t antibanding;
1663 uint8_t contrast;
1664 uint8_t saturation;
1665 uint8_t sharpness;
1666 int8_t brightness;
1667 int ae_mode;
1668 uint8_t wb_val;
1669 int8_t exp_compensation;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001670 uint32_t pclk;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301671 struct cord aec_cord;
1672 int is_autoflash;
1673 struct mirror_flip mirror_flip;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001674 void *setting;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001675 } cfg;
1676};
1677
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001678enum gpio_operation_type {
1679 GPIO_REQUEST,
1680 GPIO_FREE,
1681 GPIO_SET_DIRECTION_OUTPUT,
1682 GPIO_SET_DIRECTION_INPUT,
1683 GPIO_GET_VALUE,
1684 GPIO_SET_VALUE,
1685};
1686
1687struct msm_cam_gpio_operation {
1688 enum gpio_operation_type op_type;
1689 unsigned address;
1690 int value;
1691 const char *tag;
1692};
1693
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001694struct damping_params_t {
1695 uint32_t damping_step;
1696 uint32_t damping_delay;
1697 uint32_t hw_params;
1698};
1699
1700enum actuator_type {
1701 ACTUATOR_VCM,
1702 ACTUATOR_PIEZO,
1703};
1704
1705enum msm_actuator_data_type {
1706 MSM_ACTUATOR_BYTE_DATA = 1,
1707 MSM_ACTUATOR_WORD_DATA,
1708};
1709
1710enum msm_actuator_addr_type {
1711 MSM_ACTUATOR_BYTE_ADDR = 1,
1712 MSM_ACTUATOR_WORD_ADDR,
1713};
1714
1715enum msm_actuator_write_type {
1716 MSM_ACTUATOR_WRITE_HW_DAMP,
1717 MSM_ACTUATOR_WRITE_DAC,
1718};
1719
1720struct msm_actuator_reg_params_t {
1721 enum msm_actuator_write_type reg_write_type;
1722 uint32_t hw_mask;
1723 uint16_t reg_addr;
1724 uint16_t hw_shift;
1725 uint16_t data_shift;
1726};
1727
1728struct reg_settings_t {
1729 uint16_t reg_addr;
1730 uint16_t reg_data;
1731};
1732
1733struct region_params_t {
1734 /* [0] = ForwardDirection Macro boundary
1735 [1] = ReverseDirection Inf boundary
1736 */
1737 uint16_t step_bound[2];
1738 uint16_t code_per_step;
1739};
1740
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001741struct msm_actuator_move_params_t {
1742 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001743 int8_t sign_dir;
1744 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001745 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001746 struct damping_params_t *ringing_params;
1747};
1748
1749struct msm_actuator_tuning_params_t {
1750 int16_t initial_code;
1751 uint16_t pwd_step;
1752 uint16_t region_size;
1753 uint32_t total_steps;
1754 struct region_params_t *region_params;
1755};
1756
1757struct msm_actuator_params_t {
1758 enum actuator_type act_type;
1759 uint8_t reg_tbl_size;
1760 uint16_t data_size;
1761 uint16_t init_setting_size;
1762 uint32_t i2c_addr;
1763 enum msm_actuator_addr_type i2c_addr_type;
1764 enum msm_actuator_data_type i2c_data_type;
1765 struct msm_actuator_reg_params_t *reg_tbl_params;
1766 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001767};
1768
1769struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001770 struct msm_actuator_params_t actuator_params;
1771 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001772};
1773
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001774struct msm_actuator_get_info_t {
1775 uint32_t focal_length_num;
1776 uint32_t focal_length_den;
1777 uint32_t f_number_num;
1778 uint32_t f_number_den;
1779 uint32_t f_pix_num;
1780 uint32_t f_pix_den;
1781 uint32_t total_f_dist_num;
1782 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001783 uint32_t hor_view_angle_num;
1784 uint32_t hor_view_angle_den;
1785 uint32_t ver_view_angle_num;
1786 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001787};
1788
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001789enum af_camera_name {
1790 ACTUATOR_MAIN_CAM_0,
1791 ACTUATOR_MAIN_CAM_1,
1792 ACTUATOR_MAIN_CAM_2,
1793 ACTUATOR_MAIN_CAM_3,
1794 ACTUATOR_MAIN_CAM_4,
1795 ACTUATOR_MAIN_CAM_5,
1796 ACTUATOR_WEB_CAM_0,
1797 ACTUATOR_WEB_CAM_1,
1798 ACTUATOR_WEB_CAM_2,
1799};
1800
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001801struct msm_actuator_cfg_data {
1802 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001803 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001804 union {
1805 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001806 struct msm_actuator_set_info_t set_info;
1807 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001808 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001809 } cfg;
1810};
1811
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001812struct msm_eeprom_support {
1813 uint16_t is_supported;
1814 uint16_t size;
1815 uint16_t index;
1816 uint16_t qvalue;
1817};
1818
1819struct msm_calib_wb {
1820 uint16_t r_over_g;
1821 uint16_t b_over_g;
1822 uint16_t gr_over_gb;
1823};
1824
1825struct msm_calib_af {
1826 uint16_t macro_dac;
1827 uint16_t inf_dac;
1828 uint16_t start_dac;
1829};
1830
1831struct msm_calib_lsc {
1832 uint16_t r_gain[221];
1833 uint16_t b_gain[221];
1834 uint16_t gr_gain[221];
1835 uint16_t gb_gain[221];
1836};
1837
1838struct pixel_t {
1839 int x;
1840 int y;
1841};
1842
1843struct msm_calib_dpc {
1844 uint16_t validcount;
1845 struct pixel_t snapshot_coord[128];
1846 struct pixel_t preview_coord[128];
1847 struct pixel_t video_coord[128];
1848};
1849
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001850struct msm_calib_raw {
1851 uint8_t *data;
1852 uint32_t size;
1853};
1854
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001855struct msm_camera_eeprom_info_t {
1856 struct msm_eeprom_support af;
1857 struct msm_eeprom_support wb;
1858 struct msm_eeprom_support lsc;
1859 struct msm_eeprom_support dpc;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08001860 struct msm_eeprom_support raw;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001861};
1862
1863struct msm_eeprom_cfg_data {
1864 int cfgtype;
1865 uint8_t is_eeprom_supported;
1866 union {
1867 struct msm_eeprom_data_t get_data;
1868 struct msm_camera_eeprom_info_t get_info;
1869 } cfg;
1870};
1871
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001872struct sensor_large_data {
1873 int cfgtype;
1874 union {
1875 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1876 } data;
1877};
1878
1879enum sensor_type_t {
1880 BAYER,
1881 YUV,
1882 JPEG_SOC,
1883};
1884
1885enum flash_type {
1886 LED_FLASH,
1887 STROBE_FLASH,
1888};
1889
1890enum strobe_flash_ctrl_type {
1891 STROBE_FLASH_CTRL_INIT,
1892 STROBE_FLASH_CTRL_CHARGE,
1893 STROBE_FLASH_CTRL_RELEASE
1894};
1895
1896struct strobe_flash_ctrl_data {
1897 enum strobe_flash_ctrl_type type;
1898 int charge_en;
1899};
1900
1901struct msm_camera_info {
1902 int num_cameras;
1903 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1904 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1905 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1906 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1907 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001908};
1909
1910struct msm_cam_config_dev_info {
1911 int num_config_nodes;
1912 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001913 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001914};
1915
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001916struct msm_mctl_node_info {
1917 int num_mctl_nodes;
1918 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1919};
1920
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001921struct flash_ctrl_data {
1922 int flashtype;
1923 union {
1924 int led_state;
1925 struct strobe_flash_ctrl_data strobe_ctrl;
1926 } ctrl_data;
1927};
1928
1929#define GET_NAME 0
1930#define GET_PREVIEW_LINE_PER_FRAME 1
1931#define GET_PREVIEW_PIXELS_PER_LINE 2
1932#define GET_SNAPSHOT_LINE_PER_FRAME 3
1933#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1934#define GET_SNAPSHOT_FPS 5
1935#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1936
1937struct msm_camsensor_info {
1938 char name[MAX_SENSOR_NAME];
1939 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001940 uint8_t strobe_flash_enabled;
1941 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301942 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001943 int8_t total_steps;
1944 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001945 enum flash_type flashtype;
1946 enum sensor_type_t sensor_type;
1947 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1948 uint32_t camera_type; /* msm_camera_type */
1949 int mount_angle;
1950 uint32_t max_width;
1951 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001952};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001953
1954#define V4L2_SINGLE_PLANE 0
1955#define V4L2_MULTI_PLANE_Y 0
1956#define V4L2_MULTI_PLANE_CBCR 1
1957#define V4L2_MULTI_PLANE_CB 1
1958#define V4L2_MULTI_PLANE_CR 2
1959
1960struct plane_data {
1961 int plane_id;
1962 uint32_t offset;
1963 unsigned long size;
1964};
1965
1966struct img_plane_info {
1967 uint32_t width;
1968 uint32_t height;
1969 uint32_t pixelformat;
1970 uint8_t buffer_type; /*Single/Multi planar*/
1971 uint8_t output_port;
1972 uint32_t ext_mode;
1973 uint8_t num_planes;
1974 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001975 uint32_t sp_y_offset;
Kiran Kumar H N90785902012-07-05 13:59:38 -07001976 uint32_t inst_handle;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001977};
1978
Kevin Chan210061f2012-02-14 20:56:16 -08001979#define QCAMERA_NAME "qcamera"
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001980#define QCAMERA_SERVER_NAME "qcamera_server"
Kevin Chan210061f2012-02-14 20:56:16 -08001981#define QCAMERA_DEVICE_GROUP_ID 1
1982#define QCAMERA_VNODE_GROUP_ID 2
1983
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001984enum msm_cam_subdev_type {
1985 CSIPHY_DEV,
1986 CSID_DEV,
1987 CSIC_DEV,
1988 ISPIF_DEV,
1989 VFE_DEV,
1990 AXI_DEV,
1991 VPE_DEV,
1992 SENSOR_DEV,
1993 ACTUATOR_DEV,
1994 EEPROM_DEV,
1995 GESTURE_DEV,
1996 IRQ_ROUTER_DEV,
1997 CPP_DEV,
Sreesudhan Ramakrish Ramkumarc842b612012-05-21 17:23:24 -07001998 CCI_DEV,
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07001999};
2000
2001struct msm_mctl_set_sdev_data {
2002 uint32_t revision;
2003 enum msm_cam_subdev_type sdev_type;
2004};
2005
Kevin Chan94b4c832012-03-02 21:27:16 -08002006#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002007 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002008
2009#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002010 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002011
2012#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07002013 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002014
2015#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07002016 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002017
2018#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07002019 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08002020
Sunid Wilson4584b5f2012-04-13 12:48:25 -07002021#define MSM_CAM_IOCTL_SEND_EVENT \
2022 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
2023
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07002024#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
2025 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
2026
Kevin Chan41a38702012-06-06 22:25:41 -07002027#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
2028 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
2029
Kiran Kumar H N90785902012-07-05 13:59:38 -07002030#define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \
2031 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t)
2032
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002033#define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \
2034 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t)
2035
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002036#define VIDIOC_MSM_VPE_INIT \
2037 _IO('V', BASE_VIDIOC_PRIVATE + 15)
2038
2039#define VIDIOC_MSM_VPE_RELEASE \
2040 _IO('V', BASE_VIDIOC_PRIVATE + 16)
2041
2042#define VIDIOC_MSM_VPE_CFG \
2043 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *)
2044
2045#define VIDIOC_MSM_AXI_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002046 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002047
2048#define VIDIOC_MSM_AXI_RELEASE \
2049 _IO('V', BASE_VIDIOC_PRIVATE + 19)
2050
2051#define VIDIOC_MSM_AXI_CFG \
2052 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *)
2053
2054#define VIDIOC_MSM_AXI_IRQ \
2055 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *)
2056
2057#define VIDIOC_MSM_AXI_BUF_CFG \
2058 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *)
2059
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002060#define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \
2061 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct rdi_count_msg)
2062
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002063#define VIDIOC_MSM_VFE_INIT \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002064 _IO('V', BASE_VIDIOC_PRIVATE + 24)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002065
2066#define VIDIOC_MSM_VFE_RELEASE \
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002067 _IO('V', BASE_VIDIOC_PRIVATE + 25)
Ankit Premrajka4b3443f2012-06-11 14:06:31 -07002068
Nishant Panditd74a62d2012-12-13 14:22:31 +05302069#define VIDIOC_MSM_AXI_LOW_POWER_MODE \
2070 _IO('V', BASE_VIDIOC_PRIVATE + 26)
2071
2072
Kevin Chan94b4c832012-03-02 21:27:16 -08002073struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07002074 uint32_t id;
Sudhir Sharma4472ce52012-12-01 14:00:27 -08002075 uint32_t len;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002076 uint32_t trans_code;
2077 void __user *ioctl_ptr;
Kevin Chan94b4c832012-03-02 21:27:16 -08002078};
2079
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002080struct msm_camera_vfe_params_t {
2081 uint32_t operation_mode;
2082 uint32_t capture_count;
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002083 uint8_t skip_reset;
2084 uint8_t stop_immediately;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002085 uint16_t port_info;
Lakshmi Narayana Kalavala3e8a1d12012-07-31 15:00:09 -07002086 uint32_t inst_handle;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002087 uint16_t cmd_type;
Azam Sadiq Pasha Kapatrala Syed99861662012-12-02 22:05:25 -08002088 uint8_t stream_error;
Lakshmi Narayana Kalavalacd3d81e2012-07-31 13:04:03 -07002089};
2090
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07002091enum msm_camss_irq_idx {
2092 CAMERA_SS_IRQ_0,
2093 CAMERA_SS_IRQ_1,
2094 CAMERA_SS_IRQ_2,
2095 CAMERA_SS_IRQ_3,
2096 CAMERA_SS_IRQ_4,
2097 CAMERA_SS_IRQ_5,
2098 CAMERA_SS_IRQ_6,
2099 CAMERA_SS_IRQ_7,
2100 CAMERA_SS_IRQ_8,
2101 CAMERA_SS_IRQ_9,
2102 CAMERA_SS_IRQ_10,
2103 CAMERA_SS_IRQ_11,
2104 CAMERA_SS_IRQ_12,
2105 CAMERA_SS_IRQ_MAX
2106};
2107
2108enum msm_cam_hw_idx {
2109 MSM_CAM_HW_MICRO,
2110 MSM_CAM_HW_CCI,
2111 MSM_CAM_HW_CSI0,
2112 MSM_CAM_HW_CSI1,
2113 MSM_CAM_HW_CSI2,
2114 MSM_CAM_HW_CSI3,
2115 MSM_CAM_HW_ISPIF,
2116 MSM_CAM_HW_CPP,
2117 MSM_CAM_HW_VFE0,
2118 MSM_CAM_HW_VFE1,
2119 MSM_CAM_HW_JPEG0,
2120 MSM_CAM_HW_JPEG1,
2121 MSM_CAM_HW_JPEG2,
2122 MSM_CAM_HW_MAX
2123};
2124
2125struct msm_camera_irq_cfg {
2126 /* Bit mask of all the camera hardwares that needs to
2127 * be composited into a single IRQ to the MSM.
2128 * Current usage: (may be updated based on hw changes)
2129 * Bits 31:13 - Reserved.
2130 * Bits 12:0
2131 * 12 - MSM_CAM_HW_JPEG2
2132 * 11 - MSM_CAM_HW_JPEG1
2133 * 10 - MSM_CAM_HW_JPEG0
2134 * 9 - MSM_CAM_HW_VFE1
2135 * 8 - MSM_CAM_HW_VFE0
2136 * 7 - MSM_CAM_HW_CPP
2137 * 6 - MSM_CAM_HW_ISPIF
2138 * 5 - MSM_CAM_HW_CSI3
2139 * 4 - MSM_CAM_HW_CSI2
2140 * 3 - MSM_CAM_HW_CSI1
2141 * 2 - MSM_CAM_HW_CSI0
2142 * 1 - MSM_CAM_HW_CCI
2143 * 0 - MSM_CAM_HW_MICRO
2144 */
2145 uint32_t cam_hw_mask;
2146 uint8_t irq_idx;
2147 uint8_t num_hwcore;
2148};
2149
2150#define MSM_IRQROUTER_CFG_COMPIRQ \
2151 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
2152
Kevin Chan73ec7282012-06-07 01:32:00 -07002153#define MAX_NUM_CPP_STRIPS 8
2154
2155enum msm_cpp_frame_type {
2156 MSM_CPP_OFFLINE_FRAME,
2157 MSM_CPP_REALTIME_FRAME,
2158};
2159
2160struct msm_cpp_frame_strip_info {
2161 int scale_v_en;
2162 int scale_h_en;
2163
2164 int upscale_v_en;
2165 int upscale_h_en;
2166
2167 int src_start_x;
2168 int src_end_x;
2169 int src_start_y;
2170 int src_end_y;
2171
2172 /* Padding is required for upscaler because it does not
2173 * pad internally like other blocks, also needed for rotation
2174 * rotation expects all the blocks in the stripe to be the same size
2175 * Padding is done such that all the extra padded pixels
2176 * are on the right and bottom
2177 */
2178 int pad_bottom;
2179 int pad_top;
2180 int pad_right;
2181 int pad_left;
2182
2183 int v_init_phase;
2184 int h_init_phase;
2185 int h_phase_step;
2186 int v_phase_step;
2187
2188 int prescale_crop_width_first_pixel;
2189 int prescale_crop_width_last_pixel;
2190 int prescale_crop_height_first_line;
2191 int prescale_crop_height_last_line;
2192
2193 int postscale_crop_height_first_line;
2194 int postscale_crop_height_last_line;
2195 int postscale_crop_width_first_pixel;
2196 int postscale_crop_width_last_pixel;
2197
2198 int dst_start_x;
2199 int dst_end_x;
2200 int dst_start_y;
2201 int dst_end_y;
2202
2203 int bytes_per_pixel;
2204 unsigned int source_address;
2205 unsigned int destination_address;
2206 unsigned int src_stride;
2207 unsigned int dst_stride;
2208 int rotate_270;
2209 int horizontal_flip;
2210 int vertical_flip;
2211 int scale_output_width;
2212 int scale_output_height;
2213};
2214
2215struct msm_cpp_frame_info_t {
2216 int32_t frame_id;
2217 uint32_t inst_id;
2218 uint32_t client_id;
2219 enum msm_cpp_frame_type frame_type;
2220 uint32_t num_strips;
2221 struct msm_cpp_frame_strip_info *strip_info;
2222};
2223
Lakshmi Narayana Kalavalabc315ea2012-07-24 09:55:48 -07002224struct msm_ver_num_info {
2225 uint32_t main;
2226 uint32_t minor;
2227 uint32_t rev;
2228};
2229
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002230struct intf_mctl_mapping_cfg {
2231 int is_bayer_sensor;
2232 int vnode_id;
2233 int num_entries;
2234 uint32_t image_modes[MSM_V4L2_EXT_CAPTURE_MODE_MAX];
2235};
2236
Kevin Chan73ec7282012-06-07 01:32:00 -07002237#define VIDIOC_MSM_CPP_CFG \
2238 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
2239
2240#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
2241 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
2242
2243#define VIDIOC_MSM_CPP_GET_INST_INFO \
2244 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
2245
2246#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
2247
Kiran Kumar H N90785902012-07-05 13:59:38 -07002248/* Instance Handle - inst_handle
2249 * Data bundle containing the information about where
2250 * to get a buffer for a particular camera instance.
2251 * This is a bitmask containing the following data:
2252 * Buffer Handle Bitmask:
2253 * ------------------------------------
2254 * Bits : Purpose
2255 * ------------------------------------
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002256 * 31 : is Dev ID valid?
2257 * 30 - 24 : Dev ID.
Kiran Kumar H N90785902012-07-05 13:59:38 -07002258 * 23 : is Image mode valid?
2259 * 22 - 16 : Image mode.
2260 * 15 : is MCTL PP inst idx valid?
2261 * 14 - 8 : MCTL PP inst idx.
2262 * 7 : is Video inst idx valid?
2263 * 6 - 0 : Video inst idx.
2264 */
Azam Sadiq Pasha Kapatrala Syed92fa99c2012-11-28 18:56:19 -08002265#define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF)
2266#define SET_DEVID_MODE(handle, data) \
2267 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24)))
2268#define GET_DEVID_MODE(handle) \
2269 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF)
2270
Kiran Kumar H N90785902012-07-05 13:59:38 -07002271#define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF)
2272#define SET_IMG_MODE(handle, data) \
2273 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16)))
2274#define GET_IMG_MODE(handle) \
2275 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF)
2276
2277#define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF)
2278#define SET_MCTLPP_INST_IDX(handle, data) \
2279 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8)))
2280#define GET_MCTLPP_INST_IDX(handle) \
2281 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF)
2282
2283#define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00)
2284#define GET_VIDEO_INST_IDX(handle) \
2285 ((handle & 0x80) ? (handle & 0x7F) : 0xFF)
2286#define SET_VIDEO_INST_IDX(handle, data) \
2287 (handle |= (0x1 << 7) | (data & 0x7F))
2288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289#endif /* __LINUX_MSM_CAMERA_H */