| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * Driver for Digigram VX222 PCI soundcards | 
 | 3 |  * | 
 | 4 |  * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de> | 
 | 5 |  * | 
 | 6 |  *   This program is free software; you can redistribute it and/or modify | 
 | 7 |  *   it under the terms of the GNU General Public License as published by | 
 | 8 |  *   the Free Software Foundation; either version 2 of the License, or | 
 | 9 |  *   (at your option) any later version. | 
 | 10 |  * | 
 | 11 |  *   This program is distributed in the hope that it will be useful, | 
 | 12 |  *   but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 13 |  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 14 |  *   GNU General Public License for more details. | 
 | 15 |  * | 
 | 16 |  *   You should have received a copy of the GNU General Public License | 
 | 17 |  *   along with this program; if not, write to the Free Software | 
 | 18 |  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA | 
 | 19 |  */ | 
 | 20 |  | 
 | 21 | #ifndef __VX222_H | 
 | 22 | #define __VX222_H | 
 | 23 |  | 
 | 24 | #include <sound/vx_core.h> | 
 | 25 |  | 
 | 26 | struct snd_vx222 { | 
 | 27 |  | 
| Takashi Iwai | af26367 | 2005-11-17 14:46:59 +0100 | [diff] [blame] | 28 | 	struct vx_core core; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 |  | 
 | 30 | 	/* h/w config; for PLX and for DSP */ | 
 | 31 | 	struct pci_dev *pci; | 
 | 32 | 	unsigned long port[2]; | 
 | 33 |  | 
 | 34 | 	unsigned int regCDSP;	/* current CDSP register */ | 
 | 35 | 	unsigned int regCFG;	/* current CFG register */ | 
 | 36 | 	unsigned int regSELMIC;	/* current SELMIC reg. (for VX222 Mic) */ | 
 | 37 |  | 
 | 38 | 	int input_level[2];	/* input level for vx222 mic */ | 
 | 39 | 	int mic_level;		/* mic level for vx222 mic */ | 
 | 40 | }; | 
 | 41 |  | 
 | 42 | /* we use a lookup table with 148 values, see vx_mixer.c */ | 
 | 43 | #define VX2_AKM_LEVEL_MAX	0x93 | 
 | 44 |  | 
 | 45 | extern struct snd_vx_ops vx222_ops; | 
 | 46 | extern struct snd_vx_ops vx222_old_ops; | 
 | 47 |  | 
 | 48 | /* Offset of registers with base equal to portDSP. */ | 
 | 49 | #define VX_RESET_DMA_REGISTER_OFFSET    0x00000008 | 
 | 50 |  | 
 | 51 | /* Constants used to access the INTCSR register. */ | 
 | 52 | #define VX_INTCSR_VALUE                 0x00000001 | 
 | 53 | #define VX_PCI_INTERRUPT_MASK           0x00000040 | 
 | 54 |  | 
 | 55 | /* Constants used to access the CDSP register (0x20). */ | 
 | 56 | #define VX_CDSP_TEST1_MASK              0x00000080 | 
 | 57 | #define VX_CDSP_TOR1_MASK               0x00000040 | 
 | 58 | #define VX_CDSP_TOR2_MASK               0x00000020 | 
 | 59 | #define VX_CDSP_RESERVED0_0_MASK        0x00000010 | 
 | 60 | #define VX_CDSP_CODEC_RESET_MASK        0x00000008 | 
 | 61 | #define VX_CDSP_VALID_IRQ_MASK          0x00000004 | 
 | 62 | #define VX_CDSP_TEST0_MASK              0x00000002 | 
 | 63 | #define VX_CDSP_DSP_RESET_MASK          0x00000001 | 
 | 64 |  | 
 | 65 | #define VX_CDSP_GPIO_OUT_MASK           0x00000060 | 
 | 66 | #define VX_GPIO_OUT_BIT_OFFSET          5               // transform output to bit 0 and 1 | 
 | 67 |  | 
 | 68 | /* Constants used to access the CFG register (0x24). */ | 
 | 69 | #define VX_CFG_SYNCDSP_MASK             0x00000080 | 
 | 70 | #define VX_CFG_RESERVED0_0_MASK         0x00000040 | 
 | 71 | #define VX_CFG_RESERVED1_0_MASK         0x00000020 | 
 | 72 | #define VX_CFG_RESERVED2_0_MASK         0x00000010 | 
 | 73 | #define VX_CFG_DATAIN_SEL_MASK          0x00000008     // 0 (ana), 1 (UER) | 
 | 74 | #define VX_CFG_RESERVED3_0_MASK         0x00000004 | 
 | 75 | #define VX_CFG_RESERVED4_0_MASK         0x00000002 | 
 | 76 | #define VX_CFG_CLOCKIN_SEL_MASK         0x00000001     // 0 (internal), 1 (AES/EBU) | 
 | 77 |  | 
 | 78 | /* Constants used to access the STATUS register (0x30). */ | 
 | 79 | #define VX_STATUS_DATA_XICOR_MASK       0x00000080 | 
 | 80 | #define VX_STATUS_VAL_TEST1_MASK        0x00000040 | 
 | 81 | #define VX_STATUS_VAL_TEST0_MASK        0x00000020 | 
 | 82 | #define VX_STATUS_RESERVED0_MASK        0x00000010 | 
 | 83 | #define VX_STATUS_VAL_TOR1_MASK         0x00000008 | 
 | 84 | #define VX_STATUS_VAL_TOR0_MASK         0x00000004 | 
 | 85 | #define VX_STATUS_LEVEL_IN_MASK         0x00000002    // 6 dBu (0), 22 dBu (1) | 
 | 86 | #define VX_STATUS_MEMIRQ_MASK           0x00000001 | 
 | 87 |  | 
 | 88 | #define VX_STATUS_GPIO_IN_MASK          0x0000000C | 
 | 89 | #define VX_GPIO_IN_BIT_OFFSET           0             // leave input as bit 2 and 3 | 
 | 90 |  | 
 | 91 | /* Constants used to access the MICRO INPUT SELECT register (0x40). */ | 
 | 92 | #define MICRO_SELECT_INPUT_NORM        0x00 | 
 | 93 | #define MICRO_SELECT_INPUT_MUTE        0x01 | 
 | 94 | #define MICRO_SELECT_INPUT_LIMIT       0x02 | 
 | 95 | #define MICRO_SELECT_INPUT_MASK        0x03 | 
 | 96 |  | 
 | 97 | #define MICRO_SELECT_PREAMPLI_G_0      0x00 | 
 | 98 | #define MICRO_SELECT_PREAMPLI_G_1      0x04 | 
 | 99 | #define MICRO_SELECT_PREAMPLI_G_2      0x08 | 
 | 100 | #define MICRO_SELECT_PREAMPLI_G_3      0x0C | 
 | 101 | #define MICRO_SELECT_PREAMPLI_MASK     0x0C | 
 | 102 | #define MICRO_SELECT_PREAMPLI_OFFSET   2 | 
 | 103 |  | 
 | 104 | #define MICRO_SELECT_RAISE_COMPR       0x10 | 
 | 105 |  | 
 | 106 | #define MICRO_SELECT_NOISE_T_52DB      0x00 | 
 | 107 | #define MICRO_SELECT_NOISE_T_42DB      0x20 | 
 | 108 | #define MICRO_SELECT_NOISE_T_32DB      0x40 | 
 | 109 | #define MICRO_SELECT_NOISE_T_MASK      0x60 | 
 | 110 |  | 
 | 111 | #define MICRO_SELECT_PHANTOM_ALIM      0x80 | 
 | 112 |  | 
 | 113 |  | 
 | 114 | #endif /* __VX222_H */ |