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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Robin Getz96f10502009-09-24 14:11:24 +00004 * Licensed under the GPL-2 or later
Bryan Wu1394f032007-05-06 14:50:22 -07005 */
6
Bryan Wu1394f032007-05-06 14:50:22 -07007#include <asm-generic/vmlinux.lds.h>
8#include <asm/mem_map.h>
Mike Frysinger520473b2007-07-12 12:20:20 +08009#include <asm/page.h>
Bernd Schmidt0fa63ad2007-07-25 10:19:59 +080010#include <asm/thread_info.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011
Bryan Wu1394f032007-05-06 14:50:22 -070012OUTPUT_FORMAT("elf32-bfin")
13ENTRY(__start)
14_jiffies = _jiffies_64;
15
Bryan Wu1394f032007-05-06 14:50:22 -070016SECTIONS
17{
Barry Songd86bfb12010-01-07 04:11:17 +000018#ifdef CONFIG_RAMKERNEL
Bryan Wu1394f032007-05-06 14:50:22 -070019 . = CONFIG_BOOT_LOAD;
Barry Songd86bfb12010-01-07 04:11:17 +000020#else
21 . = CONFIG_ROM_BASE;
22#endif
23
Mike Frysingerb7627ac2008-02-02 15:53:17 +080024 /* Neither the text, ro_data or bss section need to be aligned
25 * So pack them back to back
26 */
Bryan Wu1394f032007-05-06 14:50:22 -070027 .text :
28 {
Mike Frysingerde6a9522007-06-11 17:27:05 +080029 __text = .;
30 _text = .;
31 __stext = .;
Sam Ravnborg76647092007-05-13 00:31:33 +020032 TEXT_TEXT
Robin Getzb8d0c772009-03-31 13:40:52 +000033#ifndef CONFIG_SCHEDULE_L1
Bryan Wu1394f032007-05-06 14:50:22 -070034 SCHED_TEXT
Robin Getzb8d0c772009-03-31 13:40:52 +000035#endif
Mike Frysingerde6a9522007-06-11 17:27:05 +080036 LOCK_TEXT
Mike Frysinger1ee76d72009-06-10 04:45:29 -040037 IRQENTRY_TEXT
Mike Frysinger27d875f2007-08-27 16:08:53 +080038 KPROBES_TEXT
Barry Songd86bfb12010-01-07 04:11:17 +000039#ifdef CONFIG_ROMKERNEL
40 __sinittext = .;
41 INIT_TEXT
42 __einittext = .;
43 EXIT_TEXT
44#endif
Mike Frysinger27d875f2007-08-27 16:08:53 +080045 *(.text.*)
Bryan Wu1394f032007-05-06 14:50:22 -070046 *(.fixup)
Bryan Wu1394f032007-05-06 14:50:22 -070047
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +080048#if !L1_CODE_LENGTH
49 *(.l1.text)
50#endif
51
Mike Frysingerde6a9522007-06-11 17:27:05 +080052 . = ALIGN(16);
53 ___start___ex_table = .;
54 *(__ex_table)
55 ___stop___ex_table = .;
56
Bryan Wu1394f032007-05-06 14:50:22 -070057 __etext = .;
Mike Frysingerde6a9522007-06-11 17:27:05 +080058 }
Bryan Wu1394f032007-05-06 14:50:22 -070059
Bernd Schmidt6f985292009-01-07 23:14:39 +080060 NOTES
61
Mike Frysingerb7627ac2008-02-02 15:53:17 +080062 /* Just in case the first read only is a 32-bit access */
63 RO_DATA(4)
Barry Songd86bfb12010-01-07 04:11:17 +000064 __rodata_end = .;
Mike Frysingerb7627ac2008-02-02 15:53:17 +080065
Barry Songd86bfb12010-01-07 04:11:17 +000066#ifdef CONFIG_ROMKERNEL
67 . = CONFIG_BOOT_LOAD;
68 .bss : AT(__rodata_end)
69#else
Mike Frysingerb7627ac2008-02-02 15:53:17 +080070 .bss :
Barry Songd86bfb12010-01-07 04:11:17 +000071#endif
Mike Frysingerb7627ac2008-02-02 15:53:17 +080072 {
73 . = ALIGN(4);
74 ___bss_start = .;
75 *(.bss .bss.*)
76 *(COMMON)
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +080077#if !L1_DATA_A_LENGTH
78 *(.l1.bss)
79#endif
80#if !L1_DATA_B_LENGTH
81 *(.l1.bss.B)
82#endif
Mike Frysinger13752042008-08-06 17:10:57 +080083 . = ALIGN(4);
Mike Frysingerb7627ac2008-02-02 15:53:17 +080084 ___bss_stop = .;
85 }
Mike Frysingerde6a9522007-06-11 17:27:05 +080086
Barry Songd86bfb12010-01-07 04:11:17 +000087#if defined(CONFIG_ROMKERNEL)
88 .data : AT(LOADADDR(.bss) + SIZEOF(.bss))
89#else
Mike Frysingerde6a9522007-06-11 17:27:05 +080090 .data :
Barry Songd86bfb12010-01-07 04:11:17 +000091#endif
Mike Frysingerde6a9522007-06-11 17:27:05 +080092 {
93 __sdata = .;
Mike Frysingerb7627ac2008-02-02 15:53:17 +080094 /* This gets done first, so the glob doesn't suck it in */
Tim Abbott4a5e3512009-09-24 10:36:23 -040095 CACHELINE_ALIGNED_DATA(32)
Mike Frysingerde6a9522007-06-11 17:27:05 +080096
Sonic Zhangb85b82d2008-04-24 06:13:37 +080097#if !L1_DATA_A_LENGTH
98 . = ALIGN(32);
99 *(.data_l1.cacheline_aligned)
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800100 *(.l1.data)
101#endif
102#if !L1_DATA_B_LENGTH
103 *(.l1.data.B)
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800104#endif
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800105#if !L2_LENGTH
Sonic Zhang262c3822008-07-19 15:42:41 +0800106 . = ALIGN(32);
107 *(.data_l2.cacheline_aligned)
108 *(.l2.data)
109#endif
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800110
Mike Frysinger27d875f2007-08-27 16:08:53 +0800111 DATA_DATA
Mike Frysinger27d875f2007-08-27 16:08:53 +0800112 CONSTRUCTORS
113
Tim Abbott4a5e3512009-09-24 10:36:23 -0400114 INIT_TASK_DATA(THREAD_SIZE)
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800115
Mike Frysingerde6a9522007-06-11 17:27:05 +0800116 __edata = .;
117 }
Barry Songd86bfb12010-01-07 04:11:17 +0000118 __data_lma = LOADADDR(.data);
119 __data_len = SIZEOF(.data);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800120
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800121 /* The init section should be last, so when we free it, it goes into
122 * the general memory pool, and (hopefully) will decrease fragmentation
123 * a tiny bit. The init section has a _requirement_ that it be
124 * PAGE_SIZE aligned
125 */
126 . = ALIGN(PAGE_SIZE);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800127 ___init_begin = .;
Mike Frysinger27d875f2007-08-27 16:08:53 +0800128
Barry Songd86bfb12010-01-07 04:11:17 +0000129#ifdef CONFIG_RAMKERNEL
Tim Abbott4a5e3512009-09-24 10:36:23 -0400130 INIT_TEXT_SECTION(PAGE_SIZE)
Mike Frysinger70f12562009-06-07 17:18:25 -0400131
Jie Zhang0afc2722010-01-05 04:22:33 +0000132 /* We have to discard exit text and such at runtime, not link time, to
Mike Frysinger70f12562009-06-07 17:18:25 -0400133 * handle embedded cross-section references (alt instructions, bug
Jie Zhang0afc2722010-01-05 04:22:33 +0000134 * table, eh_frame, etc...). We need all of our .text up front and
135 * .data after it for PCREL call issues.
Mike Frysinger70f12562009-06-07 17:18:25 -0400136 */
137 .exit.text :
138 {
139 EXIT_TEXT
140 }
Jie Zhang0afc2722010-01-05 04:22:33 +0000141
142 . = ALIGN(16);
143 INIT_DATA_SECTION(16)
144 PERCPU(4)
145
Mike Frysinger70f12562009-06-07 17:18:25 -0400146 .exit.data :
147 {
148 EXIT_DATA
149 }
150
Tim Abbott4a5e3512009-09-24 10:36:23 -0400151 .text_l1 L1_CODE_START : AT(LOADADDR(.exit.data) + SIZEOF(.exit.data))
Barry Songd86bfb12010-01-07 04:11:17 +0000152#else
153 .init.data : AT(__data_lma + __data_len)
154 {
155 __sinitdata = .;
156 INIT_DATA
157 INIT_SETUP(16)
158 INIT_CALLS
159 CON_INITCALL
160 SECURITY_INITCALL
161 INIT_RAM_FS
162
163 . = ALIGN(4);
164 ___per_cpu_load = .;
165 ___per_cpu_start = .;
166 *(.data.percpu.first)
167 *(.data.percpu.page_aligned)
168 *(.data.percpu)
169 *(.data.percpu.shared_aligned)
170 ___per_cpu_end = .;
171
172 EXIT_DATA
173 __einitdata = .;
174 }
175 __init_data_lma = LOADADDR(.init.data);
176 __init_data_len = SIZEOF(.init.data);
177 __init_data_end = .;
178
179 .text_l1 L1_CODE_START : AT(__init_data_lma + __init_data_len)
180#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700181 {
182 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800183 __stext_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800184 *(.l1.text)
Robin Getzb8d0c772009-03-31 13:40:52 +0000185#ifdef CONFIG_SCHEDULE_L1
186 SCHED_TEXT
187#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700188 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800189 __etext_l1 = .;
190 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000191 __text_l1_lma = LOADADDR(.text_l1);
192 __text_l1_len = SIZEOF(.text_l1);
193 ASSERT (__text_l1_len <= L1_CODE_LENGTH, "L1 text overflow!")
Bryan Wu1394f032007-05-06 14:50:22 -0700194
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000195 .data_l1 L1_DATA_A_START : AT(__text_l1_lma + __text_l1_len)
Bryan Wu1394f032007-05-06 14:50:22 -0700196 {
197 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800198 __sdata_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800199 *(.l1.data)
Mike Frysingerde6a9522007-06-11 17:27:05 +0800200 __edata_l1 = .;
Bryan Wu1394f032007-05-06 14:50:22 -0700201
Bryan Wu1394f032007-05-06 14:50:22 -0700202 . = ALIGN(32);
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800203 *(.data_l1.cacheline_aligned)
Bryan Wu1394f032007-05-06 14:50:22 -0700204
205 . = ALIGN(4);
Sonic Zhang262c3822008-07-19 15:42:41 +0800206 __sbss_l1 = .;
207 *(.l1.bss)
208 . = ALIGN(4);
Mike Frysingerde6a9522007-06-11 17:27:05 +0800209 __ebss_l1 = .;
210 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000211 __data_l1_lma = LOADADDR(.data_l1);
212 __data_l1_len = SIZEOF(.data_l1);
213 ASSERT (__data_l1_len <= L1_DATA_A_LENGTH, "L1 data A overflow!")
Mike Frysingerde6a9522007-06-11 17:27:05 +0800214
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000215 .data_b_l1 L1_DATA_B_START : AT(__data_l1_lma + __data_l1_len)
Bryan Wu1394f032007-05-06 14:50:22 -0700216 {
217 . = ALIGN(4);
218 __sdata_b_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800219 *(.l1.data.B)
Bryan Wu1394f032007-05-06 14:50:22 -0700220 __edata_b_l1 = .;
221
222 . = ALIGN(4);
223 __sbss_b_l1 = .;
Mike Frysingerbc6e0fa2008-04-24 06:21:25 +0800224 *(.l1.bss.B)
Bryan Wu1394f032007-05-06 14:50:22 -0700225 . = ALIGN(4);
226 __ebss_b_l1 = .;
Mike Frysingerde6a9522007-06-11 17:27:05 +0800227 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000228 __data_b_l1_lma = LOADADDR(.data_b_l1);
229 __data_b_l1_len = SIZEOF(.data_b_l1);
230 ASSERT (__data_b_l1_len <= L1_DATA_B_LENGTH, "L1 data B overflow!")
Bryan Wu1394f032007-05-06 14:50:22 -0700231
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000232 .text_data_l2 L2_START : AT(__data_b_l1_lma + __data_b_l1_len)
Sonic Zhang262c3822008-07-19 15:42:41 +0800233 {
234 . = ALIGN(4);
235 __stext_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800236 *(.l2.text)
Sonic Zhang262c3822008-07-19 15:42:41 +0800237 . = ALIGN(4);
238 __etext_l2 = .;
239
240 . = ALIGN(4);
241 __sdata_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800242 *(.l2.data)
Sonic Zhang262c3822008-07-19 15:42:41 +0800243 __edata_l2 = .;
244
245 . = ALIGN(32);
246 *(.data_l2.cacheline_aligned)
247
248 . = ALIGN(4);
249 __sbss_l2 = .;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800250 *(.l2.bss)
Sonic Zhang262c3822008-07-19 15:42:41 +0800251 . = ALIGN(4);
252 __ebss_l2 = .;
253 }
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000254 __l2_lma = LOADADDR(.text_data_l2);
255 __l2_len = SIZEOF(.text_data_l2);
256 ASSERT (__l2_len <= L2_LENGTH, "L2 overflow!")
Bernd Schmidt6f985292009-01-07 23:14:39 +0800257
Mike Frysinger36208052007-10-30 12:00:02 +0800258 /* Force trailing alignment of our init section so that when we
259 * free our init memory, we don't leave behind a partial page.
260 */
Barry Songd86bfb12010-01-07 04:11:17 +0000261#ifdef CONFIG_RAMKERNEL
Mike Frysinger5cd82a62009-09-23 20:34:48 +0000262 . = __l2_lma + __l2_len;
Barry Songd86bfb12010-01-07 04:11:17 +0000263#else
264 . = __init_data_end;
265#endif
Mike Frysinger36208052007-10-30 12:00:02 +0800266 . = ALIGN(PAGE_SIZE);
267 ___init_end = .;
Bryan Wu1394f032007-05-06 14:50:22 -0700268
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800269 __end =.;
Mike Frysingerde6a9522007-06-11 17:27:05 +0800270
Mike Frysingerc11b5772007-10-11 00:12:41 +0800271 STABS_DEBUG
272
273 DWARF_DEBUG
274
Tejun Heo023bf6f2009-07-09 11:27:40 +0900275 DISCARDS
Bryan Wu1394f032007-05-06 14:50:22 -0700276}