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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
802static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
803 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
804 .idle_supported = 1,
805 .suspend_supported = 1,
806 .idle_enabled = 0,
807 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700808 },
809
810 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
811 .idle_supported = 1,
812 .suspend_supported = 1,
813 .idle_enabled = 0,
814 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815 },
816
817 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
818 .idle_supported = 1,
819 .suspend_supported = 1,
820 .idle_enabled = 1,
821 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700822 },
823
824 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
825 .idle_supported = 1,
826 .suspend_supported = 1,
827 .idle_enabled = 0,
828 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 },
830
831 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
832 .idle_supported = 1,
833 .suspend_supported = 1,
834 .idle_enabled = 0,
835 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700836 },
837
838 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
839 .idle_supported = 1,
840 .suspend_supported = 1,
841 .idle_enabled = 1,
842 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843 },
844};
845
846static struct msm_cpuidle_state msm_cstates[] __initdata = {
847 {0, 0, "C0", "WFI",
848 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
849
850 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
851 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
852
853 {0, 2, "C2", "POWER_COLLAPSE",
854 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
855
856 {1, 0, "C0", "WFI",
857 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
858
859 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
860 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
861};
862
863static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
864 {
865 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
866 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
867 true,
868 1, 8000, 100000, 1,
869 },
870
871 {
872 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
873 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
874 true,
875 1500, 5000, 60100000, 3000,
876 },
877
878 {
879 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
880 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
881 false,
882 1800, 5000, 60350000, 3500,
883 },
884 {
885 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
886 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
887 false,
888 3800, 4500, 65350000, 5500,
889 },
890
891 {
892 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
893 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
894 false,
895 2800, 2500, 66850000, 4800,
896 },
897
898 {
899 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
900 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
901 false,
902 4800, 2000, 71850000, 6800,
903 },
904
905 {
906 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
907 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
908 false,
909 6800, 500, 75850000, 8800,
910 },
911
912 {
913 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
914 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
915 false,
916 7800, 0, 76350000, 9800,
917 },
918};
919
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600920static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
921 .mode = MSM_PM_BOOT_CONFIG_TZ,
922};
923
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700924#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
925
926#define ISP1763_INT_GPIO 117
927#define ISP1763_RST_GPIO 152
928static struct resource isp1763_resources[] = {
929 [0] = {
930 .flags = IORESOURCE_MEM,
931 .start = 0x1D000000,
932 .end = 0x1D005FFF, /* 24KB */
933 },
934 [1] = {
935 .flags = IORESOURCE_IRQ,
936 },
937};
938static void __init msm8x60_cfg_isp1763(void)
939{
940 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
941 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
942}
943
944static int isp1763_setup_gpio(int enable)
945{
946 int status = 0;
947
948 if (enable) {
949 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
950 if (status) {
951 pr_err("%s:Failed to request GPIO %d\n",
952 __func__, ISP1763_INT_GPIO);
953 return status;
954 }
955 status = gpio_direction_input(ISP1763_INT_GPIO);
956 if (status) {
957 pr_err("%s:Failed to configure GPIO %d\n",
958 __func__, ISP1763_INT_GPIO);
959 goto gpio_free_int;
960 }
961 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
962 if (status) {
963 pr_err("%s:Failed to request GPIO %d\n",
964 __func__, ISP1763_RST_GPIO);
965 goto gpio_free_int;
966 }
967 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
968 if (status) {
969 pr_err("%s:Failed to configure GPIO %d\n",
970 __func__, ISP1763_RST_GPIO);
971 goto gpio_free_rst;
972 }
973 pr_debug("\nISP GPIO configuration done\n");
974 return status;
975 }
976
977gpio_free_rst:
978 gpio_free(ISP1763_RST_GPIO);
979gpio_free_int:
980 gpio_free(ISP1763_INT_GPIO);
981
982 return status;
983}
984static struct isp1763_platform_data isp1763_pdata = {
985 .reset_gpio = ISP1763_RST_GPIO,
986 .setup_gpio = isp1763_setup_gpio
987};
988
989static struct platform_device isp1763_device = {
990 .name = "isp1763_usb",
991 .num_resources = ARRAY_SIZE(isp1763_resources),
992 .resource = isp1763_resources,
993 .dev = {
994 .platform_data = &isp1763_pdata
995 }
996};
997#endif
998
999#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301000static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001001static struct regulator *ldo6_3p3;
1002static struct regulator *ldo7_1p8;
1003static struct regulator *vdd_cx;
1004#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301005#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001006notify_vbus_state notify_vbus_state_func_ptr;
1007static int usb_phy_susp_dig_vol = 750000;
1008static int pmic_id_notif_supported;
1009
1010#ifdef CONFIG_USB_EHCI_MSM_72K
1011#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1012struct delayed_work pmic_id_det;
1013
1014static int __init usb_id_pin_rework_setup(char *support)
1015{
1016 if (strncmp(support, "true", 4) == 0)
1017 pmic_id_notif_supported = 1;
1018
1019 return 1;
1020}
1021__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1022
1023static void pmic_id_detect(struct work_struct *w)
1024{
1025 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1026 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1027
1028 if (notify_vbus_state_func_ptr)
1029 (*notify_vbus_state_func_ptr) (val);
1030}
1031
1032static irqreturn_t pmic_id_on_irq(int irq, void *data)
1033{
1034 /*
1035 * Spurious interrupts are observed on pmic gpio line
1036 * even though there is no state change on USB ID. Schedule the
1037 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001038 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001041 return IRQ_HANDLED;
1042}
1043
Anji jonnalaae745e92011-11-14 18:34:31 +05301044static int msm_hsusb_phy_id_setup_init(int init)
1045{
1046 unsigned ret;
1047
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301048 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1049 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1050 .level = PM8901_MPP_DIG_LEVEL_L5,
1051 };
1052
Anji jonnalaae745e92011-11-14 18:34:31 +05301053 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301054 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1055 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1056 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301057 if (ret < 0)
1058 pr_err("%s:MPP2 configuration failed\n", __func__);
1059 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301060 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1061 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1062 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301063 if (ret < 0)
1064 pr_err("%s:MPP2 un config failed\n", __func__);
1065 }
1066 return ret;
1067}
1068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1070{
1071 unsigned ret = -ENODEV;
1072
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301073 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301074 .direction = PM_GPIO_DIR_IN,
1075 .pull = PM_GPIO_PULL_UP_1P5,
1076 .function = PM_GPIO_FUNC_NORMAL,
1077 .vin_sel = 2,
1078 .inv_int_pol = 0,
1079 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301080 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301081 .direction = PM_GPIO_DIR_IN,
1082 .pull = PM_GPIO_PULL_NO,
1083 .function = PM_GPIO_FUNC_NORMAL,
1084 .vin_sel = 2,
1085 .inv_int_pol = 0,
1086 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001087 if (!callback)
1088 return -EINVAL;
1089
1090 if (machine_is_msm8x60_fluid())
1091 return -ENOTSUPP;
1092
1093 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1094 pr_debug("%s: USB_ID pin is not routed to PMIC"
1095 "on V1 surf/ffa\n", __func__);
1096 return -ENOTSUPP;
1097 }
1098
Manu Gautam62158eb2011-11-24 16:20:46 +05301099 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1100 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001101 pr_debug("%s: USB_ID is not routed to PMIC"
1102 "on V2 ffa\n", __func__);
1103 return -ENOTSUPP;
1104 }
1105
1106 usb_phy_susp_dig_vol = 500000;
1107
1108 if (init) {
1109 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301110 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301111 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1112 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301113 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301114 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301115 __func__, ret);
1116 return ret;
1117 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001118 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1119 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1120 "msm_otg_id", NULL);
1121 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001122 pr_err("%s:pmic_usb_id interrupt registration failed",
1123 __func__);
1124 return ret;
1125 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301126 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001127 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301128 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001129 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301130 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1131 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301132 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301133 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301134 __func__, ret);
1135 return ret;
1136 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301137 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 cancel_delayed_work_sync(&pmic_id_det);
1139 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001140 }
1141 return 0;
1142}
1143#endif
1144
1145#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1146#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1147static int msm_hsusb_init_vddcx(int init)
1148{
1149 int ret = 0;
1150
1151 if (init) {
1152 vdd_cx = regulator_get(NULL, "8058_s1");
1153 if (IS_ERR(vdd_cx)) {
1154 return PTR_ERR(vdd_cx);
1155 }
1156
1157 ret = regulator_set_voltage(vdd_cx,
1158 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1159 USB_PHY_MAX_VDD_DIG_VOL);
1160 if (ret) {
1161 pr_err("%s: unable to set the voltage for regulator"
1162 "vdd_cx\n", __func__);
1163 regulator_put(vdd_cx);
1164 return ret;
1165 }
1166
1167 ret = regulator_enable(vdd_cx);
1168 if (ret) {
1169 pr_err("%s: unable to enable regulator"
1170 "vdd_cx\n", __func__);
1171 regulator_put(vdd_cx);
1172 }
1173 } else {
1174 ret = regulator_disable(vdd_cx);
1175 if (ret) {
1176 pr_err("%s: Unable to disable the regulator:"
1177 "vdd_cx\n", __func__);
1178 return ret;
1179 }
1180
1181 regulator_put(vdd_cx);
1182 }
1183
1184 return ret;
1185}
1186
1187static int msm_hsusb_config_vddcx(int high)
1188{
1189 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1190 int min_vol;
1191 int ret;
1192
1193 if (high)
1194 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1195 else
1196 min_vol = usb_phy_susp_dig_vol;
1197
1198 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1199 if (ret) {
1200 pr_err("%s: unable to set the voltage for regulator"
1201 "vdd_cx\n", __func__);
1202 return ret;
1203 }
1204
1205 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1206
1207 return ret;
1208}
1209
1210#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1211#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1212#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1213#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1214
1215#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1216#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1217#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1218#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1219static int msm_hsusb_ldo_init(int init)
1220{
1221 int rc = 0;
1222
1223 if (init) {
1224 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1225 if (IS_ERR(ldo6_3p3))
1226 return PTR_ERR(ldo6_3p3);
1227
1228 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1229 if (IS_ERR(ldo7_1p8)) {
1230 rc = PTR_ERR(ldo7_1p8);
1231 goto put_3p3;
1232 }
1233
1234 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1235 USB_PHY_3P3_VOL_MAX);
1236 if (rc) {
1237 pr_err("%s: Unable to set voltage level for"
1238 "ldo6_3p3 regulator\n", __func__);
1239 goto put_1p8;
1240 }
1241 rc = regulator_enable(ldo6_3p3);
1242 if (rc) {
1243 pr_err("%s: Unable to enable the regulator:"
1244 "ldo6_3p3\n", __func__);
1245 goto put_1p8;
1246 }
1247 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1248 USB_PHY_1P8_VOL_MAX);
1249 if (rc) {
1250 pr_err("%s: Unable to set voltage level for"
1251 "ldo7_1p8 regulator\n", __func__);
1252 goto disable_3p3;
1253 }
1254 rc = regulator_enable(ldo7_1p8);
1255 if (rc) {
1256 pr_err("%s: Unable to enable the regulator:"
1257 "ldo7_1p8\n", __func__);
1258 goto disable_3p3;
1259 }
1260
1261 return 0;
1262 }
1263
1264 regulator_disable(ldo7_1p8);
1265disable_3p3:
1266 regulator_disable(ldo6_3p3);
1267put_1p8:
1268 regulator_put(ldo7_1p8);
1269put_3p3:
1270 regulator_put(ldo6_3p3);
1271 return rc;
1272}
1273
1274static int msm_hsusb_ldo_enable(int on)
1275{
1276 int ret = 0;
1277
1278 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1279 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1280 return -ENODEV;
1281 }
1282
1283 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1284 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1285 return -ENODEV;
1286 }
1287
1288 if (on) {
1289 ret = regulator_set_optimum_mode(ldo7_1p8,
1290 USB_PHY_1P8_HPM_LOAD);
1291 if (ret < 0) {
1292 pr_err("%s: Unable to set HPM of the regulator:"
1293 "ldo7_1p8\n", __func__);
1294 return ret;
1295 }
1296 ret = regulator_set_optimum_mode(ldo6_3p3,
1297 USB_PHY_3P3_HPM_LOAD);
1298 if (ret < 0) {
1299 pr_err("%s: Unable to set HPM of the regulator:"
1300 "ldo6_3p3\n", __func__);
1301 regulator_set_optimum_mode(ldo7_1p8,
1302 USB_PHY_1P8_LPM_LOAD);
1303 return ret;
1304 }
1305 } else {
1306 ret = regulator_set_optimum_mode(ldo7_1p8,
1307 USB_PHY_1P8_LPM_LOAD);
1308 if (ret < 0)
1309 pr_err("%s: Unable to set LPM of the regulator:"
1310 "ldo7_1p8\n", __func__);
1311 ret = regulator_set_optimum_mode(ldo6_3p3,
1312 USB_PHY_3P3_LPM_LOAD);
1313 if (ret < 0)
1314 pr_err("%s: Unable to set LPM of the regulator:"
1315 "ldo6_3p3\n", __func__);
1316 }
1317
1318 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1319 return ret < 0 ? ret : 0;
1320 }
1321#endif
1322#ifdef CONFIG_USB_EHCI_MSM_72K
1323#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1324static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1325{
1326 static int vbus_is_on;
1327
1328 /* If VBUS is already on (or off), do nothing. */
1329 if (on == vbus_is_on)
1330 return;
1331 smb137b_otg_power(on);
1332 vbus_is_on = on;
1333}
1334#endif
1335static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1336{
1337 static struct regulator *votg_5v_switch;
1338 static struct regulator *ext_5v_reg;
1339 static int vbus_is_on;
1340
1341 /* If VBUS is already on (or off), do nothing. */
1342 if (on == vbus_is_on)
1343 return;
1344
1345 if (!votg_5v_switch) {
1346 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1347 if (IS_ERR(votg_5v_switch)) {
1348 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1349 return;
1350 }
1351 }
1352 if (!ext_5v_reg) {
1353 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1354 if (IS_ERR(ext_5v_reg)) {
1355 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1356 return;
1357 }
1358 }
1359 if (on) {
1360 if (regulator_enable(ext_5v_reg)) {
1361 pr_err("%s: Unable to enable the regulator:"
1362 " ext_5v_reg\n", __func__);
1363 return;
1364 }
1365 if (regulator_enable(votg_5v_switch)) {
1366 pr_err("%s: Unable to enable the regulator:"
1367 " votg_5v_switch\n", __func__);
1368 return;
1369 }
1370 } else {
1371 if (regulator_disable(votg_5v_switch))
1372 pr_err("%s: Unable to enable the regulator:"
1373 " votg_5v_switch\n", __func__);
1374 if (regulator_disable(ext_5v_reg))
1375 pr_err("%s: Unable to enable the regulator:"
1376 " ext_5v_reg\n", __func__);
1377 }
1378
1379 vbus_is_on = on;
1380}
1381
1382static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1383 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1384 .power_budget = 390,
1385};
1386#endif
1387
1388#ifdef CONFIG_BATTERY_MSM8X60
1389static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1390 int init)
1391{
1392 int ret = -ENOTSUPP;
1393
1394#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1395 if (machine_is_msm8x60_fluid()) {
1396 if (init)
1397 msm_charger_register_vbus_sn(callback);
1398 else
1399 msm_charger_unregister_vbus_sn(callback);
1400 return 0;
1401 }
1402#endif
1403 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1404 * hence, irrespective of either peripheral only mode or
1405 * OTG (host and peripheral) modes, can depend on pmic for
1406 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001407 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001408 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1409 && (machine_is_msm8x60_surf() ||
1410 pmic_id_notif_supported)) {
1411 if (init)
1412 ret = msm_charger_register_vbus_sn(callback);
1413 else {
1414 msm_charger_unregister_vbus_sn(callback);
1415 ret = 0;
1416 }
1417 } else {
1418#if !defined(CONFIG_USB_EHCI_MSM_72K)
1419 if (init)
1420 ret = msm_charger_register_vbus_sn(callback);
1421 else {
1422 msm_charger_unregister_vbus_sn(callback);
1423 ret = 0;
1424 }
1425#endif
1426 }
1427 return ret;
1428}
1429#endif
1430
1431#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1432static struct msm_otg_platform_data msm_otg_pdata = {
1433 /* if usb link is in sps there is no need for
1434 * usb pclk as dayatona fabric clock will be
1435 * used instead
1436 */
1437 .pclk_src_name = "dfab_usb_hs_clk",
1438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002673#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2674#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002675#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002676
2677#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2678#define MSM_ION_HEAP_NUM 5
2679#else
2680#define MSM_ION_HEAP_NUM 2
2681#endif
2682
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002683static unsigned fb_size;
2684static int __init fb_size_setup(char *p)
2685{
2686 fb_size = memparse(p, NULL);
2687 return 0;
2688}
2689early_param("fb_size", fb_size_setup);
2690
2691static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2692static int __init pmem_kernel_ebi1_size_setup(char *p)
2693{
2694 pmem_kernel_ebi1_size = memparse(p, NULL);
2695 return 0;
2696}
2697early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2698
2699#ifdef CONFIG_ANDROID_PMEM
2700static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2701static int __init pmem_sf_size_setup(char *p)
2702{
2703 pmem_sf_size = memparse(p, NULL);
2704 return 0;
2705}
2706early_param("pmem_sf_size", pmem_sf_size_setup);
2707
2708static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2709
2710static int __init pmem_adsp_size_setup(char *p)
2711{
2712 pmem_adsp_size = memparse(p, NULL);
2713 return 0;
2714}
2715early_param("pmem_adsp_size", pmem_adsp_size_setup);
2716
2717static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2718
2719static int __init pmem_audio_size_setup(char *p)
2720{
2721 pmem_audio_size = memparse(p, NULL);
2722 return 0;
2723}
2724early_param("pmem_audio_size", pmem_audio_size_setup);
2725#endif
2726
2727static struct resource msm_fb_resources[] = {
2728 {
2729 .flags = IORESOURCE_DMA,
2730 }
2731};
2732
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002733static int msm_fb_detect_panel(const char *name)
2734{
2735 if (machine_is_msm8x60_fluid()) {
2736 uint32_t soc_platform_version = socinfo_get_platform_version();
2737 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2738#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2739 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002740 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2741 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002742 return 0;
2743#endif
2744 } else { /*P3 and up use AUO panel */
2745#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2746 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002747 strnlen(LCDC_AUO_PANEL_NAME,
2748 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002749 return 0;
2750#endif
2751 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002752#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2753 } else if machine_is_msm8x60_dragon() {
2754 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002755 strnlen(LCDC_NT35582_PANEL_NAME,
2756 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002757 return 0;
2758#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002759 } else {
2760 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002761 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2762 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002763 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002764
2765#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2766 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2767 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2768 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2769 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2770 PANEL_NAME_MAX_LEN)))
2771 return 0;
2772
2773 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2774 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2775 PANEL_NAME_MAX_LEN)))
2776 return 0;
2777
2778 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2779 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2780 PANEL_NAME_MAX_LEN)))
2781 return 0;
2782#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002783 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002784
2785 if (!strncmp(name, HDMI_PANEL_NAME,
2786 strnlen(HDMI_PANEL_NAME,
2787 PANEL_NAME_MAX_LEN)))
2788 return 0;
2789
2790 if (!strncmp(name, TVOUT_PANEL_NAME,
2791 strnlen(TVOUT_PANEL_NAME,
2792 PANEL_NAME_MAX_LEN)))
2793 return 0;
2794
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002795 pr_warning("%s: not supported '%s'", __func__, name);
2796 return -ENODEV;
2797}
2798
2799static struct msm_fb_platform_data msm_fb_pdata = {
2800 .detect_client = msm_fb_detect_panel,
2801};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002802
2803static struct platform_device msm_fb_device = {
2804 .name = "msm_fb",
2805 .id = 0,
2806 .num_resources = ARRAY_SIZE(msm_fb_resources),
2807 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002808 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002809};
2810
2811#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002812#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002813static struct android_pmem_platform_data android_pmem_pdata = {
2814 .name = "pmem",
2815 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2816 .cached = 1,
2817 .memory_type = MEMTYPE_EBI1,
2818};
2819
2820static struct platform_device android_pmem_device = {
2821 .name = "android_pmem",
2822 .id = 0,
2823 .dev = {.platform_data = &android_pmem_pdata},
2824};
2825
2826static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2827 .name = "pmem_adsp",
2828 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2829 .cached = 0,
2830 .memory_type = MEMTYPE_EBI1,
2831};
2832
2833static struct platform_device android_pmem_adsp_device = {
2834 .name = "android_pmem",
2835 .id = 2,
2836 .dev = { .platform_data = &android_pmem_adsp_pdata },
2837};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002838#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002839static struct android_pmem_platform_data android_pmem_audio_pdata = {
2840 .name = "pmem_audio",
2841 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2842 .cached = 0,
2843 .memory_type = MEMTYPE_EBI1,
2844};
2845
2846static struct platform_device android_pmem_audio_device = {
2847 .name = "android_pmem",
2848 .id = 4,
2849 .dev = { .platform_data = &android_pmem_audio_pdata },
2850};
2851
Laura Abbott1e36a022011-06-22 17:08:13 -07002852#define PMEM_BUS_WIDTH(_bw) \
2853 { \
2854 .vectors = &(struct msm_bus_vectors){ \
2855 .src = MSM_BUS_MASTER_AMPSS_M0, \
2856 .dst = MSM_BUS_SLAVE_SMI, \
2857 .ib = (_bw), \
2858 .ab = 0, \
2859 }, \
2860 .num_paths = 1, \
2861 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002862
2863static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002864 [0] = PMEM_BUS_WIDTH(0), /* Off */
2865 [1] = PMEM_BUS_WIDTH(1), /* On */
2866};
2867
2868static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002869 .usecase = mem_smi_table,
2870 .num_usecases = ARRAY_SIZE(mem_smi_table),
2871 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002872};
2873
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002874int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002875{
2876 int bus_id = (int) data;
2877
2878 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002879 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002880}
2881
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002882int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002883{
2884 int bus_id = (int) data;
2885
2886 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002887 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002888}
2889
Alex Bird199980e2011-10-21 11:29:27 -07002890void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002891{
2892 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2893}
Olav Hauganee0f7802011-12-19 13:28:57 -08002894#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002895static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2896 .name = "pmem_smipool",
2897 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2898 .cached = 0,
2899 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002900 .request_region = request_smi_region,
2901 .release_region = release_smi_region,
2902 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002903 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002904};
2905static struct platform_device android_pmem_smipool_device = {
2906 .name = "android_pmem",
2907 .id = 7,
2908 .dev = { .platform_data = &android_pmem_smipool_pdata },
2909};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002910#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002911#endif
2912
2913#define GPIO_DONGLE_PWR_EN 258
2914static void setup_display_power(void);
2915static int lcdc_vga_enabled;
2916static int vga_enable_request(int enable)
2917{
2918 if (enable)
2919 lcdc_vga_enabled = 1;
2920 else
2921 lcdc_vga_enabled = 0;
2922 setup_display_power();
2923
2924 return 0;
2925}
2926
2927#define GPIO_BACKLIGHT_PWM0 0
2928#define GPIO_BACKLIGHT_PWM1 1
2929
2930static int pmic_backlight_gpio[2]
2931 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2932static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2933 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2934 .vga_switch = vga_enable_request,
2935};
2936
2937static struct platform_device lcdc_samsung_panel_device = {
2938 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2939 .id = 0,
2940 .dev = {
2941 .platform_data = &lcdc_samsung_panel_data,
2942 }
2943};
2944#if (!defined(CONFIG_SPI_QUP)) && \
2945 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2946 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2947
2948static int lcdc_spi_gpio_array_num[] = {
2949 LCDC_SPI_GPIO_CLK,
2950 LCDC_SPI_GPIO_CS,
2951 LCDC_SPI_GPIO_MOSI,
2952};
2953
2954static uint32_t lcdc_spi_gpio_config_data[] = {
2955 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2956 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2957 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2958 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2959 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2960 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2961};
2962
2963static void lcdc_config_spi_gpios(int enable)
2964{
2965 int n;
2966 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2967 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2968}
2969#endif
2970
2971#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2972#ifdef CONFIG_SPI_QUP
2973static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2974 {
2975 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2976 .mode = SPI_MODE_3,
2977 .bus_num = 1,
2978 .chip_select = 0,
2979 .max_speed_hz = 10800000,
2980 }
2981};
2982#endif /* CONFIG_SPI_QUP */
2983
2984static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2985#ifndef CONFIG_SPI_QUP
2986 .panel_config_gpio = lcdc_config_spi_gpios,
2987 .gpio_num = lcdc_spi_gpio_array_num,
2988#endif
2989};
2990
2991static struct platform_device lcdc_samsung_oled_panel_device = {
2992 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2993 .id = 0,
2994 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2995};
2996#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2997
2998#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2999#ifdef CONFIG_SPI_QUP
3000static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3001 {
3002 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3003 .mode = SPI_MODE_3,
3004 .bus_num = 1,
3005 .chip_select = 0,
3006 .max_speed_hz = 10800000,
3007 }
3008};
3009#endif
3010
3011static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3012#ifndef CONFIG_SPI_QUP
3013 .panel_config_gpio = lcdc_config_spi_gpios,
3014 .gpio_num = lcdc_spi_gpio_array_num,
3015#endif
3016};
3017
3018static struct platform_device lcdc_auo_wvga_panel_device = {
3019 .name = LCDC_AUO_PANEL_NAME,
3020 .id = 0,
3021 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3022};
3023#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3024
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003025#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3026
3027#define GPIO_NT35582_RESET 94
3028#define GPIO_NT35582_BL_EN_HW_PIN 24
3029#define GPIO_NT35582_BL_EN \
3030 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3031
3032static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3033
3034static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3035 .gpio_num = lcdc_nt35582_pmic_gpio,
3036};
3037
3038static struct platform_device lcdc_nt35582_panel_device = {
3039 .name = LCDC_NT35582_PANEL_NAME,
3040 .id = 0,
3041 .dev = {
3042 .platform_data = &lcdc_nt35582_panel_data,
3043 }
3044};
3045
3046static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3047 {
3048 .modalias = "lcdc_nt35582_spi",
3049 .mode = SPI_MODE_0,
3050 .bus_num = 0,
3051 .chip_select = 0,
3052 .max_speed_hz = 1100000,
3053 }
3054};
3055#endif
3056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003057#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3058static struct resource hdmi_msm_resources[] = {
3059 {
3060 .name = "hdmi_msm_qfprom_addr",
3061 .start = 0x00700000,
3062 .end = 0x007060FF,
3063 .flags = IORESOURCE_MEM,
3064 },
3065 {
3066 .name = "hdmi_msm_hdmi_addr",
3067 .start = 0x04A00000,
3068 .end = 0x04A00FFF,
3069 .flags = IORESOURCE_MEM,
3070 },
3071 {
3072 .name = "hdmi_msm_irq",
3073 .start = HDMI_IRQ,
3074 .end = HDMI_IRQ,
3075 .flags = IORESOURCE_IRQ,
3076 },
3077};
3078
3079static int hdmi_enable_5v(int on);
3080static int hdmi_core_power(int on, int show);
3081static int hdmi_cec_power(int on);
3082
3083static struct msm_hdmi_platform_data hdmi_msm_data = {
3084 .irq = HDMI_IRQ,
3085 .enable_5v = hdmi_enable_5v,
3086 .core_power = hdmi_core_power,
3087 .cec_power = hdmi_cec_power,
3088};
3089
3090static struct platform_device hdmi_msm_device = {
3091 .name = "hdmi_msm",
3092 .id = 0,
3093 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3094 .resource = hdmi_msm_resources,
3095 .dev.platform_data = &hdmi_msm_data,
3096};
3097#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3098
3099#ifdef CONFIG_FB_MSM_MIPI_DSI
3100static struct platform_device mipi_dsi_toshiba_panel_device = {
3101 .name = "mipi_toshiba",
3102 .id = 0,
3103};
3104
3105#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3106
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003107static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003108 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003109 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003110};
3111
3112static struct platform_device mipi_dsi_novatek_panel_device = {
3113 .name = "mipi_novatek",
3114 .id = 0,
3115 .dev = {
3116 .platform_data = &novatek_pdata,
3117 }
3118};
3119#endif
3120
3121static void __init msm8x60_allocate_memory_regions(void)
3122{
3123 void *addr;
3124 unsigned long size;
3125
3126 size = MSM_FB_SIZE;
3127 addr = alloc_bootmem_align(size, 0x1000);
3128 msm_fb_resources[0].start = __pa(addr);
3129 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3130 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3131 size, addr, __pa(addr));
3132
3133}
3134
3135#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3136 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3137/*virtual key support */
3138static ssize_t tma300_vkeys_show(struct kobject *kobj,
3139 struct kobj_attribute *attr, char *buf)
3140{
3141 return sprintf(buf,
3142 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3143 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3146 "\n");
3147}
3148
3149static struct kobj_attribute tma300_vkeys_attr = {
3150 .attr = {
3151 .mode = S_IRUGO,
3152 },
3153 .show = &tma300_vkeys_show,
3154};
3155
3156static struct attribute *tma300_properties_attrs[] = {
3157 &tma300_vkeys_attr.attr,
3158 NULL
3159};
3160
3161static struct attribute_group tma300_properties_attr_group = {
3162 .attrs = tma300_properties_attrs,
3163};
3164
3165static struct kobject *properties_kobj;
3166
3167
3168
3169#define CYTTSP_TS_GPIO_IRQ 61
3170static int cyttsp_platform_init(struct i2c_client *client)
3171{
3172 int rc = -EINVAL;
3173 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3174
3175 if (machine_is_msm8x60_fluid()) {
3176 pm8058_l5 = regulator_get(NULL, "8058_l5");
3177 if (IS_ERR(pm8058_l5)) {
3178 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3179 __func__, PTR_ERR(pm8058_l5));
3180 rc = PTR_ERR(pm8058_l5);
3181 return rc;
3182 }
3183 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3184 if (rc) {
3185 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3186 __func__, rc);
3187 goto reg_l5_put;
3188 }
3189
3190 rc = regulator_enable(pm8058_l5);
3191 if (rc) {
3192 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3193 __func__, rc);
3194 goto reg_l5_put;
3195 }
3196 }
3197 /* vote for s3 to enable i2c communication lines */
3198 pm8058_s3 = regulator_get(NULL, "8058_s3");
3199 if (IS_ERR(pm8058_s3)) {
3200 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3201 __func__, PTR_ERR(pm8058_s3));
3202 rc = PTR_ERR(pm8058_s3);
3203 goto reg_l5_disable;
3204 }
3205
3206 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3207 if (rc) {
3208 pr_err("%s: regulator_set_voltage() = %d\n",
3209 __func__, rc);
3210 goto reg_s3_put;
3211 }
3212
3213 rc = regulator_enable(pm8058_s3);
3214 if (rc) {
3215 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3216 __func__, rc);
3217 goto reg_s3_put;
3218 }
3219
3220 /* wait for vregs to stabilize */
3221 usleep_range(10000, 10000);
3222
3223 /* check this device active by reading first byte/register */
3224 rc = i2c_smbus_read_byte_data(client, 0x01);
3225 if (rc < 0) {
3226 pr_err("%s: i2c sanity check failed\n", __func__);
3227 goto reg_s3_disable;
3228 }
3229
3230 /* virtual keys */
3231 if (machine_is_msm8x60_fluid()) {
3232 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3233 properties_kobj = kobject_create_and_add("board_properties",
3234 NULL);
3235 if (properties_kobj)
3236 rc = sysfs_create_group(properties_kobj,
3237 &tma300_properties_attr_group);
3238 if (!properties_kobj || rc)
3239 pr_err("%s: failed to create board_properties\n",
3240 __func__);
3241 }
3242 return CY_OK;
3243
3244reg_s3_disable:
3245 regulator_disable(pm8058_s3);
3246reg_s3_put:
3247 regulator_put(pm8058_s3);
3248reg_l5_disable:
3249 if (machine_is_msm8x60_fluid())
3250 regulator_disable(pm8058_l5);
3251reg_l5_put:
3252 if (machine_is_msm8x60_fluid())
3253 regulator_put(pm8058_l5);
3254 return rc;
3255}
3256
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303257/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3258static int cyttsp_platform_suspend(struct i2c_client *client)
3259{
3260 msleep(20);
3261
3262 return CY_OK;
3263}
3264
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003265static int cyttsp_platform_resume(struct i2c_client *client)
3266{
3267 /* add any special code to strobe a wakeup pin or chip reset */
3268 msleep(10);
3269
3270 return CY_OK;
3271}
3272
3273static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3274 .flags = 0x04,
3275 .gen = CY_GEN3, /* or */
3276 .use_st = CY_USE_ST,
3277 .use_mt = CY_USE_MT,
3278 .use_hndshk = CY_SEND_HNDSHK,
3279 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303280 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003281 .use_gestures = CY_USE_GESTURES,
3282 /* activate up to 4 groups
3283 * and set active distance
3284 */
3285 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3286 CY_GEST_GRP3 | CY_GEST_GRP4 |
3287 CY_ACT_DIST,
3288 /* change act_intrvl to customize the Active power state
3289 * scanning/processing refresh interval for Operating mode
3290 */
3291 .act_intrvl = CY_ACT_INTRVL_DFLT,
3292 /* change tch_tmout to customize the touch timeout for the
3293 * Active power state for Operating mode
3294 */
3295 .tch_tmout = CY_TCH_TMOUT_DFLT,
3296 /* change lp_intrvl to customize the Low Power power state
3297 * scanning/processing refresh interval for Operating mode
3298 */
3299 .lp_intrvl = CY_LP_INTRVL_DFLT,
3300 .sleep_gpio = -1,
3301 .resout_gpio = -1,
3302 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3303 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303304 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003305 .init = cyttsp_platform_init,
3306};
3307
3308static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3309 .panel_maxx = 1083,
3310 .panel_maxy = 659,
3311 .disp_minx = 30,
3312 .disp_maxx = 1053,
3313 .disp_miny = 30,
3314 .disp_maxy = 629,
3315 .correct_fw_ver = 8,
3316 .fw_fname = "cyttsp_8660_ffa.hex",
3317 .flags = 0x00,
3318 .gen = CY_GEN2, /* or */
3319 .use_st = CY_USE_ST,
3320 .use_mt = CY_USE_MT,
3321 .use_hndshk = CY_SEND_HNDSHK,
3322 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303323 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003324 .use_gestures = CY_USE_GESTURES,
3325 /* activate up to 4 groups
3326 * and set active distance
3327 */
3328 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3329 CY_GEST_GRP3 | CY_GEST_GRP4 |
3330 CY_ACT_DIST,
3331 /* change act_intrvl to customize the Active power state
3332 * scanning/processing refresh interval for Operating mode
3333 */
3334 .act_intrvl = CY_ACT_INTRVL_DFLT,
3335 /* change tch_tmout to customize the touch timeout for the
3336 * Active power state for Operating mode
3337 */
3338 .tch_tmout = CY_TCH_TMOUT_DFLT,
3339 /* change lp_intrvl to customize the Low Power power state
3340 * scanning/processing refresh interval for Operating mode
3341 */
3342 .lp_intrvl = CY_LP_INTRVL_DFLT,
3343 .sleep_gpio = -1,
3344 .resout_gpio = -1,
3345 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3346 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303347 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003348 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303349 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003350};
3351static void cyttsp_set_params(void)
3352{
3353 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3354 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3355 cyttsp_fluid_pdata.panel_maxx = 539;
3356 cyttsp_fluid_pdata.panel_maxy = 994;
3357 cyttsp_fluid_pdata.disp_minx = 30;
3358 cyttsp_fluid_pdata.disp_maxx = 509;
3359 cyttsp_fluid_pdata.disp_miny = 60;
3360 cyttsp_fluid_pdata.disp_maxy = 859;
3361 cyttsp_fluid_pdata.correct_fw_ver = 4;
3362 } else {
3363 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3364 cyttsp_fluid_pdata.panel_maxx = 550;
3365 cyttsp_fluid_pdata.panel_maxy = 1013;
3366 cyttsp_fluid_pdata.disp_minx = 35;
3367 cyttsp_fluid_pdata.disp_maxx = 515;
3368 cyttsp_fluid_pdata.disp_miny = 69;
3369 cyttsp_fluid_pdata.disp_maxy = 869;
3370 cyttsp_fluid_pdata.correct_fw_ver = 5;
3371 }
3372
3373}
3374
3375static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3376 {
3377 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3378 .platform_data = &cyttsp_fluid_pdata,
3379#ifndef CY_USE_TIMER
3380 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3381#endif /* CY_USE_TIMER */
3382 },
3383};
3384
3385static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3386 {
3387 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3388 .platform_data = &cyttsp_tmg240_pdata,
3389#ifndef CY_USE_TIMER
3390 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3391#endif /* CY_USE_TIMER */
3392 },
3393};
3394#endif
3395
3396static struct regulator *vreg_tmg200;
3397
3398#define TS_PEN_IRQ_GPIO 61
3399static int tmg200_power(int vreg_on)
3400{
3401 int rc = -EINVAL;
3402
3403 if (!vreg_tmg200) {
3404 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3405 __func__, rc);
3406 return rc;
3407 }
3408
3409 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3410 regulator_disable(vreg_tmg200);
3411 if (rc < 0)
3412 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3413 __func__, vreg_on ? "enable" : "disable", rc);
3414
3415 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003416 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003417
3418 return rc;
3419}
3420
3421static int tmg200_dev_setup(bool enable)
3422{
3423 int rc;
3424
3425 if (enable) {
3426 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3427 if (IS_ERR(vreg_tmg200)) {
3428 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3429 __func__, PTR_ERR(vreg_tmg200));
3430 rc = PTR_ERR(vreg_tmg200);
3431 return rc;
3432 }
3433
3434 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3435 if (rc) {
3436 pr_err("%s: regulator_set_voltage() = %d\n",
3437 __func__, rc);
3438 goto reg_put;
3439 }
3440 } else {
3441 /* put voltage sources */
3442 regulator_put(vreg_tmg200);
3443 }
3444 return 0;
3445reg_put:
3446 regulator_put(vreg_tmg200);
3447 return rc;
3448}
3449
3450static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3451 .ts_name = "msm_tmg200_ts",
3452 .dis_min_x = 0,
3453 .dis_max_x = 1023,
3454 .dis_min_y = 0,
3455 .dis_max_y = 599,
3456 .min_tid = 0,
3457 .max_tid = 255,
3458 .min_touch = 0,
3459 .max_touch = 255,
3460 .min_width = 0,
3461 .max_width = 255,
3462 .power_on = tmg200_power,
3463 .dev_setup = tmg200_dev_setup,
3464 .nfingers = 2,
3465 .irq_gpio = TS_PEN_IRQ_GPIO,
3466 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3467};
3468
3469static struct i2c_board_info cy8ctmg200_board_info[] = {
3470 {
3471 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3472 .platform_data = &cy8ctmg200_pdata,
3473 }
3474};
3475
Zhang Chang Ken211df572011-07-05 19:16:39 -04003476static struct regulator *vreg_tma340;
3477
3478static int tma340_power(int vreg_on)
3479{
3480 int rc = -EINVAL;
3481
3482 if (!vreg_tma340) {
3483 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3484 __func__, rc);
3485 return rc;
3486 }
3487
3488 rc = vreg_on ? regulator_enable(vreg_tma340) :
3489 regulator_disable(vreg_tma340);
3490 if (rc < 0)
3491 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3492 __func__, vreg_on ? "enable" : "disable", rc);
3493
3494 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003495 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003496
3497 return rc;
3498}
3499
3500static struct kobject *tma340_prop_kobj;
3501
3502static int tma340_dragon_dev_setup(bool enable)
3503{
3504 int rc;
3505
3506 if (enable) {
3507 vreg_tma340 = regulator_get(NULL, "8901_l2");
3508 if (IS_ERR(vreg_tma340)) {
3509 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3510 __func__, PTR_ERR(vreg_tma340));
3511 rc = PTR_ERR(vreg_tma340);
3512 return rc;
3513 }
3514
3515 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3516 if (rc) {
3517 pr_err("%s: regulator_set_voltage() = %d\n",
3518 __func__, rc);
3519 goto reg_put;
3520 }
3521 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3522 tma340_prop_kobj = kobject_create_and_add("board_properties",
3523 NULL);
3524 if (tma340_prop_kobj) {
3525 rc = sysfs_create_group(tma340_prop_kobj,
3526 &tma300_properties_attr_group);
3527 if (rc) {
3528 kobject_put(tma340_prop_kobj);
3529 pr_err("%s: failed to create board_properties\n",
3530 __func__);
3531 goto reg_put;
3532 }
3533 }
3534
3535 } else {
3536 /* put voltage sources */
3537 regulator_put(vreg_tma340);
3538 /* destroy virtual keys */
3539 if (tma340_prop_kobj) {
3540 sysfs_remove_group(tma340_prop_kobj,
3541 &tma300_properties_attr_group);
3542 kobject_put(tma340_prop_kobj);
3543 }
3544 }
3545 return 0;
3546reg_put:
3547 regulator_put(vreg_tma340);
3548 return rc;
3549}
3550
3551
3552static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3553 .ts_name = "cy8ctma340",
3554 .dis_min_x = 0,
3555 .dis_max_x = 479,
3556 .dis_min_y = 0,
3557 .dis_max_y = 799,
3558 .min_tid = 0,
3559 .max_tid = 255,
3560 .min_touch = 0,
3561 .max_touch = 255,
3562 .min_width = 0,
3563 .max_width = 255,
3564 .power_on = tma340_power,
3565 .dev_setup = tma340_dragon_dev_setup,
3566 .nfingers = 2,
3567 .irq_gpio = TS_PEN_IRQ_GPIO,
3568 .resout_gpio = -1,
3569};
3570
3571static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3572 {
3573 I2C_BOARD_INFO("cy8ctma340", 0x24),
3574 .platform_data = &cy8ctma340_dragon_pdata,
3575 }
3576};
3577
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003578#ifdef CONFIG_SERIAL_MSM_HS
3579static int configure_uart_gpios(int on)
3580{
3581 int ret = 0, i;
3582 int uart_gpios[] = {53, 54, 55, 56};
3583 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3584 if (on) {
3585 ret = msm_gpiomux_get(uart_gpios[i]);
3586 if (unlikely(ret))
3587 break;
3588 } else {
3589 ret = msm_gpiomux_put(uart_gpios[i]);
3590 if (unlikely(ret))
3591 return ret;
3592 }
3593 }
3594 if (ret)
3595 for (; i >= 0; i--)
3596 msm_gpiomux_put(uart_gpios[i]);
3597 return ret;
3598}
3599static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3600 .inject_rx_on_wakeup = 1,
3601 .rx_to_inject = 0xFD,
3602 .gpio_config = configure_uart_gpios,
3603};
3604#endif
3605
3606
3607#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3608
3609static struct gpio_led gpio_exp_leds_config[] = {
3610 {
3611 .name = "left_led1:green",
3612 .gpio = GPIO_LEFT_LED_1,
3613 .active_low = 1,
3614 .retain_state_suspended = 0,
3615 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3616 },
3617 {
3618 .name = "left_led2:red",
3619 .gpio = GPIO_LEFT_LED_2,
3620 .active_low = 1,
3621 .retain_state_suspended = 0,
3622 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3623 },
3624 {
3625 .name = "left_led3:green",
3626 .gpio = GPIO_LEFT_LED_3,
3627 .active_low = 1,
3628 .retain_state_suspended = 0,
3629 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3630 },
3631 {
3632 .name = "wlan_led:orange",
3633 .gpio = GPIO_LEFT_LED_WLAN,
3634 .active_low = 1,
3635 .retain_state_suspended = 0,
3636 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3637 },
3638 {
3639 .name = "left_led5:green",
3640 .gpio = GPIO_LEFT_LED_5,
3641 .active_low = 1,
3642 .retain_state_suspended = 0,
3643 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3644 },
3645 {
3646 .name = "right_led1:green",
3647 .gpio = GPIO_RIGHT_LED_1,
3648 .active_low = 1,
3649 .retain_state_suspended = 0,
3650 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3651 },
3652 {
3653 .name = "right_led2:red",
3654 .gpio = GPIO_RIGHT_LED_2,
3655 .active_low = 1,
3656 .retain_state_suspended = 0,
3657 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3658 },
3659 {
3660 .name = "right_led3:green",
3661 .gpio = GPIO_RIGHT_LED_3,
3662 .active_low = 1,
3663 .retain_state_suspended = 0,
3664 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3665 },
3666 {
3667 .name = "bt_led:blue",
3668 .gpio = GPIO_RIGHT_LED_BT,
3669 .active_low = 1,
3670 .retain_state_suspended = 0,
3671 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3672 },
3673 {
3674 .name = "right_led5:green",
3675 .gpio = GPIO_RIGHT_LED_5,
3676 .active_low = 1,
3677 .retain_state_suspended = 0,
3678 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3679 },
3680};
3681
3682static struct gpio_led_platform_data gpio_leds_pdata = {
3683 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3684 .leds = gpio_exp_leds_config,
3685};
3686
3687static struct platform_device gpio_leds = {
3688 .name = "leds-gpio",
3689 .id = -1,
3690 .dev = {
3691 .platform_data = &gpio_leds_pdata,
3692 },
3693};
3694
3695static struct gpio_led fluid_gpio_leds[] = {
3696 {
3697 .name = "dual_led:green",
3698 .gpio = GPIO_LED1_GREEN_N,
3699 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3700 .active_low = 1,
3701 .retain_state_suspended = 0,
3702 },
3703 {
3704 .name = "dual_led:red",
3705 .gpio = GPIO_LED2_RED_N,
3706 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3707 .active_low = 1,
3708 .retain_state_suspended = 0,
3709 },
3710};
3711
3712static struct gpio_led_platform_data gpio_led_pdata = {
3713 .leds = fluid_gpio_leds,
3714 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3715};
3716
3717static struct platform_device fluid_leds_gpio = {
3718 .name = "leds-gpio",
3719 .id = -1,
3720 .dev = {
3721 .platform_data = &gpio_led_pdata,
3722 },
3723};
3724
3725#endif
3726
3727#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3728
3729static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3730 .phys_addr_base = 0x00106000,
3731 .reg_offsets = {
3732 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3733 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3734 },
3735 .phys_size = SZ_8K,
3736 .log_len = 4096, /* log's buffer length in bytes */
3737 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3738};
3739
3740static struct platform_device msm_rpm_log_device = {
3741 .name = "msm_rpm_log",
3742 .id = -1,
3743 .dev = {
3744 .platform_data = &msm_rpm_log_pdata,
3745 },
3746};
3747#endif
3748
3749#ifdef CONFIG_BATTERY_MSM8X60
3750static struct msm_charger_platform_data msm_charger_data = {
3751 .safety_time = 180,
3752 .update_time = 1,
3753 .max_voltage = 4200,
3754 .min_voltage = 3200,
3755};
3756
3757static struct platform_device msm_charger_device = {
3758 .name = "msm-charger",
3759 .id = -1,
3760 .dev = {
3761 .platform_data = &msm_charger_data,
3762 }
3763};
3764#endif
3765
3766/*
3767 * Consumer specific regulator names:
3768 * regulator name consumer dev_name
3769 */
3770static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3771 REGULATOR_SUPPLY("8058_l0", NULL),
3772};
3773static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3774 REGULATOR_SUPPLY("8058_l1", NULL),
3775};
3776static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3777 REGULATOR_SUPPLY("8058_l2", NULL),
3778};
3779static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3780 REGULATOR_SUPPLY("8058_l3", NULL),
3781};
3782static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3783 REGULATOR_SUPPLY("8058_l4", NULL),
3784};
3785static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3786 REGULATOR_SUPPLY("8058_l5", NULL),
3787};
3788static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3789 REGULATOR_SUPPLY("8058_l6", NULL),
3790};
3791static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3792 REGULATOR_SUPPLY("8058_l7", NULL),
3793};
3794static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3795 REGULATOR_SUPPLY("8058_l8", NULL),
3796};
3797static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3798 REGULATOR_SUPPLY("8058_l9", NULL),
3799};
3800static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3801 REGULATOR_SUPPLY("8058_l10", NULL),
3802};
3803static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3804 REGULATOR_SUPPLY("8058_l11", NULL),
3805};
3806static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3807 REGULATOR_SUPPLY("8058_l12", NULL),
3808};
3809static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3810 REGULATOR_SUPPLY("8058_l13", NULL),
3811};
3812static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3813 REGULATOR_SUPPLY("8058_l14", NULL),
3814};
3815static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3816 REGULATOR_SUPPLY("8058_l15", NULL),
3817};
3818static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3819 REGULATOR_SUPPLY("8058_l16", NULL),
3820};
3821static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3822 REGULATOR_SUPPLY("8058_l17", NULL),
3823};
3824static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3825 REGULATOR_SUPPLY("8058_l18", NULL),
3826};
3827static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3828 REGULATOR_SUPPLY("8058_l19", NULL),
3829};
3830static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3831 REGULATOR_SUPPLY("8058_l20", NULL),
3832};
3833static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3834 REGULATOR_SUPPLY("8058_l21", NULL),
3835};
3836static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3837 REGULATOR_SUPPLY("8058_l22", NULL),
3838};
3839static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3840 REGULATOR_SUPPLY("8058_l23", NULL),
3841};
3842static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3843 REGULATOR_SUPPLY("8058_l24", NULL),
3844};
3845static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3846 REGULATOR_SUPPLY("8058_l25", NULL),
3847};
3848static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3849 REGULATOR_SUPPLY("8058_s0", NULL),
3850};
3851static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3852 REGULATOR_SUPPLY("8058_s1", NULL),
3853};
3854static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3855 REGULATOR_SUPPLY("8058_s2", NULL),
3856};
3857static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3858 REGULATOR_SUPPLY("8058_s3", NULL),
3859};
3860static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3861 REGULATOR_SUPPLY("8058_s4", NULL),
3862};
3863static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3864 REGULATOR_SUPPLY("8058_lvs0", NULL),
3865};
3866static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3867 REGULATOR_SUPPLY("8058_lvs1", NULL),
3868};
3869static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3870 REGULATOR_SUPPLY("8058_ncp", NULL),
3871};
3872
3873static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3874 REGULATOR_SUPPLY("8901_l0", NULL),
3875};
3876static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3877 REGULATOR_SUPPLY("8901_l1", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3880 REGULATOR_SUPPLY("8901_l2", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3883 REGULATOR_SUPPLY("8901_l3", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3886 REGULATOR_SUPPLY("8901_l4", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3889 REGULATOR_SUPPLY("8901_l5", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3892 REGULATOR_SUPPLY("8901_l6", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3895 REGULATOR_SUPPLY("8901_s2", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3898 REGULATOR_SUPPLY("8901_s3", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3901 REGULATOR_SUPPLY("8901_s4", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3904 REGULATOR_SUPPLY("8901_lvs0", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3907 REGULATOR_SUPPLY("8901_lvs1", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3910 REGULATOR_SUPPLY("8901_lvs2", NULL),
3911};
3912static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3913 REGULATOR_SUPPLY("8901_lvs3", NULL),
3914};
3915static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3916 REGULATOR_SUPPLY("8901_mvs0", NULL),
3917};
3918
David Collins6f032ba2011-08-31 14:08:15 -07003919/* Pin control regulators */
3920static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3921 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3922};
3923static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3924 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3925};
3926static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3927 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3928};
3929static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3930 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3931};
3932static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3933 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3934};
3935static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3936 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3937};
3938
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003939#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3940 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003941 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003942 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003943 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003944 .init_data = { \
3945 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003946 .valid_modes_mask = _modes, \
3947 .valid_ops_mask = _ops, \
3948 .min_uV = _min_uV, \
3949 .max_uV = _max_uV, \
3950 .input_uV = _min_uV, \
3951 .apply_uV = _apply_uV, \
3952 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003953 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003954 .consumer_supplies = vreg_consumers_##_id, \
3955 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003956 ARRAY_SIZE(vreg_consumers_##_id), \
3957 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003958 .id = RPM_VREG_ID_##_id, \
3959 .default_uV = _default_uV, \
3960 .peak_uA = _peak_uA, \
3961 .avg_uA = _avg_uA, \
3962 .pull_down_enable = _pull_down, \
3963 .pin_ctrl = _pin_ctrl, \
3964 .freq = RPM_VREG_FREQ_##_freq, \
3965 .pin_fn = _pin_fn, \
3966 .force_mode = _force_mode, \
3967 .state = _state, \
3968 .sleep_selectable = _sleep_selectable, \
3969 }
3970
3971/* Pin control initialization */
3972#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3973 { \
3974 .init_data = { \
3975 .constraints = { \
3976 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3977 .always_on = _always_on, \
3978 }, \
3979 .num_consumer_supplies = \
3980 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3981 .consumer_supplies = vreg_consumers_##_id##_PC, \
3982 }, \
3983 .id = RPM_VREG_ID_##_id##_PC, \
3984 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003985 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003986 }
3987
3988/*
3989 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3990 * via the peak_uA value specified in the table below. If the value is less
3991 * than the high power min threshold for the regulator, then the regulator will
3992 * be set to LPM. Otherwise, it will be set to HPM.
3993 *
3994 * This value can be further overridden by specifying an initial mode via
3995 * .init_data.constraints.initial_mode.
3996 */
3997
David Collins6f032ba2011-08-31 14:08:15 -07003998#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3999 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004000 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4001 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4002 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4003 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4004 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004005 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4006 RPM_VREG_PIN_FN_8660_ENABLE, \
4007 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004008 _sleep_selectable, _always_on)
4009
David Collins6f032ba2011-08-31 14:08:15 -07004010#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4011 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004012 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4013 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4014 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4015 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4016 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004017 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4018 RPM_VREG_PIN_FN_8660_ENABLE, \
4019 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4020 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004021
David Collins6f032ba2011-08-31 14:08:15 -07004022#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4024 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004025 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4026 RPM_VREG_PIN_FN_8660_ENABLE, \
4027 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4028 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004029
David Collins6f032ba2011-08-31 14:08:15 -07004030#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4032 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004033 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4034 RPM_VREG_PIN_FN_8660_ENABLE, \
4035 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4036 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037
David Collins6f032ba2011-08-31 14:08:15 -07004038#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4039#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4040#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4041#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4042#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004043
David Collins6f032ba2011-08-31 14:08:15 -07004044/* RPM early regulator constraints */
4045static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4046 /* ID a_on pd ss min_uV max_uV init_ip freq */
4047 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4048 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004049};
4050
David Collins6f032ba2011-08-31 14:08:15 -07004051/* RPM regulator constraints */
4052static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4053 /* ID a_on pd ss min_uV max_uV init_ip */
4054 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4055 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4056 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4057 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4058 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4059 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4060 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4061 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4062 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4063 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4064 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4065 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4066 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4067 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4068 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4069 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4070 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4071 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4072 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4073 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4074 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4075 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4076 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4077 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4078 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4079 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004080
David Collins6f032ba2011-08-31 14:08:15 -07004081 /* ID a_on pd ss min_uV max_uV init_ip freq */
4082 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4083 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4084 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4085
4086 /* ID a_on pd ss */
4087 RPM_VS(PM8058_LVS0, 0, 1, 0),
4088 RPM_VS(PM8058_LVS1, 0, 1, 0),
4089
4090 /* ID a_on pd ss min_uV max_uV */
4091 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4092
4093 /* ID a_on pd ss min_uV max_uV init_ip */
4094 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4095 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4096 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4099 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4100 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4101
4102 /* ID a_on pd ss min_uV max_uV init_ip freq */
4103 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4104 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4105 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4106
4107 /* ID a_on pd ss */
4108 RPM_VS(PM8901_LVS0, 1, 1, 0),
4109 RPM_VS(PM8901_LVS1, 0, 1, 0),
4110 RPM_VS(PM8901_LVS2, 0, 1, 0),
4111 RPM_VS(PM8901_LVS3, 0, 1, 0),
4112 RPM_VS(PM8901_MVS0, 0, 1, 0),
4113
4114 /* ID a_on pin_func pin_ctrl */
4115 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4116 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4119 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4120 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4121};
4122
4123static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4124 .init_data = rpm_regulator_early_init_data,
4125 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4126 .version = RPM_VREG_VERSION_8660,
4127 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4128 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4129};
4130
4131static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4132 .init_data = rpm_regulator_init_data,
4133 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4134 .version = RPM_VREG_VERSION_8660,
4135};
4136
4137static struct platform_device rpm_regulator_early_device = {
4138 .name = "rpm-regulator",
4139 .id = 0,
4140 .dev = {
4141 .platform_data = &rpm_regulator_early_pdata,
4142 },
4143};
4144
4145static struct platform_device rpm_regulator_device = {
4146 .name = "rpm-regulator",
4147 .id = 1,
4148 .dev = {
4149 .platform_data = &rpm_regulator_pdata,
4150 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004151};
4152
4153static struct platform_device *early_regulators[] __initdata = {
4154 &msm_device_saw_s0,
4155 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004156 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004157};
4158
4159static struct platform_device *early_devices[] __initdata = {
4160#ifdef CONFIG_MSM_BUS_SCALING
4161 &msm_bus_apps_fabric,
4162 &msm_bus_sys_fabric,
4163 &msm_bus_mm_fabric,
4164 &msm_bus_sys_fpb,
4165 &msm_bus_cpss_fpb,
4166#endif
4167 &msm_device_dmov_adm0,
4168 &msm_device_dmov_adm1,
4169};
4170
4171#if (defined(CONFIG_MARIMBA_CORE)) && \
4172 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4173
4174static int bluetooth_power(int);
4175static struct platform_device msm_bt_power_device = {
4176 .name = "bt_power",
4177 .id = -1,
4178 .dev = {
4179 .platform_data = &bluetooth_power,
4180 },
4181};
4182#endif
4183
4184static struct platform_device msm_tsens_device = {
4185 .name = "tsens-tm",
4186 .id = -1,
4187};
4188
4189static struct platform_device *rumi_sim_devices[] __initdata = {
4190 &smc91x_device,
4191 &msm_device_uart_dm12,
4192#ifdef CONFIG_I2C_QUP
4193 &msm_gsbi3_qup_i2c_device,
4194 &msm_gsbi4_qup_i2c_device,
4195 &msm_gsbi7_qup_i2c_device,
4196 &msm_gsbi8_qup_i2c_device,
4197 &msm_gsbi9_qup_i2c_device,
4198 &msm_gsbi12_qup_i2c_device,
4199#endif
4200#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004201 &msm_device_ssbi3,
4202#endif
4203#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004204#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205 &android_pmem_device,
4206 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004207 &android_pmem_smipool_device,
4208#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004209 &android_pmem_audio_device,
4210#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004211#ifdef CONFIG_MSM_ROTATOR
4212 &msm_rotator_device,
4213#endif
4214 &msm_fb_device,
4215 &msm_kgsl_3d0,
4216 &msm_kgsl_2d0,
4217 &msm_kgsl_2d1,
4218 &lcdc_samsung_panel_device,
4219#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4220 &hdmi_msm_device,
4221#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4222#ifdef CONFIG_MSM_CAMERA
4223#ifdef CONFIG_MT9E013
4224 &msm_camera_sensor_mt9e013,
4225#endif
4226#ifdef CONFIG_IMX074
4227 &msm_camera_sensor_imx074,
4228#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004229#ifdef CONFIG_VX6953
4230 &msm_camera_sensor_vx6953,
4231#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004232#ifdef CONFIG_WEBCAM_OV7692
4233 &msm_camera_sensor_webcam_ov7692,
4234#endif
4235#ifdef CONFIG_WEBCAM_OV9726
4236 &msm_camera_sensor_webcam_ov9726,
4237#endif
4238#ifdef CONFIG_QS_S5K4E1
4239 &msm_camera_sensor_qs_s5k4e1,
4240#endif
4241#endif
4242#ifdef CONFIG_MSM_GEMINI
4243 &msm_gemini_device,
4244#endif
4245#ifdef CONFIG_MSM_VPE
4246 &msm_vpe_device,
4247#endif
4248 &msm_device_vidc,
4249};
4250
4251#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4252enum {
4253 SX150X_CORE,
4254 SX150X_DOCKING,
4255 SX150X_SURF,
4256 SX150X_LEFT_FHA,
4257 SX150X_RIGHT_FHA,
4258 SX150X_SOUTH,
4259 SX150X_NORTH,
4260 SX150X_CORE_FLUID,
4261};
4262
4263static struct sx150x_platform_data sx150x_data[] __initdata = {
4264 [SX150X_CORE] = {
4265 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4266 .oscio_is_gpo = false,
4267 .io_pullup_ena = 0x0c08,
4268 .io_pulldn_ena = 0x4060,
4269 .io_open_drain_ena = 0x000c,
4270 .io_polarity = 0,
4271 .irq_summary = -1, /* see fixup_i2c_configs() */
4272 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4273 },
4274 [SX150X_DOCKING] = {
4275 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4276 .oscio_is_gpo = false,
4277 .io_pullup_ena = 0x5e06,
4278 .io_pulldn_ena = 0x81b8,
4279 .io_open_drain_ena = 0,
4280 .io_polarity = 0,
4281 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4282 UI_INT2_N),
4283 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4284 GPIO_DOCKING_EXPANDER_BASE -
4285 GPIO_EXPANDER_GPIO_BASE,
4286 },
4287 [SX150X_SURF] = {
4288 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4289 .oscio_is_gpo = false,
4290 .io_pullup_ena = 0,
4291 .io_pulldn_ena = 0,
4292 .io_open_drain_ena = 0,
4293 .io_polarity = 0,
4294 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4295 UI_INT1_N),
4296 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4297 GPIO_SURF_EXPANDER_BASE -
4298 GPIO_EXPANDER_GPIO_BASE,
4299 },
4300 [SX150X_LEFT_FHA] = {
4301 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4302 .oscio_is_gpo = false,
4303 .io_pullup_ena = 0,
4304 .io_pulldn_ena = 0x40,
4305 .io_open_drain_ena = 0,
4306 .io_polarity = 0,
4307 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4308 UI_INT3_N),
4309 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4310 GPIO_LEFT_KB_EXPANDER_BASE -
4311 GPIO_EXPANDER_GPIO_BASE,
4312 },
4313 [SX150X_RIGHT_FHA] = {
4314 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4315 .oscio_is_gpo = true,
4316 .io_pullup_ena = 0,
4317 .io_pulldn_ena = 0,
4318 .io_open_drain_ena = 0,
4319 .io_polarity = 0,
4320 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4321 UI_INT3_N),
4322 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4323 GPIO_RIGHT_KB_EXPANDER_BASE -
4324 GPIO_EXPANDER_GPIO_BASE,
4325 },
4326 [SX150X_SOUTH] = {
4327 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4328 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4329 GPIO_SOUTH_EXPANDER_BASE -
4330 GPIO_EXPANDER_GPIO_BASE,
4331 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4332 },
4333 [SX150X_NORTH] = {
4334 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4335 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4336 GPIO_NORTH_EXPANDER_BASE -
4337 GPIO_EXPANDER_GPIO_BASE,
4338 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4339 .oscio_is_gpo = true,
4340 .io_open_drain_ena = 0x30,
4341 },
4342 [SX150X_CORE_FLUID] = {
4343 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4344 .oscio_is_gpo = false,
4345 .io_pullup_ena = 0x0408,
4346 .io_pulldn_ena = 0x4060,
4347 .io_open_drain_ena = 0x0008,
4348 .io_polarity = 0,
4349 .irq_summary = -1, /* see fixup_i2c_configs() */
4350 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4351 },
4352};
4353
4354#ifdef CONFIG_SENSORS_MSM_ADC
4355/* Configuration of EPM expander is done when client
4356 * request an adc read
4357 */
4358static struct sx150x_platform_data sx150x_epmdata = {
4359 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4360 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4361 GPIO_EPM_EXPANDER_BASE -
4362 GPIO_EXPANDER_GPIO_BASE,
4363 .irq_summary = -1,
4364};
4365#endif
4366
4367/* sx150x_low_power_cfg
4368 *
4369 * This data and init function are used to put unused gpio-expander output
4370 * lines into their low-power states at boot. The init
4371 * function must be deferred until a later init stage because the i2c
4372 * gpio expander drivers do not probe until after they are registered
4373 * (see register_i2c_devices) and the work-queues for those registrations
4374 * are processed. Because these lines are unused, there is no risk of
4375 * competing with a device driver for the gpio.
4376 *
4377 * gpio lines whose low-power states are input are naturally in their low-
4378 * power configurations once probed, see the platform data structures above.
4379 */
4380struct sx150x_low_power_cfg {
4381 unsigned gpio;
4382 unsigned val;
4383};
4384
4385static struct sx150x_low_power_cfg
4386common_sx150x_lp_cfgs[] __initdata = {
4387 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4388 {GPIO_EXT_GPS_LNA_EN, 0},
4389 {GPIO_MSM_WAKES_BT, 0},
4390 {GPIO_USB_UICC_EN, 0},
4391 {GPIO_BATT_GAUGE_EN, 0},
4392};
4393
4394static struct sx150x_low_power_cfg
4395surf_ffa_sx150x_lp_cfgs[] __initdata = {
4396 {GPIO_MIPI_DSI_RST_N, 0},
4397 {GPIO_DONGLE_PWR_EN, 0},
4398 {GPIO_CAP_TS_SLEEP, 1},
4399 {GPIO_WEB_CAMIF_RESET_N, 0},
4400};
4401
4402static void __init
4403cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4404{
4405 unsigned n;
4406 int rc;
4407
4408 for (n = 0; n < nelems; ++n) {
4409 rc = gpio_request(cfgs[n].gpio, NULL);
4410 if (!rc) {
4411 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4412 gpio_free(cfgs[n].gpio);
4413 }
4414
4415 if (rc) {
4416 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4417 __func__, cfgs[n].gpio, rc);
4418 }
Steve Muckle9161d302010-02-11 11:50:40 -08004419 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004420}
4421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004422static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004423{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004424 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4425 ARRAY_SIZE(common_sx150x_lp_cfgs));
4426 if (!machine_is_msm8x60_fluid())
4427 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4428 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4429 return 0;
4430}
4431module_init(cfg_sx150xs_low_power);
4432
4433#ifdef CONFIG_I2C
4434static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4435 {
4436 I2C_BOARD_INFO("sx1509q", 0x3e),
4437 .platform_data = &sx150x_data[SX150X_CORE]
4438 },
4439};
4440
4441static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4442 {
4443 I2C_BOARD_INFO("sx1509q", 0x3f),
4444 .platform_data = &sx150x_data[SX150X_DOCKING]
4445 },
4446};
4447
4448static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4449 {
4450 I2C_BOARD_INFO("sx1509q", 0x70),
4451 .platform_data = &sx150x_data[SX150X_SURF]
4452 }
4453};
4454
4455static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4456 {
4457 I2C_BOARD_INFO("sx1508q", 0x21),
4458 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4459 },
4460 {
4461 I2C_BOARD_INFO("sx1508q", 0x22),
4462 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4463 }
4464};
4465
4466static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4467 {
4468 I2C_BOARD_INFO("sx1508q", 0x23),
4469 .platform_data = &sx150x_data[SX150X_SOUTH]
4470 },
4471 {
4472 I2C_BOARD_INFO("sx1508q", 0x20),
4473 .platform_data = &sx150x_data[SX150X_NORTH]
4474 }
4475};
4476
4477static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4478 {
4479 I2C_BOARD_INFO("sx1509q", 0x3e),
4480 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4481 },
4482};
4483
4484#ifdef CONFIG_SENSORS_MSM_ADC
4485static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4486 {
4487 I2C_BOARD_INFO("sx1509q", 0x3e),
4488 .platform_data = &sx150x_epmdata
4489 },
4490};
4491#endif
4492#endif
4493#endif
4494
4495#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004496
4497static struct adc_access_fn xoadc_fn = {
4498 pm8058_xoadc_select_chan_and_start_conv,
4499 pm8058_xoadc_read_adc_code,
4500 pm8058_xoadc_get_properties,
4501 pm8058_xoadc_slot_request,
4502 pm8058_xoadc_restore_slot,
4503 pm8058_xoadc_calibrate,
4504};
4505
4506#if defined(CONFIG_I2C) && \
4507 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4508static struct regulator *vreg_adc_epm1;
4509
4510static struct i2c_client *epm_expander_i2c_register_board(void)
4511
4512{
4513 struct i2c_adapter *i2c_adap;
4514 struct i2c_client *client = NULL;
4515 i2c_adap = i2c_get_adapter(0x0);
4516
4517 if (i2c_adap == NULL)
4518 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4519
4520 if (i2c_adap != NULL)
4521 client = i2c_new_device(i2c_adap,
4522 &fluid_expanders_i2c_epm_info[0]);
4523 return client;
4524
4525}
4526
4527static unsigned int msm_adc_gpio_configure_expander_enable(void)
4528{
4529 int rc = 0;
4530 static struct i2c_client *epm_i2c_client;
4531
4532 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4533
4534 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4535
4536 if (IS_ERR(vreg_adc_epm1)) {
4537 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4538 return 0;
4539 }
4540
4541 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4542 if (rc)
4543 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4544 "regulator set voltage failed\n");
4545
4546 rc = regulator_enable(vreg_adc_epm1);
4547 if (rc) {
4548 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4549 "Error while enabling regulator for epm s3 %d\n", rc);
4550 return rc;
4551 }
4552
4553 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4554 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4555
4556 msleep(1000);
4557
4558 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4559 if (!rc) {
4560 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4561 "Configure 5v boost\n");
4562 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4563 } else {
4564 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4565 "Error for epm 5v boost en\n");
4566 goto exit_vreg_epm;
4567 }
4568
4569 msleep(500);
4570
4571 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4572 if (!rc) {
4573 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4574 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4575 "Configure epm 3.3v\n");
4576 } else {
4577 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4578 "Error for gpio 3.3ven\n");
4579 goto exit_vreg_epm;
4580 }
4581 msleep(500);
4582
4583 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4584 "Trying to request EPM LVLSFT_EN\n");
4585 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4586 if (!rc) {
4587 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4588 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4589 "Configure the lvlsft\n");
4590 } else {
4591 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4592 "Error for epm lvlsft_en\n");
4593 goto exit_vreg_epm;
4594 }
4595
4596 msleep(500);
4597
4598 if (!epm_i2c_client)
4599 epm_i2c_client = epm_expander_i2c_register_board();
4600
4601 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4602 if (!rc)
4603 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4604 if (rc) {
4605 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4606 ": GPIO PWR MON Enable issue\n");
4607 goto exit_vreg_epm;
4608 }
4609
4610 msleep(1000);
4611
4612 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4613 if (!rc) {
4614 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4615 if (rc) {
4616 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4617 ": ADC1_PWDN error direction out\n");
4618 goto exit_vreg_epm;
4619 }
4620 }
4621
4622 msleep(100);
4623
4624 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4625 if (!rc) {
4626 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4627 if (rc) {
4628 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4629 ": ADC2_PWD error direction out\n");
4630 goto exit_vreg_epm;
4631 }
4632 }
4633
4634 msleep(1000);
4635
4636 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4637 if (!rc) {
4638 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4639 if (rc) {
4640 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4641 "Gpio request problem %d\n", rc);
4642 goto exit_vreg_epm;
4643 }
4644 }
4645
4646 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4647 if (!rc) {
4648 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4649 if (rc) {
4650 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4651 ": EPM_SPI_ADC1_CS_N error\n");
4652 goto exit_vreg_epm;
4653 }
4654 }
4655
4656 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4657 if (!rc) {
4658 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4659 if (rc) {
4660 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4661 ": EPM_SPI_ADC2_Cs_N error\n");
4662 goto exit_vreg_epm;
4663 }
4664 }
4665
4666 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4667 "the power monitor reset for epm\n");
4668
4669 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4670 if (!rc) {
4671 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4672 if (rc) {
4673 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4674 ": Error in the power mon reset\n");
4675 goto exit_vreg_epm;
4676 }
4677 }
4678
4679 msleep(1000);
4680
4681 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4682
4683 msleep(500);
4684
4685 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4686
4687 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4688
4689 return rc;
4690
4691exit_vreg_epm:
4692 regulator_disable(vreg_adc_epm1);
4693
4694 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4695 " rc = %d.\n", rc);
4696 return rc;
4697};
4698
4699static unsigned int msm_adc_gpio_configure_expander_disable(void)
4700{
4701 int rc = 0;
4702
4703 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4704 gpio_free(GPIO_PWR_MON_RESET_N);
4705
4706 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4707 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4708
4709 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4710 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4711
4712 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4713 gpio_free(GPIO_PWR_MON_START);
4714
4715 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4716 gpio_free(GPIO_ADC1_PWDN_N);
4717
4718 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4719 gpio_free(GPIO_ADC2_PWDN_N);
4720
4721 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4722 gpio_free(GPIO_PWR_MON_ENABLE);
4723
4724 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4725 gpio_free(GPIO_EPM_LVLSFT_EN);
4726
4727 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4728 gpio_free(GPIO_EPM_5V_BOOST_EN);
4729
4730 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4731 gpio_free(GPIO_EPM_3_3V_EN);
4732
4733 rc = regulator_disable(vreg_adc_epm1);
4734 if (rc)
4735 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4736 "Error while enabling regulator for epm s3 %d\n", rc);
4737 regulator_put(vreg_adc_epm1);
4738
4739 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4740 return rc;
4741};
4742
4743unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4744{
4745 int rc = 0;
4746
4747 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4748 cs_enable);
4749
4750 if (cs_enable < 16) {
4751 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4752 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4753 } else {
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4755 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4756 }
4757 return rc;
4758};
4759
4760unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4761{
4762 int rc = 0;
4763
4764 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4765
4766 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4767
4768 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4769
4770 return rc;
4771};
4772#endif
4773
4774static struct msm_adc_channels msm_adc_channels_data[] = {
4775 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4776 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4777 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4778 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4779 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4780 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4781 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4782 CHAN_PATH_TYPE4,
4783 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4784 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4785 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4786 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4787 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4788 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4789 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4790 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4791 CHAN_PATH_TYPE12,
4792 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4793 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4794 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4795 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4796 CHAN_PATH_TYPE_NONE,
4797 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4798 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4799 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4800 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4802 scale_xtern_chgr_cur},
4803 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4804 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4805 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4807 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4808 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4809 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4810 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4811 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4812 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4813 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4814 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4815};
4816
4817static char *msm_adc_fluid_device_names[] = {
4818 "ADS_ADC1",
4819 "ADS_ADC2",
4820};
4821
4822static struct msm_adc_platform_data msm_adc_pdata = {
4823 .channel = msm_adc_channels_data,
4824 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4825#if defined(CONFIG_I2C) && \
4826 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4827 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4828 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4829 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4830 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4831#endif
4832};
4833
4834static struct platform_device msm_adc_device = {
4835 .name = "msm_adc",
4836 .id = -1,
4837 .dev = {
4838 .platform_data = &msm_adc_pdata,
4839 },
4840};
4841
4842static void pmic8058_xoadc_mpp_config(void)
4843{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304844 int rc, i;
4845 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304846 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304847 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304848 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304849 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304850 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304851 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304852 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304853 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304854 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304856 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4857 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304858 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004859
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304860 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4861 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4862 &xoadc_mpps[i].config);
4863 if (rc) {
4864 pr_err("%s: Config MPP %d of PM8058 failed\n",
4865 __func__, xoadc_mpps[i].mpp);
4866 }
4867 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004868}
4869
4870static struct regulator *vreg_ldo18_adc;
4871
4872static int pmic8058_xoadc_vreg_config(int on)
4873{
4874 int rc;
4875
4876 if (on) {
4877 rc = regulator_enable(vreg_ldo18_adc);
4878 if (rc)
4879 pr_err("%s: Enable of regulator ldo18_adc "
4880 "failed\n", __func__);
4881 } else {
4882 rc = regulator_disable(vreg_ldo18_adc);
4883 if (rc)
4884 pr_err("%s: Disable of regulator ldo18_adc "
4885 "failed\n", __func__);
4886 }
4887
4888 return rc;
4889}
4890
4891static int pmic8058_xoadc_vreg_setup(void)
4892{
4893 int rc;
4894
4895 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4896 if (IS_ERR(vreg_ldo18_adc)) {
4897 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4898 __func__, PTR_ERR(vreg_ldo18_adc));
4899 rc = PTR_ERR(vreg_ldo18_adc);
4900 goto fail;
4901 }
4902
4903 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4904 if (rc) {
4905 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4906 goto fail;
4907 }
4908
4909 return rc;
4910fail:
4911 regulator_put(vreg_ldo18_adc);
4912 return rc;
4913}
4914
4915static void pmic8058_xoadc_vreg_shutdown(void)
4916{
4917 regulator_put(vreg_ldo18_adc);
4918}
4919
4920/* usec. For this ADC,
4921 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4922 * Each channel has different configuration, thus at the time of starting
4923 * the conversion, xoadc will return actual conversion time
4924 * */
4925static struct adc_properties pm8058_xoadc_data = {
4926 .adc_reference = 2200, /* milli-voltage for this adc */
4927 .bitresolution = 15,
4928 .bipolar = 0,
4929 .conversiontime = 54,
4930};
4931
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304932static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004933 .xoadc_prop = &pm8058_xoadc_data,
4934 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4935 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4936 .xoadc_num = XOADC_PMIC_0,
4937 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4938 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4939};
4940#endif
4941
4942#ifdef CONFIG_MSM_SDIO_AL
4943
4944static unsigned mdm2ap_status = 140;
4945
4946static int configure_mdm2ap_status(int on)
4947{
4948 int ret = 0;
4949 if (on)
4950 ret = msm_gpiomux_get(mdm2ap_status);
4951 else
4952 ret = msm_gpiomux_put(mdm2ap_status);
4953
4954 if (ret)
4955 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4956 on);
4957
4958 return ret;
4959}
4960
4961
4962static int get_mdm2ap_status(void)
4963{
4964 return gpio_get_value(mdm2ap_status);
4965}
4966
4967static struct sdio_al_platform_data sdio_al_pdata = {
4968 .config_mdm2ap_status = configure_mdm2ap_status,
4969 .get_mdm2ap_status = get_mdm2ap_status,
4970 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004971 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004972 .peer_sdioc_version_major = 0x0004,
4973 .peer_sdioc_boot_version_minor = 0x0001,
4974 .peer_sdioc_boot_version_major = 0x0003
4975};
4976
4977struct platform_device msm_device_sdio_al = {
4978 .name = "msm_sdio_al",
4979 .id = -1,
4980 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004981 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004982 .platform_data = &sdio_al_pdata,
4983 },
4984};
4985
4986#endif /* CONFIG_MSM_SDIO_AL */
4987
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304988#define GPIO_VREG_ID_EXT_5V 0
4989
4990static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4991 REGULATOR_SUPPLY("ext_5v", NULL),
4992 REGULATOR_SUPPLY("8901_mpp0", NULL),
4993};
4994
4995#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4996 [GPIO_VREG_ID_##_id] = { \
4997 .init_data = { \
4998 .constraints = { \
4999 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5000 }, \
5001 .num_consumer_supplies = \
5002 ARRAY_SIZE(vreg_consumers_##_id), \
5003 .consumer_supplies = vreg_consumers_##_id, \
5004 }, \
5005 .regulator_name = _reg_name, \
5006 .active_low = _active_low, \
5007 .gpio_label = _gpio_label, \
5008 .gpio = _gpio, \
5009 }
5010
5011/* GPIO regulator constraints */
5012static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5013 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5014 PM8901_MPP_PM_TO_SYS(0), 0),
5015};
5016
5017/* GPIO regulator */
5018static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5019 .name = GPIO_REGULATOR_DEV_NAME,
5020 .id = PM8901_MPP_PM_TO_SYS(0),
5021 .dev = {
5022 .platform_data =
5023 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5024 },
5025};
5026
5027static void __init pm8901_vreg_mpp0_init(void)
5028{
5029 int rc;
5030
5031 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5032 .mpp = PM8901_MPP_PM_TO_SYS(0),
5033 .config = {
5034 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5035 .level = PM8901_MPP_DIG_LEVEL_VPH,
5036 },
5037 };
5038
5039 /*
5040 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5041 * implies that the regulator connected to MPP0 is enabled when
5042 * MPP0 is low.
5043 */
5044 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5045 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5046 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5047 } else {
5048 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5049 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5050 }
5051
5052 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5053 if (rc)
5054 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5055}
5056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005057static struct platform_device *charm_devices[] __initdata = {
5058 &msm_charm_modem,
5059#ifdef CONFIG_MSM_SDIO_AL
5060 &msm_device_sdio_al,
5061#endif
5062};
5063
Lei Zhou338cab82011-08-19 13:38:17 -04005064#ifdef CONFIG_SND_SOC_MSM8660_APQ
5065static struct platform_device *dragon_alsa_devices[] __initdata = {
5066 &msm_pcm,
5067 &msm_pcm_routing,
5068 &msm_cpudai0,
5069 &msm_cpudai1,
5070 &msm_cpudai_hdmi_rx,
5071 &msm_cpudai_bt_rx,
5072 &msm_cpudai_bt_tx,
5073 &msm_cpudai_fm_rx,
5074 &msm_cpudai_fm_tx,
5075 &msm_cpu_fe,
5076 &msm_stub_codec,
5077 &msm_lpa_pcm,
5078};
5079#endif
5080
5081static struct platform_device *asoc_devices[] __initdata = {
5082 &asoc_msm_pcm,
5083 &asoc_msm_dai0,
5084 &asoc_msm_dai1,
5085};
5086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005087static struct platform_device *surf_devices[] __initdata = {
5088 &msm_device_smd,
5089 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005090 &msm_pil_q6v3,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005091 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005092#ifdef CONFIG_I2C_QUP
5093 &msm_gsbi3_qup_i2c_device,
5094 &msm_gsbi4_qup_i2c_device,
5095 &msm_gsbi7_qup_i2c_device,
5096 &msm_gsbi8_qup_i2c_device,
5097 &msm_gsbi9_qup_i2c_device,
5098 &msm_gsbi12_qup_i2c_device,
5099#endif
5100#ifdef CONFIG_SERIAL_MSM_HS
5101 &msm_device_uart_dm1,
5102#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305103#ifdef CONFIG_MSM_SSBI
5104 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305105 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305106#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005107#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005108 &msm_device_ssbi3,
5109#endif
5110#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5111 &isp1763_device,
5112#endif
5113
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005114#if defined (CONFIG_MSM_8x60_VOIP)
5115 &asoc_msm_mvs,
5116 &asoc_mvs_dai0,
5117 &asoc_mvs_dai1,
5118#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005119
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005120#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5121 &msm_device_otg,
5122#endif
5123#ifdef CONFIG_USB_GADGET_MSM_72K
5124 &msm_device_gadget_peripheral,
5125#endif
5126#ifdef CONFIG_USB_G_ANDROID
5127 &android_usb_device,
5128#endif
5129#ifdef CONFIG_BATTERY_MSM
5130 &msm_batt_device,
5131#endif
5132#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005133#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005134 &android_pmem_device,
5135 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005136 &android_pmem_smipool_device,
5137#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005138 &android_pmem_audio_device,
5139#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005140#ifdef CONFIG_MSM_ROTATOR
5141 &msm_rotator_device,
5142#endif
5143 &msm_fb_device,
5144 &msm_kgsl_3d0,
5145 &msm_kgsl_2d0,
5146 &msm_kgsl_2d1,
5147 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005148#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5149 &lcdc_nt35582_panel_device,
5150#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005151#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5152 &lcdc_samsung_oled_panel_device,
5153#endif
5154#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5155 &lcdc_auo_wvga_panel_device,
5156#endif
5157#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5158 &hdmi_msm_device,
5159#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5160#ifdef CONFIG_FB_MSM_MIPI_DSI
5161 &mipi_dsi_toshiba_panel_device,
5162 &mipi_dsi_novatek_panel_device,
5163#endif
5164#ifdef CONFIG_MSM_CAMERA
5165#ifdef CONFIG_MT9E013
5166 &msm_camera_sensor_mt9e013,
5167#endif
5168#ifdef CONFIG_IMX074
5169 &msm_camera_sensor_imx074,
5170#endif
5171#ifdef CONFIG_WEBCAM_OV7692
5172 &msm_camera_sensor_webcam_ov7692,
5173#endif
5174#ifdef CONFIG_WEBCAM_OV9726
5175 &msm_camera_sensor_webcam_ov9726,
5176#endif
5177#ifdef CONFIG_QS_S5K4E1
5178 &msm_camera_sensor_qs_s5k4e1,
5179#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005180#ifdef CONFIG_VX6953
5181 &msm_camera_sensor_vx6953,
5182#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005183#endif
5184#ifdef CONFIG_MSM_GEMINI
5185 &msm_gemini_device,
5186#endif
5187#ifdef CONFIG_MSM_VPE
5188 &msm_vpe_device,
5189#endif
5190
5191#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5192 &msm_rpm_log_device,
5193#endif
5194#if defined(CONFIG_MSM_RPM_STATS_LOG)
5195 &msm_rpm_stat_device,
5196#endif
5197 &msm_device_vidc,
5198#if (defined(CONFIG_MARIMBA_CORE)) && \
5199 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5200 &msm_bt_power_device,
5201#endif
5202#ifdef CONFIG_SENSORS_MSM_ADC
5203 &msm_adc_device,
5204#endif
David Collins6f032ba2011-08-31 14:08:15 -07005205 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005206
5207#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5208 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5209 &qcrypto_device,
5210#endif
5211
5212#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5213 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5214 &qcedev_device,
5215#endif
5216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005217
5218#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5219#ifdef CONFIG_MSM_USE_TSIF1
5220 &msm_device_tsif[1],
5221#else
5222 &msm_device_tsif[0],
5223#endif /* CONFIG_MSM_USE_TSIF1 */
5224#endif /* CONFIG_TSIF */
5225
5226#ifdef CONFIG_HW_RANDOM_MSM
5227 &msm_device_rng,
5228#endif
5229
5230 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005231 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005232#ifdef CONFIG_ION_MSM
5233 &ion_dev,
5234#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005235 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005236};
5237
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005238#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005239static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005240 .nr = MSM_ION_HEAP_NUM,
5241 .heaps = {
5242 {
5243 .id = ION_HEAP_SYSTEM_ID,
5244 .type = ION_HEAP_TYPE_SYSTEM,
5245 .name = ION_VMALLOC_HEAP_NAME,
5246 },
5247 {
5248 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5249 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5250 .name = ION_KMALLOC_HEAP_NAME,
5251 },
5252#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5253 {
5254 .id = ION_HEAP_EBI_ID,
5255 .type = ION_HEAP_TYPE_CARVEOUT,
5256 .name = ION_EBI1_HEAP_NAME,
5257 .size = MSM_ION_EBI_SIZE,
5258 .memory_type = ION_EBI_TYPE,
5259 },
5260 {
5261 .id = ION_HEAP_ADSP_ID,
5262 .type = ION_HEAP_TYPE_CARVEOUT,
5263 .name = ION_ADSP_HEAP_NAME,
5264 .size = MSM_ION_ADSP_SIZE,
5265 .memory_type = ION_EBI_TYPE,
5266 },
5267 {
5268 .id = ION_HEAP_SMI_ID,
5269 .type = ION_HEAP_TYPE_CARVEOUT,
5270 .name = ION_SMI_HEAP_NAME,
5271 .size = MSM_ION_SMI_SIZE,
5272 .memory_type = ION_SMI_TYPE,
Olav Hauganee0f7802011-12-19 13:28:57 -08005273 .request_region = request_smi_region,
5274 .release_region = release_smi_region,
5275 .setup_region = setup_smi_region,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005276 },
5277#endif
5278 }
5279};
5280
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005281static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005282 .name = "ion-msm",
5283 .id = 1,
5284 .dev = { .platform_data = &ion_pdata },
5285};
5286#endif
5287
5288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005289static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5290 /* Kernel SMI memory pool for video core, used for firmware */
5291 /* and encoder, decoder scratch buffers */
5292 /* Kernel SMI memory pool should always precede the user space */
5293 /* SMI memory pool, as the video core will use offset address */
5294 /* from the Firmware base */
5295 [MEMTYPE_SMI_KERNEL] = {
5296 .start = KERNEL_SMI_BASE,
5297 .limit = KERNEL_SMI_SIZE,
5298 .size = KERNEL_SMI_SIZE,
5299 .flags = MEMTYPE_FLAGS_FIXED,
5300 },
5301 /* User space SMI memory pool for video core */
5302 /* used for encoder, decoder input & output buffers */
5303 [MEMTYPE_SMI] = {
5304 .start = USER_SMI_BASE,
5305 .limit = USER_SMI_SIZE,
5306 .flags = MEMTYPE_FLAGS_FIXED,
5307 },
5308 [MEMTYPE_EBI0] = {
5309 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5310 },
5311 [MEMTYPE_EBI1] = {
5312 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5313 },
5314};
5315
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005316static void reserve_ion_memory(void)
5317{
5318#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5319 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5320 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5321 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5322#endif
5323}
5324
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005325static void __init size_pmem_devices(void)
5326{
5327#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005328#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005329 android_pmem_adsp_pdata.size = pmem_adsp_size;
5330 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005331 android_pmem_pdata.size = pmem_sf_size;
5332#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005333 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5334#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005335}
5336
5337static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5338{
5339 msm8x60_reserve_table[p->memory_type].size += p->size;
5340}
5341
5342static void __init reserve_pmem_memory(void)
5343{
5344#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005345#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005346 reserve_memory_for(&android_pmem_adsp_pdata);
5347 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005348 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005349#endif
5350 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005351 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5352#endif
5353}
5354
Huaibin Yanga5419422011-12-08 23:52:10 -08005355static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005356
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005357static void __init msm8x60_calculate_reserve_sizes(void)
5358{
5359 size_pmem_devices();
5360 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005361 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005362 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005363}
5364
5365static int msm8x60_paddr_to_memtype(unsigned int paddr)
5366{
5367 if (paddr >= 0x40000000 && paddr < 0x60000000)
5368 return MEMTYPE_EBI1;
5369 if (paddr >= 0x38000000 && paddr < 0x40000000)
5370 return MEMTYPE_SMI;
5371 return MEMTYPE_NONE;
5372}
5373
5374static struct reserve_info msm8x60_reserve_info __initdata = {
5375 .memtype_reserve_table = msm8x60_reserve_table,
5376 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5377 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5378};
5379
5380static void __init msm8x60_reserve(void)
5381{
5382 reserve_info = &msm8x60_reserve_info;
5383 msm_reserve();
5384}
5385
5386#define EXT_CHG_VALID_MPP 10
5387#define EXT_CHG_VALID_MPP_2 11
5388
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305389static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305390 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305391 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305392 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305393 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5394};
5395
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005396#ifdef CONFIG_ISL9519_CHARGER
5397static int isl_detection_setup(void)
5398{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305399 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005400
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305401 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5402 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5403 &isl_mpp[i].config);
5404 if (ret) {
5405 pr_err("%s: Config MPP %d of PM8058 failed\n",
5406 __func__, isl_mpp[i].mpp);
5407 return ret;
5408 }
5409 }
5410
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005411 return ret;
5412}
5413
5414static struct isl_platform_data isl_data __initdata = {
5415 .chgcurrent = 700,
5416 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5417 .chg_detection_config = isl_detection_setup,
5418 .max_system_voltage = 4200,
5419 .min_system_voltage = 3200,
5420 .term_current = 120,
5421 .input_current = 2048,
5422};
5423
5424static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5425 {
5426 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305427 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005428 .platform_data = &isl_data,
5429 },
5430};
5431#endif
5432
5433#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5434static int smb137b_detection_setup(void)
5435{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305436 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005437
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305438 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5439 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5440 &isl_mpp[i].config);
5441 if (ret) {
5442 pr_err("%s: Config MPP %d of PM8058 failed\n",
5443 __func__, isl_mpp[i].mpp);
5444 return ret;
5445 }
5446 }
5447
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005448 return ret;
5449}
5450
5451static struct smb137b_platform_data smb137b_data __initdata = {
5452 .chg_detection_config = smb137b_detection_setup,
5453 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5454 .batt_mah_rating = 950,
5455};
5456
5457static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5458 {
5459 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305460 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005461 .platform_data = &smb137b_data,
5462 },
5463};
5464#endif
5465
5466#ifdef CONFIG_PMIC8058
5467#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305468#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005469
5470static int pm8058_gpios_init(void)
5471{
5472 int i;
5473 int rc;
5474 struct pm8058_gpio_cfg {
5475 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305476 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005477 };
5478
5479 struct pm8058_gpio_cfg gpio_cfgs[] = {
5480 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305481 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005482 {
5483 .direction = PM_GPIO_DIR_IN,
5484 .pull = PM_GPIO_PULL_DN,
5485 .vin_sel = 2,
5486 .function = PM_GPIO_FUNC_NORMAL,
5487 .inv_int_pol = 0,
5488 },
5489 },
5490#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5491 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305492 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005493 {
5494 .direction = PM_GPIO_DIR_IN,
5495 .pull = PM_GPIO_PULL_UP_30,
5496 .vin_sel = 2,
5497 .function = PM_GPIO_FUNC_NORMAL,
5498 .inv_int_pol = 0,
5499 },
5500 },
5501#endif
5502 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305503 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005504 {
5505 .direction = PM_GPIO_DIR_IN,
5506 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305507 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005508 .function = PM_GPIO_FUNC_NORMAL,
5509 .inv_int_pol = 0,
5510 },
5511 },
5512 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305513 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005514 {
5515 .direction = PM_GPIO_DIR_IN,
5516 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305517 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005518 .function = PM_GPIO_FUNC_NORMAL,
5519 .inv_int_pol = 0,
5520 },
5521 },
5522 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305523 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005524 {
5525 .direction = PM_GPIO_DIR_IN,
5526 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305527 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005528 .function = PM_GPIO_FUNC_NORMAL,
5529 .inv_int_pol = 0,
5530 },
5531 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005532 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305533 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005534 {
5535 .direction = PM_GPIO_DIR_OUT,
5536 .output_value = 1,
5537 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5538 .pull = PM_GPIO_PULL_DN,
5539 .out_strength = PM_GPIO_STRENGTH_HIGH,
5540 .function = PM_GPIO_FUNC_NORMAL,
5541 .vin_sel = 2,
5542 .inv_int_pol = 0,
5543 }
5544 },
5545 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305546 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005547 {
5548 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305549 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005550 .function = PM_GPIO_FUNC_NORMAL,
5551 .vin_sel = 2,
5552 .inv_int_pol = 0,
5553 }
5554 },
5555 };
5556
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305557#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5558 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305559 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305560 .direction = PM_GPIO_DIR_IN,
5561 .pull = PM_GPIO_PULL_UP_1P5,
5562 .vin_sel = 2,
5563 .function = PM_GPIO_FUNC_NORMAL,
5564 };
5565#endif
5566
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005567#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305568 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305569 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305570 .direction = PM_GPIO_DIR_OUT,
5571 .pull = PM_GPIO_PULL_NO,
5572 .out_strength = PM_GPIO_STRENGTH_HIGH,
5573 .function = PM_GPIO_FUNC_NORMAL,
5574 .inv_int_pol = 0,
5575 .vin_sel = 2,
5576 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5577 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005578 };
5579#endif
5580
5581#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5582 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305583 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005584 {
5585 .direction = PM_GPIO_DIR_IN,
5586 .pull = PM_GPIO_PULL_UP_1P5,
5587 .vin_sel = 2,
5588 .function = PM_GPIO_FUNC_NORMAL,
5589 .inv_int_pol = 0,
5590 }
5591 };
5592#endif
5593
5594#if defined(CONFIG_QS_S5K4E1)
5595 {
5596 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305597 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005598 {
5599 .direction = PM_GPIO_DIR_OUT,
5600 .output_value = 0,
5601 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5602 .pull = PM_GPIO_PULL_DN,
5603 .out_strength = PM_GPIO_STRENGTH_HIGH,
5604 .function = PM_GPIO_FUNC_NORMAL,
5605 .vin_sel = 2,
5606 .inv_int_pol = 0,
5607 }
5608 };
5609#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005610#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5611 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305612 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005613 {
5614 .direction = PM_GPIO_DIR_OUT,
5615 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5616 .output_value = 1,
5617 .pull = PM_GPIO_PULL_UP_30,
5618 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305619 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005620 .out_strength = PM_GPIO_STRENGTH_HIGH,
5621 .function = PM_GPIO_FUNC_NORMAL,
5622 .inv_int_pol = 0,
5623 }
5624 };
5625#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005626#if defined(CONFIG_HAPTIC_ISA1200) || \
5627 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5628 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305629 rc = pm8xxx_gpio_config(
5630 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5631 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005632 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305633 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005634 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305635 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305636 rc = pm8xxx_gpio_config(
5637 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5638 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305639 if (rc < 0) {
5640 pr_err("%s: pmic haptics ldo gpio config failed\n",
5641 __func__);
5642 }
5643
5644 }
5645#endif
5646
5647#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5648 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5649 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5650 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305651 rc = pm8xxx_gpio_config(
5652 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5653 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305654 if (rc < 0) {
5655 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5656 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005657 }
5658 }
5659#endif
5660
5661#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5662 /* Line_in only for 8660 ffa & surf */
5663 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005664 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005665 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305666 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005667 &line_in_gpio_cfg.cfg);
5668 if (rc < 0) {
5669 pr_err("%s pmic line_in gpio config failed\n",
5670 __func__);
5671 return rc;
5672 }
5673 }
5674#endif
5675
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005676#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5677 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305678 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005679 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5680 if (rc < 0) {
5681 pr_err("%s pmic gpio config failed\n", __func__);
5682 return rc;
5683 }
5684 }
5685#endif
5686
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005687#if defined(CONFIG_QS_S5K4E1)
5688 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5689 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305690 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005691 &qs_hc37_cam_pd_gpio_cfg.cfg);
5692 if (rc < 0) {
5693 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5694 __func__);
5695 return rc;
5696 }
5697 }
5698 }
5699#endif
5700
5701 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305702 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005703 &gpio_cfgs[i].cfg);
5704 if (rc < 0) {
5705 pr_err("%s pmic gpio config failed\n",
5706 __func__);
5707 return rc;
5708 }
5709 }
5710
5711 return 0;
5712}
5713
5714static const unsigned int ffa_keymap[] = {
5715 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5716 KEY(0, 1, KEY_UP), /* NAV - UP */
5717 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5718 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5719
5720 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5721 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5722 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5723 KEY(1, 3, KEY_VOLUMEDOWN),
5724
5725 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5726
5727 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5728 KEY(4, 1, KEY_UP), /* USER_UP */
5729 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5730 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5731 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5732
5733 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5734 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5735 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5736 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5737 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5738};
5739
Zhang Chang Ken683be172011-08-10 17:45:34 -04005740static const unsigned int dragon_keymap[] = {
5741 KEY(0, 0, KEY_MENU),
5742 KEY(0, 2, KEY_1),
5743 KEY(0, 3, KEY_4),
5744 KEY(0, 4, KEY_7),
5745
5746 KEY(1, 0, KEY_UP),
5747 KEY(1, 1, KEY_LEFT),
5748 KEY(1, 2, KEY_DOWN),
5749 KEY(1, 3, KEY_5),
5750 KEY(1, 4, KEY_8),
5751
5752 KEY(2, 0, KEY_HOME),
5753 KEY(2, 1, KEY_REPLY),
5754 KEY(2, 2, KEY_2),
5755 KEY(2, 3, KEY_6),
5756 KEY(2, 4, KEY_0),
5757
5758 KEY(3, 0, KEY_VOLUMEUP),
5759 KEY(3, 1, KEY_RIGHT),
5760 KEY(3, 2, KEY_3),
5761 KEY(3, 3, KEY_9),
5762 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5763
5764 KEY(4, 0, KEY_VOLUMEDOWN),
5765 KEY(4, 1, KEY_BACK),
5766 KEY(4, 2, KEY_CAMERA),
5767 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5768};
5769
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005770static struct matrix_keymap_data ffa_keymap_data = {
5771 .keymap_size = ARRAY_SIZE(ffa_keymap),
5772 .keymap = ffa_keymap,
5773};
5774
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305775static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005776 .input_name = "ffa-keypad",
5777 .input_phys_device = "ffa-keypad/input0",
5778 .num_rows = 6,
5779 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305780 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5781 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5782 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005783 .scan_delay_ms = 32,
5784 .row_hold_ns = 91500,
5785 .wakeup = 1,
5786 .keymap_data = &ffa_keymap_data,
5787};
5788
Zhang Chang Ken683be172011-08-10 17:45:34 -04005789static struct matrix_keymap_data dragon_keymap_data = {
5790 .keymap_size = ARRAY_SIZE(dragon_keymap),
5791 .keymap = dragon_keymap,
5792};
5793
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305794static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005795 .input_name = "dragon-keypad",
5796 .input_phys_device = "dragon-keypad/input0",
5797 .num_rows = 6,
5798 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305799 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5800 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5801 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005802 .scan_delay_ms = 32,
5803 .row_hold_ns = 91500,
5804 .wakeup = 1,
5805 .keymap_data = &dragon_keymap_data,
5806};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305807
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005808static const unsigned int fluid_keymap[] = {
5809 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5810 KEY(0, 1, KEY_UP), /* NAV - UP */
5811 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5812 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5813
5814 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5815 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5816 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5817 KEY(1, 3, KEY_VOLUMEUP),
5818
5819 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5820
5821 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5822 KEY(4, 1, KEY_UP), /* USER_UP */
5823 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5824 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5825 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5826
Jilai Wang9a895102011-07-12 14:00:35 -04005827 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005828 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5829 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5830 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5831 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5832};
5833
5834static struct matrix_keymap_data fluid_keymap_data = {
5835 .keymap_size = ARRAY_SIZE(fluid_keymap),
5836 .keymap = fluid_keymap,
5837};
5838
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305839static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005840 .input_name = "fluid-keypad",
5841 .input_phys_device = "fluid-keypad/input0",
5842 .num_rows = 6,
5843 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305844 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5845 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5846 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005847 .scan_delay_ms = 32,
5848 .row_hold_ns = 91500,
5849 .wakeup = 1,
5850 .keymap_data = &fluid_keymap_data,
5851};
5852
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305853static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005854 .initial_vibrate_ms = 500,
5855 .level_mV = 3000,
5856 .max_timeout_ms = 15000,
5857};
5858
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305859static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5860 .rtc_write_enable = false,
5861 .rtc_alarm_powerup = false,
5862};
5863
5864static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5865 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005866 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305867 .wakeup = 1,
5868};
5869
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005870#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5871
5872static struct othc_accessory_info othc_accessories[] = {
5873 {
5874 .accessory = OTHC_SVIDEO_OUT,
5875 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5876 | OTHC_ADC_DETECT,
5877 .key_code = SW_VIDEOOUT_INSERT,
5878 .enabled = false,
5879 .adc_thres = {
5880 .min_threshold = 20,
5881 .max_threshold = 40,
5882 },
5883 },
5884 {
5885 .accessory = OTHC_ANC_HEADPHONE,
5886 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5887 OTHC_SWITCH_DETECT,
5888 .gpio = PM8058_LINE_IN_DET_GPIO,
5889 .active_low = 1,
5890 .key_code = SW_HEADPHONE_INSERT,
5891 .enabled = true,
5892 },
5893 {
5894 .accessory = OTHC_ANC_HEADSET,
5895 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5896 .gpio = PM8058_LINE_IN_DET_GPIO,
5897 .active_low = 1,
5898 .key_code = SW_HEADPHONE_INSERT,
5899 .enabled = true,
5900 },
5901 {
5902 .accessory = OTHC_HEADPHONE,
5903 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5904 .key_code = SW_HEADPHONE_INSERT,
5905 .enabled = true,
5906 },
5907 {
5908 .accessory = OTHC_MICROPHONE,
5909 .detect_flags = OTHC_GPIO_DETECT,
5910 .gpio = PM8058_LINE_IN_DET_GPIO,
5911 .active_low = 1,
5912 .key_code = SW_MICROPHONE_INSERT,
5913 .enabled = true,
5914 },
5915 {
5916 .accessory = OTHC_HEADSET,
5917 .detect_flags = OTHC_MICBIAS_DETECT,
5918 .key_code = SW_HEADPHONE_INSERT,
5919 .enabled = true,
5920 },
5921};
5922
5923static struct othc_switch_info switch_info[] = {
5924 {
5925 .min_adc_threshold = 0,
5926 .max_adc_threshold = 100,
5927 .key_code = KEY_PLAYPAUSE,
5928 },
5929 {
5930 .min_adc_threshold = 100,
5931 .max_adc_threshold = 200,
5932 .key_code = KEY_REWIND,
5933 },
5934 {
5935 .min_adc_threshold = 200,
5936 .max_adc_threshold = 500,
5937 .key_code = KEY_FASTFORWARD,
5938 },
5939};
5940
5941static struct othc_n_switch_config switch_config = {
5942 .voltage_settling_time_ms = 0,
5943 .num_adc_samples = 3,
5944 .adc_channel = CHANNEL_ADC_HDSET,
5945 .switch_info = switch_info,
5946 .num_keys = ARRAY_SIZE(switch_info),
5947 .default_sw_en = true,
5948 .default_sw_idx = 0,
5949};
5950
5951static struct hsed_bias_config hsed_bias_config = {
5952 /* HSED mic bias config info */
5953 .othc_headset = OTHC_HEADSET_NO,
5954 .othc_lowcurr_thresh_uA = 100,
5955 .othc_highcurr_thresh_uA = 600,
5956 .othc_hyst_prediv_us = 7800,
5957 .othc_period_clkdiv_us = 62500,
5958 .othc_hyst_clk_us = 121000,
5959 .othc_period_clk_us = 312500,
5960 .othc_wakeup = 1,
5961};
5962
5963static struct othc_hsed_config hsed_config_1 = {
5964 .hsed_bias_config = &hsed_bias_config,
5965 /*
5966 * The detection delay and switch reporting delay are
5967 * required to encounter a hardware bug (spurious switch
5968 * interrupts on slow insertion/removal of the headset).
5969 * This will introduce a delay in reporting the accessory
5970 * insertion and removal to the userspace.
5971 */
5972 .detection_delay_ms = 1500,
5973 /* Switch info */
5974 .switch_debounce_ms = 1500,
5975 .othc_support_n_switch = false,
5976 .switch_config = &switch_config,
5977 .ir_gpio = -1,
5978 /* Accessory info */
5979 .accessories_support = true,
5980 .accessories = othc_accessories,
5981 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5982};
5983
5984static struct othc_regulator_config othc_reg = {
5985 .regulator = "8058_l5",
5986 .max_uV = 2850000,
5987 .min_uV = 2850000,
5988};
5989
5990/* MIC_BIAS0 is configured as normal MIC BIAS */
5991static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5992 .micbias_select = OTHC_MICBIAS_0,
5993 .micbias_capability = OTHC_MICBIAS,
5994 .micbias_enable = OTHC_SIGNAL_OFF,
5995 .micbias_regulator = &othc_reg,
5996};
5997
5998/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5999static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6000 .micbias_select = OTHC_MICBIAS_1,
6001 .micbias_capability = OTHC_MICBIAS_HSED,
6002 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6003 .micbias_regulator = &othc_reg,
6004 .hsed_config = &hsed_config_1,
6005 .hsed_name = "8660_handset",
6006};
6007
6008/* MIC_BIAS2 is configured as normal MIC BIAS */
6009static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6010 .micbias_select = OTHC_MICBIAS_2,
6011 .micbias_capability = OTHC_MICBIAS,
6012 .micbias_enable = OTHC_SIGNAL_OFF,
6013 .micbias_regulator = &othc_reg,
6014};
6015
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006016
6017static void __init msm8x60_init_pm8058_othc(void)
6018{
6019 int i;
6020
6021 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6022 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6023 machine_is_msm8x60_fusn_ffa()) {
6024 /* 3-switch headset supported only by V2 FFA and FLUID */
6025 hsed_config_1.accessories_adc_support = true,
6026 /* ADC based accessory detection works only on V2 and FLUID */
6027 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6028 hsed_config_1.othc_support_n_switch = true;
6029 }
6030
6031 /* IR GPIO is absent on FLUID */
6032 if (machine_is_msm8x60_fluid())
6033 hsed_config_1.ir_gpio = -1;
6034
6035 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6036 if (machine_is_msm8x60_fluid()) {
6037 switch (othc_accessories[i].accessory) {
6038 case OTHC_ANC_HEADPHONE:
6039 case OTHC_ANC_HEADSET:
6040 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6041 break;
6042 case OTHC_MICROPHONE:
6043 othc_accessories[i].enabled = false;
6044 break;
6045 case OTHC_SVIDEO_OUT:
6046 othc_accessories[i].enabled = true;
6047 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6048 break;
6049 }
6050 }
6051 }
6052}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006053
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006054
6055static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6056{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306057 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006058 .direction = PM_GPIO_DIR_OUT,
6059 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6060 .output_value = 0,
6061 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306062 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006063 .out_strength = PM_GPIO_STRENGTH_HIGH,
6064 .function = PM_GPIO_FUNC_2,
6065 };
6066
6067 int rc = -EINVAL;
6068 int id, mode, max_mA;
6069
6070 id = mode = max_mA = 0;
6071 switch (ch) {
6072 case 0:
6073 case 1:
6074 case 2:
6075 if (on) {
6076 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306077 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6078 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006079 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306080 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006081 __func__, id, rc);
6082 }
6083 break;
6084
6085 case 6:
6086 id = PM_PWM_LED_FLASH;
6087 mode = PM_PWM_CONF_PWM1;
6088 max_mA = 300;
6089 break;
6090
6091 case 7:
6092 id = PM_PWM_LED_FLASH1;
6093 mode = PM_PWM_CONF_PWM1;
6094 max_mA = 300;
6095 break;
6096
6097 default:
6098 break;
6099 }
6100
6101 if (ch >= 6 && ch <= 7) {
6102 if (!on) {
6103 mode = PM_PWM_CONF_NONE;
6104 max_mA = 0;
6105 }
6106 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6107 if (rc)
6108 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6109 __func__, ch, rc);
6110 }
6111 return rc;
6112
6113}
6114
6115static struct pm8058_pwm_pdata pm8058_pwm_data = {
6116 .config = pm8058_pwm_config,
6117};
6118
6119#define PM8058_GPIO_INT 88
6120
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006121static struct pmic8058_led pmic8058_flash_leds[] = {
6122 [0] = {
6123 .name = "camera:flash0",
6124 .max_brightness = 15,
6125 .id = PMIC8058_ID_FLASH_LED_0,
6126 },
6127 [1] = {
6128 .name = "camera:flash1",
6129 .max_brightness = 15,
6130 .id = PMIC8058_ID_FLASH_LED_1,
6131 },
6132};
6133
6134static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6135 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6136 .leds = pmic8058_flash_leds,
6137};
6138
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006139static struct pmic8058_led pmic8058_dragon_leds[] = {
6140 [0] = {
6141 /* RED */
6142 .name = "led_drv0",
6143 .max_brightness = 15,
6144 .id = PMIC8058_ID_LED_0,
6145 },/* 300 mA flash led0 drv sink */
6146 [1] = {
6147 /* Yellow */
6148 .name = "led_drv1",
6149 .max_brightness = 15,
6150 .id = PMIC8058_ID_LED_1,
6151 },/* 300 mA flash led0 drv sink */
6152 [2] = {
6153 /* Green */
6154 .name = "led_drv2",
6155 .max_brightness = 15,
6156 .id = PMIC8058_ID_LED_2,
6157 },/* 300 mA flash led0 drv sink */
6158 [3] = {
6159 .name = "led_psensor",
6160 .max_brightness = 15,
6161 .id = PMIC8058_ID_LED_KB_LIGHT,
6162 },/* 300 mA flash led0 drv sink */
6163};
6164
6165static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6166 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6167 .leds = pmic8058_dragon_leds,
6168};
6169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006170static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6171 [0] = {
6172 .name = "led:drv0",
6173 .max_brightness = 15,
6174 .id = PMIC8058_ID_FLASH_LED_0,
6175 },/* 300 mA flash led0 drv sink */
6176 [1] = {
6177 .name = "led:drv1",
6178 .max_brightness = 15,
6179 .id = PMIC8058_ID_FLASH_LED_1,
6180 },/* 300 mA flash led1 sink */
6181 [2] = {
6182 .name = "led:drv2",
6183 .max_brightness = 20,
6184 .id = PMIC8058_ID_LED_0,
6185 },/* 40 mA led0 sink */
6186 [3] = {
6187 .name = "keypad:drv",
6188 .max_brightness = 15,
6189 .id = PMIC8058_ID_LED_KB_LIGHT,
6190 },/* 300 mA keypad drv sink */
6191};
6192
6193static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6194 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6195 .leds = pmic8058_fluid_flash_leds,
6196};
6197
Terence Hampson90508a92011-08-09 10:40:08 -04006198static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306199 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006200 .max_source_current = 1800,
6201 .charger_type = CHG_TYPE_AC,
6202};
6203
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306204static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6205 .charger_data_valid = false,
6206};
6207
6208static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6209 .priority = 0,
6210};
6211
6212static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6213 .irq_base = PM8058_IRQ_BASE,
6214 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6215 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6216};
6217
6218static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6219 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6220};
6221
6222static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6223 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006224};
6225
6226static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306227 .irq_pdata = &pm8058_irq_pdata,
6228 .gpio_pdata = &pm8058_gpio_pdata,
6229 .mpp_pdata = &pm8058_mpp_pdata,
6230 .rtc_pdata = &pm8058_rtc_pdata,
6231 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6232 .othc0_pdata = &othc_config_pdata_0,
6233 .othc1_pdata = &othc_config_pdata_1,
6234 .othc2_pdata = &othc_config_pdata_2,
6235 .pwm_pdata = &pm8058_pwm_data,
6236 .misc_pdata = &pm8058_misc_pdata,
6237#ifdef CONFIG_SENSORS_MSM_ADC
6238 .xoadc_pdata = &pm8058_xoadc_pdata,
6239#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006240};
6241
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306242#ifdef CONFIG_MSM_SSBI
6243static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6244 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6245 .slave = {
6246 .name = "pm8058-core",
6247 .platform_data = &pm8058_platform_data,
6248 },
6249};
6250#endif
6251#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006252
6253#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6254 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6255#define TDISC_I2C_SLAVE_ADDR 0x67
6256#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6257#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6258
6259static const char *vregs_tdisc_name[] = {
6260 "8058_l5",
6261 "8058_s3",
6262};
6263
6264static const int vregs_tdisc_val[] = {
6265 2850000,/* uV */
6266 1800000,
6267};
6268static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6269
6270static int tdisc_shinetsu_setup(void)
6271{
6272 int rc, i;
6273
6274 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6275 if (rc) {
6276 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6277 __func__);
6278 return rc;
6279 }
6280
6281 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6282 if (rc) {
6283 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6284 __func__);
6285 goto fail_gpio_oe;
6286 }
6287
6288 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6289 if (rc) {
6290 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6291 __func__);
6292 gpio_free(GPIO_JOYSTICK_EN);
6293 goto fail_gpio_oe;
6294 }
6295
6296 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6297 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6298 if (IS_ERR(vregs_tdisc[i])) {
6299 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6300 __func__, vregs_tdisc_name[i],
6301 PTR_ERR(vregs_tdisc[i]));
6302 rc = PTR_ERR(vregs_tdisc[i]);
6303 goto vreg_get_fail;
6304 }
6305
6306 rc = regulator_set_voltage(vregs_tdisc[i],
6307 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6308 if (rc) {
6309 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6310 __func__, rc);
6311 goto vreg_set_voltage_fail;
6312 }
6313 }
6314
6315 return rc;
6316vreg_set_voltage_fail:
6317 i++;
6318vreg_get_fail:
6319 while (i)
6320 regulator_put(vregs_tdisc[--i]);
6321fail_gpio_oe:
6322 gpio_free(PMIC_GPIO_TDISC);
6323 return rc;
6324}
6325
6326static void tdisc_shinetsu_release(void)
6327{
6328 int i;
6329
6330 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6331 regulator_put(vregs_tdisc[i]);
6332
6333 gpio_free(PMIC_GPIO_TDISC);
6334 gpio_free(GPIO_JOYSTICK_EN);
6335}
6336
6337static int tdisc_shinetsu_enable(void)
6338{
6339 int i, rc = -EINVAL;
6340
6341 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6342 rc = regulator_enable(vregs_tdisc[i]);
6343 if (rc < 0) {
6344 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6345 __func__, vregs_tdisc_name[i], rc);
6346 goto vreg_fail;
6347 }
6348 }
6349
6350 /* Enable the OE (output enable) gpio */
6351 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6352 /* voltage and gpio stabilization delay */
6353 msleep(50);
6354
6355 return 0;
6356vreg_fail:
6357 while (i)
6358 regulator_disable(vregs_tdisc[--i]);
6359 return rc;
6360}
6361
6362static int tdisc_shinetsu_disable(void)
6363{
6364 int i, rc;
6365
6366 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6367 rc = regulator_disable(vregs_tdisc[i]);
6368 if (rc < 0) {
6369 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6370 __func__, vregs_tdisc_name[i], rc);
6371 goto tdisc_reg_fail;
6372 }
6373 }
6374
6375 /* Disable the OE (output enable) gpio */
6376 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6377
6378 return 0;
6379
6380tdisc_reg_fail:
6381 while (i)
6382 regulator_enable(vregs_tdisc[--i]);
6383 return rc;
6384}
6385
6386static struct tdisc_abs_values tdisc_abs = {
6387 .x_max = 32,
6388 .y_max = 32,
6389 .x_min = -32,
6390 .y_min = -32,
6391 .pressure_max = 32,
6392 .pressure_min = 0,
6393};
6394
6395static struct tdisc_platform_data tdisc_data = {
6396 .tdisc_setup = tdisc_shinetsu_setup,
6397 .tdisc_release = tdisc_shinetsu_release,
6398 .tdisc_enable = tdisc_shinetsu_enable,
6399 .tdisc_disable = tdisc_shinetsu_disable,
6400 .tdisc_wakeup = 0,
6401 .tdisc_gpio = PMIC_GPIO_TDISC,
6402 .tdisc_report_keys = true,
6403 .tdisc_report_relative = true,
6404 .tdisc_report_absolute = false,
6405 .tdisc_report_wheel = false,
6406 .tdisc_reverse_x = false,
6407 .tdisc_reverse_y = true,
6408 .tdisc_abs = &tdisc_abs,
6409};
6410
6411static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6412 {
6413 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6414 .irq = TDISC_INT,
6415 .platform_data = &tdisc_data,
6416 },
6417};
6418#endif
6419
6420#define PM_GPIO_CDC_RST_N 20
6421#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6422
6423static struct regulator *vreg_timpani_1;
6424static struct regulator *vreg_timpani_2;
6425
6426static unsigned int msm_timpani_setup_power(void)
6427{
6428 int rc;
6429
6430 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6431 if (IS_ERR(vreg_timpani_1)) {
6432 pr_err("%s: Unable to get 8058_l0\n", __func__);
6433 return -ENODEV;
6434 }
6435
6436 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6437 if (IS_ERR(vreg_timpani_2)) {
6438 pr_err("%s: Unable to get 8058_s3\n", __func__);
6439 regulator_put(vreg_timpani_1);
6440 return -ENODEV;
6441 }
6442
6443 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6444 if (rc) {
6445 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6446 goto fail;
6447 }
6448
6449 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6450 if (rc) {
6451 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6452 goto fail;
6453 }
6454
6455 rc = regulator_enable(vreg_timpani_1);
6456 if (rc) {
6457 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6458 goto fail;
6459 }
6460
6461 /* The settings for LDO0 should be set such that
6462 * it doesn't require to reset the timpani. */
6463 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6464 if (rc < 0) {
6465 pr_err("Timpani regulator optimum mode setting failed\n");
6466 goto fail;
6467 }
6468
6469 rc = regulator_enable(vreg_timpani_2);
6470 if (rc) {
6471 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6472 regulator_disable(vreg_timpani_1);
6473 goto fail;
6474 }
6475
6476 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6477 if (rc) {
6478 pr_err("%s: GPIO Request %d failed\n", __func__,
6479 GPIO_CDC_RST_N);
6480 regulator_disable(vreg_timpani_1);
6481 regulator_disable(vreg_timpani_2);
6482 goto fail;
6483 } else {
6484 gpio_direction_output(GPIO_CDC_RST_N, 1);
6485 usleep_range(1000, 1050);
6486 gpio_direction_output(GPIO_CDC_RST_N, 0);
6487 usleep_range(1000, 1050);
6488 gpio_direction_output(GPIO_CDC_RST_N, 1);
6489 gpio_free(GPIO_CDC_RST_N);
6490 }
6491 return rc;
6492
6493fail:
6494 regulator_put(vreg_timpani_1);
6495 regulator_put(vreg_timpani_2);
6496 return rc;
6497}
6498
6499static void msm_timpani_shutdown_power(void)
6500{
6501 int rc;
6502
6503 rc = regulator_disable(vreg_timpani_1);
6504 if (rc)
6505 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6506
6507 regulator_put(vreg_timpani_1);
6508
6509 rc = regulator_disable(vreg_timpani_2);
6510 if (rc)
6511 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6512
6513 regulator_put(vreg_timpani_2);
6514}
6515
6516/* Power analog function of codec */
6517static struct regulator *vreg_timpani_cdc_apwr;
6518static int msm_timpani_codec_power(int vreg_on)
6519{
6520 int rc = 0;
6521
6522 if (!vreg_timpani_cdc_apwr) {
6523
6524 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6525
6526 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6527 pr_err("%s: vreg_get failed (%ld)\n",
6528 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6529 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6530 return rc;
6531 }
6532 }
6533
6534 if (vreg_on) {
6535
6536 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6537 2200000, 2200000);
6538 if (rc) {
6539 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6540 __func__);
6541 goto vreg_fail;
6542 }
6543
6544 rc = regulator_enable(vreg_timpani_cdc_apwr);
6545 if (rc) {
6546 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6547 goto vreg_fail;
6548 }
6549 } else {
6550 rc = regulator_disable(vreg_timpani_cdc_apwr);
6551 if (rc) {
6552 pr_err("%s: vreg_disable failed %d\n",
6553 __func__, rc);
6554 goto vreg_fail;
6555 }
6556 }
6557
6558 return 0;
6559
6560vreg_fail:
6561 regulator_put(vreg_timpani_cdc_apwr);
6562 vreg_timpani_cdc_apwr = NULL;
6563 return rc;
6564}
6565
6566static struct marimba_codec_platform_data timpani_codec_pdata = {
6567 .marimba_codec_power = msm_timpani_codec_power,
6568};
6569
6570#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6571#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6572
6573static struct marimba_platform_data timpani_pdata = {
6574 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6575 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6576 .marimba_setup = msm_timpani_setup_power,
6577 .marimba_shutdown = msm_timpani_shutdown_power,
6578 .codec = &timpani_codec_pdata,
6579 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6580};
6581
6582#define TIMPANI_I2C_SLAVE_ADDR 0xD
6583
6584static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6585 {
6586 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6587 .platform_data = &timpani_pdata,
6588 },
6589};
6590
Lei Zhou338cab82011-08-19 13:38:17 -04006591#ifdef CONFIG_SND_SOC_WM8903
6592static struct wm8903_platform_data wm8903_pdata = {
6593 .gpio_cfg[2] = 0x3A8,
6594};
6595
6596#define WM8903_I2C_SLAVE_ADDR 0x34
6597static struct i2c_board_info wm8903_codec_i2c_info[] = {
6598 {
6599 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6600 .platform_data = &wm8903_pdata,
6601 },
6602};
6603#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006604#ifdef CONFIG_PMIC8901
6605
6606#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006607/*
6608 * Consumer specific regulator names:
6609 * regulator name consumer dev_name
6610 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006611static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6612 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6613};
6614static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6615 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6616};
6617
6618#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306619 _always_on) \
6620 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006621 .init_data = { \
6622 .constraints = { \
6623 .valid_modes_mask = _modes, \
6624 .valid_ops_mask = _ops, \
6625 .min_uV = _min_uV, \
6626 .max_uV = _max_uV, \
6627 .input_uV = _min_uV, \
6628 .apply_uV = _apply_uV, \
6629 .always_on = _always_on, \
6630 }, \
6631 .consumer_supplies = vreg_consumers_8901_##_id, \
6632 .num_consumer_supplies = \
6633 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6634 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306635 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006636 }
6637
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006638#define PM8901_VREG_INIT_VS(_id) \
6639 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306640 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006641
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306642static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006643 PM8901_VREG_INIT_VS(USB_OTG),
6644 PM8901_VREG_INIT_VS(HDMI_MVS),
6645};
6646
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306647static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6648 .priority = 1,
6649};
6650
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306651static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6652 .irq_base = PM8901_IRQ_BASE,
6653 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6654 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6655};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006656
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306657static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6658 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006659};
6660
6661static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306662 .irq_pdata = &pm8901_irq_pdata,
6663 .mpp_pdata = &pm8901_mpp_pdata,
6664 .regulator_pdatas = pm8901_vreg_init,
6665 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306666 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006667};
6668
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306669static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6670 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6671 .slave = {
6672 .name = "pm8901-core",
6673 .platform_data = &pm8901_platform_data,
6674 },
6675};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006676#endif /* CONFIG_PMIC8901 */
6677
6678#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6679 || defined(CONFIG_GPIO_SX150X_MODULE))
6680
6681static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006682static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006683
6684struct bahama_config_register{
6685 u8 reg;
6686 u8 value;
6687 u8 mask;
6688};
6689
6690enum version{
6691 VER_1_0,
6692 VER_2_0,
6693 VER_UNSUPPORTED = 0xFF
6694};
6695
6696static u8 read_bahama_ver(void)
6697{
6698 int rc;
6699 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6700 u8 bahama_version;
6701
6702 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6703 if (rc < 0) {
6704 printk(KERN_ERR
6705 "%s: version read failed: %d\n",
6706 __func__, rc);
6707 return VER_UNSUPPORTED;
6708 } else {
6709 printk(KERN_INFO
6710 "%s: version read got: 0x%x\n",
6711 __func__, bahama_version);
6712 }
6713
6714 switch (bahama_version) {
6715 case 0x08: /* varient of bahama v1 */
6716 case 0x10:
6717 case 0x00:
6718 return VER_1_0;
6719 case 0x09: /* variant of bahama v2 */
6720 return VER_2_0;
6721 default:
6722 return VER_UNSUPPORTED;
6723 }
6724}
6725
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006726static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006727static unsigned int msm_bahama_setup_power(void)
6728{
6729 int rc = 0;
6730 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006731
6732 if (machine_is_msm8x60_dragon())
6733 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006735 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6736
6737 if (IS_ERR(vreg_bahama)) {
6738 rc = PTR_ERR(vreg_bahama);
6739 pr_err("%s: regulator_get %s = %d\n", __func__,
6740 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006741 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006742 }
6743
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006744 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6745 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006746 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6747 msm_bahama_regulator, rc);
6748 goto unget;
6749 }
6750
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006751 rc = regulator_enable(vreg_bahama);
6752 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006753 pr_err("%s: regulator_enable %s = %d\n", __func__,
6754 msm_bahama_regulator, rc);
6755 goto unget;
6756 }
6757
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006758 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6759 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006760 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006761 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006762 goto unenable;
6763 }
6764
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006765 gpio_direction_output(msm_bahama_sys_rst, 0);
6766 usleep_range(1000, 1050);
6767 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6768 usleep_range(1000, 1050);
6769 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006770 return rc;
6771
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006772unenable:
6773 regulator_disable(vreg_bahama);
6774unget:
6775 regulator_put(vreg_bahama);
6776 return rc;
6777};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006778
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006779static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006780{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006781 if (msm_bahama_setup_power_enable) {
6782 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6783 gpio_free(msm_bahama_sys_rst);
6784 regulator_disable(vreg_bahama);
6785 regulator_put(vreg_bahama);
6786 msm_bahama_setup_power_enable = 0;
6787 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006788
6789 return 0;
6790};
6791
6792static unsigned int msm_bahama_core_config(int type)
6793{
6794 int rc = 0;
6795
6796 if (type == BAHAMA_ID) {
6797
6798 int i;
6799 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6800
6801 const struct bahama_config_register v20_init[] = {
6802 /* reg, value, mask */
6803 { 0xF4, 0x84, 0xFF }, /* AREG */
6804 { 0xF0, 0x04, 0xFF } /* DREG */
6805 };
6806
6807 if (read_bahama_ver() == VER_2_0) {
6808 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6809 u8 value = v20_init[i].value;
6810 rc = marimba_write_bit_mask(&config,
6811 v20_init[i].reg,
6812 &value,
6813 sizeof(v20_init[i].value),
6814 v20_init[i].mask);
6815 if (rc < 0) {
6816 printk(KERN_ERR
6817 "%s: reg %d write failed: %d\n",
6818 __func__, v20_init[i].reg, rc);
6819 return rc;
6820 }
6821 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6822 " mask 0x%02x\n",
6823 __func__, v20_init[i].reg,
6824 v20_init[i].value, v20_init[i].mask);
6825 }
6826 }
6827 }
6828 printk(KERN_INFO "core type: %d\n", type);
6829
6830 return rc;
6831}
6832
6833static struct regulator *fm_regulator_s3;
6834static struct msm_xo_voter *fm_clock;
6835
6836static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6837{
6838 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306839 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006840 .direction = PM_GPIO_DIR_IN,
6841 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306842 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006843 .function = PM_GPIO_FUNC_NORMAL,
6844 .inv_int_pol = 0,
6845 };
6846
6847 if (!fm_regulator_s3) {
6848 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6849 if (IS_ERR(fm_regulator_s3)) {
6850 rc = PTR_ERR(fm_regulator_s3);
6851 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6852 __func__, rc);
6853 goto out;
6854 }
6855 }
6856
6857
6858 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6859 if (rc < 0) {
6860 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6861 __func__, rc);
6862 goto fm_fail_put;
6863 }
6864
6865 rc = regulator_enable(fm_regulator_s3);
6866 if (rc < 0) {
6867 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6868 __func__, rc);
6869 goto fm_fail_put;
6870 }
6871
6872 /*Vote for XO clock*/
6873 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6874
6875 if (IS_ERR(fm_clock)) {
6876 rc = PTR_ERR(fm_clock);
6877 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6878 __func__, rc);
6879 goto fm_fail_switch;
6880 }
6881
6882 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6883 if (rc < 0) {
6884 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6885 __func__, rc);
6886 goto fm_fail_vote;
6887 }
6888
6889 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306890 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006891 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306892 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006893 __func__, rc);
6894 goto fm_fail_clock;
6895 }
6896 goto out;
6897
6898fm_fail_clock:
6899 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6900fm_fail_vote:
6901 msm_xo_put(fm_clock);
6902fm_fail_switch:
6903 regulator_disable(fm_regulator_s3);
6904fm_fail_put:
6905 regulator_put(fm_regulator_s3);
6906out:
6907 return rc;
6908};
6909
6910static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6911{
6912 int rc = 0;
6913 if (fm_regulator_s3 != NULL) {
6914 rc = regulator_disable(fm_regulator_s3);
6915 if (rc < 0) {
6916 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6917 __func__, rc);
6918 }
6919 regulator_put(fm_regulator_s3);
6920 fm_regulator_s3 = NULL;
6921 }
6922 printk(KERN_ERR "%s: Voting off for XO", __func__);
6923
6924 if (fm_clock != NULL) {
6925 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6926 if (rc < 0) {
6927 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6928 __func__, rc);
6929 }
6930 msm_xo_put(fm_clock);
6931 }
6932 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6933}
6934
6935/* Slave id address for FM/CDC/QMEMBIST
6936 * Values can be programmed using Marimba slave id 0
6937 * should there be a conflict with other I2C devices
6938 * */
6939#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6940#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6941
6942static struct marimba_fm_platform_data marimba_fm_pdata = {
6943 .fm_setup = fm_radio_setup,
6944 .fm_shutdown = fm_radio_shutdown,
6945 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6946 .is_fm_soc_i2s_master = false,
6947 .config_i2s_gpio = NULL,
6948};
6949
6950/*
6951Just initializing the BAHAMA related slave
6952*/
6953static struct marimba_platform_data marimba_pdata = {
6954 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6955 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6956 .bahama_setup = msm_bahama_setup_power,
6957 .bahama_shutdown = msm_bahama_shutdown_power,
6958 .bahama_core_config = msm_bahama_core_config,
6959 .fm = &marimba_fm_pdata,
6960 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6961};
6962
6963
6964static struct i2c_board_info msm_marimba_board_info[] = {
6965 {
6966 I2C_BOARD_INFO("marimba", 0xc),
6967 .platform_data = &marimba_pdata,
6968 }
6969};
6970#endif /* CONFIG_MAIMBA_CORE */
6971
6972#ifdef CONFIG_I2C
6973#define I2C_SURF 1
6974#define I2C_FFA (1 << 1)
6975#define I2C_RUMI (1 << 2)
6976#define I2C_SIM (1 << 3)
6977#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006978#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006979
6980struct i2c_registry {
6981 u8 machs;
6982 int bus;
6983 struct i2c_board_info *info;
6984 int len;
6985};
6986
6987static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006988#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6989 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006990 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006991 MSM_GSBI8_QUP_I2C_BUS_ID,
6992 core_expander_i2c_info,
6993 ARRAY_SIZE(core_expander_i2c_info),
6994 },
6995 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006996 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006997 MSM_GSBI8_QUP_I2C_BUS_ID,
6998 docking_expander_i2c_info,
6999 ARRAY_SIZE(docking_expander_i2c_info),
7000 },
7001 {
7002 I2C_SURF,
7003 MSM_GSBI8_QUP_I2C_BUS_ID,
7004 surf_expanders_i2c_info,
7005 ARRAY_SIZE(surf_expanders_i2c_info),
7006 },
7007 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007008 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007009 MSM_GSBI3_QUP_I2C_BUS_ID,
7010 fha_expanders_i2c_info,
7011 ARRAY_SIZE(fha_expanders_i2c_info),
7012 },
7013 {
7014 I2C_FLUID,
7015 MSM_GSBI3_QUP_I2C_BUS_ID,
7016 fluid_expanders_i2c_info,
7017 ARRAY_SIZE(fluid_expanders_i2c_info),
7018 },
7019 {
7020 I2C_FLUID,
7021 MSM_GSBI8_QUP_I2C_BUS_ID,
7022 fluid_core_expander_i2c_info,
7023 ARRAY_SIZE(fluid_core_expander_i2c_info),
7024 },
7025#endif
7026#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7027 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7028 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007029 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007030 MSM_GSBI3_QUP_I2C_BUS_ID,
7031 msm_i2c_gsbi3_tdisc_info,
7032 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7033 },
7034#endif
7035 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007036 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007037 MSM_GSBI3_QUP_I2C_BUS_ID,
7038 cy8ctmg200_board_info,
7039 ARRAY_SIZE(cy8ctmg200_board_info),
7040 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007041 {
7042 I2C_DRAGON,
7043 MSM_GSBI3_QUP_I2C_BUS_ID,
7044 cy8ctma340_dragon_board_info,
7045 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7046 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007047#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7048 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7049 {
7050 I2C_FLUID,
7051 MSM_GSBI3_QUP_I2C_BUS_ID,
7052 cyttsp_fluid_info,
7053 ARRAY_SIZE(cyttsp_fluid_info),
7054 },
7055 {
7056 I2C_FFA | I2C_SURF,
7057 MSM_GSBI3_QUP_I2C_BUS_ID,
7058 cyttsp_ffa_info,
7059 ARRAY_SIZE(cyttsp_ffa_info),
7060 },
7061#endif
7062#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007063 {
7064 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007065 MSM_GSBI4_QUP_I2C_BUS_ID,
7066 msm_camera_boardinfo,
7067 ARRAY_SIZE(msm_camera_boardinfo),
7068 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007069 {
7070 I2C_DRAGON,
7071 MSM_GSBI4_QUP_I2C_BUS_ID,
7072 msm_camera_dragon_boardinfo,
7073 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7074 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007075#endif
7076 {
7077 I2C_SURF | I2C_FFA | I2C_FLUID,
7078 MSM_GSBI7_QUP_I2C_BUS_ID,
7079 msm_i2c_gsbi7_timpani_info,
7080 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7081 },
7082#if defined(CONFIG_MARIMBA_CORE)
7083 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007084 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007085 MSM_GSBI7_QUP_I2C_BUS_ID,
7086 msm_marimba_board_info,
7087 ARRAY_SIZE(msm_marimba_board_info),
7088 },
7089#endif /* CONFIG_MARIMBA_CORE */
7090#ifdef CONFIG_ISL9519_CHARGER
7091 {
7092 I2C_SURF | I2C_FFA,
7093 MSM_GSBI8_QUP_I2C_BUS_ID,
7094 isl_charger_i2c_info,
7095 ARRAY_SIZE(isl_charger_i2c_info),
7096 },
7097#endif
7098#if defined(CONFIG_HAPTIC_ISA1200) || \
7099 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7100 {
7101 I2C_FLUID,
7102 MSM_GSBI8_QUP_I2C_BUS_ID,
7103 msm_isa1200_board_info,
7104 ARRAY_SIZE(msm_isa1200_board_info),
7105 },
7106#endif
7107#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7108 {
7109 I2C_FLUID,
7110 MSM_GSBI8_QUP_I2C_BUS_ID,
7111 smb137b_charger_i2c_info,
7112 ARRAY_SIZE(smb137b_charger_i2c_info),
7113 },
7114#endif
7115#if defined(CONFIG_BATTERY_BQ27520) || \
7116 defined(CONFIG_BATTERY_BQ27520_MODULE)
7117 {
7118 I2C_FLUID,
7119 MSM_GSBI8_QUP_I2C_BUS_ID,
7120 msm_bq27520_board_info,
7121 ARRAY_SIZE(msm_bq27520_board_info),
7122 },
7123#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007124#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7125 {
7126 I2C_DRAGON,
7127 MSM_GSBI8_QUP_I2C_BUS_ID,
7128 wm8903_codec_i2c_info,
7129 ARRAY_SIZE(wm8903_codec_i2c_info),
7130 },
7131#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007132};
7133#endif /* CONFIG_I2C */
7134
7135static void fixup_i2c_configs(void)
7136{
7137#ifdef CONFIG_I2C
7138#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7139 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7140 sx150x_data[SX150X_CORE].irq_summary =
7141 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007142 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7143 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007144 sx150x_data[SX150X_CORE].irq_summary =
7145 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7146 else if (machine_is_msm8x60_fluid())
7147 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7148 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7149#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007150#endif
7151}
7152
7153static void register_i2c_devices(void)
7154{
7155#ifdef CONFIG_I2C
7156 u8 mach_mask = 0;
7157 int i;
7158
7159 /* Build the matching 'supported_machs' bitmask */
7160 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7161 mach_mask = I2C_SURF;
7162 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7163 mach_mask = I2C_FFA;
7164 else if (machine_is_msm8x60_rumi3())
7165 mach_mask = I2C_RUMI;
7166 else if (machine_is_msm8x60_sim())
7167 mach_mask = I2C_SIM;
7168 else if (machine_is_msm8x60_fluid())
7169 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007170 else if (machine_is_msm8x60_dragon())
7171 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007172 else
7173 pr_err("unmatched machine ID in register_i2c_devices\n");
7174
7175 /* Run the array and install devices as appropriate */
7176 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7177 if (msm8x60_i2c_devices[i].machs & mach_mask)
7178 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7179 msm8x60_i2c_devices[i].info,
7180 msm8x60_i2c_devices[i].len);
7181 }
7182#endif
7183}
7184
7185static void __init msm8x60_init_uart12dm(void)
7186{
7187#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7188 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7189 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7190
7191 if (!fpga_mem)
7192 pr_err("%s(): Error getting memory\n", __func__);
7193
7194 /* Advanced mode */
7195 writew(0xFFFF, fpga_mem + 0x15C);
7196 /* FPGA_UART_SEL */
7197 writew(0, fpga_mem + 0x172);
7198 /* FPGA_GPIO_CONFIG_117 */
7199 writew(1, fpga_mem + 0xEA);
7200 /* FPGA_GPIO_CONFIG_118 */
7201 writew(1, fpga_mem + 0xEC);
7202 mb();
7203 iounmap(fpga_mem);
7204#endif
7205}
7206
7207#define MSM_GSBI9_PHYS 0x19900000
7208#define GSBI_DUAL_MODE_CODE 0x60
7209
7210static void __init msm8x60_init_buses(void)
7211{
7212#ifdef CONFIG_I2C_QUP
7213 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7214 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7215 writel_relaxed(0x6 << 4, gsbi_mem);
7216 /* Ensure protocol code is written before proceeding further */
7217 mb();
7218 iounmap(gsbi_mem);
7219
7220 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7221 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7222 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7223 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7224
7225#ifdef CONFIG_MSM_GSBI9_UART
7226 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7227 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7228 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7229 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7230 iounmap(gsbi_mem);
7231 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7232 }
7233#endif
7234 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7235 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7236#endif
7237#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7238 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7239#endif
7240#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007241 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7242#endif
7243
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307244#ifdef CONFIG_MSM_SSBI
7245 msm_device_ssbi_pmic1.dev.platform_data =
7246 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307247 msm_device_ssbi_pmic2.dev.platform_data =
7248 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307249#endif
7250
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007251 if (machine_is_msm8x60_fluid()) {
7252#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7253 (defined(CONFIG_SMB137B_CHARGER) || \
7254 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7255 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7256#endif
7257#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7258 msm_gsbi10_qup_spi_device.dev.platform_data =
7259 &msm_gsbi10_qup_spi_pdata;
7260#endif
7261 }
7262
7263#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7264 /*
7265 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7266 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7267 * and ID notifications are available only on V2 surf and FFA
7268 * with a hardware workaround.
7269 */
7270 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7271 (machine_is_msm8x60_surf() ||
7272 (machine_is_msm8x60_ffa() &&
7273 pmic_id_notif_supported)))
7274 msm_otg_pdata.phy_can_powercollapse = 1;
7275 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7276#endif
7277
7278#ifdef CONFIG_USB_GADGET_MSM_72K
7279 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7280#endif
7281
7282#ifdef CONFIG_SERIAL_MSM_HS
7283 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7284 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7285#endif
7286#ifdef CONFIG_MSM_GSBI9_UART
7287 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7288 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7289 if (IS_ERR(msm_device_uart_gsbi9))
7290 pr_err("%s(): Failed to create uart gsbi9 device\n",
7291 __func__);
7292 }
7293#endif
7294
7295#ifdef CONFIG_MSM_BUS_SCALING
7296
7297 /* RPM calls are only enabled on V2 */
7298 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7299 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7300 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7301 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7302 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7303 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7304 }
7305
7306 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7307 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7308 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7309 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7310 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7311#endif
7312}
7313
7314static void __init msm8x60_map_io(void)
7315{
7316 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7317 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007318
7319 if (socinfo_init() < 0)
7320 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007321}
7322
7323/*
7324 * Most segments of the EBI2 bus are disabled by default.
7325 */
7326static void __init msm8x60_init_ebi2(void)
7327{
7328 uint32_t ebi2_cfg;
7329 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007330 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7331
7332 if (IS_ERR(mem_clk)) {
7333 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7334 "msm_ebi2", "mem_clk");
7335 return;
7336 }
7337 clk_enable(mem_clk);
7338 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007339
7340 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7341 if (ebi2_cfg_ptr != 0) {
7342 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7343
7344 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007345 machine_is_msm8x60_fluid() ||
7346 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007347 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7348 else if (machine_is_msm8x60_sim())
7349 ebi2_cfg |= (1 << 4); /* CS2 */
7350 else if (machine_is_msm8x60_rumi3())
7351 ebi2_cfg |= (1 << 5); /* CS3 */
7352
7353 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7354 iounmap(ebi2_cfg_ptr);
7355 }
7356
7357 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007358 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007359 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7360 if (ebi2_cfg_ptr != 0) {
7361 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7362 writel_relaxed(0UL, ebi2_cfg_ptr);
7363
7364 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7365 * LAN9221 Ethernet controller reads and writes.
7366 * The lowest 4 bits are the read delay, the next
7367 * 4 are the write delay. */
7368 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7369#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7370 /*
7371 * RECOVERY=5, HOLD_WR=1
7372 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7373 * WAIT_WR=1, WAIT_RD=2
7374 */
7375 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7376 /*
7377 * HOLD_RD=1
7378 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7379 */
7380 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7381#else
7382 /* EBI2 CS3 muxed address/data,
7383 * two cyc addr enable */
7384 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7385
7386#endif
7387 iounmap(ebi2_cfg_ptr);
7388 }
7389 }
7390}
7391
7392static void __init msm8x60_configure_smc91x(void)
7393{
7394 if (machine_is_msm8x60_sim()) {
7395
7396 smc91x_resources[0].start = 0x1b800300;
7397 smc91x_resources[0].end = 0x1b8003ff;
7398
7399 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7400 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7401
7402 } else if (machine_is_msm8x60_rumi3()) {
7403
7404 smc91x_resources[0].start = 0x1d000300;
7405 smc91x_resources[0].end = 0x1d0003ff;
7406
7407 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7408 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7409 }
7410}
7411
7412static void __init msm8x60_init_tlmm(void)
7413{
7414 if (machine_is_msm8x60_rumi3())
7415 msm_gpio_install_direct_irq(0, 0, 1);
7416}
7417
7418#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7419 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7420 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7421 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7422 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7423
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007424/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007425#define MAX_SDCC_CONTROLLER 5
7426
7427struct msm_sdcc_gpio {
7428 /* maximum 10 GPIOs per SDCC controller */
7429 s16 no;
7430 /* name of this GPIO */
7431 const char *name;
7432 bool always_on;
7433 bool is_enabled;
7434};
7435
7436#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7437static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7438 {159, "sdc1_dat_0"},
7439 {160, "sdc1_dat_1"},
7440 {161, "sdc1_dat_2"},
7441 {162, "sdc1_dat_3"},
7442#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7443 {163, "sdc1_dat_4"},
7444 {164, "sdc1_dat_5"},
7445 {165, "sdc1_dat_6"},
7446 {166, "sdc1_dat_7"},
7447#endif
7448 {167, "sdc1_clk"},
7449 {168, "sdc1_cmd"}
7450};
7451#endif
7452
7453#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7454static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7455 {143, "sdc2_dat_0"},
7456 {144, "sdc2_dat_1", 1},
7457 {145, "sdc2_dat_2"},
7458 {146, "sdc2_dat_3"},
7459#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7460 {147, "sdc2_dat_4"},
7461 {148, "sdc2_dat_5"},
7462 {149, "sdc2_dat_6"},
7463 {150, "sdc2_dat_7"},
7464#endif
7465 {151, "sdc2_cmd"},
7466 {152, "sdc2_clk", 1}
7467};
7468#endif
7469
7470#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7471static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7472 {95, "sdc5_cmd"},
7473 {96, "sdc5_dat_3"},
7474 {97, "sdc5_clk", 1},
7475 {98, "sdc5_dat_2"},
7476 {99, "sdc5_dat_1", 1},
7477 {100, "sdc5_dat_0"}
7478};
7479#endif
7480
7481struct msm_sdcc_pad_pull_cfg {
7482 enum msm_tlmm_pull_tgt pull;
7483 u32 pull_val;
7484};
7485
7486struct msm_sdcc_pad_drv_cfg {
7487 enum msm_tlmm_hdrive_tgt drv;
7488 u32 drv_val;
7489};
7490
7491#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7492static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7493 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7494 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7495 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7496};
7497
7498static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7499 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7500 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7501};
7502
7503static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7504 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7505 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7506 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7507};
7508
7509static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7510 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7511 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7512};
7513#endif
7514
7515#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7516static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7517 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7518 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7519 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7520};
7521
7522static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7523 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7524 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7525};
7526
7527static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7528 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7529 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7530 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7531};
7532
7533static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7534 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7535 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7536};
7537#endif
7538
7539struct msm_sdcc_pin_cfg {
7540 /*
7541 * = 1 if controller pins are using gpios
7542 * = 0 if controller has dedicated MSM pins
7543 */
7544 u8 is_gpio;
7545 u8 cfg_sts;
7546 u8 gpio_data_size;
7547 struct msm_sdcc_gpio *gpio_data;
7548 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7549 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7550 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7551 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7552 u8 pad_drv_data_size;
7553 u8 pad_pull_data_size;
7554 u8 sdio_lpm_gpio_cfg;
7555};
7556
7557
7558static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7559#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7560 [0] = {
7561 .is_gpio = 1,
7562 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7563 .gpio_data = sdc1_gpio_cfg
7564 },
7565#endif
7566#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7567 [1] = {
7568 .is_gpio = 1,
7569 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7570 .gpio_data = sdc2_gpio_cfg
7571 },
7572#endif
7573#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7574 [2] = {
7575 .is_gpio = 0,
7576 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7577 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7578 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7579 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7580 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7581 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7582 },
7583#endif
7584#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7585 [3] = {
7586 .is_gpio = 0,
7587 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7588 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7589 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7590 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7591 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7592 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7593 },
7594#endif
7595#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7596 [4] = {
7597 .is_gpio = 1,
7598 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7599 .gpio_data = sdc5_gpio_cfg
7600 }
7601#endif
7602};
7603
7604static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7605{
7606 int rc = 0;
7607 struct msm_sdcc_pin_cfg *curr;
7608 int n;
7609
7610 curr = &sdcc_pin_cfg_data[dev_id - 1];
7611 if (!curr->gpio_data)
7612 goto out;
7613
7614 for (n = 0; n < curr->gpio_data_size; n++) {
7615 if (enable) {
7616
7617 if (curr->gpio_data[n].always_on &&
7618 curr->gpio_data[n].is_enabled)
7619 continue;
7620 pr_debug("%s: enable: %s\n", __func__,
7621 curr->gpio_data[n].name);
7622 rc = gpio_request(curr->gpio_data[n].no,
7623 curr->gpio_data[n].name);
7624 if (rc) {
7625 pr_err("%s: gpio_request(%d, %s)"
7626 "failed", __func__,
7627 curr->gpio_data[n].no,
7628 curr->gpio_data[n].name);
7629 goto free_gpios;
7630 }
7631 /* set direction as output for all GPIOs */
7632 rc = gpio_direction_output(
7633 curr->gpio_data[n].no, 1);
7634 if (rc) {
7635 pr_err("%s: gpio_direction_output"
7636 "(%d, 1) failed\n", __func__,
7637 curr->gpio_data[n].no);
7638 goto free_gpios;
7639 }
7640 curr->gpio_data[n].is_enabled = 1;
7641 } else {
7642 /*
7643 * now free this GPIO which will put GPIO
7644 * in low power mode and will also put GPIO
7645 * in input mode
7646 */
7647 if (curr->gpio_data[n].always_on)
7648 continue;
7649 pr_debug("%s: disable: %s\n", __func__,
7650 curr->gpio_data[n].name);
7651 gpio_free(curr->gpio_data[n].no);
7652 curr->gpio_data[n].is_enabled = 0;
7653 }
7654 }
7655 curr->cfg_sts = enable;
7656 goto out;
7657
7658free_gpios:
7659 for (; n >= 0; n--)
7660 gpio_free(curr->gpio_data[n].no);
7661out:
7662 return rc;
7663}
7664
7665static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7666{
7667 int rc = 0;
7668 struct msm_sdcc_pin_cfg *curr;
7669 int n;
7670
7671 curr = &sdcc_pin_cfg_data[dev_id - 1];
7672 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7673 goto out;
7674
7675 if (enable) {
7676 /*
7677 * set up the normal driver strength and
7678 * pull config for pads
7679 */
7680 for (n = 0; n < curr->pad_drv_data_size; n++) {
7681 if (curr->sdio_lpm_gpio_cfg) {
7682 if (curr->pad_drv_on_data[n].drv ==
7683 TLMM_HDRV_SDC4_DATA)
7684 continue;
7685 }
7686 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7687 curr->pad_drv_on_data[n].drv_val);
7688 }
7689 for (n = 0; n < curr->pad_pull_data_size; n++) {
7690 if (curr->sdio_lpm_gpio_cfg) {
7691 if (curr->pad_pull_on_data[n].pull ==
7692 TLMM_PULL_SDC4_DATA)
7693 continue;
7694 }
7695 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7696 curr->pad_pull_on_data[n].pull_val);
7697 }
7698 } else {
7699 /* set the low power config for pads */
7700 for (n = 0; n < curr->pad_drv_data_size; n++) {
7701 if (curr->sdio_lpm_gpio_cfg) {
7702 if (curr->pad_drv_off_data[n].drv ==
7703 TLMM_HDRV_SDC4_DATA)
7704 continue;
7705 }
7706 msm_tlmm_set_hdrive(
7707 curr->pad_drv_off_data[n].drv,
7708 curr->pad_drv_off_data[n].drv_val);
7709 }
7710 for (n = 0; n < curr->pad_pull_data_size; n++) {
7711 if (curr->sdio_lpm_gpio_cfg) {
7712 if (curr->pad_pull_off_data[n].pull ==
7713 TLMM_PULL_SDC4_DATA)
7714 continue;
7715 }
7716 msm_tlmm_set_pull(
7717 curr->pad_pull_off_data[n].pull,
7718 curr->pad_pull_off_data[n].pull_val);
7719 }
7720 }
7721 curr->cfg_sts = enable;
7722out:
7723 return rc;
7724}
7725
7726struct sdcc_reg {
7727 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7728 const char *reg_name;
7729 /*
7730 * is set voltage supported for this regulator?
7731 * 0 = not supported, 1 = supported
7732 */
7733 unsigned char set_voltage_sup;
7734 /* voltage level to be set */
7735 unsigned int level;
7736 /* VDD/VCC/VCCQ voltage regulator handle */
7737 struct regulator *reg;
7738 /* is this regulator enabled? */
7739 bool enabled;
7740 /* is this regulator needs to be always on? */
7741 bool always_on;
7742 /* is operating power mode setting required for this regulator? */
7743 bool op_pwr_mode_sup;
7744 /* Load values for low power and high power mode */
7745 unsigned int lpm_uA;
7746 unsigned int hpm_uA;
7747};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007748/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007749static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7750/* only SDCC1 requires VCCQ voltage */
7751static struct sdcc_reg sdcc_vccq_reg_data[1];
7752/* all SDCC controllers may require voting for VDD PAD voltage */
7753static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7754
7755struct sdcc_reg_data {
7756 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7757 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7758 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7759 unsigned char sts; /* regulator enable/disable status */
7760};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007761/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007762static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7763
7764static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7765{
7766 int rc = 0;
7767
7768 /* Get the regulator handle */
7769 vreg->reg = regulator_get(NULL, vreg->reg_name);
7770 if (IS_ERR(vreg->reg)) {
7771 rc = PTR_ERR(vreg->reg);
7772 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7773 __func__, vreg->reg_name, rc);
7774 goto out;
7775 }
7776
7777 /* Set the voltage level if required */
7778 if (vreg->set_voltage_sup) {
7779 rc = regulator_set_voltage(vreg->reg, vreg->level,
7780 vreg->level);
7781 if (rc) {
7782 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7783 __func__, vreg->reg_name, rc);
7784 goto vreg_put;
7785 }
7786 }
7787 goto out;
7788
7789vreg_put:
7790 regulator_put(vreg->reg);
7791out:
7792 return rc;
7793}
7794
7795static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7796{
7797 regulator_put(vreg->reg);
7798}
7799
7800/* this init function should be called only once for each SDCC */
7801static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7802{
7803 int rc = 0;
7804 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7805 struct sdcc_reg_data *curr;
7806
7807 curr = &sdcc_vreg_data[dev_id - 1];
7808 curr_vdd_reg = curr->vdd_data;
7809 curr_vccq_reg = curr->vccq_data;
7810 curr_vddp_reg = curr->vddp_data;
7811
7812 if (init) {
7813 /*
7814 * get the regulator handle from voltage regulator framework
7815 * and then try to set the voltage level for the regulator
7816 */
7817 if (curr_vdd_reg) {
7818 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7819 if (rc)
7820 goto out;
7821 }
7822 if (curr_vccq_reg) {
7823 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7824 if (rc)
7825 goto vdd_reg_deinit;
7826 }
7827 if (curr_vddp_reg) {
7828 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7829 if (rc)
7830 goto vccq_reg_deinit;
7831 }
7832 goto out;
7833 } else
7834 /* deregister with all regulators from regulator framework */
7835 goto vddp_reg_deinit;
7836
7837vddp_reg_deinit:
7838 if (curr_vddp_reg)
7839 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7840vccq_reg_deinit:
7841 if (curr_vccq_reg)
7842 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7843vdd_reg_deinit:
7844 if (curr_vdd_reg)
7845 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7846out:
7847 return rc;
7848}
7849
7850static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7851{
7852 int rc;
7853
7854 if (!vreg->enabled) {
7855 rc = regulator_enable(vreg->reg);
7856 if (rc) {
7857 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7858 __func__, vreg->reg_name, rc);
7859 goto out;
7860 }
7861 vreg->enabled = 1;
7862 }
7863
7864 /* Put always_on regulator in HPM (high power mode) */
7865 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7866 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7867 if (rc < 0) {
7868 pr_err("%s: reg=%s: HPM setting failed"
7869 " hpm_uA=%d, rc=%d\n",
7870 __func__, vreg->reg_name,
7871 vreg->hpm_uA, rc);
7872 goto vreg_disable;
7873 }
7874 rc = 0;
7875 }
7876 goto out;
7877
7878vreg_disable:
7879 regulator_disable(vreg->reg);
7880 vreg->enabled = 0;
7881out:
7882 return rc;
7883}
7884
7885static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7886{
7887 int rc;
7888
7889 /* Never disable always_on regulator */
7890 if (!vreg->always_on) {
7891 rc = regulator_disable(vreg->reg);
7892 if (rc) {
7893 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7894 __func__, vreg->reg_name, rc);
7895 goto out;
7896 }
7897 vreg->enabled = 0;
7898 }
7899
7900 /* Put always_on regulator in LPM (low power mode) */
7901 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7902 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7903 if (rc < 0) {
7904 pr_err("%s: reg=%s: LPM setting failed"
7905 " lpm_uA=%d, rc=%d\n",
7906 __func__,
7907 vreg->reg_name,
7908 vreg->lpm_uA, rc);
7909 goto out;
7910 }
7911 rc = 0;
7912 }
7913
7914out:
7915 return rc;
7916}
7917
7918static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7919{
7920 int rc = 0;
7921 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7922 struct sdcc_reg_data *curr;
7923
7924 curr = &sdcc_vreg_data[dev_id - 1];
7925 curr_vdd_reg = curr->vdd_data;
7926 curr_vccq_reg = curr->vccq_data;
7927 curr_vddp_reg = curr->vddp_data;
7928
7929 /* check if regulators are initialized or not? */
7930 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7931 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7932 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7933 /* initialize voltage regulators required for this SDCC */
7934 rc = msm_sdcc_vreg_init(dev_id, 1);
7935 if (rc) {
7936 pr_err("%s: regulator init failed = %d\n",
7937 __func__, rc);
7938 goto out;
7939 }
7940 }
7941
7942 if (curr->sts == enable)
7943 goto out;
7944
7945 if (curr_vdd_reg) {
7946 if (enable)
7947 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7948 else
7949 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7950 if (rc)
7951 goto out;
7952 }
7953
7954 if (curr_vccq_reg) {
7955 if (enable)
7956 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7957 else
7958 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7959 if (rc)
7960 goto out;
7961 }
7962
7963 if (curr_vddp_reg) {
7964 if (enable)
7965 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7966 else
7967 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7968 if (rc)
7969 goto out;
7970 }
7971 curr->sts = enable;
7972
7973out:
7974 return rc;
7975}
7976
7977static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7978{
7979 u32 rc_pin_cfg = 0;
7980 u32 rc_vreg_cfg = 0;
7981 u32 rc = 0;
7982 struct platform_device *pdev;
7983 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7984
7985 pdev = container_of(dv, struct platform_device, dev);
7986
7987 /* setup gpio/pad */
7988 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7989 if (curr_pin_cfg->cfg_sts == !!vdd)
7990 goto setup_vreg;
7991
7992 if (curr_pin_cfg->is_gpio)
7993 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7994 else
7995 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7996
7997setup_vreg:
7998 /* setup voltage regulators */
7999 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8000
8001 if (rc_pin_cfg || rc_vreg_cfg)
8002 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8003
8004 return rc;
8005}
8006
8007static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8008{
8009 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8010 struct platform_device *pdev;
8011
8012 pdev = container_of(dv, struct platform_device, dev);
8013 /* setup gpio/pad */
8014 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8015
8016 if (curr_pin_cfg->cfg_sts == active)
8017 return;
8018
8019 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8020 if (curr_pin_cfg->is_gpio)
8021 msm_sdcc_setup_gpio(pdev->id, active);
8022 else
8023 msm_sdcc_setup_pad(pdev->id, active);
8024 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8025}
8026
8027static int msm_sdc3_get_wpswitch(struct device *dev)
8028{
8029 struct platform_device *pdev;
8030 int status;
8031 pdev = container_of(dev, struct platform_device, dev);
8032
8033 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8034 if (status) {
8035 pr_err("%s:Failed to request GPIO %d\n",
8036 __func__, GPIO_SDC_WP);
8037 } else {
8038 status = gpio_direction_input(GPIO_SDC_WP);
8039 if (!status) {
8040 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8041 pr_info("%s: WP Status for Slot %d = %d\n",
8042 __func__, pdev->id, status);
8043 }
8044 gpio_free(GPIO_SDC_WP);
8045 }
8046 return status;
8047}
8048
8049#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8050int sdc5_register_status_notify(void (*callback)(int, void *),
8051 void *dev_id)
8052{
8053 sdc5_status_notify_cb = callback;
8054 sdc5_status_notify_cb_devid = dev_id;
8055 return 0;
8056}
8057#endif
8058
8059#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8060int sdc2_register_status_notify(void (*callback)(int, void *),
8061 void *dev_id)
8062{
8063 sdc2_status_notify_cb = callback;
8064 sdc2_status_notify_cb_devid = dev_id;
8065 return 0;
8066}
8067#endif
8068
8069/* Interrupt handler for SDC2 and SDC5 detection
8070 * This function uses dual-edge interrputs settings in order
8071 * to get SDIO detection when the GPIO is rising and SDIO removal
8072 * when the GPIO is falling */
8073static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8074{
8075 int status;
8076
8077 if (!machine_is_msm8x60_fusion() &&
8078 !machine_is_msm8x60_fusn_ffa())
8079 return IRQ_NONE;
8080
8081 status = gpio_get_value(MDM2AP_SYNC);
8082 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8083 __func__, status);
8084
8085#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8086 if (sdc2_status_notify_cb) {
8087 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8088 sdc2_status_notify_cb(status,
8089 sdc2_status_notify_cb_devid);
8090 }
8091#endif
8092
8093#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8094 if (sdc5_status_notify_cb) {
8095 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8096 sdc5_status_notify_cb(status,
8097 sdc5_status_notify_cb_devid);
8098 }
8099#endif
8100 return IRQ_HANDLED;
8101}
8102
8103static int msm8x60_multi_sdio_init(void)
8104{
8105 int ret, irq_num;
8106
8107 if (!machine_is_msm8x60_fusion() &&
8108 !machine_is_msm8x60_fusn_ffa())
8109 return 0;
8110
8111 ret = msm_gpiomux_get(MDM2AP_SYNC);
8112 if (ret) {
8113 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8114 __func__, MDM2AP_SYNC, ret);
8115 return ret;
8116 }
8117
8118 irq_num = gpio_to_irq(MDM2AP_SYNC);
8119
8120 ret = request_irq(irq_num,
8121 msm8x60_multi_sdio_slot_status_irq,
8122 IRQ_TYPE_EDGE_BOTH,
8123 "sdio_multidetection", NULL);
8124
8125 if (ret) {
8126 pr_err("%s:Failed to request irq, ret=%d\n",
8127 __func__, ret);
8128 return ret;
8129 }
8130
8131 return ret;
8132}
8133
8134#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8135#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8136static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8137{
8138 int status;
8139
8140 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8141 , "SD_HW_Detect");
8142 if (status) {
8143 pr_err("%s:Failed to request GPIO %d\n", __func__,
8144 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8145 } else {
8146 status = gpio_direction_input(
8147 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8148 if (!status)
8149 status = !(gpio_get_value_cansleep(
8150 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8151 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8152 }
8153 return (unsigned int) status;
8154}
8155#endif
8156#endif
8157
8158#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8159static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8160{
8161 struct platform_device *pdev;
8162 enum msm_mpm_pin pin;
8163 int ret = 0;
8164
8165 pdev = container_of(dev, struct platform_device, dev);
8166
8167 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8168 if (pdev->id == 4)
8169 pin = MSM_MPM_PIN_SDC4_DAT1;
8170 else
8171 return -EINVAL;
8172
8173 switch (mode) {
8174 case SDC_DAT1_DISABLE:
8175 ret = msm_mpm_enable_pin(pin, 0);
8176 break;
8177 case SDC_DAT1_ENABLE:
8178 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8179 ret = msm_mpm_enable_pin(pin, 1);
8180 break;
8181 case SDC_DAT1_ENWAKE:
8182 ret = msm_mpm_set_pin_wake(pin, 1);
8183 break;
8184 case SDC_DAT1_DISWAKE:
8185 ret = msm_mpm_set_pin_wake(pin, 0);
8186 break;
8187 default:
8188 ret = -EINVAL;
8189 break;
8190 }
8191 return ret;
8192}
8193#endif
8194#endif
8195
8196#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8197static struct mmc_platform_data msm8x60_sdc1_data = {
8198 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8199 .translate_vdd = msm_sdcc_setup_power,
8200#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8201 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8202#else
8203 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8204#endif
8205 .msmsdcc_fmin = 400000,
8206 .msmsdcc_fmid = 24000000,
8207 .msmsdcc_fmax = 48000000,
8208 .nonremovable = 1,
8209 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008210};
8211#endif
8212
8213#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8214static struct mmc_platform_data msm8x60_sdc2_data = {
8215 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8216 .translate_vdd = msm_sdcc_setup_power,
8217 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8218 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8219 .msmsdcc_fmin = 400000,
8220 .msmsdcc_fmid = 24000000,
8221 .msmsdcc_fmax = 48000000,
8222 .nonremovable = 0,
8223 .pclk_src_dfab = 1,
8224 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008225#ifdef CONFIG_MSM_SDIO_AL
8226 .is_sdio_al_client = 1,
8227#endif
8228};
8229#endif
8230
8231#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8232static struct mmc_platform_data msm8x60_sdc3_data = {
8233 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8234 .translate_vdd = msm_sdcc_setup_power,
8235 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8236 .wpswitch = msm_sdc3_get_wpswitch,
8237#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8238 .status = msm8x60_sdcc_slot_status,
8239 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8240 PMIC_GPIO_SDC3_DET - 1),
8241 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8242#endif
8243 .msmsdcc_fmin = 400000,
8244 .msmsdcc_fmid = 24000000,
8245 .msmsdcc_fmax = 48000000,
8246 .nonremovable = 0,
8247 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008248};
8249#endif
8250
8251#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8252static struct mmc_platform_data msm8x60_sdc4_data = {
8253 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8254 .translate_vdd = msm_sdcc_setup_power,
8255 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8256 .msmsdcc_fmin = 400000,
8257 .msmsdcc_fmid = 24000000,
8258 .msmsdcc_fmax = 48000000,
8259 .nonremovable = 0,
8260 .pclk_src_dfab = 1,
8261 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008262};
8263#endif
8264
8265#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8266static struct mmc_platform_data msm8x60_sdc5_data = {
8267 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8268 .translate_vdd = msm_sdcc_setup_power,
8269 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8270 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8271 .msmsdcc_fmin = 400000,
8272 .msmsdcc_fmid = 24000000,
8273 .msmsdcc_fmax = 48000000,
8274 .nonremovable = 0,
8275 .pclk_src_dfab = 1,
8276 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008277#ifdef CONFIG_MSM_SDIO_AL
8278 .is_sdio_al_client = 1,
8279#endif
8280};
8281#endif
8282
8283static void __init msm8x60_init_mmc(void)
8284{
8285#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8286 /* SDCC1 : eMMC card connected */
8287 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8288 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8289 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8290 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308291 sdcc_vreg_data[0].vdd_data->always_on = 1;
8292 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8293 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8294 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008295
8296 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8297 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8298 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8299 sdcc_vreg_data[0].vccq_data->always_on = 1;
8300
8301 msm_add_sdcc(1, &msm8x60_sdc1_data);
8302#endif
8303#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8304 /*
8305 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8306 * and no card is connected on 8660 SURF/FFA/FLUID.
8307 */
8308 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8309 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8310 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8311 sdcc_vreg_data[1].vdd_data->level = 1800000;
8312
8313 sdcc_vreg_data[1].vccq_data = NULL;
8314
8315 if (machine_is_msm8x60_fusion())
8316 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8317 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8318#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8319 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8320 msm_sdcc_setup_gpio(2, 1);
8321#endif
8322 msm_add_sdcc(2, &msm8x60_sdc2_data);
8323 }
8324#endif
8325#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8326 /* SDCC3 : External card slot connected */
8327 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8328 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8329 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8330 sdcc_vreg_data[2].vdd_data->level = 2850000;
8331 sdcc_vreg_data[2].vdd_data->always_on = 1;
8332 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8333 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8334 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8335
8336 sdcc_vreg_data[2].vccq_data = NULL;
8337
8338 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8339 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8340 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8341 sdcc_vreg_data[2].vddp_data->level = 2850000;
8342 sdcc_vreg_data[2].vddp_data->always_on = 1;
8343 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8344 /* Sleep current required is ~300 uA. But min. RPM
8345 * vote can be in terms of mA (min. 1 mA).
8346 * So let's vote for 2 mA during sleep.
8347 */
8348 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8349 /* Max. Active current required is 16 mA */
8350 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8351
8352 if (machine_is_msm8x60_fluid())
8353 msm8x60_sdc3_data.wpswitch = NULL;
8354 msm_add_sdcc(3, &msm8x60_sdc3_data);
8355#endif
8356#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8357 /* SDCC4 : WLAN WCN1314 chip is connected */
8358 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8359 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8360 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8361 sdcc_vreg_data[3].vdd_data->level = 1800000;
8362
8363 sdcc_vreg_data[3].vccq_data = NULL;
8364
8365 msm_add_sdcc(4, &msm8x60_sdc4_data);
8366#endif
8367#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8368 /*
8369 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8370 * and no card is connected on 8660 SURF/FFA/FLUID.
8371 */
8372 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8373 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8374 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8375 sdcc_vreg_data[4].vdd_data->level = 1800000;
8376
8377 sdcc_vreg_data[4].vccq_data = NULL;
8378
8379 if (machine_is_msm8x60_fusion())
8380 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8381 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8382#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8383 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8384 msm_sdcc_setup_gpio(5, 1);
8385#endif
8386 msm_add_sdcc(5, &msm8x60_sdc5_data);
8387 }
8388#endif
8389}
8390
8391#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8392static inline void display_common_power(int on) {}
8393#else
8394
8395#define _GET_REGULATOR(var, name) do { \
8396 if (var == NULL) { \
8397 var = regulator_get(NULL, name); \
8398 if (IS_ERR(var)) { \
8399 pr_err("'%s' regulator not found, rc=%ld\n", \
8400 name, PTR_ERR(var)); \
8401 var = NULL; \
8402 } \
8403 } \
8404} while (0)
8405
8406static int dsub_regulator(int on)
8407{
8408 static struct regulator *dsub_reg;
8409 static struct regulator *mpp0_reg;
8410 static int dsub_reg_enabled;
8411 int rc = 0;
8412
8413 _GET_REGULATOR(dsub_reg, "8901_l3");
8414 if (IS_ERR(dsub_reg)) {
8415 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8416 __func__, PTR_ERR(dsub_reg));
8417 return PTR_ERR(dsub_reg);
8418 }
8419
8420 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8421 if (IS_ERR(mpp0_reg)) {
8422 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8423 __func__, PTR_ERR(mpp0_reg));
8424 return PTR_ERR(mpp0_reg);
8425 }
8426
8427 if (on && !dsub_reg_enabled) {
8428 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8429 if (rc) {
8430 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8431 " err=%d", __func__, rc);
8432 goto dsub_regulator_err;
8433 }
8434 rc = regulator_enable(dsub_reg);
8435 if (rc) {
8436 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8437 " err=%d", __func__, rc);
8438 goto dsub_regulator_err;
8439 }
8440 rc = regulator_enable(mpp0_reg);
8441 if (rc) {
8442 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8443 " err=%d", __func__, rc);
8444 goto dsub_regulator_err;
8445 }
8446 dsub_reg_enabled = 1;
8447 } else if (!on && dsub_reg_enabled) {
8448 rc = regulator_disable(dsub_reg);
8449 if (rc)
8450 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8451 " err=%d", __func__, rc);
8452 rc = regulator_disable(mpp0_reg);
8453 if (rc)
8454 printk(KERN_WARNING "%s: failed to disable reg "
8455 "8901_mpp0 err=%d", __func__, rc);
8456 dsub_reg_enabled = 0;
8457 }
8458
8459 return rc;
8460
8461dsub_regulator_err:
8462 regulator_put(mpp0_reg);
8463 regulator_put(dsub_reg);
8464 return rc;
8465}
8466
8467static int display_power_on;
8468static void setup_display_power(void)
8469{
8470 if (display_power_on)
8471 if (lcdc_vga_enabled) {
8472 dsub_regulator(1);
8473 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8474 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8475 if (machine_is_msm8x60_ffa() ||
8476 machine_is_msm8x60_fusn_ffa())
8477 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8478 } else {
8479 dsub_regulator(0);
8480 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8481 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8482 if (machine_is_msm8x60_ffa() ||
8483 machine_is_msm8x60_fusn_ffa())
8484 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8485 }
8486 else {
8487 dsub_regulator(0);
8488 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8489 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8490 /* BACKLIGHT */
8491 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8492 /* LVDS */
8493 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8494 }
8495}
8496
8497#define _GET_REGULATOR(var, name) do { \
8498 if (var == NULL) { \
8499 var = regulator_get(NULL, name); \
8500 if (IS_ERR(var)) { \
8501 pr_err("'%s' regulator not found, rc=%ld\n", \
8502 name, PTR_ERR(var)); \
8503 var = NULL; \
8504 } \
8505 } \
8506} while (0)
8507
8508#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8509
8510static void display_common_power(int on)
8511{
8512 int rc;
8513 static struct regulator *display_reg;
8514
8515 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8516 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8517 if (on) {
8518 /* LVDS */
8519 _GET_REGULATOR(display_reg, "8901_l2");
8520 if (!display_reg)
8521 return;
8522 rc = regulator_set_voltage(display_reg,
8523 3300000, 3300000);
8524 if (rc)
8525 goto out;
8526 rc = regulator_enable(display_reg);
8527 if (rc)
8528 goto out;
8529 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8530 "LVDS_STDN_OUT_N");
8531 if (rc) {
8532 printk(KERN_ERR "%s: LVDS gpio %d request"
8533 "failed\n", __func__,
8534 GPIO_LVDS_SHUTDOWN_N);
8535 goto out2;
8536 }
8537
8538 /* BACKLIGHT */
8539 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8540 if (rc) {
8541 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8542 "failed\n", __func__,
8543 GPIO_BACKLIGHT_EN);
8544 goto out3;
8545 }
8546
8547 if (machine_is_msm8x60_ffa() ||
8548 machine_is_msm8x60_fusn_ffa()) {
8549 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8550 "DONGLE_PWR_EN");
8551 if (rc) {
8552 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8553 " %d request failed\n", __func__,
8554 GPIO_DONGLE_PWR_EN);
8555 goto out4;
8556 }
8557 }
8558
8559 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8560 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8561 if (machine_is_msm8x60_ffa() ||
8562 machine_is_msm8x60_fusn_ffa())
8563 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8564 mdelay(20);
8565 display_power_on = 1;
8566 setup_display_power();
8567 } else {
8568 if (display_power_on) {
8569 display_power_on = 0;
8570 setup_display_power();
8571 mdelay(20);
8572 if (machine_is_msm8x60_ffa() ||
8573 machine_is_msm8x60_fusn_ffa())
8574 gpio_free(GPIO_DONGLE_PWR_EN);
8575 goto out4;
8576 }
8577 }
8578 }
8579#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8580 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8581 else if (machine_is_msm8x60_fluid()) {
8582 static struct regulator *fluid_reg;
8583 static struct regulator *fluid_reg2;
8584
8585 if (on) {
8586 _GET_REGULATOR(fluid_reg, "8901_l2");
8587 if (!fluid_reg)
8588 return;
8589 _GET_REGULATOR(fluid_reg2, "8058_s3");
8590 if (!fluid_reg2) {
8591 regulator_put(fluid_reg);
8592 return;
8593 }
8594 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8595 if (rc) {
8596 regulator_put(fluid_reg2);
8597 regulator_put(fluid_reg);
8598 return;
8599 }
8600 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8601 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8602 regulator_enable(fluid_reg);
8603 regulator_enable(fluid_reg2);
8604 msleep(20);
8605 gpio_direction_output(GPIO_RESX_N, 0);
8606 udelay(10);
8607 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8608 display_power_on = 1;
8609 setup_display_power();
8610 } else {
8611 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8612 gpio_free(GPIO_RESX_N);
8613 msleep(20);
8614 regulator_disable(fluid_reg2);
8615 regulator_disable(fluid_reg);
8616 regulator_put(fluid_reg2);
8617 regulator_put(fluid_reg);
8618 display_power_on = 0;
8619 setup_display_power();
8620 fluid_reg = NULL;
8621 fluid_reg2 = NULL;
8622 }
8623 }
8624#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008625#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8626 else if (machine_is_msm8x60_dragon()) {
8627 static struct regulator *dragon_reg;
8628 static struct regulator *dragon_reg2;
8629
8630 if (on) {
8631 _GET_REGULATOR(dragon_reg, "8901_l2");
8632 if (!dragon_reg)
8633 return;
8634 _GET_REGULATOR(dragon_reg2, "8058_l16");
8635 if (!dragon_reg2) {
8636 regulator_put(dragon_reg);
8637 dragon_reg = NULL;
8638 return;
8639 }
8640
8641 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8642 if (rc) {
8643 pr_err("%s: gpio %d request failed with rc=%d\n",
8644 __func__, GPIO_NT35582_BL_EN, rc);
8645 regulator_put(dragon_reg);
8646 regulator_put(dragon_reg2);
8647 dragon_reg = NULL;
8648 dragon_reg2 = NULL;
8649 return;
8650 }
8651
8652 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8653 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8654 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8655 pr_err("%s: config gpio '%d' failed!\n",
8656 __func__, GPIO_NT35582_RESET);
8657 gpio_free(GPIO_NT35582_BL_EN);
8658 regulator_put(dragon_reg);
8659 regulator_put(dragon_reg2);
8660 dragon_reg = NULL;
8661 dragon_reg2 = NULL;
8662 return;
8663 }
8664
8665 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8666 if (rc) {
8667 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8668 __func__, GPIO_NT35582_RESET, rc);
8669 gpio_free(GPIO_NT35582_BL_EN);
8670 regulator_put(dragon_reg);
8671 regulator_put(dragon_reg2);
8672 dragon_reg = NULL;
8673 dragon_reg2 = NULL;
8674 return;
8675 }
8676
8677 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8678 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8679 regulator_enable(dragon_reg);
8680 regulator_enable(dragon_reg2);
8681 msleep(20);
8682
8683 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8684 msleep(20);
8685 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8686 msleep(20);
8687 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8688 msleep(50);
8689
8690 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8691
8692 display_power_on = 1;
8693 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8694 gpio_free(GPIO_NT35582_RESET);
8695 gpio_free(GPIO_NT35582_BL_EN);
8696 regulator_disable(dragon_reg2);
8697 regulator_disable(dragon_reg);
8698 regulator_put(dragon_reg2);
8699 regulator_put(dragon_reg);
8700 display_power_on = 0;
8701 dragon_reg = NULL;
8702 dragon_reg2 = NULL;
8703 }
8704 }
8705#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008706 return;
8707
8708out4:
8709 gpio_free(GPIO_BACKLIGHT_EN);
8710out3:
8711 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8712out2:
8713 regulator_disable(display_reg);
8714out:
8715 regulator_put(display_reg);
8716 display_reg = NULL;
8717}
8718#undef _GET_REGULATOR
8719#endif
8720
8721static int mipi_dsi_panel_power(int on);
8722
8723#define LCDC_NUM_GPIO 28
8724#define LCDC_GPIO_START 0
8725
8726static void lcdc_samsung_panel_power(int on)
8727{
8728 int n, ret = 0;
8729
8730 display_common_power(on);
8731
8732 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8733 if (on) {
8734 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8735 if (unlikely(ret)) {
8736 pr_err("%s not able to get gpio\n", __func__);
8737 break;
8738 }
8739 } else
8740 gpio_free(LCDC_GPIO_START + n);
8741 }
8742
8743 if (ret) {
8744 for (n--; n >= 0; n--)
8745 gpio_free(LCDC_GPIO_START + n);
8746 }
8747
8748 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8749}
8750
8751#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8752#define _GET_REGULATOR(var, name) do { \
8753 var = regulator_get(NULL, name); \
8754 if (IS_ERR(var)) { \
8755 pr_err("'%s' regulator not found, rc=%ld\n", \
8756 name, IS_ERR(var)); \
8757 var = NULL; \
8758 return -ENODEV; \
8759 } \
8760} while (0)
8761
8762static int hdmi_enable_5v(int on)
8763{
8764 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8765 static struct regulator *reg_8901_mpp0; /* External 5V */
8766 static int prev_on;
8767 int rc;
8768
8769 if (on == prev_on)
8770 return 0;
8771
8772 if (!reg_8901_hdmi_mvs)
8773 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8774 if (!reg_8901_mpp0)
8775 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8776
8777 if (on) {
8778 rc = regulator_enable(reg_8901_mpp0);
8779 if (rc) {
8780 pr_err("'%s' regulator enable failed, rc=%d\n",
8781 "reg_8901_mpp0", rc);
8782 return rc;
8783 }
8784 rc = regulator_enable(reg_8901_hdmi_mvs);
8785 if (rc) {
8786 pr_err("'%s' regulator enable failed, rc=%d\n",
8787 "8901_hdmi_mvs", rc);
8788 return rc;
8789 }
8790 pr_info("%s(on): success\n", __func__);
8791 } else {
8792 rc = regulator_disable(reg_8901_hdmi_mvs);
8793 if (rc)
8794 pr_warning("'%s' regulator disable failed, rc=%d\n",
8795 "8901_hdmi_mvs", rc);
8796 rc = regulator_disable(reg_8901_mpp0);
8797 if (rc)
8798 pr_warning("'%s' regulator disable failed, rc=%d\n",
8799 "reg_8901_mpp0", rc);
8800 pr_info("%s(off): success\n", __func__);
8801 }
8802
8803 prev_on = on;
8804
8805 return 0;
8806}
8807
8808static int hdmi_core_power(int on, int show)
8809{
8810 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8811 static int prev_on;
8812 int rc;
8813
8814 if (on == prev_on)
8815 return 0;
8816
8817 if (!reg_8058_l16)
8818 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8819
8820 if (on) {
8821 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8822 if (!rc)
8823 rc = regulator_enable(reg_8058_l16);
8824 if (rc) {
8825 pr_err("'%s' regulator enable failed, rc=%d\n",
8826 "8058_l16", rc);
8827 return rc;
8828 }
8829 rc = gpio_request(170, "HDMI_DDC_CLK");
8830 if (rc) {
8831 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8832 "HDMI_DDC_CLK", 170, rc);
8833 goto error1;
8834 }
8835 rc = gpio_request(171, "HDMI_DDC_DATA");
8836 if (rc) {
8837 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8838 "HDMI_DDC_DATA", 171, rc);
8839 goto error2;
8840 }
8841 rc = gpio_request(172, "HDMI_HPD");
8842 if (rc) {
8843 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8844 "HDMI_HPD", 172, rc);
8845 goto error3;
8846 }
8847 pr_info("%s(on): success\n", __func__);
8848 } else {
8849 gpio_free(170);
8850 gpio_free(171);
8851 gpio_free(172);
8852 rc = regulator_disable(reg_8058_l16);
8853 if (rc)
8854 pr_warning("'%s' regulator disable failed, rc=%d\n",
8855 "8058_l16", rc);
8856 pr_info("%s(off): success\n", __func__);
8857 }
8858
8859 prev_on = on;
8860
8861 return 0;
8862
8863error3:
8864 gpio_free(171);
8865error2:
8866 gpio_free(170);
8867error1:
8868 regulator_disable(reg_8058_l16);
8869 return rc;
8870}
8871
8872static int hdmi_cec_power(int on)
8873{
8874 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8875 static int prev_on;
8876 int rc;
8877
8878 if (on == prev_on)
8879 return 0;
8880
8881 if (!reg_8901_l3)
8882 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8883
8884 if (on) {
8885 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8886 if (!rc)
8887 rc = regulator_enable(reg_8901_l3);
8888 if (rc) {
8889 pr_err("'%s' regulator enable failed, rc=%d\n",
8890 "8901_l3", rc);
8891 return rc;
8892 }
8893 rc = gpio_request(169, "HDMI_CEC_VAR");
8894 if (rc) {
8895 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8896 "HDMI_CEC_VAR", 169, rc);
8897 goto error;
8898 }
8899 pr_info("%s(on): success\n", __func__);
8900 } else {
8901 gpio_free(169);
8902 rc = regulator_disable(reg_8901_l3);
8903 if (rc)
8904 pr_warning("'%s' regulator disable failed, rc=%d\n",
8905 "8901_l3", rc);
8906 pr_info("%s(off): success\n", __func__);
8907 }
8908
8909 prev_on = on;
8910
8911 return 0;
8912error:
8913 regulator_disable(reg_8901_l3);
8914 return rc;
8915}
8916
8917#undef _GET_REGULATOR
8918
8919#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8920
8921static int lcdc_panel_power(int on)
8922{
8923 int flag_on = !!on;
8924 static int lcdc_power_save_on;
8925
8926 if (lcdc_power_save_on == flag_on)
8927 return 0;
8928
8929 lcdc_power_save_on = flag_on;
8930
8931 lcdc_samsung_panel_power(on);
8932
8933 return 0;
8934}
8935
8936#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008937static struct msm_bus_vectors mdp_init_vectors[] = {
8938 /* For now, 0th array entry is reserved.
8939 * Please leave 0 as is and don't use it
8940 */
8941 {
8942 .src = MSM_BUS_MASTER_MDP_PORT0,
8943 .dst = MSM_BUS_SLAVE_SMI,
8944 .ab = 0,
8945 .ib = 0,
8946 },
8947 /* Master and slaves can be from different fabrics */
8948 {
8949 .src = MSM_BUS_MASTER_MDP_PORT0,
8950 .dst = MSM_BUS_SLAVE_EBI_CH0,
8951 .ab = 0,
8952 .ib = 0,
8953 },
8954};
8955
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008956#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8957static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8958 /* If HDMI is used as primary */
8959 {
8960 .src = MSM_BUS_MASTER_MDP_PORT0,
8961 .dst = MSM_BUS_SLAVE_SMI,
8962 .ab = 2000000000,
8963 .ib = 2000000000,
8964 },
8965 /* Master and slaves can be from different fabrics */
8966 {
8967 .src = MSM_BUS_MASTER_MDP_PORT0,
8968 .dst = MSM_BUS_SLAVE_EBI_CH0,
8969 .ab = 2000000000,
8970 .ib = 2000000000,
8971 },
8972};
8973
8974static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8975 {
8976 ARRAY_SIZE(mdp_init_vectors),
8977 mdp_init_vectors,
8978 },
8979 {
8980 ARRAY_SIZE(hdmi_as_primary_vectors),
8981 hdmi_as_primary_vectors,
8982 },
8983 {
8984 ARRAY_SIZE(hdmi_as_primary_vectors),
8985 hdmi_as_primary_vectors,
8986 },
8987 {
8988 ARRAY_SIZE(hdmi_as_primary_vectors),
8989 hdmi_as_primary_vectors,
8990 },
8991 {
8992 ARRAY_SIZE(hdmi_as_primary_vectors),
8993 hdmi_as_primary_vectors,
8994 },
8995 {
8996 ARRAY_SIZE(hdmi_as_primary_vectors),
8997 hdmi_as_primary_vectors,
8998 },
8999};
9000#else
9001#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009002static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9003 /* Default case static display/UI/2d/3d if FB SMI */
9004 {
9005 .src = MSM_BUS_MASTER_MDP_PORT0,
9006 .dst = MSM_BUS_SLAVE_SMI,
9007 .ab = 388800000,
9008 .ib = 486000000,
9009 },
9010 /* Master and slaves can be from different fabrics */
9011 {
9012 .src = MSM_BUS_MASTER_MDP_PORT0,
9013 .dst = MSM_BUS_SLAVE_EBI_CH0,
9014 .ab = 0,
9015 .ib = 0,
9016 },
9017};
9018
9019static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9020 /* Default case static display/UI/2d/3d if FB SMI */
9021 {
9022 .src = MSM_BUS_MASTER_MDP_PORT0,
9023 .dst = MSM_BUS_SLAVE_SMI,
9024 .ab = 0,
9025 .ib = 0,
9026 },
9027 /* Master and slaves can be from different fabrics */
9028 {
9029 .src = MSM_BUS_MASTER_MDP_PORT0,
9030 .dst = MSM_BUS_SLAVE_EBI_CH0,
9031 .ab = 388800000,
9032 .ib = 486000000 * 2,
9033 },
9034};
9035static struct msm_bus_vectors mdp_vga_vectors[] = {
9036 /* VGA and less video */
9037 {
9038 .src = MSM_BUS_MASTER_MDP_PORT0,
9039 .dst = MSM_BUS_SLAVE_SMI,
9040 .ab = 458092800,
9041 .ib = 572616000,
9042 },
9043 {
9044 .src = MSM_BUS_MASTER_MDP_PORT0,
9045 .dst = MSM_BUS_SLAVE_EBI_CH0,
9046 .ab = 458092800,
9047 .ib = 572616000 * 2,
9048 },
9049};
9050static struct msm_bus_vectors mdp_720p_vectors[] = {
9051 /* 720p and less video */
9052 {
9053 .src = MSM_BUS_MASTER_MDP_PORT0,
9054 .dst = MSM_BUS_SLAVE_SMI,
9055 .ab = 471744000,
9056 .ib = 589680000,
9057 },
9058 /* Master and slaves can be from different fabrics */
9059 {
9060 .src = MSM_BUS_MASTER_MDP_PORT0,
9061 .dst = MSM_BUS_SLAVE_EBI_CH0,
9062 .ab = 471744000,
9063 .ib = 589680000 * 2,
9064 },
9065};
9066
9067static struct msm_bus_vectors mdp_1080p_vectors[] = {
9068 /* 1080p and less video */
9069 {
9070 .src = MSM_BUS_MASTER_MDP_PORT0,
9071 .dst = MSM_BUS_SLAVE_SMI,
9072 .ab = 575424000,
9073 .ib = 719280000,
9074 },
9075 /* Master and slaves can be from different fabrics */
9076 {
9077 .src = MSM_BUS_MASTER_MDP_PORT0,
9078 .dst = MSM_BUS_SLAVE_EBI_CH0,
9079 .ab = 575424000,
9080 .ib = 719280000 * 2,
9081 },
9082};
9083
9084#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009085static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9086 /* Default case static display/UI/2d/3d if FB SMI */
9087 {
9088 .src = MSM_BUS_MASTER_MDP_PORT0,
9089 .dst = MSM_BUS_SLAVE_SMI,
9090 .ab = 175110000,
9091 .ib = 218887500,
9092 },
9093 /* Master and slaves can be from different fabrics */
9094 {
9095 .src = MSM_BUS_MASTER_MDP_PORT0,
9096 .dst = MSM_BUS_SLAVE_EBI_CH0,
9097 .ab = 0,
9098 .ib = 0,
9099 },
9100};
9101
9102static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9103 /* Default case static display/UI/2d/3d if FB SMI */
9104 {
9105 .src = MSM_BUS_MASTER_MDP_PORT0,
9106 .dst = MSM_BUS_SLAVE_SMI,
9107 .ab = 0,
9108 .ib = 0,
9109 },
9110 /* Master and slaves can be from different fabrics */
9111 {
9112 .src = MSM_BUS_MASTER_MDP_PORT0,
9113 .dst = MSM_BUS_SLAVE_EBI_CH0,
9114 .ab = 216000000,
9115 .ib = 270000000 * 2,
9116 },
9117};
9118static struct msm_bus_vectors mdp_vga_vectors[] = {
9119 /* VGA and less video */
9120 {
9121 .src = MSM_BUS_MASTER_MDP_PORT0,
9122 .dst = MSM_BUS_SLAVE_SMI,
9123 .ab = 216000000,
9124 .ib = 270000000,
9125 },
9126 {
9127 .src = MSM_BUS_MASTER_MDP_PORT0,
9128 .dst = MSM_BUS_SLAVE_EBI_CH0,
9129 .ab = 216000000,
9130 .ib = 270000000 * 2,
9131 },
9132};
9133
9134static struct msm_bus_vectors mdp_720p_vectors[] = {
9135 /* 720p and less video */
9136 {
9137 .src = MSM_BUS_MASTER_MDP_PORT0,
9138 .dst = MSM_BUS_SLAVE_SMI,
9139 .ab = 230400000,
9140 .ib = 288000000,
9141 },
9142 /* Master and slaves can be from different fabrics */
9143 {
9144 .src = MSM_BUS_MASTER_MDP_PORT0,
9145 .dst = MSM_BUS_SLAVE_EBI_CH0,
9146 .ab = 230400000,
9147 .ib = 288000000 * 2,
9148 },
9149};
9150
9151static struct msm_bus_vectors mdp_1080p_vectors[] = {
9152 /* 1080p and less video */
9153 {
9154 .src = MSM_BUS_MASTER_MDP_PORT0,
9155 .dst = MSM_BUS_SLAVE_SMI,
9156 .ab = 334080000,
9157 .ib = 417600000,
9158 },
9159 /* Master and slaves can be from different fabrics */
9160 {
9161 .src = MSM_BUS_MASTER_MDP_PORT0,
9162 .dst = MSM_BUS_SLAVE_EBI_CH0,
9163 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009164 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009165 },
9166};
9167
9168#endif
9169static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9170 {
9171 ARRAY_SIZE(mdp_init_vectors),
9172 mdp_init_vectors,
9173 },
9174 {
9175 ARRAY_SIZE(mdp_sd_smi_vectors),
9176 mdp_sd_smi_vectors,
9177 },
9178 {
9179 ARRAY_SIZE(mdp_sd_ebi_vectors),
9180 mdp_sd_ebi_vectors,
9181 },
9182 {
9183 ARRAY_SIZE(mdp_vga_vectors),
9184 mdp_vga_vectors,
9185 },
9186 {
9187 ARRAY_SIZE(mdp_720p_vectors),
9188 mdp_720p_vectors,
9189 },
9190 {
9191 ARRAY_SIZE(mdp_1080p_vectors),
9192 mdp_1080p_vectors,
9193 },
9194};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009195#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009196static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9197 mdp_bus_scale_usecases,
9198 ARRAY_SIZE(mdp_bus_scale_usecases),
9199 .name = "mdp",
9200};
9201
9202#endif
9203#ifdef CONFIG_MSM_BUS_SCALING
9204static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9205 /* For now, 0th array entry is reserved.
9206 * Please leave 0 as is and don't use it
9207 */
9208 {
9209 .src = MSM_BUS_MASTER_MDP_PORT0,
9210 .dst = MSM_BUS_SLAVE_SMI,
9211 .ab = 0,
9212 .ib = 0,
9213 },
9214 /* Master and slaves can be from different fabrics */
9215 {
9216 .src = MSM_BUS_MASTER_MDP_PORT0,
9217 .dst = MSM_BUS_SLAVE_EBI_CH0,
9218 .ab = 0,
9219 .ib = 0,
9220 },
9221};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009222#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9223static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9224 /* For now, 0th array entry is reserved.
9225 * Please leave 0 as is and don't use it
9226 */
9227 {
9228 .src = MSM_BUS_MASTER_MDP_PORT0,
9229 .dst = MSM_BUS_SLAVE_SMI,
9230 .ab = 2000000000,
9231 .ib = 2000000000,
9232 },
9233 /* Master and slaves can be from different fabrics */
9234 {
9235 .src = MSM_BUS_MASTER_MDP_PORT0,
9236 .dst = MSM_BUS_SLAVE_EBI_CH0,
9237 .ab = 2000000000,
9238 .ib = 2000000000,
9239 },
9240};
9241#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009242static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9243 /* For now, 0th array entry is reserved.
9244 * Please leave 0 as is and don't use it
9245 */
9246 {
9247 .src = MSM_BUS_MASTER_MDP_PORT0,
9248 .dst = MSM_BUS_SLAVE_SMI,
9249 .ab = 566092800,
9250 .ib = 707616000,
9251 },
9252 /* Master and slaves can be from different fabrics */
9253 {
9254 .src = MSM_BUS_MASTER_MDP_PORT0,
9255 .dst = MSM_BUS_SLAVE_EBI_CH0,
9256 .ab = 566092800,
9257 .ib = 707616000,
9258 },
9259};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009260#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009261static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9262 {
9263 ARRAY_SIZE(dtv_bus_init_vectors),
9264 dtv_bus_init_vectors,
9265 },
9266 {
9267 ARRAY_SIZE(dtv_bus_def_vectors),
9268 dtv_bus_def_vectors,
9269 },
9270};
9271static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9272 dtv_bus_scale_usecases,
9273 ARRAY_SIZE(dtv_bus_scale_usecases),
9274 .name = "dtv",
9275};
9276
9277static struct lcdc_platform_data dtv_pdata = {
9278 .bus_scale_table = &dtv_bus_scale_pdata,
9279};
9280#endif
9281
9282
9283static struct lcdc_platform_data lcdc_pdata = {
9284 .lcdc_power_save = lcdc_panel_power,
9285};
9286
9287
9288#define MDP_VSYNC_GPIO 28
9289
9290/*
9291 * MIPI_DSI only use 8058_LDO0 which need always on
9292 * therefore it need to be put at low power mode if
9293 * it was not used instead of turn it off.
9294 */
9295static int mipi_dsi_panel_power(int on)
9296{
9297 int flag_on = !!on;
9298 static int mipi_dsi_power_save_on;
9299 static struct regulator *ldo0;
9300 int rc = 0;
9301
9302 if (mipi_dsi_power_save_on == flag_on)
9303 return 0;
9304
9305 mipi_dsi_power_save_on = flag_on;
9306
9307 if (ldo0 == NULL) { /* init */
9308 ldo0 = regulator_get(NULL, "8058_l0");
9309 if (IS_ERR(ldo0)) {
9310 pr_debug("%s: LDO0 failed\n", __func__);
9311 rc = PTR_ERR(ldo0);
9312 return rc;
9313 }
9314
9315 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9316 if (rc)
9317 goto out;
9318
9319 rc = regulator_enable(ldo0);
9320 if (rc)
9321 goto out;
9322 }
9323
9324 if (on) {
9325 /* set ldo0 to HPM */
9326 rc = regulator_set_optimum_mode(ldo0, 100000);
9327 if (rc < 0)
9328 goto out;
9329 } else {
9330 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309331 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009332 if (rc < 0)
9333 goto out;
9334 }
9335
9336 return 0;
9337out:
9338 regulator_disable(ldo0);
9339 regulator_put(ldo0);
9340 ldo0 = NULL;
9341 return rc;
9342}
9343
9344static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9345 .vsync_gpio = MDP_VSYNC_GPIO,
9346 .dsi_power_save = mipi_dsi_panel_power,
9347};
9348
9349#ifdef CONFIG_FB_MSM_TVOUT
9350static struct regulator *reg_8058_l13;
9351
9352static int atv_dac_power(int on)
9353{
9354 int rc = 0;
9355 #define _GET_REGULATOR(var, name) do { \
9356 var = regulator_get(NULL, name); \
9357 if (IS_ERR(var)) { \
9358 pr_info("'%s' regulator not found, rc=%ld\n", \
9359 name, IS_ERR(var)); \
9360 var = NULL; \
9361 return -ENODEV; \
9362 } \
9363 } while (0)
9364
9365 if (!reg_8058_l13)
9366 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9367 #undef _GET_REGULATOR
9368
9369 if (on) {
9370 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9371 if (rc) {
9372 pr_info("%s: '%s' regulator set voltage failed,\
9373 rc=%d\n", __func__, "8058_l13", rc);
9374 return rc;
9375 }
9376
9377 rc = regulator_enable(reg_8058_l13);
9378 if (rc) {
9379 pr_err("%s: '%s' regulator enable failed,\
9380 rc=%d\n", __func__, "8058_l13", rc);
9381 return rc;
9382 }
9383 } else {
9384 rc = regulator_force_disable(reg_8058_l13);
9385 if (rc)
9386 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9387 __func__, "8058_l13", rc);
9388 }
9389 return rc;
9390
9391}
9392#endif
9393
9394#ifdef CONFIG_FB_MSM_MIPI_DSI
9395int mdp_core_clk_rate_table[] = {
9396 85330000,
9397 85330000,
9398 160000000,
9399 200000000,
9400};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009401#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9402int mdp_core_clk_rate_table[] = {
9403 200000000,
9404 200000000,
9405 200000000,
9406 200000000,
9407};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009408#else
9409int mdp_core_clk_rate_table[] = {
9410 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009411 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009412 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009413 200000000,
9414};
9415#endif
9416
9417static struct msm_panel_common_pdata mdp_pdata = {
9418 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009419#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9420 .mdp_core_clk_rate = 200000000,
9421#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009422 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009423#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009424 .mdp_core_clk_table = mdp_core_clk_rate_table,
9425 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9426#ifdef CONFIG_MSM_BUS_SCALING
9427 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9428#endif
9429 .mdp_rev = MDP_REV_41,
Huaibin Yanga5419422011-12-08 23:52:10 -08009430 .mdp_writeback_memtype = MEMTYPE_EBI1,
9431 .mdp_writeback_phys = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009432};
9433
Huaibin Yanga5419422011-12-08 23:52:10 -08009434static void __init reserve_mdp_memory(void)
9435{
9436 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9437 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9438
9439 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9440 mdp_pdata.mdp_writeback_size_ov0;
9441 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9442 mdp_pdata.mdp_writeback_size_ov1;
9443}
9444
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009445#ifdef CONFIG_FB_MSM_TVOUT
9446
9447#ifdef CONFIG_MSM_BUS_SCALING
9448static struct msm_bus_vectors atv_bus_init_vectors[] = {
9449 /* For now, 0th array entry is reserved.
9450 * Please leave 0 as is and don't use it
9451 */
9452 {
9453 .src = MSM_BUS_MASTER_MDP_PORT0,
9454 .dst = MSM_BUS_SLAVE_SMI,
9455 .ab = 0,
9456 .ib = 0,
9457 },
9458 /* Master and slaves can be from different fabrics */
9459 {
9460 .src = MSM_BUS_MASTER_MDP_PORT0,
9461 .dst = MSM_BUS_SLAVE_EBI_CH0,
9462 .ab = 0,
9463 .ib = 0,
9464 },
9465};
9466static struct msm_bus_vectors atv_bus_def_vectors[] = {
9467 /* For now, 0th array entry is reserved.
9468 * Please leave 0 as is and don't use it
9469 */
9470 {
9471 .src = MSM_BUS_MASTER_MDP_PORT0,
9472 .dst = MSM_BUS_SLAVE_SMI,
9473 .ab = 236390400,
9474 .ib = 265939200,
9475 },
9476 /* Master and slaves can be from different fabrics */
9477 {
9478 .src = MSM_BUS_MASTER_MDP_PORT0,
9479 .dst = MSM_BUS_SLAVE_EBI_CH0,
9480 .ab = 236390400,
9481 .ib = 265939200,
9482 },
9483};
9484static struct msm_bus_paths atv_bus_scale_usecases[] = {
9485 {
9486 ARRAY_SIZE(atv_bus_init_vectors),
9487 atv_bus_init_vectors,
9488 },
9489 {
9490 ARRAY_SIZE(atv_bus_def_vectors),
9491 atv_bus_def_vectors,
9492 },
9493};
9494static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9495 atv_bus_scale_usecases,
9496 ARRAY_SIZE(atv_bus_scale_usecases),
9497 .name = "atv",
9498};
9499#endif
9500
9501static struct tvenc_platform_data atv_pdata = {
9502 .poll = 0,
9503 .pm_vid_en = atv_dac_power,
9504#ifdef CONFIG_MSM_BUS_SCALING
9505 .bus_scale_table = &atv_bus_scale_pdata,
9506#endif
9507};
9508#endif
9509
9510static void __init msm_fb_add_devices(void)
9511{
9512#ifdef CONFIG_FB_MSM_LCDC_DSUB
9513 mdp_pdata.mdp_core_clk_table = NULL;
9514 mdp_pdata.num_mdp_clk = 0;
9515 mdp_pdata.mdp_core_clk_rate = 200000000;
9516#endif
9517 if (machine_is_msm8x60_rumi3())
9518 msm_fb_register_device("mdp", NULL);
9519 else
9520 msm_fb_register_device("mdp", &mdp_pdata);
9521
9522 msm_fb_register_device("lcdc", &lcdc_pdata);
9523 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9524#ifdef CONFIG_MSM_BUS_SCALING
9525 msm_fb_register_device("dtv", &dtv_pdata);
9526#endif
9527#ifdef CONFIG_FB_MSM_TVOUT
9528 msm_fb_register_device("tvenc", &atv_pdata);
9529 msm_fb_register_device("tvout_device", NULL);
9530#endif
9531}
9532
9533#if (defined(CONFIG_MARIMBA_CORE)) && \
9534 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9535
9536static const struct {
9537 char *name;
9538 int vmin;
9539 int vmax;
9540} bt_regs_info[] = {
9541 { "8058_s3", 1800000, 1800000 },
9542 { "8058_s2", 1300000, 1300000 },
9543 { "8058_l8", 2900000, 3050000 },
9544};
9545
9546static struct {
9547 bool enabled;
9548} bt_regs_status[] = {
9549 { false },
9550 { false },
9551 { false },
9552};
9553static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9554
9555static int bahama_bt(int on)
9556{
9557 int rc;
9558 int i;
9559 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9560
9561 struct bahama_variant_register {
9562 const size_t size;
9563 const struct bahama_config_register *set;
9564 };
9565
9566 const struct bahama_config_register *p;
9567
9568 u8 version;
9569
9570 const struct bahama_config_register v10_bt_on[] = {
9571 { 0xE9, 0x00, 0xFF },
9572 { 0xF4, 0x80, 0xFF },
9573 { 0xE4, 0x00, 0xFF },
9574 { 0xE5, 0x00, 0x0F },
9575#ifdef CONFIG_WLAN
9576 { 0xE6, 0x38, 0x7F },
9577 { 0xE7, 0x06, 0xFF },
9578#endif
9579 { 0xE9, 0x21, 0xFF },
9580 { 0x01, 0x0C, 0x1F },
9581 { 0x01, 0x08, 0x1F },
9582 };
9583
9584 const struct bahama_config_register v20_bt_on_fm_off[] = {
9585 { 0x11, 0x0C, 0xFF },
9586 { 0x13, 0x01, 0xFF },
9587 { 0xF4, 0x80, 0xFF },
9588 { 0xF0, 0x00, 0xFF },
9589 { 0xE9, 0x00, 0xFF },
9590#ifdef CONFIG_WLAN
9591 { 0x81, 0x00, 0x7F },
9592 { 0x82, 0x00, 0xFF },
9593 { 0xE6, 0x38, 0x7F },
9594 { 0xE7, 0x06, 0xFF },
9595#endif
9596 { 0xE9, 0x21, 0xFF },
9597 };
9598
9599 const struct bahama_config_register v20_bt_on_fm_on[] = {
9600 { 0x11, 0x0C, 0xFF },
9601 { 0x13, 0x01, 0xFF },
9602 { 0xF4, 0x86, 0xFF },
9603 { 0xF0, 0x06, 0xFF },
9604 { 0xE9, 0x00, 0xFF },
9605#ifdef CONFIG_WLAN
9606 { 0x81, 0x00, 0x7F },
9607 { 0x82, 0x00, 0xFF },
9608 { 0xE6, 0x38, 0x7F },
9609 { 0xE7, 0x06, 0xFF },
9610#endif
9611 { 0xE9, 0x21, 0xFF },
9612 };
9613
9614 const struct bahama_config_register v10_bt_off[] = {
9615 { 0xE9, 0x00, 0xFF },
9616 };
9617
9618 const struct bahama_config_register v20_bt_off_fm_off[] = {
9619 { 0xF4, 0x84, 0xFF },
9620 { 0xF0, 0x04, 0xFF },
9621 { 0xE9, 0x00, 0xFF }
9622 };
9623
9624 const struct bahama_config_register v20_bt_off_fm_on[] = {
9625 { 0xF4, 0x86, 0xFF },
9626 { 0xF0, 0x06, 0xFF },
9627 { 0xE9, 0x00, 0xFF }
9628 };
9629 const struct bahama_variant_register bt_bahama[2][3] = {
9630 {
9631 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9632 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9633 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9634 },
9635 {
9636 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9637 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9638 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9639 }
9640 };
9641
9642 u8 offset = 0; /* index into bahama configs */
9643
9644 on = on ? 1 : 0;
9645 version = read_bahama_ver();
9646
9647 if (version == VER_UNSUPPORTED) {
9648 dev_err(&msm_bt_power_device.dev,
9649 "%s: unsupported version\n",
9650 __func__);
9651 return -EIO;
9652 }
9653
9654 if (version == VER_2_0) {
9655 if (marimba_get_fm_status(&config))
9656 offset = 0x01;
9657 }
9658
9659 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9660 if (on && (version == VER_2_0)) {
9661 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9662 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9663 && (bt_regs_status[i].enabled == true)) {
9664 if (regulator_disable(bt_regs[i])) {
9665 dev_err(&msm_bt_power_device.dev,
9666 "%s: regulator disable failed",
9667 __func__);
9668 }
9669 bt_regs_status[i].enabled = false;
9670 break;
9671 }
9672 }
9673 }
9674
9675 p = bt_bahama[on][version + offset].set;
9676
9677 dev_info(&msm_bt_power_device.dev,
9678 "%s: found version %d\n", __func__, version);
9679
9680 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9681 u8 value = (p+i)->value;
9682 rc = marimba_write_bit_mask(&config,
9683 (p+i)->reg,
9684 &value,
9685 sizeof((p+i)->value),
9686 (p+i)->mask);
9687 if (rc < 0) {
9688 dev_err(&msm_bt_power_device.dev,
9689 "%s: reg %d write failed: %d\n",
9690 __func__, (p+i)->reg, rc);
9691 return rc;
9692 }
9693 dev_dbg(&msm_bt_power_device.dev,
9694 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9695 __func__, (p+i)->reg,
9696 value, (p+i)->mask);
9697 }
9698 /* Update BT Status */
9699 if (on)
9700 marimba_set_bt_status(&config, true);
9701 else
9702 marimba_set_bt_status(&config, false);
9703
9704 return 0;
9705}
9706
9707static int bluetooth_use_regulators(int on)
9708{
9709 int i, recover = -1, rc = 0;
9710
9711 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9712 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9713 bt_regs_info[i].name) :
9714 (regulator_put(bt_regs[i]), NULL);
9715 if (IS_ERR(bt_regs[i])) {
9716 rc = PTR_ERR(bt_regs[i]);
9717 dev_err(&msm_bt_power_device.dev,
9718 "regulator %s get failed (%d)\n",
9719 bt_regs_info[i].name, rc);
9720 recover = i - 1;
9721 bt_regs[i] = NULL;
9722 break;
9723 }
9724
9725 if (!on)
9726 continue;
9727
9728 rc = regulator_set_voltage(bt_regs[i],
9729 bt_regs_info[i].vmin,
9730 bt_regs_info[i].vmax);
9731 if (rc < 0) {
9732 dev_err(&msm_bt_power_device.dev,
9733 "regulator %s voltage set (%d)\n",
9734 bt_regs_info[i].name, rc);
9735 recover = i;
9736 break;
9737 }
9738 }
9739
9740 if (on && (recover > -1))
9741 for (i = recover; i >= 0; i--) {
9742 regulator_put(bt_regs[i]);
9743 bt_regs[i] = NULL;
9744 }
9745
9746 return rc;
9747}
9748
9749static int bluetooth_switch_regulators(int on)
9750{
9751 int i, rc = 0;
9752
9753 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9754 if (on && (bt_regs_status[i].enabled == false)) {
9755 rc = regulator_enable(bt_regs[i]);
9756 if (rc < 0) {
9757 dev_err(&msm_bt_power_device.dev,
9758 "regulator %s %s failed (%d)\n",
9759 bt_regs_info[i].name,
9760 "enable", rc);
9761 if (i > 0) {
9762 while (--i) {
9763 regulator_disable(bt_regs[i]);
9764 bt_regs_status[i].enabled
9765 = false;
9766 }
9767 break;
9768 }
9769 }
9770 bt_regs_status[i].enabled = true;
9771 } else if (!on && (bt_regs_status[i].enabled == true)) {
9772 rc = regulator_disable(bt_regs[i]);
9773 if (rc < 0) {
9774 dev_err(&msm_bt_power_device.dev,
9775 "regulator %s %s failed (%d)\n",
9776 bt_regs_info[i].name,
9777 "disable", rc);
9778 break;
9779 }
9780 bt_regs_status[i].enabled = false;
9781 }
9782 }
9783 return rc;
9784}
9785
9786static struct msm_xo_voter *bt_clock;
9787
9788static int bluetooth_power(int on)
9789{
9790 int rc = 0;
9791 int id;
9792
9793 /* In case probe function fails, cur_connv_type would be -1 */
9794 id = adie_get_detected_connectivity_type();
9795 if (id != BAHAMA_ID) {
9796 pr_err("%s: unexpected adie connectivity type: %d\n",
9797 __func__, id);
9798 return -ENODEV;
9799 }
9800
9801 if (on) {
9802
9803 rc = bluetooth_use_regulators(1);
9804 if (rc < 0)
9805 goto out;
9806
9807 rc = bluetooth_switch_regulators(1);
9808
9809 if (rc < 0)
9810 goto fail_put;
9811
9812 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9813
9814 if (IS_ERR(bt_clock)) {
9815 pr_err("Couldn't get TCXO_D0 voter\n");
9816 goto fail_switch;
9817 }
9818
9819 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9820
9821 if (rc < 0) {
9822 pr_err("Failed to vote for TCXO_DO ON\n");
9823 goto fail_vote;
9824 }
9825
9826 rc = bahama_bt(1);
9827
9828 if (rc < 0)
9829 goto fail_clock;
9830
9831 msleep(10);
9832
9833 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9834
9835 if (rc < 0) {
9836 pr_err("Failed to vote for TCXO_DO pin control\n");
9837 goto fail_vote;
9838 }
9839 } else {
9840 /* check for initial RFKILL block (power off) */
9841 /* some RFKILL versions/configurations rfkill_register */
9842 /* calls here for an initial set_block */
9843 /* avoid calling i2c and regulator before unblock (on) */
9844 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9845 dev_info(&msm_bt_power_device.dev,
9846 "%s: initialized OFF/blocked\n", __func__);
9847 goto out;
9848 }
9849
9850 bahama_bt(0);
9851
9852fail_clock:
9853 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9854fail_vote:
9855 msm_xo_put(bt_clock);
9856fail_switch:
9857 bluetooth_switch_regulators(0);
9858fail_put:
9859 bluetooth_use_regulators(0);
9860 }
9861
9862out:
9863 if (rc < 0)
9864 on = 0;
9865 dev_info(&msm_bt_power_device.dev,
9866 "Bluetooth power switch: state %d result %d\n", on, rc);
9867
9868 return rc;
9869}
9870
9871#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9872
9873static void __init msm8x60_cfg_smsc911x(void)
9874{
9875 smsc911x_resources[1].start =
9876 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9877 smsc911x_resources[1].end =
9878 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9879}
9880
9881#ifdef CONFIG_MSM_RPM
9882static struct msm_rpm_platform_data msm_rpm_data = {
9883 .reg_base_addrs = {
9884 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9885 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9886 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9887 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9888 },
9889
9890 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9891 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9892 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9893 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9894 .msm_apps_ipc_rpm_val = 4,
9895};
9896#endif
9897
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009898void msm_fusion_setup_pinctrl(void)
9899{
9900 struct msm_xo_voter *a1;
9901
9902 if (socinfo_get_platform_subtype() == 0x3) {
9903 /*
9904 * Vote for the A1 clock to be in pin control mode before
9905 * the external images are loaded.
9906 */
9907 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9908 BUG_ON(!a1);
9909 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9910 }
9911}
9912
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009913struct msm_board_data {
9914 struct msm_gpiomux_configs *gpiomux_cfgs;
9915};
9916
9917static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9918 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9919};
9920
9921static struct msm_board_data msm8x60_sim_board_data __initdata = {
9922 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9923};
9924
9925static struct msm_board_data msm8x60_surf_board_data __initdata = {
9926 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9927};
9928
9929static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9930 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9931};
9932
9933static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9934 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9935};
9936
9937static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9938 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9939};
9940
9941static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9942 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9943};
9944
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009945static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9946 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9947};
9948
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009949static void __init msm8x60_init(struct msm_board_data *board_data)
9950{
9951 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309952#ifdef CONFIG_USB_EHCI_MSM_72K
9953 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9954 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9955 .level = PM8901_MPP_DIG_LEVEL_L5,
9956 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9957 };
9958#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309959 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009960
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009961 /*
9962 * Initialize RPM first as other drivers and devices may need
9963 * it for their initialization.
9964 */
9965#ifdef CONFIG_MSM_RPM
9966 BUG_ON(msm_rpm_init(&msm_rpm_data));
9967#endif
9968 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9969 ARRAY_SIZE(msm_rpmrs_levels)));
9970 if (msm_xo_init())
9971 pr_err("Failed to initialize XO votes\n");
9972
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009973 msm8x60_check_2d_hardware();
9974
9975 /* Change SPM handling of core 1 if PMM 8160 is present. */
9976 soc_platform_version = socinfo_get_platform_version();
9977 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9978 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9979 struct msm_spm_platform_data *spm_data;
9980
9981 spm_data = &msm_spm_data_v1[1];
9982 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9983 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9984
9985 spm_data = &msm_spm_data[1];
9986 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9987 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9988 }
9989
9990 /*
9991 * Initialize SPM before acpuclock as the latter calls into SPM
9992 * driver to set ACPU voltages.
9993 */
9994 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9995 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9996 else
9997 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9998
9999 /*
10000 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10001 * devices so that the RPM doesn't drop into a low power mode that an
10002 * un-reworked SURF cannot resume from.
10003 */
10004 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010005 int i;
10006
10007 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10008 if (rpm_regulator_init_data[i].id
10009 == RPM_VREG_ID_PM8901_L4
10010 || rpm_regulator_init_data[i].id
10011 == RPM_VREG_ID_PM8901_L6)
10012 rpm_regulator_init_data[i]
10013 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010014 }
10015
10016 /*
10017 * Disable regulator info printing so that regulator registration
10018 * messages do not enter the kmsg log.
10019 */
10020 regulator_suppress_info_printing();
10021
10022 /* Initialize regulators needed for clock_init. */
10023 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10024
Stephen Boydbb600ae2011-08-02 20:11:40 -070010025 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010026
10027 /* Buses need to be initialized before early-device registration
10028 * to get the platform data for fabrics.
10029 */
10030 msm8x60_init_buses();
10031 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10032 /* CPU frequency control is not supported on simulated targets. */
10033 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010034 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010035
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010036 /*
10037 * Enable EBI2 only for boards which make use of it. Leave
10038 * it disabled for all others for additional power savings.
10039 */
10040 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10041 machine_is_msm8x60_rumi3() ||
10042 machine_is_msm8x60_sim() ||
10043 machine_is_msm8x60_fluid() ||
10044 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010045 msm8x60_init_ebi2();
10046 msm8x60_init_tlmm();
10047 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10048 msm8x60_init_uart12dm();
10049 msm8x60_init_mmc();
10050
10051#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10052 msm8x60_init_pm8058_othc();
10053#endif
10054
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010055 if (machine_is_msm8x60_fluid())
10056 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10057 else if (machine_is_msm8x60_dragon())
10058 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10059 else
10060 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010061
Jilai Wang53d27a82011-07-13 14:32:58 -040010062 /* Specify reset pin for OV9726 */
10063 if (machine_is_msm8x60_dragon()) {
10064 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10065 ov9726_sensor_8660_info.mount_angle = 270;
10066 }
10067
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010068#ifdef CONFIG_BATTERY_MSM8X60
10069 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10070 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10071 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10072 platform_device_register(&msm_charger_device);
10073#endif
10074
10075 if (machine_is_msm8x60_dragon())
10076 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10077 if (!machine_is_msm8x60_fluid())
10078 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10079
10080 /* configure pmic leds */
10081 if (machine_is_msm8x60_fluid())
10082 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10083 else if (machine_is_msm8x60_dragon())
10084 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10085 else
10086 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10087
10088 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10089 machine_is_msm8x60_dragon()) {
10090 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10091 }
10092
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010093 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10094 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010095 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010096 msm8x60_cfg_smsc911x();
10097 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10098 platform_add_devices(msm_footswitch_devices,
10099 msm_num_footswitch_devices);
10100 platform_add_devices(surf_devices,
10101 ARRAY_SIZE(surf_devices));
10102
10103#ifdef CONFIG_MSM_DSPS
10104 if (machine_is_msm8x60_fluid()) {
10105 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10106 msm8x60_init_dsps();
10107 }
10108#endif
10109
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010110 pm8901_vreg_mpp0_init();
10111
10112 platform_device_register(&msm8x60_8901_mpp_vreg);
10113
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010114#ifdef CONFIG_USB_EHCI_MSM_72K
10115 /*
10116 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10117 * fluid
10118 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010119 if (machine_is_msm8x60_fluid())
10120 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10121 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010122#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010123
10124#ifdef CONFIG_SND_SOC_MSM8660_APQ
10125 if (machine_is_msm8x60_dragon())
10126 platform_add_devices(dragon_alsa_devices,
10127 ARRAY_SIZE(dragon_alsa_devices));
10128 else
10129#endif
10130 platform_add_devices(asoc_devices,
10131 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010132 } else {
10133 msm8x60_configure_smc91x();
10134 platform_add_devices(rumi_sim_devices,
10135 ARRAY_SIZE(rumi_sim_devices));
10136 }
10137#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010138 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10139 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010140 msm8x60_cfg_isp1763();
10141#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010142
10143 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10144 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010146
10147#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10148 if (machine_is_msm8x60_fluid())
10149 platform_device_register(&msm_gsbi10_qup_spi_device);
10150 else
10151 platform_device_register(&msm_gsbi1_qup_spi_device);
10152#endif
10153
10154#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10155 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10156 if (machine_is_msm8x60_fluid())
10157 cyttsp_set_params();
10158#endif
10159 if (!machine_is_msm8x60_sim())
10160 msm_fb_add_devices();
10161 fixup_i2c_configs();
10162 register_i2c_devices();
10163
Terence Hampson1c73fef2011-07-19 17:10:49 -040010164 if (machine_is_msm8x60_dragon())
10165 smsc911x_config.reset_gpio
10166 = GPIO_ETHERNET_RESET_N_DRAGON;
10167
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010168 platform_device_register(&smsc911x_device);
10169
10170#if (defined(CONFIG_SPI_QUP)) && \
10171 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010172 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10173 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010174
10175 if (machine_is_msm8x60_fluid()) {
10176#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10177 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10178 spi_register_board_info(lcdc_samsung_spi_board_info,
10179 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10180 } else
10181#endif
10182 {
10183#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10184 spi_register_board_info(lcdc_auo_spi_board_info,
10185 ARRAY_SIZE(lcdc_auo_spi_board_info));
10186#endif
10187 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010188#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10189 } else if (machine_is_msm8x60_dragon()) {
10190 spi_register_board_info(lcdc_nt35582_spi_board_info,
10191 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10192#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010193 }
10194#endif
10195
10196 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10197 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10198 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10199 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010200 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010201
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010202 pm8058_gpios_init();
10203
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010204#ifdef CONFIG_SENSORS_MSM_ADC
10205 if (machine_is_msm8x60_fluid()) {
10206 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10207 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10208 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10209 msm_adc_pdata.gpio_config = APROC_CONFIG;
10210 else
10211 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10212 }
10213 msm_adc_pdata.target_hw = MSM_8x60;
10214#endif
10215#ifdef CONFIG_MSM8X60_AUDIO
10216 msm_snddev_init();
10217#endif
10218#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10219 if (machine_is_msm8x60_fluid())
10220 platform_device_register(&fluid_leds_gpio);
10221 else
10222 platform_device_register(&gpio_leds);
10223#endif
10224
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010225 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010226
10227 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10228 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010229}
10230
10231static void __init msm8x60_rumi3_init(void)
10232{
10233 msm8x60_init(&msm8x60_rumi3_board_data);
10234}
10235
10236static void __init msm8x60_sim_init(void)
10237{
10238 msm8x60_init(&msm8x60_sim_board_data);
10239}
10240
10241static void __init msm8x60_surf_init(void)
10242{
10243 msm8x60_init(&msm8x60_surf_board_data);
10244}
10245
10246static void __init msm8x60_ffa_init(void)
10247{
10248 msm8x60_init(&msm8x60_ffa_board_data);
10249}
10250
10251static void __init msm8x60_fluid_init(void)
10252{
10253 msm8x60_init(&msm8x60_fluid_board_data);
10254}
10255
10256static void __init msm8x60_charm_surf_init(void)
10257{
10258 msm8x60_init(&msm8x60_charm_surf_board_data);
10259}
10260
10261static void __init msm8x60_charm_ffa_init(void)
10262{
10263 msm8x60_init(&msm8x60_charm_ffa_board_data);
10264}
10265
10266static void __init msm8x60_charm_init_early(void)
10267{
10268 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010269}
10270
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010271static void __init msm8x60_dragon_init(void)
10272{
10273 msm8x60_init(&msm8x60_dragon_board_data);
10274}
10275
Steve Mucklea55df6e2010-01-07 12:43:24 -080010276MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10277 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010278 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010279 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010280 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010281 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010282 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010283MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010284
10285MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10286 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010287 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010288 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010289 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010290 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010291 .init_early = msm8x60_charm_init_early,
10292MACHINE_END
10293
10294MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10295 .map_io = msm8x60_map_io,
10296 .reserve = msm8x60_reserve,
10297 .init_irq = msm8x60_init_irq,
10298 .init_machine = msm8x60_surf_init,
10299 .timer = &msm_timer,
10300 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010301MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010302
10303MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10304 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010305 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010306 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010307 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010308 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010309 .init_early = msm8x60_charm_init_early,
10310MACHINE_END
10311
10312MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10313 .map_io = msm8x60_map_io,
10314 .reserve = msm8x60_reserve,
10315 .init_irq = msm8x60_init_irq,
10316 .init_machine = msm8x60_fluid_init,
10317 .timer = &msm_timer,
10318 .init_early = msm8x60_charm_init_early,
10319MACHINE_END
10320
10321MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10322 .map_io = msm8x60_map_io,
10323 .reserve = msm8x60_reserve,
10324 .init_irq = msm8x60_init_irq,
10325 .init_machine = msm8x60_charm_surf_init,
10326 .timer = &msm_timer,
10327 .init_early = msm8x60_charm_init_early,
10328MACHINE_END
10329
10330MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10331 .map_io = msm8x60_map_io,
10332 .reserve = msm8x60_reserve,
10333 .init_irq = msm8x60_init_irq,
10334 .init_machine = msm8x60_charm_ffa_init,
10335 .timer = &msm_timer,
10336 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010337MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010338
10339MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10340 .map_io = msm8x60_map_io,
10341 .reserve = msm8x60_reserve,
10342 .init_irq = msm8x60_init_irq,
10343 .init_machine = msm8x60_dragon_init,
10344 .timer = &msm_timer,
10345 .init_early = msm8x60_charm_init_early,
10346MACHINE_END