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Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080010#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000012#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070013#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080014#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070015#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080016#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080017#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080021#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022#endif
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050023#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070024#include <linux/irq.h>
25#include <linux/interrupt.h>
Bryan Wu81d9c7f2008-03-26 10:02:13 +080026#include <linux/i2c.h>
David Brownell27f5d752007-10-04 18:06:16 -070027#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080028#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000029#include <linux/leds.h>
30#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080031#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080032#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080033#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080034#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080035#include <asm/dpmc.h>
Bryan Wu1394f032007-05-06 14:50:22 -070036
37/*
38 * Name the Board for the /proc/cpuinfo
39 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080040const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070041
42/*
43 * Driver needs to know address, irq and flag pin.
44 */
45
Bryan Wu1394f032007-05-06 14:50:22 -070046#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080047#include <linux/usb/isp1760.h>
48static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070049 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080050 .start = 0x203C0000,
51 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070052 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080055 .start = IRQ_PF7,
56 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080057 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070058 },
59};
60
Michael Hennerich3f375692008-11-18 17:48:22 +080061static struct isp1760_platform_data isp1760_priv = {
62 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080063 .bus_width_16 = 1,
64 .port1_otg = 0,
65 .analog_oc = 0,
66 .dack_polarity_high = 0,
67 .dreq_polarity_high = 0,
68};
69
70static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb7682009-10-15 10:37:33 +000071 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070072 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080073 .dev = {
74 .platform_data = &isp1760_priv,
75 },
76 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
77 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070078};
Bryan Wu1394f032007-05-06 14:50:22 -070079#endif
80
Michael Hennerich2463ef22008-01-27 16:49:48 +080081#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080082#include <linux/gpio_keys.h>
83
84static struct gpio_keys_button bfin_gpio_keys_table[] = {
85 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
86 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
87 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
88 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
89};
90
91static struct gpio_keys_platform_data bfin_gpio_keys_data = {
92 .buttons = bfin_gpio_keys_table,
93 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
94};
95
96static struct platform_device bfin_device_gpiokeys = {
97 .name = "gpio-keys",
98 .dev = {
99 .platform_data = &bfin_gpio_keys_data,
100 },
101};
102#endif
103
Bryan Wu1394f032007-05-06 14:50:22 -0700104#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
105static struct resource bfin_pcmcia_cf_resources[] = {
106 {
107 .start = 0x20310000, /* IO PORT */
108 .end = 0x20312000,
109 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800110 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800111 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700112 .end = 0x20311FFF,
113 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800114 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700115 .start = IRQ_PF4,
116 .end = IRQ_PF4,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800118 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700119 .start = 6, /* Card Detect PF6 */
120 .end = 6,
121 .flags = IORESOURCE_IRQ,
122 },
123};
124
125static struct platform_device bfin_pcmcia_cf_device = {
126 .name = "bfin_cf_pcmcia",
127 .id = -1,
128 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
129 .resource = bfin_pcmcia_cf_resources,
130};
131#endif
132
133#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
134static struct platform_device rtc_device = {
135 .name = "rtc-bfin",
136 .id = -1,
137};
138#endif
139
140#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000141#include <linux/smc91x.h>
142
143static struct smc91x_platdata smc91x_info = {
144 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
145 .leda = RPC_LED_100_10,
146 .ledb = RPC_LED_TX_RX,
147};
148
Bryan Wu1394f032007-05-06 14:50:22 -0700149static struct resource smc91x_resources[] = {
150 {
151 .name = "smc91x-regs",
152 .start = 0x20300300,
153 .end = 0x20300300 + 16,
154 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800155 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700156
157 .start = IRQ_PF7,
158 .end = IRQ_PF7,
159 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
160 },
161};
162static struct platform_device smc91x_device = {
163 .name = "smc91x",
164 .id = 0,
165 .num_resources = ARRAY_SIZE(smc91x_resources),
166 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000167 .dev = {
168 .platform_data = &smc91x_info,
169 },
Bryan Wu1394f032007-05-06 14:50:22 -0700170};
171#endif
172
Alex Landauf40d24d2007-07-12 12:11:48 +0800173#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
174static struct resource dm9000_resources[] = {
175 [0] = {
176 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000177 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800178 .flags = IORESOURCE_MEM,
179 },
180 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000181 .start = 0x203FB804,
182 .end = 0x203FB804 + 1,
183 .flags = IORESOURCE_MEM,
184 },
185 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800186 .start = IRQ_PF9,
187 .end = IRQ_PF9,
188 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
189 },
190};
191
192static struct platform_device dm9000_device = {
193 .name = "dm9000",
194 .id = -1,
195 .num_resources = ARRAY_SIZE(dm9000_resources),
196 .resource = dm9000_resources,
197};
198#endif
199
Bryan Wu1394f032007-05-06 14:50:22 -0700200#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
201static struct resource sl811_hcd_resources[] = {
202 {
203 .start = 0x20340000,
204 .end = 0x20340000,
205 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800206 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700207 .start = 0x20340004,
208 .end = 0x20340004,
209 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800210 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700211 .start = CONFIG_USB_SL811_BFIN_IRQ,
212 .end = CONFIG_USB_SL811_BFIN_IRQ,
213 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
214 },
215};
216
217#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
218void sl811_port_power(struct device *dev, int is_on)
219{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800220 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800221 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700222}
223#endif
224
225static struct sl811_platform_data sl811_priv = {
226 .potpg = 10,
227 .power = 250, /* == 500mA */
228#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
229 .port_power = &sl811_port_power,
230#endif
231};
232
233static struct platform_device sl811_hcd_device = {
234 .name = "sl811-hcd",
235 .id = 0,
236 .dev = {
237 .platform_data = &sl811_priv,
238 },
239 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
240 .resource = sl811_hcd_resources,
241};
242#endif
243
244#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
245static struct resource isp1362_hcd_resources[] = {
246 {
247 .start = 0x20360000,
248 .end = 0x20360000,
249 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800250 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700251 .start = 0x20360004,
252 .end = 0x20360004,
253 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800254 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000255 .start = IRQ_PF3,
256 .end = IRQ_PF3,
Bryan Wu1394f032007-05-06 14:50:22 -0700257 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
258 },
259};
260
261static struct isp1362_platform_data isp1362_priv = {
262 .sel15Kres = 1,
263 .clknotstop = 0,
264 .oc_enable = 0,
265 .int_act_high = 0,
266 .int_edge_triggered = 0,
267 .remote_wakeup_connected = 0,
268 .no_power_switching = 1,
269 .power_switching_mode = 0,
270};
271
272static struct platform_device isp1362_hcd_device = {
273 .name = "isp1362-hcd",
274 .id = 0,
275 .dev = {
276 .platform_data = &isp1362_priv,
277 },
278 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
279 .resource = isp1362_hcd_resources,
280};
281#endif
282
Barry Song706a01b2009-11-02 07:29:07 +0000283#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
284unsigned short bfin_can_peripherals[] = {
285 P_CAN0_RX, P_CAN0_TX, 0
286};
287
288static struct resource bfin_can_resources[] = {
289 {
290 .start = 0xFFC02A00,
291 .end = 0xFFC02FFF,
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = IRQ_CAN_RX,
296 .end = IRQ_CAN_RX,
297 .flags = IORESOURCE_IRQ,
298 },
299 {
300 .start = IRQ_CAN_TX,
301 .end = IRQ_CAN_TX,
302 .flags = IORESOURCE_IRQ,
303 },
304 {
305 .start = IRQ_CAN_ERROR,
306 .end = IRQ_CAN_ERROR,
307 .flags = IORESOURCE_IRQ,
308 },
309};
310
311static struct platform_device bfin_can_device = {
312 .name = "bfin_can",
313 .num_resources = ARRAY_SIZE(bfin_can_resources),
314 .resource = bfin_can_resources,
315 .dev = {
316 .platform_data = &bfin_can_peripherals, /* Passed to driver */
317 },
318};
319#endif
320
Bryan Wu1394f032007-05-06 14:50:22 -0700321#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800322static struct platform_device bfin_mii_bus = {
323 .name = "bfin_mii_bus",
324};
325
Bryan Wu1394f032007-05-06 14:50:22 -0700326static struct platform_device bfin_mac_device = {
327 .name = "bfin_mac",
Graf Yang65319622009-02-04 16:49:45 +0800328 .dev.platform_data = &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -0700329};
330#endif
331
332#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
333static struct resource net2272_bfin_resources[] = {
334 {
335 .start = 0x20300000,
336 .end = 0x20300000 + 0x100,
337 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800338 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700339 .start = IRQ_PF7,
340 .end = IRQ_PF7,
341 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
342 },
343};
344
345static struct platform_device net2272_bfin_device = {
346 .name = "net2272",
347 .id = -1,
348 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
349 .resource = net2272_bfin_resources,
350};
351#endif
352
Mike Frysingerfc689112008-06-25 11:41:42 +0800353#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
354#ifdef CONFIG_MTD_PARTITIONS
355const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
356
357static struct mtd_partition bfin_plat_nand_partitions[] = {
358 {
Robin Getzaa582972008-08-05 17:47:29 +0800359 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800360 .size = 0x400000,
361 .offset = 0,
362 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800363 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800364 .size = MTDPART_SIZ_FULL,
365 .offset = MTDPART_OFS_APPEND,
366 },
367};
368#endif
369
370#define BFIN_NAND_PLAT_CLE 2
371#define BFIN_NAND_PLAT_ALE 1
372static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
373{
374 struct nand_chip *this = mtd->priv;
375
376 if (cmd == NAND_CMD_NONE)
377 return;
378
379 if (ctrl & NAND_CLE)
380 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
381 else
382 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
383}
384
385#define BFIN_NAND_PLAT_READY GPIO_PF3
386static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
387{
388 return gpio_get_value(BFIN_NAND_PLAT_READY);
389}
390
391static struct platform_nand_data bfin_plat_nand_data = {
392 .chip = {
393 .chip_delay = 30,
394#ifdef CONFIG_MTD_PARTITIONS
395 .part_probe_types = part_probes,
396 .partitions = bfin_plat_nand_partitions,
397 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
398#endif
399 },
400 .ctrl = {
401 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
402 .dev_ready = bfin_plat_nand_dev_ready,
403 },
404};
405
406#define MAX(x, y) (x > y ? x : y)
407static struct resource bfin_plat_nand_resources = {
408 .start = 0x20212000,
409 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
410 .flags = IORESOURCE_IO,
411};
412
413static struct platform_device bfin_async_nand_device = {
414 .name = "gen_nand",
415 .id = -1,
416 .num_resources = 1,
417 .resource = &bfin_plat_nand_resources,
418 .dev = {
419 .platform_data = &bfin_plat_nand_data,
420 },
421};
422
423static void bfin_plat_nand_init(void)
424{
425 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
426}
427#else
428static void bfin_plat_nand_init(void) {}
429#endif
430
Mike Frysinger793dc272008-03-26 08:09:12 +0800431#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800432static struct mtd_partition stamp_partitions[] = {
433 {
Robin Getzaa582972008-08-05 17:47:29 +0800434 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800435 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800436 .offset = 0,
437 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800438 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800439 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800440 .offset = MTDPART_OFS_APPEND,
441 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800442 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800443 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800444 .offset = MTDPART_OFS_APPEND,
445 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800446 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800447 .size = MTDPART_SIZ_FULL,
448 .offset = 0x3F0000,
449 .mask_flags = MTD_WRITEABLE,
450 }
451};
452
453static struct physmap_flash_data stamp_flash_data = {
454 .width = 2,
455 .parts = stamp_partitions,
456 .nr_parts = ARRAY_SIZE(stamp_partitions),
457};
458
459static struct resource stamp_flash_resource = {
460 .start = 0x20000000,
461 .end = 0x203fffff,
462 .flags = IORESOURCE_MEM,
463};
464
465static struct platform_device stamp_flash_device = {
466 .name = "physmap-flash",
467 .id = 0,
468 .dev = {
469 .platform_data = &stamp_flash_data,
470 },
471 .num_resources = 1,
472 .resource = &stamp_flash_resource,
473};
Mike Frysinger793dc272008-03-26 08:09:12 +0800474#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800475
Bryan Wu1394f032007-05-06 14:50:22 -0700476#if defined(CONFIG_MTD_M25P80) \
477 || defined(CONFIG_MTD_M25P80_MODULE)
478static struct mtd_partition bfin_spi_flash_partitions[] = {
479 {
Robin Getzaa582972008-08-05 17:47:29 +0800480 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800481 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700482 .offset = 0,
483 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800484 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800485 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800486 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800487 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800488 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800489 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800490 .size = MTDPART_SIZ_FULL,
491 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700492 }
493};
494
495static struct flash_platform_data bfin_spi_flash_data = {
496 .name = "m25p80",
497 .parts = bfin_spi_flash_partitions,
498 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a80782008-11-18 17:48:22 +0800499 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700500};
501
502/* SPI flash chip (m25p64) */
503static struct bfin5xx_spi_chip spi_flash_chip_info = {
504 .enable_dma = 0, /* use dma transfer with this chip*/
505 .bits_per_word = 8,
506};
507#endif
508
Mike Frysingera261eec2009-05-20 14:05:36 +0000509#if defined(CONFIG_BFIN_SPI_ADC) \
510 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700511/* SPI ADC chip */
512static struct bfin5xx_spi_chip spi_adc_chip_info = {
513 .enable_dma = 1, /* use dma transfer with this chip*/
514 .bits_per_word = 16,
515};
516#endif
517
Barry Song83124402009-08-06 21:03:02 +0000518#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
519 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700520static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
521 .enable_dma = 0,
522 .bits_per_word = 16,
523};
524#endif
525
Barry Songd4b834c2009-06-04 10:14:17 +0000526#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
527 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
528static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
529 .enable_dma = 0,
530 .bits_per_word = 8,
Barry Songd4b834c2009-06-04 10:14:17 +0000531};
532#endif
533
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000534#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000535#include <linux/input/ad714x.h>
536static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
537 .enable_dma = 0,
538 .bits_per_word = 16,
539};
540
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000541static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000542 {
543 .start_stage = 0,
544 .end_stage = 7,
545 .max_coord = 128,
546 },
547};
548
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000549static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000550 {
551 .keycode = BTN_FORWARD,
552 .l_mask = 0,
553 .h_mask = 0x600,
554 },
555 {
556 .keycode = BTN_LEFT,
557 .l_mask = 0,
558 .h_mask = 0x500,
559 },
560 {
561 .keycode = BTN_MIDDLE,
562 .l_mask = 0,
563 .h_mask = 0x800,
564 },
565 {
566 .keycode = BTN_RIGHT,
567 .l_mask = 0x100,
568 .h_mask = 0x400,
569 },
570 {
571 .keycode = BTN_BACK,
572 .l_mask = 0x200,
573 .h_mask = 0x400,
574 },
575};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000576static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000577 .slider_num = 1,
578 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000579 .slider = ad7147_spi_slider_plat,
580 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000581 .stage_cfg_reg = {
582 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
583 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
584 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
585 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
586 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
587 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
588 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
590 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
591 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
592 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
593 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
594 },
595 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
596};
597#endif
598
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000599#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000600#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000601static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000602 {
603 .keycode = BTN_1,
604 .l_mask = 0,
605 .h_mask = 0x1,
606 },
607 {
608 .keycode = BTN_2,
609 .l_mask = 0,
610 .h_mask = 0x2,
611 },
612 {
613 .keycode = BTN_3,
614 .l_mask = 0,
615 .h_mask = 0x4,
616 },
617 {
618 .keycode = BTN_4,
619 .l_mask = 0x0,
620 .h_mask = 0x8,
621 },
622};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000623static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000624 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000625 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000626 .stage_cfg_reg = {
627 /* fixme: figure out right setting for all comoponent according
628 * to hardware feature of EVAL-AD7142EB board */
629 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
630 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
631 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
632 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
633 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
634 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
635 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
636 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 },
642 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
643};
644#endif
645
Yi Lif79ea4c2009-01-07 23:14:38 +0800646#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
647#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
648
649static int bfin_mmc_spi_init(struct device *dev,
650 irqreturn_t (*detect_int)(int, void *), void *data)
651{
652 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
653 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
654}
655
656static void bfin_mmc_spi_exit(struct device *dev, void *data)
657{
658 free_irq(MMC_SPI_CARD_DETECT_INT, data);
659}
660
661static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
662 .init = bfin_mmc_spi_init,
663 .exit = bfin_mmc_spi_exit,
664 .detect_delay = 100, /* msecs */
665};
666
667static struct bfin5xx_spi_chip mmc_spi_chip_info = {
668 .enable_dma = 0,
669 .bits_per_word = 8,
Yi Lie68d1eb2009-06-03 09:46:22 +0000670 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800671};
672#endif
673
Bryan Wu1394f032007-05-06 14:50:22 -0700674#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800675#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700676static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700677 .enable_dma = 0,
678 .bits_per_word = 16,
679};
680
681static const struct ad7877_platform_data bfin_ad7877_ts_info = {
682 .model = 7877,
683 .vref_delay_usecs = 50, /* internal, no capacitor */
684 .x_plate_ohms = 419,
685 .y_plate_ohms = 486,
686 .pressure_max = 1000,
687 .pressure_min = 0,
688 .stopacq_polarity = 1,
689 .first_conversion_delay = 3,
690 .acquisition_time = 1,
691 .averaging = 1,
692 .pen_down_acc_interval = 1,
693};
694#endif
695
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800696#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
697#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800698static const struct ad7879_platform_data bfin_ad7879_ts_info = {
699 .model = 7879, /* Model = AD7879 */
700 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
701 .pressure_max = 10000,
702 .pressure_min = 0,
703 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
704 .acquisition_time = 1, /* 4us acquisition time per sample */
705 .median = 2, /* do 8 measurements */
706 .averaging = 1, /* take the average of 4 middle samples */
707 .pen_down_acc_interval = 255, /* 9.4 ms */
708 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
709 .gpio_default = 1, /* During initialization set GPIO = HIGH */
710};
711#endif
712
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000713#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000714#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000715static const struct adxl34x_platform_data adxl34x_info = {
716 .x_axis_offset = 0,
717 .y_axis_offset = 0,
718 .z_axis_offset = 0,
719 .tap_threshold = 0x31,
720 .tap_duration = 0x10,
721 .tap_latency = 0x60,
722 .tap_window = 0xF0,
723 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
724 .act_axis_control = 0xFF,
725 .activity_threshold = 5,
726 .inactivity_threshold = 3,
727 .inactivity_time = 4,
728 .free_fall_threshold = 0x7,
729 .free_fall_time = 0x20,
730 .data_rate = 0x8,
731 .data_range = ADXL_FULL_RES,
732
733 .ev_type = EV_ABS,
734 .ev_code_x = ABS_X, /* EV_REL */
735 .ev_code_y = ABS_Y, /* EV_REL */
736 .ev_code_z = ABS_Z, /* EV_REL */
737
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000738 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000739
740/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
741/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
742 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
743 .fifo_mode = ADXL_FIFO_STREAM,
744};
745#endif
746
Michael Hennerichf5150152008-10-16 23:23:18 +0800747#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
748static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
749 .enable_dma = 0,
750 .bits_per_word = 16,
751};
752#endif
753
Michael Hennerich6e668932008-02-09 01:54:09 +0800754#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
755static struct bfin5xx_spi_chip spidev_chip_info = {
756 .enable_dma = 0,
757 .bits_per_word = 8,
758};
759#endif
760
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800761#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
762static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
763 .enable_dma = 0,
764 .bits_per_word = 8,
765};
766#endif
767
Michael Hennerich85a192e2009-01-07 23:14:38 +0800768#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
769static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
770 .enable_dma = 1,
771 .bits_per_word = 8,
772 .cs_gpio = GPIO_PF10,
773};
774#endif
775
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000776#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
777static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
778 .bits_per_word = 16,
779 .cs_gpio = GPIO_PF10,
780};
781
782#include <linux/spi/adf702x.h>
783#define TXREG 0x0160A470
784static const u32 adf7021_regs[] = {
785 0x09608FA0,
786 0x00575011,
787 0x00A7F092,
788 0x2B141563,
789 0x81F29E94,
790 0x00003155,
791 0x050A4F66,
792 0x00000007,
793 0x00000008,
794 0x000231E9,
795 0x3296354A,
796 0x891A2B3B,
797 0x00000D9C,
798 0x0000000D,
799 0x0000000E,
800 0x0000000F,
801};
802
803static struct adf702x_platform_data adf7021_platform_data = {
804 .regs_base = (void *)SPORT1_TCR1,
805 .dma_ch_rx = CH_SPORT1_RX,
806 .dma_ch_tx = CH_SPORT1_TX,
807 .irq_sport_err = IRQ_SPORT1_ERROR,
808 .gpio_int_rfs = GPIO_PF8,
809 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
810 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
811 .adf702x_model = MODEL_ADF7021,
812 .adf702x_regs = adf7021_regs,
813 .tx_reg = TXREG,
814};
815#endif
816
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800817#if defined(CONFIG_MTD_DATAFLASH) \
818 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800819
820static struct mtd_partition bfin_spi_dataflash_partitions[] = {
821 {
822 .name = "bootloader(spi)",
823 .size = 0x00040000,
824 .offset = 0,
825 .mask_flags = MTD_CAP_ROM
826 }, {
827 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800828 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800829 .offset = MTDPART_OFS_APPEND,
830 }, {
831 .name = "file system(spi)",
832 .size = MTDPART_SIZ_FULL,
833 .offset = MTDPART_OFS_APPEND,
834 }
835};
836
837static struct flash_platform_data bfin_spi_dataflash_data = {
838 .name = "SPI Dataflash",
839 .parts = bfin_spi_dataflash_partitions,
840 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
841};
842
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800843/* DataFlash chip */
844static struct bfin5xx_spi_chip data_flash_chip_info = {
845 .enable_dma = 0, /* use dma transfer with this chip*/
846 .bits_per_word = 8,
847};
848#endif
849
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000850#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
851static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
852 .enable_dma = 0, /* use dma transfer with this chip*/
853 .bits_per_word = 8,
854};
855#endif
856
Bryan Wu1394f032007-05-06 14:50:22 -0700857static struct spi_board_info bfin_spi_board_info[] __initdata = {
858#if defined(CONFIG_MTD_M25P80) \
859 || defined(CONFIG_MTD_M25P80_MODULE)
860 {
861 /* the modalias must be the same as spi device driver name */
862 .modalias = "m25p80", /* Name of spi_driver for this device */
863 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800864 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700865 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
866 .platform_data = &bfin_spi_flash_data,
867 .controller_data = &spi_flash_chip_info,
868 .mode = SPI_MODE_3,
869 },
870#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800871#if defined(CONFIG_MTD_DATAFLASH) \
872 || defined(CONFIG_MTD_DATAFLASH_MODULE)
873 { /* DataFlash chip */
874 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +0800875 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800876 .bus_num = 0, /* Framework bus number */
877 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +0800878 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800879 .controller_data = &data_flash_chip_info,
880 .mode = SPI_MODE_3,
881 },
882#endif
Mike Frysingera261eec2009-05-20 14:05:36 +0000883#if defined(CONFIG_BFIN_SPI_ADC) \
884 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700885 {
886 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
887 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800888 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700889 .chip_select = 1, /* Framework chip select. */
890 .platform_data = NULL, /* No spi_driver specific config */
891 .controller_data = &spi_adc_chip_info,
892 },
893#endif
894
Barry Song83124402009-08-06 21:03:02 +0000895#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
896 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700897 {
Barry Songdac98172009-08-13 21:07:37 +0000898 .modalias = "ad1836",
Bryan Wu1394f032007-05-06 14:50:22 -0700899 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800900 .bus_num = 0,
Barry Song83124402009-08-06 21:03:02 +0000901 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
Bryan Wu1394f032007-05-06 14:50:22 -0700902 .controller_data = &ad1836_spi_chip_info,
Barry Song83124402009-08-06 21:03:02 +0000903 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -0700904 },
905#endif
Barry Songd4b834c2009-06-04 10:14:17 +0000906
907#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
908 {
Barry Songdac98172009-08-13 21:07:37 +0000909 .modalias = "ad1938",
Barry Songd4b834c2009-06-04 10:14:17 +0000910 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
911 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +0000912 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +0000913 .controller_data = &ad1938_spi_chip_info,
914 .mode = SPI_MODE_3,
915 },
916#endif
917
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000918#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000919 {
920 .modalias = "ad714x_captouch",
921 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
922 .irq = IRQ_PF4,
923 .bus_num = 0,
924 .chip_select = 5,
925 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000926 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +0000927 .controller_data = &ad7147_spi_chip_info,
928 },
929#endif
930
Yi Lif79ea4c2009-01-07 23:14:38 +0800931#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
932 {
933 .modalias = "mmc_spi",
934 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
935 .bus_num = 0,
936 .chip_select = 4,
937 .platform_data = &bfin_mmc_spi_pdata,
938 .controller_data = &mmc_spi_chip_info,
939 .mode = SPI_MODE_3,
940 },
941#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700942#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
943 {
944 .modalias = "ad7877",
945 .platform_data = &bfin_ad7877_ts_info,
946 .irq = IRQ_PF6,
947 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +0800948 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -0700949 .chip_select = 1,
950 .controller_data = &spi_ad7877_chip_info,
951 },
952#endif
Michael Hennerichf5150152008-10-16 23:23:18 +0800953#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800954 {
955 .modalias = "ad7879",
956 .platform_data = &bfin_ad7879_ts_info,
957 .irq = IRQ_PF7,
958 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
959 .bus_num = 0,
960 .chip_select = 1,
961 .controller_data = &spi_ad7879_chip_info,
962 .mode = SPI_CPHA | SPI_CPOL,
963 },
964#endif
Michael Hennerich6e668932008-02-09 01:54:09 +0800965#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
966 {
967 .modalias = "spidev",
968 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
969 .bus_num = 0,
970 .chip_select = 1,
971 .controller_data = &spidev_chip_info,
972 },
973#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800974#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
975 {
976 .modalias = "bfin-lq035q1-spi",
977 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
978 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800979 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800980 .controller_data = &lq035q1_spi_chip_info,
981 .mode = SPI_CPHA | SPI_CPOL,
982 },
983#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +0800984#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
985 {
986 .modalias = "enc28j60",
987 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
988 .irq = IRQ_PF6,
989 .bus_num = 0,
990 .chip_select = 0, /* GPIO controlled SSEL */
991 .controller_data = &enc28j60_spi_chip_info,
992 .mode = SPI_MODE_0,
993 },
994#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000995#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
996 {
997 .modalias = "adxl34x",
998 .platform_data = &adxl34x_info,
999 .irq = IRQ_PF6,
1000 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1001 .bus_num = 0,
1002 .chip_select = 2,
1003 .controller_data = &spi_adxl34x_chip_info,
1004 .mode = SPI_MODE_3,
1005 },
1006#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001007#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1008 {
1009 .modalias = "adf702x",
1010 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1011 .bus_num = 0,
1012 .chip_select = 0, /* GPIO controlled SSEL */
1013 .controller_data = &adf7021_spi_chip_info,
1014 .platform_data = &adf7021_platform_data,
1015 .mode = SPI_MODE_0,
1016 },
1017#endif
1018
Bryan Wu1394f032007-05-06 14:50:22 -07001019};
1020
Mike Frysinger5bda2722008-06-07 15:03:01 +08001021#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001022/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001023static struct bfin5xx_spi_master bfin_spi0_info = {
Bryan Wu1394f032007-05-06 14:50:22 -07001024 .num_chipselect = 8,
1025 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001026 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001027};
1028
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001029/* SPI (0) */
1030static struct resource bfin_spi0_resource[] = {
1031 [0] = {
1032 .start = SPI0_REGBASE,
1033 .end = SPI0_REGBASE + 0xFF,
1034 .flags = IORESOURCE_MEM,
1035 },
1036 [1] = {
1037 .start = CH_SPI,
1038 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001039 .flags = IORESOURCE_DMA,
1040 },
1041 [2] = {
1042 .start = IRQ_SPI,
1043 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001044 .flags = IORESOURCE_IRQ,
1045 },
1046};
1047
1048static struct platform_device bfin_spi0_device = {
1049 .name = "bfin-spi",
1050 .id = 0, /* Bus number */
1051 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1052 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001053 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001054 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001055 },
1056};
1057#endif /* spi master and devices */
1058
Cliff Cai1e9aa952009-03-28 23:28:51 +08001059#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1060
1061/* SPORT SPI controller data */
1062static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1063 .num_chipselect = 1, /* master only supports one device */
1064 .enable_dma = 0, /* master don't support DMA */
1065 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1066 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1067};
1068
1069static struct resource bfin_sport_spi0_resource[] = {
1070 [0] = {
1071 .start = SPORT0_TCR1,
1072 .end = SPORT0_TCR1 + 0xFF,
1073 .flags = IORESOURCE_MEM,
1074 },
1075 [1] = {
1076 .start = IRQ_SPORT0_ERROR,
1077 .end = IRQ_SPORT0_ERROR,
1078 .flags = IORESOURCE_IRQ,
1079 },
1080};
1081
1082static struct platform_device bfin_sport_spi0_device = {
1083 .name = "bfin-sport-spi",
1084 .id = 1, /* Bus number */
1085 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1086 .resource = bfin_sport_spi0_resource,
1087 .dev = {
1088 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1089 },
1090};
1091
1092static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1093 .num_chipselect = 1, /* master only supports one device */
1094 .enable_dma = 0, /* master don't support DMA */
1095 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1096 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1097};
1098
1099static struct resource bfin_sport_spi1_resource[] = {
1100 [0] = {
1101 .start = SPORT1_TCR1,
1102 .end = SPORT1_TCR1 + 0xFF,
1103 .flags = IORESOURCE_MEM,
1104 },
1105 [1] = {
1106 .start = IRQ_SPORT1_ERROR,
1107 .end = IRQ_SPORT1_ERROR,
1108 .flags = IORESOURCE_IRQ,
1109 },
1110};
1111
1112static struct platform_device bfin_sport_spi1_device = {
1113 .name = "bfin-sport-spi",
1114 .id = 2, /* Bus number */
1115 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1116 .resource = bfin_sport_spi1_resource,
1117 .dev = {
1118 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1119 },
1120};
1121
1122#endif /* sport spi master and devices */
1123
Bryan Wu1394f032007-05-06 14:50:22 -07001124#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1125static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001126 .name = "bf537-lq035",
1127};
1128#endif
1129
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001130#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1131#include <asm/bfin-lq035q1.h>
1132
1133static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001134 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1135 .ppi_mode = USE_RGB565_16_BIT_PPI,
1136 .use_bl = 0, /* let something else control the LCD Blacklight */
1137 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001138};
1139
1140static struct resource bfin_lq035q1_resources[] = {
1141 {
1142 .start = IRQ_PPI_ERROR,
1143 .end = IRQ_PPI_ERROR,
1144 .flags = IORESOURCE_IRQ,
1145 },
1146};
1147
1148static struct platform_device bfin_lq035q1_device = {
1149 .name = "bfin-lq035q1",
1150 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001151 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1152 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001153 .dev = {
1154 .platform_data = &bfin_lq035q1_data,
1155 },
1156};
1157#endif
1158
Bryan Wu1394f032007-05-06 14:50:22 -07001159#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001160#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001161static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001162 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001163 .start = UART0_THR,
1164 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001165 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001166 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001167 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001168 .start = IRQ_UART0_RX,
1169 .end = IRQ_UART0_RX+1,
1170 .flags = IORESOURCE_IRQ,
1171 },
1172 {
1173 .start = IRQ_UART0_ERROR,
1174 .end = IRQ_UART0_ERROR,
1175 .flags = IORESOURCE_IRQ,
1176 },
1177 {
1178 .start = CH_UART0_TX,
1179 .end = CH_UART0_TX,
1180 .flags = IORESOURCE_DMA,
1181 },
1182 {
1183 .start = CH_UART0_RX,
1184 .end = CH_UART0_RX,
1185 .flags = IORESOURCE_DMA,
1186 },
1187#ifdef CONFIG_BFIN_UART0_CTSRTS
1188 { /* CTS pin */
1189 .start = GPIO_PG7,
1190 .end = GPIO_PG7,
1191 .flags = IORESOURCE_IO,
1192 },
1193 { /* RTS pin */
1194 .start = GPIO_PG6,
1195 .end = GPIO_PG6,
1196 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001197 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001198#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001199};
1200
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001201unsigned short bfin_uart0_peripherals[] = {
1202 P_UART0_TX, P_UART0_RX, 0
1203};
1204
1205static struct platform_device bfin_uart0_device = {
1206 .name = "bfin-uart",
1207 .id = 0,
1208 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1209 .resource = bfin_uart0_resources,
1210 .dev = {
1211 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1212 },
1213};
1214#endif
1215#ifdef CONFIG_SERIAL_BFIN_UART1
1216static struct resource bfin_uart1_resources[] = {
1217 {
1218 .start = UART1_THR,
1219 .end = UART1_GCTL+2,
1220 .flags = IORESOURCE_MEM,
1221 },
1222 {
1223 .start = IRQ_UART1_RX,
1224 .end = IRQ_UART1_RX+1,
1225 .flags = IORESOURCE_IRQ,
1226 },
1227 {
1228 .start = IRQ_UART1_ERROR,
1229 .end = IRQ_UART1_ERROR,
1230 .flags = IORESOURCE_IRQ,
1231 },
1232 {
1233 .start = CH_UART1_TX,
1234 .end = CH_UART1_TX,
1235 .flags = IORESOURCE_DMA,
1236 },
1237 {
1238 .start = CH_UART1_RX,
1239 .end = CH_UART1_RX,
1240 .flags = IORESOURCE_DMA,
1241 },
1242};
1243
1244unsigned short bfin_uart1_peripherals[] = {
1245 P_UART1_TX, P_UART1_RX, 0
1246};
1247
1248static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001249 .name = "bfin-uart",
1250 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001251 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1252 .resource = bfin_uart1_resources,
1253 .dev = {
1254 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1255 },
Bryan Wu1394f032007-05-06 14:50:22 -07001256};
1257#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001258#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001259
Graf Yang5be36d22008-04-25 03:09:15 +08001260#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001261#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001262static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001263 {
1264 .start = 0xFFC00400,
1265 .end = 0xFFC004FF,
1266 .flags = IORESOURCE_MEM,
1267 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001268 {
1269 .start = IRQ_UART0_RX,
1270 .end = IRQ_UART0_RX+1,
1271 .flags = IORESOURCE_IRQ,
1272 },
1273 {
1274 .start = CH_UART0_RX,
1275 .end = CH_UART0_RX+1,
1276 .flags = IORESOURCE_DMA,
1277 },
1278};
1279
1280static struct platform_device bfin_sir0_device = {
1281 .name = "bfin_sir",
1282 .id = 0,
1283 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1284 .resource = bfin_sir0_resources,
1285};
Graf Yang5be36d22008-04-25 03:09:15 +08001286#endif
1287#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001288static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001289 {
1290 .start = 0xFFC02000,
1291 .end = 0xFFC020FF,
1292 .flags = IORESOURCE_MEM,
1293 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001294 {
1295 .start = IRQ_UART1_RX,
1296 .end = IRQ_UART1_RX+1,
1297 .flags = IORESOURCE_IRQ,
1298 },
1299 {
1300 .start = CH_UART1_RX,
1301 .end = CH_UART1_RX+1,
1302 .flags = IORESOURCE_DMA,
1303 },
Graf Yang5be36d22008-04-25 03:09:15 +08001304};
1305
Graf Yang42bd8bc2009-01-07 23:14:39 +08001306static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001307 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001308 .id = 1,
1309 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1310 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001311};
1312#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001313#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001314
Bryan Wu1394f032007-05-06 14:50:22 -07001315#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001316static struct resource bfin_twi0_resource[] = {
1317 [0] = {
1318 .start = TWI0_REGBASE,
1319 .end = TWI0_REGBASE,
1320 .flags = IORESOURCE_MEM,
1321 },
1322 [1] = {
1323 .start = IRQ_TWI,
1324 .end = IRQ_TWI,
1325 .flags = IORESOURCE_IRQ,
1326 },
1327};
1328
Bryan Wu1394f032007-05-06 14:50:22 -07001329static struct platform_device i2c_bfin_twi_device = {
1330 .name = "i2c-bfin-twi",
1331 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001332 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1333 .resource = bfin_twi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001334};
1335#endif
1336
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001337#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerichf39d56e2008-12-02 14:08:58 +00001338#include <linux/i2c/adp5588.h>
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001339static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1340 [0] = KEY_GRAVE,
1341 [1] = KEY_1,
1342 [2] = KEY_2,
1343 [3] = KEY_3,
1344 [4] = KEY_4,
1345 [5] = KEY_5,
1346 [6] = KEY_6,
1347 [7] = KEY_7,
1348 [8] = KEY_8,
1349 [9] = KEY_9,
1350 [10] = KEY_0,
1351 [11] = KEY_MINUS,
1352 [12] = KEY_EQUAL,
1353 [13] = KEY_BACKSLASH,
1354 [15] = KEY_KP0,
1355 [16] = KEY_Q,
1356 [17] = KEY_W,
1357 [18] = KEY_E,
1358 [19] = KEY_R,
1359 [20] = KEY_T,
1360 [21] = KEY_Y,
1361 [22] = KEY_U,
1362 [23] = KEY_I,
1363 [24] = KEY_O,
1364 [25] = KEY_P,
1365 [26] = KEY_LEFTBRACE,
1366 [27] = KEY_RIGHTBRACE,
1367 [29] = KEY_KP1,
1368 [30] = KEY_KP2,
1369 [31] = KEY_KP3,
1370 [32] = KEY_A,
1371 [33] = KEY_S,
1372 [34] = KEY_D,
1373 [35] = KEY_F,
1374 [36] = KEY_G,
1375 [37] = KEY_H,
1376 [38] = KEY_J,
1377 [39] = KEY_K,
1378 [40] = KEY_L,
1379 [41] = KEY_SEMICOLON,
1380 [42] = KEY_APOSTROPHE,
1381 [43] = KEY_BACKSLASH,
1382 [45] = KEY_KP4,
1383 [46] = KEY_KP5,
1384 [47] = KEY_KP6,
1385 [48] = KEY_102ND,
1386 [49] = KEY_Z,
1387 [50] = KEY_X,
1388 [51] = KEY_C,
1389 [52] = KEY_V,
1390 [53] = KEY_B,
1391 [54] = KEY_N,
1392 [55] = KEY_M,
1393 [56] = KEY_COMMA,
1394 [57] = KEY_DOT,
1395 [58] = KEY_SLASH,
1396 [60] = KEY_KPDOT,
1397 [61] = KEY_KP7,
1398 [62] = KEY_KP8,
1399 [63] = KEY_KP9,
1400 [64] = KEY_SPACE,
1401 [65] = KEY_BACKSPACE,
1402 [66] = KEY_TAB,
1403 [67] = KEY_KPENTER,
1404 [68] = KEY_ENTER,
1405 [69] = KEY_ESC,
1406 [70] = KEY_DELETE,
1407 [74] = KEY_KPMINUS,
1408 [76] = KEY_UP,
1409 [77] = KEY_DOWN,
1410 [78] = KEY_RIGHT,
1411 [79] = KEY_LEFT,
1412};
1413
1414static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1415 .rows = 8,
1416 .cols = 10,
1417 .keymap = adp5588_keymap,
1418 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1419 .repeat = 0,
1420};
1421#endif
1422
Michael Hennerich3ea57212009-03-28 22:15:07 +08001423#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1424#include <linux/mfd/adp5520.h>
1425
1426 /*
1427 * ADP5520/5501 Backlight Data
1428 */
1429
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001430static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1431 .fade_in = ADP5520_FADE_T_1200ms,
1432 .fade_out = ADP5520_FADE_T_1200ms,
1433 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1434 .en_ambl_sens = 1,
1435 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1436 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1437 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1438 .l2_office_max = ADP5520_BL_CUR_mA(7),
1439 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1440 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1441 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1442 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1443 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1444 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1445 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001446};
1447
1448 /*
1449 * ADP5520/5501 LEDs Data
1450 */
1451
Michael Hennerich3ea57212009-03-28 22:15:07 +08001452static struct led_info adp5520_leds[] = {
1453 {
1454 .name = "adp5520-led1",
1455 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001456 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001457 },
1458#ifdef ADP5520_EN_ALL_LEDS
1459 {
1460 .name = "adp5520-led2",
1461 .default_trigger = "none",
1462 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1463 },
1464 {
1465 .name = "adp5520-led3",
1466 .default_trigger = "none",
1467 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1468 },
1469#endif
1470};
1471
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001472static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001473 .num_leds = ARRAY_SIZE(adp5520_leds),
1474 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001475 .fade_in = ADP5520_FADE_T_600ms,
1476 .fade_out = ADP5520_FADE_T_600ms,
1477 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001478};
1479
1480 /*
1481 * ADP5520 GPIO Data
1482 */
1483
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001484static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001485 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001486 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1487 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001488};
1489
1490 /*
1491 * ADP5520 Keypad Data
1492 */
1493
Michael Hennerich3ea57212009-03-28 22:15:07 +08001494static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001495 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1496 [ADP5520_KEY(0, 1)] = KEY_1,
1497 [ADP5520_KEY(0, 2)] = KEY_2,
1498 [ADP5520_KEY(0, 3)] = KEY_3,
1499 [ADP5520_KEY(1, 0)] = KEY_4,
1500 [ADP5520_KEY(1, 1)] = KEY_5,
1501 [ADP5520_KEY(1, 2)] = KEY_6,
1502 [ADP5520_KEY(1, 3)] = KEY_7,
1503 [ADP5520_KEY(2, 0)] = KEY_8,
1504 [ADP5520_KEY(2, 1)] = KEY_9,
1505 [ADP5520_KEY(2, 2)] = KEY_0,
1506 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1507 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1508 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1509 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1510 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001511};
1512
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001513static struct adp5520_keys_platform_data adp5520_keys_data = {
1514 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1515 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001516 .keymap = adp5520_keymap,
1517 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1518 .repeat = 0,
1519};
1520
1521 /*
1522 * ADP5520/5501 Multifuction Device Init Data
1523 */
1524
Michael Hennerich3ea57212009-03-28 22:15:07 +08001525static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001526 .backlight = &adp5520_backlight_data,
1527 .leds = &adp5520_leds_data,
1528 .gpio = &adp5520_gpio_data,
1529 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001530};
1531
1532#endif
1533
Michael Hennerichba877d42009-08-27 04:09:32 +00001534#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1535#include <linux/i2c/adp5588.h>
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001536static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00001537 .gpio_start = 50,
1538 .pullup_dis_mask = 0,
1539};
1540#endif
1541
Michael Hennerich78756c62009-10-13 15:28:33 +00001542#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1543#include <linux/i2c/adp8870.h>
1544static struct led_info adp8870_leds[] = {
1545 {
1546 .name = "adp8870-led7",
1547 .default_trigger = "none",
1548 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1549 },
1550};
1551
1552
1553static struct adp8870_backlight_platform_data adp8870_pdata = {
1554 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1555 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1556 .pwm_assign = 0, /* 1 = Enables PWM mode */
1557
1558 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1559 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1560 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1561
1562 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1563 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1564
1565 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1566 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1567 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1568 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1569 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1570 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1571 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1572 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1573 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1574 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1575
1576 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1577 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1578 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1579 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1580 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1581 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1582 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1583 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1584
1585 .leds = adp8870_leds,
1586 .num_leds = ARRAY_SIZE(adp8870_leds),
1587 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1588 .led_fade_in = ADP8870_FADE_T_600ms,
1589 .led_fade_out = ADP8870_FADE_T_600ms,
1590 .led_on_time = ADP8870_LED_ONT_200ms,
1591};
1592#endif
1593
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001594static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001595#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001596 {
Barry Song427f2772009-07-17 07:04:55 +00001597 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00001598 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001599 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001600 },
1601#endif
Michael Hennerichebd58332009-07-02 11:00:38 +00001602#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001603 {
1604 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001605 },
1606#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00001607#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001608 {
1609 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08001610 .irq = IRQ_PG6,
1611 },
1612#endif
1613#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1614 {
1615 I2C_BOARD_INFO("ad7879", 0x2F),
1616 .irq = IRQ_PG5,
1617 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001618 },
1619#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001620#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1621 {
1622 I2C_BOARD_INFO("adp5588-keys", 0x34),
1623 .irq = IRQ_PG0,
1624 .platform_data = (void *)&adp5588_kpad_data,
1625 },
1626#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08001627#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1628 {
1629 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04001630 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001631 .platform_data = (void *)&adp5520_pdev_data,
1632 },
1633#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001634#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1635 {
1636 I2C_BOARD_INFO("adxl34x", 0x53),
1637 .irq = IRQ_PG3,
1638 .platform_data = (void *)&adxl34x_info,
1639 },
1640#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00001641#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1642 {
1643 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1644 .platform_data = (void *)&adp5588_gpio_data,
1645 },
1646#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00001647#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1648 {
1649 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1650 },
1651#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00001652#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1653 {
1654 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1655 },
1656#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00001657#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1658 {
1659 I2C_BOARD_INFO("adp8870", 0x2B),
1660 .platform_data = (void *)&adp8870_pdata,
1661 },
1662#endif
Cliff Caid53127f2009-10-15 02:33:04 +00001663#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1664 {
1665 I2C_BOARD_INFO("adau1371", 0x1A),
1666 },
1667#endif
Cliff Cai04267632009-10-28 06:50:36 +00001668#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1669 {
1670 I2C_BOARD_INFO("adau1761", 0x38),
1671 },
1672#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00001673#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1674 {
1675 I2C_BOARD_INFO("ad5258", 0x18),
1676 },
1677#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001678};
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001679
Bryan Wu1394f032007-05-06 14:50:22 -07001680#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00001681#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1682static struct resource bfin_sport0_uart_resources[] = {
1683 {
1684 .start = SPORT0_TCR1,
1685 .end = SPORT0_MRCS3+4,
1686 .flags = IORESOURCE_MEM,
1687 },
1688 {
1689 .start = IRQ_SPORT0_RX,
1690 .end = IRQ_SPORT0_RX+1,
1691 .flags = IORESOURCE_IRQ,
1692 },
1693 {
1694 .start = IRQ_SPORT0_ERROR,
1695 .end = IRQ_SPORT0_ERROR,
1696 .flags = IORESOURCE_IRQ,
1697 },
1698};
1699
1700unsigned short bfin_sport0_peripherals[] = {
1701 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1702 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1703};
1704
Bryan Wu1394f032007-05-06 14:50:22 -07001705static struct platform_device bfin_sport0_uart_device = {
1706 .name = "bfin-sport-uart",
1707 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001708 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1709 .resource = bfin_sport0_uart_resources,
1710 .dev = {
1711 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1712 },
1713};
1714#endif
1715#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1716static struct resource bfin_sport1_uart_resources[] = {
1717 {
1718 .start = SPORT1_TCR1,
1719 .end = SPORT1_MRCS3+4,
1720 .flags = IORESOURCE_MEM,
1721 },
1722 {
1723 .start = IRQ_SPORT1_RX,
1724 .end = IRQ_SPORT1_RX+1,
1725 .flags = IORESOURCE_IRQ,
1726 },
1727 {
1728 .start = IRQ_SPORT1_ERROR,
1729 .end = IRQ_SPORT1_ERROR,
1730 .flags = IORESOURCE_IRQ,
1731 },
1732};
1733
1734unsigned short bfin_sport1_peripherals[] = {
1735 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1736 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
Bryan Wu1394f032007-05-06 14:50:22 -07001737};
1738
1739static struct platform_device bfin_sport1_uart_device = {
1740 .name = "bfin-sport-uart",
1741 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001742 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1743 .resource = bfin_sport1_uart_resources,
1744 .dev = {
1745 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1746 },
Bryan Wu1394f032007-05-06 14:50:22 -07001747};
1748#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00001749#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001750
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001751#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001752#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1753/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001754
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001755#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1756#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001757static struct pata_platform_info bfin_pata_platform_data = {
1758 .ioport_shift = 1,
Mike Frysinger64e5c512007-10-30 11:56:13 +08001759 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001760};
1761
1762static struct resource bfin_pata_resources[] = {
1763 {
1764 .start = 0x20314020,
1765 .end = 0x2031403F,
1766 .flags = IORESOURCE_MEM,
1767 },
1768 {
1769 .start = 0x2031401C,
1770 .end = 0x2031401F,
1771 .flags = IORESOURCE_MEM,
1772 },
1773 {
1774 .start = PATA_INT,
1775 .end = PATA_INT,
1776 .flags = IORESOURCE_IRQ,
1777 },
1778};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001779#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1780static struct pata_platform_info bfin_pata_platform_data = {
1781 .ioport_shift = 0,
1782};
Michael Hennerich648882d2009-04-21 12:05:50 +00001783/* CompactFlash Storage Card Memory Mapped Adressing
1784 * /REG = A11 = 1
1785 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001786static struct resource bfin_pata_resources[] = {
1787 {
Michael Hennerich648882d2009-04-21 12:05:50 +00001788 .start = 0x20211800,
1789 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001790 .flags = IORESOURCE_MEM,
1791 },
1792 {
Michael Hennerich648882d2009-04-21 12:05:50 +00001793 .start = 0x2021180E, /* Device Ctl */
1794 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001795 .flags = IORESOURCE_MEM,
1796 },
1797};
1798#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001799
1800static struct platform_device bfin_pata_device = {
1801 .name = "pata_platform",
1802 .id = -1,
1803 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1804 .resource = bfin_pata_resources,
1805 .dev = {
1806 .platform_data = &bfin_pata_platform_data,
1807 }
1808};
1809#endif
1810
Michael Hennerich14b03202008-05-07 11:41:26 +08001811static const unsigned int cclk_vlev_datasheet[] =
1812{
1813 VRPAIR(VLEV_085, 250000000),
1814 VRPAIR(VLEV_090, 376000000),
1815 VRPAIR(VLEV_095, 426000000),
1816 VRPAIR(VLEV_100, 426000000),
1817 VRPAIR(VLEV_105, 476000000),
1818 VRPAIR(VLEV_110, 476000000),
1819 VRPAIR(VLEV_115, 476000000),
1820 VRPAIR(VLEV_120, 500000000),
1821 VRPAIR(VLEV_125, 533000000),
1822 VRPAIR(VLEV_130, 600000000),
1823};
1824
1825static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1826 .tuple_tab = cclk_vlev_datasheet,
1827 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1828 .vr_settling_time = 25 /* us */,
1829};
1830
1831static struct platform_device bfin_dpmc = {
1832 .name = "bfin dpmc",
1833 .dev = {
1834 .platform_data = &bfin_dmpc_vreg_data,
1835 },
1836};
1837
Barry Song83124402009-08-06 21:03:02 +00001838#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1839static struct platform_device bfin_tdm = {
1840 .name = "bfin-tdm",
1841 /* TODO: add platform data here */
1842};
1843#endif
1844
Bryan Wu1394f032007-05-06 14:50:22 -07001845static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08001846
1847 &bfin_dpmc,
1848
Bryan Wu1394f032007-05-06 14:50:22 -07001849#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1850 &bfin_pcmcia_cf_device,
1851#endif
1852
1853#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1854 &rtc_device,
1855#endif
1856
1857#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1858 &sl811_hcd_device,
1859#endif
1860
1861#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1862 &isp1362_hcd_device,
1863#endif
1864
Michael Hennerich3f375692008-11-18 17:48:22 +08001865#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1866 &bfin_isp1760_device,
1867#endif
1868
Bryan Wu1394f032007-05-06 14:50:22 -07001869#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1870 &smc91x_device,
1871#endif
1872
Alex Landauf40d24d2007-07-12 12:11:48 +08001873#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1874 &dm9000_device,
1875#endif
1876
Barry Song706a01b2009-11-02 07:29:07 +00001877#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1878 &bfin_can_device,
1879#endif
1880
Bryan Wu1394f032007-05-06 14:50:22 -07001881#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08001882 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07001883 &bfin_mac_device,
1884#endif
1885
1886#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1887 &net2272_bfin_device,
1888#endif
1889
1890#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001891 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07001892#endif
1893
Cliff Cai1e9aa952009-03-28 23:28:51 +08001894#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1895 &bfin_sport_spi0_device,
1896 &bfin_sport_spi1_device,
1897#endif
1898
Bryan Wu1394f032007-05-06 14:50:22 -07001899#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1900 &bfin_fb_device,
1901#endif
1902
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001903#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1904 &bfin_lq035q1_device,
1905#endif
1906
Bryan Wu1394f032007-05-06 14:50:22 -07001907#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001908#ifdef CONFIG_SERIAL_BFIN_UART0
1909 &bfin_uart0_device,
1910#endif
1911#ifdef CONFIG_SERIAL_BFIN_UART1
1912 &bfin_uart1_device,
1913#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001914#endif
1915
Graf Yang5be36d22008-04-25 03:09:15 +08001916#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08001917#ifdef CONFIG_BFIN_SIR0
1918 &bfin_sir0_device,
1919#endif
1920#ifdef CONFIG_BFIN_SIR1
1921 &bfin_sir1_device,
1922#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001923#endif
1924
Bryan Wu1394f032007-05-06 14:50:22 -07001925#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1926 &i2c_bfin_twi_device,
1927#endif
1928
1929#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00001930#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07001931 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001932#endif
1933#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07001934 &bfin_sport1_uart_device,
1935#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00001936#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001937
1938#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1939 &bfin_pata_device,
1940#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08001941
1942#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1943 &bfin_device_gpiokeys,
1944#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08001945
Mike Frysingerfc689112008-06-25 11:41:42 +08001946#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1947 &bfin_async_nand_device,
1948#endif
1949
Mike Frysinger793dc272008-03-26 08:09:12 +08001950#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08001951 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08001952#endif
Barry Song83124402009-08-06 21:03:02 +00001953
1954#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1955 &bfin_tdm,
1956#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001957};
1958
1959static int __init stamp_init(void)
1960{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08001961 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08001962 bfin_plat_nand_init();
Bryan Wu1394f032007-05-06 14:50:22 -07001963 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00001964 i2c_register_board_info(0, bfin_i2c_board_info,
1965 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08001966 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001967
Bryan Wu1394f032007-05-06 14:50:22 -07001968 return 0;
1969}
1970
1971arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001972
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00001973
1974static struct platform_device *stamp_early_devices[] __initdata = {
1975#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1976#ifdef CONFIG_SERIAL_BFIN_UART0
1977 &bfin_uart0_device,
1978#endif
1979#ifdef CONFIG_SERIAL_BFIN_UART1
1980 &bfin_uart1_device,
1981#endif
1982#endif
1983
1984#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1985#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1986 &bfin_sport0_uart_device,
1987#endif
1988#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1989 &bfin_sport1_uart_device,
1990#endif
1991#endif
1992};
1993
1994void __init native_machine_early_platform_add_devices(void)
1995{
1996 printk(KERN_INFO "register early platform devices\n");
1997 early_platform_add_devices(stamp_early_devices,
1998 ARRAY_SIZE(stamp_early_devices));
1999}
2000
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002001void native_machine_restart(char *cmd)
2002{
2003 /* workaround reboot hang when booting from SPI */
2004 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08002005 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002006}
Mike Frysinger137b1522007-11-22 16:07:03 +08002007
2008/*
2009 * Currently the MAC address is saved in Flash by U-Boot
2010 */
2011#define FLASH_MAC 0x203f0000
Mike Frysinger9862cc52007-11-15 21:21:20 +08002012void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08002013{
2014 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2015 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2016}
Mike Frysinger9862cc52007-11-15 21:21:20 +08002017EXPORT_SYMBOL(bfin_get_ether_addr);