| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include "internals.h" | 
|  | 20 |  | 
|  | 21 | /** | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 | *	dynamic_irq_init - initialize a dynamically allocated irq | 
|  | 23 | *	@irq:	irq number to initialize | 
|  | 24 | */ | 
|  | 25 | void dynamic_irq_init(unsigned int irq) | 
|  | 26 | { | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 27 | struct irq_desc *desc; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 28 | unsigned long flags; | 
|  | 29 |  | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 30 | desc = irq_to_desc(irq); | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 31 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 32 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 33 | return; | 
|  | 34 | } | 
|  | 35 |  | 
|  | 36 | /* Ensure we don't have left over values from a previous use of this irq */ | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 37 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 38 | desc->status = IRQ_DISABLED; | 
|  | 39 | desc->chip = &no_irq_chip; | 
|  | 40 | desc->handle_irq = handle_bad_irq; | 
|  | 41 | desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 42 | desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 43 | desc->handler_data = NULL; | 
|  | 44 | desc->chip_data = NULL; | 
|  | 45 | desc->action = NULL; | 
|  | 46 | desc->irq_count = 0; | 
|  | 47 | desc->irqs_unhandled = 0; | 
|  | 48 | #ifdef CONFIG_SMP | 
| Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 49 | cpumask_setall(desc->affinity); | 
|  | 50 | #ifdef CONFIG_GENERIC_PENDING_IRQ | 
|  | 51 | cpumask_clear(desc->pending_mask); | 
|  | 52 | #endif | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 53 | #endif | 
|  | 54 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 55 | } | 
|  | 56 |  | 
|  | 57 | /** | 
|  | 58 | *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
|  | 59 | *	@irq:	irq number to initialize | 
|  | 60 | */ | 
|  | 61 | void dynamic_irq_cleanup(unsigned int irq) | 
|  | 62 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 63 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 64 | unsigned long flags; | 
|  | 65 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 66 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 67 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 68 | return; | 
|  | 69 | } | 
|  | 70 |  | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 71 | spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 72 | if (desc->action) { | 
|  | 73 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 74 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 75 | irq); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 76 | return; | 
|  | 77 | } | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 78 | desc->msi_desc = NULL; | 
|  | 79 | desc->handler_data = NULL; | 
|  | 80 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 81 | desc->handle_irq = handle_bad_irq; | 
|  | 82 | desc->chip = &no_irq_chip; | 
| Dean Nelson | b6f3b78 | 2008-10-18 16:06:56 -0700 | [diff] [blame] | 83 | desc->name = NULL; | 
| Yinghai Lu | 0f3c2a8 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 84 | clear_kstat_irqs(desc); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 85 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 86 | } | 
|  | 87 |  | 
|  | 88 |  | 
|  | 89 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 90 | *	set_irq_chip - set the irq chip for an irq | 
|  | 91 | *	@irq:	irq number | 
|  | 92 | *	@chip:	pointer to irq chip description structure | 
|  | 93 | */ | 
|  | 94 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 95 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 96 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 97 | unsigned long flags; | 
|  | 98 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 99 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 100 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 101 | return -EINVAL; | 
|  | 102 | } | 
|  | 103 |  | 
|  | 104 | if (!chip) | 
|  | 105 | chip = &no_irq_chip; | 
|  | 106 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 107 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 108 | irq_chip_set_defaults(chip); | 
|  | 109 | desc->chip = chip; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 110 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 111 |  | 
|  | 112 | return 0; | 
|  | 113 | } | 
|  | 114 | EXPORT_SYMBOL(set_irq_chip); | 
|  | 115 |  | 
|  | 116 | /** | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 117 | *	set_irq_type - set the irq trigger type for an irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 118 | *	@irq:	irq number | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 119 | *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 120 | */ | 
|  | 121 | int set_irq_type(unsigned int irq, unsigned int type) | 
|  | 122 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 123 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 124 | unsigned long flags; | 
|  | 125 | int ret = -ENXIO; | 
|  | 126 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 127 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 128 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
|  | 129 | return -ENODEV; | 
|  | 130 | } | 
|  | 131 |  | 
| David Brownell | f2b662d | 2008-12-01 14:31:38 -0800 | [diff] [blame] | 132 | type &= IRQ_TYPE_SENSE_MASK; | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 133 | if (type == IRQ_TYPE_NONE) | 
|  | 134 | return 0; | 
|  | 135 |  | 
|  | 136 | spin_lock_irqsave(&desc->lock, flags); | 
| Chris Friesen | 0b3682b | 2008-10-20 12:41:58 -0600 | [diff] [blame] | 137 | ret = __irq_set_trigger(desc, irq, type); | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 138 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 139 | return ret; | 
|  | 140 | } | 
|  | 141 | EXPORT_SYMBOL(set_irq_type); | 
|  | 142 |  | 
|  | 143 | /** | 
|  | 144 | *	set_irq_data - set irq type data for an irq | 
|  | 145 | *	@irq:	Interrupt number | 
|  | 146 | *	@data:	Pointer to interrupt specific data | 
|  | 147 | * | 
|  | 148 | *	Set the hardware irq controller data for an irq | 
|  | 149 | */ | 
|  | 150 | int set_irq_data(unsigned int irq, void *data) | 
|  | 151 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 152 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 153 | unsigned long flags; | 
|  | 154 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 155 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 156 | printk(KERN_ERR | 
|  | 157 | "Trying to install controller data for IRQ%d\n", irq); | 
|  | 158 | return -EINVAL; | 
|  | 159 | } | 
|  | 160 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 161 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 162 | desc->handler_data = data; | 
|  | 163 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 164 | return 0; | 
|  | 165 | } | 
|  | 166 | EXPORT_SYMBOL(set_irq_data); | 
|  | 167 |  | 
|  | 168 | /** | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 169 | *	set_irq_data - set irq type data for an irq | 
|  | 170 | *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 171 | *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 172 | * | 
|  | 173 | *	Set the hardware irq controller data for an irq | 
|  | 174 | */ | 
|  | 175 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
|  | 176 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 177 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 178 | unsigned long flags; | 
|  | 179 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 180 | if (!desc) { | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 181 | printk(KERN_ERR | 
|  | 182 | "Trying to install msi data for IRQ%d\n", irq); | 
|  | 183 | return -EINVAL; | 
|  | 184 | } | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 185 |  | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 186 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 187 | desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 188 | if (entry) | 
|  | 189 | entry->irq = irq; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 190 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 191 | return 0; | 
|  | 192 | } | 
|  | 193 |  | 
|  | 194 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 195 | *	set_irq_chip_data - set irq chip data for an irq | 
|  | 196 | *	@irq:	Interrupt number | 
|  | 197 | *	@data:	Pointer to chip specific data | 
|  | 198 | * | 
|  | 199 | *	Set the hardware irq chip data for an irq | 
|  | 200 | */ | 
|  | 201 | int set_irq_chip_data(unsigned int irq, void *data) | 
|  | 202 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 203 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 204 | unsigned long flags; | 
|  | 205 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 206 | if (!desc) { | 
|  | 207 | printk(KERN_ERR | 
|  | 208 | "Trying to install chip data for IRQ%d\n", irq); | 
|  | 209 | return -EINVAL; | 
|  | 210 | } | 
|  | 211 |  | 
|  | 212 | if (!desc->chip) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 213 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
|  | 214 | return -EINVAL; | 
|  | 215 | } | 
|  | 216 |  | 
|  | 217 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 218 | desc->chip_data = data; | 
|  | 219 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 220 |  | 
|  | 221 | return 0; | 
|  | 222 | } | 
|  | 223 | EXPORT_SYMBOL(set_irq_chip_data); | 
|  | 224 |  | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 225 | /** | 
|  | 226 | *	set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq | 
|  | 227 | * | 
|  | 228 | *	@irq:	Interrupt number | 
|  | 229 | *	@nest:	0 to clear / 1 to set the IRQ_NESTED_THREAD flag | 
|  | 230 | * | 
|  | 231 | *	The IRQ_NESTED_THREAD flag indicates that on | 
|  | 232 | *	request_threaded_irq() no separate interrupt thread should be | 
|  | 233 | *	created for the irq as the handler are called nested in the | 
|  | 234 | *	context of a demultiplexing interrupt handler thread. | 
|  | 235 | */ | 
|  | 236 | void set_irq_nested_thread(unsigned int irq, int nest) | 
|  | 237 | { | 
|  | 238 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 239 | unsigned long flags; | 
|  | 240 |  | 
|  | 241 | if (!desc) | 
|  | 242 | return; | 
|  | 243 |  | 
|  | 244 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 245 | if (nest) | 
|  | 246 | desc->status |= IRQ_NESTED_THREAD; | 
|  | 247 | else | 
|  | 248 | desc->status &= ~IRQ_NESTED_THREAD; | 
|  | 249 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 250 | } | 
|  | 251 | EXPORT_SYMBOL_GPL(set_irq_nested_thread); | 
|  | 252 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 253 | /* | 
|  | 254 | * default enable function | 
|  | 255 | */ | 
|  | 256 | static void default_enable(unsigned int irq) | 
|  | 257 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 258 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 259 |  | 
|  | 260 | desc->chip->unmask(irq); | 
|  | 261 | desc->status &= ~IRQ_MASKED; | 
|  | 262 | } | 
|  | 263 |  | 
|  | 264 | /* | 
|  | 265 | * default disable function | 
|  | 266 | */ | 
|  | 267 | static void default_disable(unsigned int irq) | 
|  | 268 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 269 | } | 
|  | 270 |  | 
|  | 271 | /* | 
|  | 272 | * default startup function | 
|  | 273 | */ | 
|  | 274 | static unsigned int default_startup(unsigned int irq) | 
|  | 275 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 276 | struct irq_desc *desc = irq_to_desc(irq); | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 277 |  | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 278 | desc->chip->enable(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 279 | return 0; | 
|  | 280 | } | 
|  | 281 |  | 
|  | 282 | /* | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 283 | * default shutdown function | 
|  | 284 | */ | 
|  | 285 | static void default_shutdown(unsigned int irq) | 
|  | 286 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 287 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 288 |  | 
|  | 289 | desc->chip->mask(irq); | 
|  | 290 | desc->status |= IRQ_MASKED; | 
|  | 291 | } | 
|  | 292 |  | 
|  | 293 | /* | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 294 | * Fixup enable/disable function pointers | 
|  | 295 | */ | 
|  | 296 | void irq_chip_set_defaults(struct irq_chip *chip) | 
|  | 297 | { | 
|  | 298 | if (!chip->enable) | 
|  | 299 | chip->enable = default_enable; | 
|  | 300 | if (!chip->disable) | 
|  | 301 | chip->disable = default_disable; | 
|  | 302 | if (!chip->startup) | 
|  | 303 | chip->startup = default_startup; | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 304 | /* | 
|  | 305 | * We use chip->disable, when the user provided its own. When | 
|  | 306 | * we have default_disable set for chip->disable, then we need | 
|  | 307 | * to use default_shutdown, otherwise the irq line is not | 
|  | 308 | * disabled on free_irq(): | 
|  | 309 | */ | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 310 | if (!chip->shutdown) | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 311 | chip->shutdown = chip->disable != default_disable ? | 
|  | 312 | chip->disable : default_shutdown; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 313 | if (!chip->name) | 
|  | 314 | chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 315 | if (!chip->end) | 
|  | 316 | chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 317 | } | 
|  | 318 |  | 
|  | 319 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
|  | 320 | { | 
|  | 321 | if (desc->chip->mask_ack) | 
|  | 322 | desc->chip->mask_ack(irq); | 
|  | 323 | else { | 
|  | 324 | desc->chip->mask(irq); | 
| Wang Chen | efdc64f | 2008-12-29 13:35:11 +0800 | [diff] [blame] | 325 | if (desc->chip->ack) | 
|  | 326 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 327 | } | 
|  | 328 | } | 
|  | 329 |  | 
| Thomas Gleixner | 399b5da | 2009-08-13 13:21:38 +0200 | [diff] [blame] | 330 | /* | 
|  | 331 | *	handle_nested_irq - Handle a nested irq from a irq thread | 
|  | 332 | *	@irq:	the interrupt number | 
|  | 333 | * | 
|  | 334 | *	Handle interrupts which are nested into a threaded interrupt | 
|  | 335 | *	handler. The handler function is called inside the calling | 
|  | 336 | *	threads context. | 
|  | 337 | */ | 
|  | 338 | void handle_nested_irq(unsigned int irq) | 
|  | 339 | { | 
|  | 340 | struct irq_desc *desc = irq_to_desc(irq); | 
|  | 341 | struct irqaction *action; | 
|  | 342 | irqreturn_t action_ret; | 
|  | 343 |  | 
|  | 344 | might_sleep(); | 
|  | 345 |  | 
|  | 346 | spin_lock_irq(&desc->lock); | 
|  | 347 |  | 
|  | 348 | kstat_incr_irqs_this_cpu(irq, desc); | 
|  | 349 |  | 
|  | 350 | action = desc->action; | 
|  | 351 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
|  | 352 | goto out_unlock; | 
|  | 353 |  | 
|  | 354 | desc->status |= IRQ_INPROGRESS; | 
|  | 355 | spin_unlock_irq(&desc->lock); | 
|  | 356 |  | 
|  | 357 | action_ret = action->thread_fn(action->irq, action->dev_id); | 
|  | 358 | if (!noirqdebug) | 
|  | 359 | note_interrupt(irq, desc, action_ret); | 
|  | 360 |  | 
|  | 361 | spin_lock_irq(&desc->lock); | 
|  | 362 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 363 |  | 
|  | 364 | out_unlock: | 
|  | 365 | spin_unlock_irq(&desc->lock); | 
|  | 366 | } | 
|  | 367 | EXPORT_SYMBOL_GPL(handle_nested_irq); | 
|  | 368 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 369 | /** | 
|  | 370 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 371 | *	@irq:	the interrupt number | 
|  | 372 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 373 | * | 
|  | 374 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 375 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 376 | *	is necessary. | 
|  | 377 | * | 
|  | 378 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 379 | *	unmask issues if necessary. | 
|  | 380 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 381 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 382 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 383 | { | 
|  | 384 | struct irqaction *action; | 
|  | 385 | irqreturn_t action_ret; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 386 |  | 
|  | 387 | spin_lock(&desc->lock); | 
|  | 388 |  | 
|  | 389 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 390 | goto out_unlock; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 391 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 392 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 393 |  | 
|  | 394 | action = desc->action; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 395 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 396 | goto out_unlock; | 
|  | 397 |  | 
|  | 398 | desc->status |= IRQ_INPROGRESS; | 
|  | 399 | spin_unlock(&desc->lock); | 
|  | 400 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 401 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 402 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 403 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 404 |  | 
|  | 405 | spin_lock(&desc->lock); | 
|  | 406 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 407 | out_unlock: | 
|  | 408 | spin_unlock(&desc->lock); | 
|  | 409 | } | 
|  | 410 |  | 
|  | 411 | /** | 
|  | 412 | *	handle_level_irq - Level type irq handler | 
|  | 413 | *	@irq:	the interrupt number | 
|  | 414 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 415 | * | 
|  | 416 | *	Level type interrupts are active as long as the hardware line has | 
|  | 417 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 418 | *	it after the associated handler has acknowledged the device, so the | 
|  | 419 | *	interrupt line is back to inactive. | 
|  | 420 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 421 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 422 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 423 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 424 | struct irqaction *action; | 
|  | 425 | irqreturn_t action_ret; | 
|  | 426 |  | 
|  | 427 | spin_lock(&desc->lock); | 
|  | 428 | mask_ack_irq(desc, irq); | 
|  | 429 |  | 
|  | 430 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 431 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 432 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 433 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 434 |  | 
|  | 435 | /* | 
|  | 436 | * If its disabled or no action available | 
|  | 437 | * keep it masked and get out of here | 
|  | 438 | */ | 
|  | 439 | action = desc->action; | 
| Thomas Gleixner | 4966342 | 2007-08-12 15:46:34 +0000 | [diff] [blame] | 440 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 441 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 442 |  | 
|  | 443 | desc->status |= IRQ_INPROGRESS; | 
|  | 444 | spin_unlock(&desc->lock); | 
|  | 445 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 446 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 447 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 448 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 449 |  | 
|  | 450 | spin_lock(&desc->lock); | 
|  | 451 | desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | b25c340 | 2009-08-13 12:17:22 +0200 | [diff] [blame] | 452 |  | 
|  | 453 | if (unlikely(desc->status & IRQ_ONESHOT)) | 
|  | 454 | desc->status |= IRQ_MASKED; | 
|  | 455 | else if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 456 | desc->chip->unmask(irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 457 | out_unlock: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 458 | spin_unlock(&desc->lock); | 
|  | 459 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 460 | EXPORT_SYMBOL_GPL(handle_level_irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 461 |  | 
|  | 462 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 463 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 464 | *	@irq:	the interrupt number | 
|  | 465 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 466 | * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 467 | *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 468 | *	call when the interrupt has been serviced. This enables support | 
|  | 469 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 470 | *	details in hardware, transparently. | 
|  | 471 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 472 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 473 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 474 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 475 | struct irqaction *action; | 
|  | 476 | irqreturn_t action_ret; | 
|  | 477 |  | 
|  | 478 | spin_lock(&desc->lock); | 
|  | 479 |  | 
|  | 480 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 481 | goto out; | 
|  | 482 |  | 
|  | 483 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 484 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 485 |  | 
|  | 486 | /* | 
|  | 487 | * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 488 | * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 489 | */ | 
|  | 490 | action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 491 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
|  | 492 | desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 493 | if (desc->chip->mask) | 
|  | 494 | desc->chip->mask(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 495 | goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 496 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 497 |  | 
|  | 498 | desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 499 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 500 | spin_unlock(&desc->lock); | 
|  | 501 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 502 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 503 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 504 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 505 |  | 
|  | 506 | spin_lock(&desc->lock); | 
|  | 507 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 508 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 509 | desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 510 |  | 
|  | 511 | spin_unlock(&desc->lock); | 
|  | 512 | } | 
|  | 513 |  | 
|  | 514 | /** | 
|  | 515 | *	handle_edge_irq - edge type IRQ handler | 
|  | 516 | *	@irq:	the interrupt number | 
|  | 517 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 518 | * | 
|  | 519 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 520 | *	signal. The occurence is latched into the irq controller hardware | 
|  | 521 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 522 | *	interrupt can happen on the same source even before the first one | 
|  | 523 | *	is handled by the assosiacted event handler. If this happens it | 
|  | 524 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 525 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 526 | *	of the loop which handles the interrupts which have arrived while | 
|  | 527 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 528 | *	loop is left. | 
|  | 529 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 530 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 531 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 532 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 533 | spin_lock(&desc->lock); | 
|  | 534 |  | 
|  | 535 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 536 |  | 
|  | 537 | /* | 
|  | 538 | * If we're currently running this IRQ, or its disabled, | 
|  | 539 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 540 | * the necessary masking and go out | 
|  | 541 | */ | 
|  | 542 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
|  | 543 | !desc->action)) { | 
|  | 544 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
|  | 545 | mask_ack_irq(desc, irq); | 
|  | 546 | goto out_unlock; | 
|  | 547 | } | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 548 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 549 |  | 
|  | 550 | /* Start handling the irq */ | 
| Thomas Gleixner | 4dbc9ca | 2009-08-27 09:38:49 +0200 | [diff] [blame] | 551 | if (desc->chip->ack) | 
|  | 552 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 553 |  | 
|  | 554 | /* Mark the IRQ currently in progress.*/ | 
|  | 555 | desc->status |= IRQ_INPROGRESS; | 
|  | 556 |  | 
|  | 557 | do { | 
|  | 558 | struct irqaction *action = desc->action; | 
|  | 559 | irqreturn_t action_ret; | 
|  | 560 |  | 
|  | 561 | if (unlikely(!action)) { | 
|  | 562 | desc->chip->mask(irq); | 
|  | 563 | goto out_unlock; | 
|  | 564 | } | 
|  | 565 |  | 
|  | 566 | /* | 
|  | 567 | * When another irq arrived while we were handling | 
|  | 568 | * one, we could have masked the irq. | 
|  | 569 | * Renable it, if it was not disabled in meantime. | 
|  | 570 | */ | 
|  | 571 | if (unlikely((desc->status & | 
|  | 572 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
|  | 573 | (IRQ_PENDING | IRQ_MASKED))) { | 
|  | 574 | desc->chip->unmask(irq); | 
|  | 575 | desc->status &= ~IRQ_MASKED; | 
|  | 576 | } | 
|  | 577 |  | 
|  | 578 | desc->status &= ~IRQ_PENDING; | 
|  | 579 | spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 580 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 581 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 582 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 583 | spin_lock(&desc->lock); | 
|  | 584 |  | 
|  | 585 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
|  | 586 |  | 
|  | 587 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 588 | out_unlock: | 
|  | 589 | spin_unlock(&desc->lock); | 
|  | 590 | } | 
|  | 591 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 592 | /** | 
|  | 593 | *	handle_percpu_IRQ - Per CPU local irq handler | 
|  | 594 | *	@irq:	the interrupt number | 
|  | 595 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 596 | * | 
|  | 597 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 598 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 599 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 600 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 601 | { | 
|  | 602 | irqreturn_t action_ret; | 
|  | 603 |  | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 604 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 605 |  | 
|  | 606 | if (desc->chip->ack) | 
|  | 607 | desc->chip->ack(irq); | 
|  | 608 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 609 | action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 610 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 611 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 612 |  | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 613 | if (desc->chip->eoi) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 614 | desc->chip->eoi(irq); | 
|  | 615 | } | 
|  | 616 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 617 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 618 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 619 | const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 620 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 621 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 622 | unsigned long flags; | 
|  | 623 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 624 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 625 | printk(KERN_ERR | 
|  | 626 | "Trying to install type control for IRQ%d\n", irq); | 
|  | 627 | return; | 
|  | 628 | } | 
|  | 629 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 630 | if (!handle) | 
|  | 631 | handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 632 | else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 633 | printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 634 | "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 635 | /* | 
|  | 636 | * Some ARM implementations install a handler for really dumb | 
|  | 637 | * interrupt hardware without setting an irq_chip. This worked | 
|  | 638 | * with the ARM no_irq_chip but the check in setup_irq would | 
|  | 639 | * prevent us to setup the interrupt at all. Switch it to | 
|  | 640 | * dummy_irq_chip for easy transition. | 
|  | 641 | */ | 
|  | 642 | desc->chip = &dummy_irq_chip; | 
|  | 643 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 644 |  | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 645 | chip_bus_lock(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 646 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 647 |  | 
|  | 648 | /* Uninstall? */ | 
|  | 649 | if (handle == handle_bad_irq) { | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 650 | if (desc->chip != &no_irq_chip) | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 651 | mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 652 | desc->status |= IRQ_DISABLED; | 
|  | 653 | desc->depth = 1; | 
|  | 654 | } | 
|  | 655 | desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 656 | desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 657 |  | 
|  | 658 | if (handle != handle_bad_irq && is_chained) { | 
|  | 659 | desc->status &= ~IRQ_DISABLED; | 
|  | 660 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
|  | 661 | desc->depth = 0; | 
| Pawel MOLL | 7e6e178 | 2008-09-01 10:12:11 +0100 | [diff] [blame] | 662 | desc->chip->startup(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 663 | } | 
|  | 664 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | 70aedd2 | 2009-08-13 12:17:48 +0200 | [diff] [blame] | 665 | chip_bus_sync_unlock(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 666 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 667 | EXPORT_SYMBOL_GPL(__set_irq_handler); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 668 |  | 
|  | 669 | void | 
|  | 670 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 671 | irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 672 | { | 
|  | 673 | set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 674 | __set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 675 | } | 
|  | 676 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 677 | void | 
|  | 678 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 679 | irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 680 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 681 | set_irq_chip(irq, chip); | 
|  | 682 | __set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 683 | } | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 684 |  | 
|  | 685 | void __init set_irq_noprobe(unsigned int irq) | 
|  | 686 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 687 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 688 | unsigned long flags; | 
|  | 689 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 690 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 691 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 692 | return; | 
|  | 693 | } | 
|  | 694 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 695 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 696 | desc->status |= IRQ_NOPROBE; | 
|  | 697 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 698 | } | 
|  | 699 |  | 
|  | 700 | void __init set_irq_probe(unsigned int irq) | 
|  | 701 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 702 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 703 | unsigned long flags; | 
|  | 704 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 705 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 706 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 707 | return; | 
|  | 708 | } | 
|  | 709 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 710 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 711 | desc->status &= ~IRQ_NOPROBE; | 
|  | 712 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 713 | } |