blob: 1470026e89082c3d9e922a9bece7a5cb4678c63f [file] [log] [blame]
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/gpio_event.h>
Pankaj Kumar6f841742011-10-10 15:52:14 +053016#include <linux/usb/android.h>
Taniya Dasc98bfbc2011-08-23 09:58:55 +053017#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <linux/gpio.h>
20#include <linux/mtd/nand.h>
21#include <linux/mtd/partitions.h>
22#include <linux/i2c.h>
23#include <linux/android_pmem.h>
24#include <linux/bootmem.h>
25#include <linux/mfd/marimba.h>
26#include <linux/power_supply.h>
Taniya Dasda408822011-09-06 12:54:06 +053027#include <linux/input/rmi_platformdata.h>
28#include <linux/input/rmi_i2c.h>
Taniya Dasc98bfbc2011-08-23 09:58:55 +053029#include <asm/mach/mmc.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <mach/board.h>
33#include <mach/msm_iomap.h>
34#include <mach/msm_hsusb.h>
35#include <mach/rpc_hsusb.h>
36#include <mach/rpc_pmapp.h>
37#include <mach/usbdiag.h>
38#include <mach/usb_gadget_fserial.h>
39#include <mach/msm_memtypes.h>
40#include <mach/msm_serial_hs.h>
41#include <mach/vreg.h>
42#include <mach/pmic.h>
43#include <mach/socinfo.h>
44#include <mach/vreg.h>
45#include <mach/rpc_pmapp.h>
46#include <mach/msm_battery.h>
47#include <mach/rpc_server_handset.h>
48#include <mach/socinfo.h>
49
50#include "devices.h"
51#include "devices-msm7x2xa.h"
52#include "pm.h"
53#include "timer.h"
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
59#define BAHAMA_SLAVE_ID_FM_REG 0x02
60#define FM_GPIO 83
61
62enum {
63 GPIO_HOST_VBUS_EN = 107,
64 GPIO_BT_SYS_REST_EN = 114,
65 GPIO_WAKE_ON_WIRELESS,
66 GPIO_BACKLIGHT_EN,
67 GPIO_CAM_3MP_PWDN,
68 GPIO_WLAN_EN,
69 GPIO_CAM_5MP_SHDN_EN,
70 GPIO_CAM_5MP_RESET,
71};
72
73 /* FM Platform power and shutdown routines */
74#define FPGA_MSM_CNTRL_REG2 0x90008010
75
76static void config_pcm_i2s_mode(int mode)
77{
78 void __iomem *cfg_ptr;
79 u8 reg2;
80
81 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
82
83 if (!cfg_ptr)
84 return;
85 if (mode) {
86 /*enable the pcm mode in FPGA*/
87 reg2 = readb_relaxed(cfg_ptr);
88 if (reg2 == 0) {
89 reg2 = 1;
90 writeb_relaxed(reg2, cfg_ptr);
91 }
92 } else {
93 /*enable i2s mode in FPGA*/
94 reg2 = readb_relaxed(cfg_ptr);
95 if (reg2 == 1) {
96 reg2 = 0;
97 writeb_relaxed(reg2, cfg_ptr);
98 }
99 }
100 iounmap(cfg_ptr);
101}
102
103static unsigned fm_i2s_config_power_on[] = {
104 /*FM_I2S_SD*/
105 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
106 /*FM_I2S_WS*/
107 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
108 /*FM_I2S_SCK*/
109 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
110};
111
112static unsigned fm_i2s_config_power_off[] = {
113 /*FM_I2S_SD*/
114 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
115 /*FM_I2S_WS*/
116 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
117 /*FM_I2S_SCK*/
118 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
119};
120
121static unsigned bt_config_power_on[] = {
122 /*RFR*/
123 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
124 /*CTS*/
125 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
126 /*RX*/
127 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
128 /*TX*/
129 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
130};
131static unsigned bt_config_pcm_on[] = {
132 /*PCM_DOUT*/
133 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
134 /*PCM_DIN*/
135 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
136 /*PCM_SYNC*/
137 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
138 /*PCM_CLK*/
139 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
140};
141static unsigned bt_config_power_off[] = {
142 /*RFR*/
143 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
144 /*CTS*/
145 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
146 /*RX*/
147 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
148 /*TX*/
149 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
150};
151static unsigned bt_config_pcm_off[] = {
152 /*PCM_DOUT*/
153 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
154 /*PCM_DIN*/
155 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
156 /*PCM_SYNC*/
157 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
158 /*PCM_CLK*/
159 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
160};
161
162
163static int config_i2s(int mode)
164{
165 int pin, rc = 0;
166
167 if (mode == FM_I2S_ON) {
168 if (machine_is_msm7627a_qrd1())
169 config_pcm_i2s_mode(0);
170 pr_err("%s mode = FM_I2S_ON", __func__);
171 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
172 pin++) {
173 rc = gpio_tlmm_config(
174 fm_i2s_config_power_on[pin],
175 GPIO_CFG_ENABLE
176 );
177 if (rc < 0)
178 return rc;
179 }
180 } else if (mode == FM_I2S_OFF) {
181 pr_err("%s mode = FM_I2S_OFF", __func__);
182 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
183 pin++) {
184 rc = gpio_tlmm_config(
185 fm_i2s_config_power_off[pin],
186 GPIO_CFG_ENABLE
187 );
188 if (rc < 0)
189 return rc;
190 }
191 }
192 return rc;
193}
194static int config_pcm(int mode)
195{
196 int pin, rc = 0;
197
198 if (mode == BT_PCM_ON) {
199 if (machine_is_msm7627a_qrd1())
200 config_pcm_i2s_mode(1);
201 pr_err("%s mode =BT_PCM_ON", __func__);
202 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
203 pin++) {
204 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
205 GPIO_CFG_ENABLE);
206 if (rc < 0)
207 return rc;
208 }
209 } else if (mode == BT_PCM_OFF) {
210 pr_err("%s mode =BT_PCM_OFF", __func__);
211 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
212 pin++) {
213 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
214 GPIO_CFG_ENABLE);
215 if (rc < 0)
216 return rc;
217 }
218
219 }
220
221 return rc;
222}
223
224static int msm_bahama_setup_pcm_i2s(int mode)
225{
226 int fm_state = 0, bt_state = 0;
227 int rc = 0;
228 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
229
230 fm_state = marimba_get_fm_status(&config);
231 bt_state = marimba_get_bt_status(&config);
232
233 switch (mode) {
234 case BT_PCM_ON:
235 case BT_PCM_OFF:
236 if (!fm_state)
237 rc = config_pcm(mode);
238 break;
239 case FM_I2S_ON:
240 rc = config_i2s(mode);
241 break;
242 case FM_I2S_OFF:
243 if (bt_state)
244 rc = config_pcm(BT_PCM_ON);
245 else
246 rc = config_i2s(mode);
247 break;
248 default:
249 rc = -EIO;
250 pr_err("%s:Unsupported mode", __func__);
251 }
252 return rc;
253}
254
255static int bt_set_gpio(int on)
256{
257 int rc = 0;
258 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
259
260 if (on) {
261 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
262 msleep(100);
263 } else {
264 if (!marimba_get_fm_status(&config) &&
265 !marimba_get_bt_status(&config)) {
266 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
267 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
268 msleep(100);
269 }
270 }
271 if (rc)
272 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
273
274 return rc;
275}
276static struct vreg *fm_regulator;
277static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
278{
279 int rc = 0;
280 const char *id = "FMPW";
281 uint32_t irqcfg;
282 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
283 u8 value;
284
285 /* Voting for 1.8V Regulator */
286 fm_regulator = vreg_get(NULL , "msme1");
287 if (IS_ERR(fm_regulator)) {
288 pr_err("%s: vreg get failed with : (%ld)\n",
289 __func__, PTR_ERR(fm_regulator));
290 return -EINVAL;
291 }
292
293 /* Set the voltage level to 1.8V */
294 rc = vreg_set_level(fm_regulator, 1800);
295 if (rc < 0) {
296 pr_err("%s: set regulator level failed with :(%d)\n",
297 __func__, rc);
298 goto fm_vreg_fail;
299 }
300
301 /* Enabling the 1.8V regulator */
302 rc = vreg_enable(fm_regulator);
303 if (rc) {
304 pr_err("%s: enable regulator failed with :(%d)\n",
305 __func__, rc);
306 goto fm_vreg_fail;
307 }
308
309 /* Voting for 19.2MHz clock */
310 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
311 PMAPP_CLOCK_VOTE_ON);
312 if (rc < 0) {
313 pr_err("%s: clock vote failed with :(%d)\n",
314 __func__, rc);
315 goto fm_clock_vote_fail;
316 }
317
318 rc = bt_set_gpio(1);
319 if (rc) {
320 pr_err("%s: bt_set_gpio = %d", __func__, rc);
321 goto fm_gpio_config_fail;
322 }
323 /*re-write FM Slave Id, after reset*/
324 value = BAHAMA_SLAVE_ID_FM_ADDR;
325 rc = marimba_write_bit_mask(&config,
326 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
327 if (rc < 0) {
328 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
329 goto fm_gpio_config_fail;
330 }
331 /* Configuring the FM GPIO */
332 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
333 GPIO_CFG_2MA);
334
335 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
336 if (rc) {
337 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
338 __func__, irqcfg, rc);
339 goto fm_gpio_config_fail;
340 }
341
342 return 0;
343
344fm_gpio_config_fail:
345 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
346 PMAPP_CLOCK_VOTE_OFF);
347 bt_set_gpio(0);
348fm_clock_vote_fail:
349 vreg_disable(fm_regulator);
350
351fm_vreg_fail:
352 vreg_put(fm_regulator);
353
354 return rc;
355};
356
357static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
358{
359 int rc;
360 const char *id = "FMPW";
361
362 /* Releasing the GPIO line used by FM */
363 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
364 GPIO_CFG_2MA);
365
366 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
367 if (rc)
368 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
369 __func__, irqcfg, rc);
370
371 /* Releasing the 1.8V Regulator */
372 if (fm_regulator != NULL) {
373 rc = vreg_disable(fm_regulator);
374 if (rc)
375 pr_err("%s: disable regulator failed:(%d)\n",
376 __func__, rc);
377 fm_regulator = NULL;
378 }
379
380 /* Voting off the clock */
381 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
382 PMAPP_CLOCK_VOTE_OFF);
383 if (rc < 0)
384 pr_err("%s: voting off failed with :(%d)\n",
385 __func__, rc);
386 rc = bt_set_gpio(0);
387 if (rc)
388 pr_err("%s: bt_set_gpio = %d", __func__, rc);
389}
390
391static struct marimba_fm_platform_data marimba_fm_pdata = {
392 .fm_setup = fm_radio_setup,
393 .fm_shutdown = fm_radio_shutdown,
394 .irq = MSM_GPIO_TO_INT(FM_GPIO),
395 .vreg_s2 = NULL,
396 .vreg_xo_out = NULL,
397 /* Configuring the FM SoC as I2S Master */
398 .is_fm_soc_i2s_master = true,
399 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
400};
401
402static struct platform_device msm_wlan_ar6000_pm_device = {
403 .name = "wlan_ar6000_pm_dev",
404 .id = -1,
405};
406
407#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
408
409static struct platform_device msm_bt_power_device = {
410 .name = "bt_power",
411};
412struct bahama_config_register {
413 u8 reg;
414 u8 value;
415 u8 mask;
416};
417struct bt_vreg_info {
418 const char *name;
419 unsigned int pmapp_id;
420 unsigned int level;
421 unsigned int is_pin_controlled;
422 struct vreg *vregs;
423};
424static struct bt_vreg_info bt_vregs[] = {
425 {"msme1", 2, 1800, 0, NULL},
426 {"bt", 21, 2900, 1, NULL}
427};
428
429static int bahama_bt(int on)
430{
431
432 int rc = 0;
433 int i;
434
435 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
436
437 struct bahama_variant_register {
438 const size_t size;
439 const struct bahama_config_register *set;
440 };
441
442 const struct bahama_config_register *p;
443
444 u8 version;
445
446 const struct bahama_config_register v10_bt_on[] = {
447 { 0xE9, 0x00, 0xFF },
448 { 0xF4, 0x80, 0xFF },
449 { 0xE4, 0x00, 0xFF },
450 { 0xE5, 0x00, 0x0F },
451#ifdef CONFIG_WLAN
452 { 0xE6, 0x38, 0x7F },
453 { 0xE7, 0x06, 0xFF },
454#endif
455 { 0xE9, 0x21, 0xFF },
456 { 0x01, 0x0C, 0x1F },
457 { 0x01, 0x08, 0x1F },
458 };
459
460 const struct bahama_config_register v20_bt_on_fm_off[] = {
461 { 0x11, 0x0C, 0xFF },
462 { 0x13, 0x01, 0xFF },
463 { 0xF4, 0x80, 0xFF },
464 { 0xF0, 0x00, 0xFF },
465 { 0xE9, 0x00, 0xFF },
466#ifdef CONFIG_WLAN
467 { 0x81, 0x00, 0x7F },
468 { 0x82, 0x00, 0xFF },
469 { 0xE6, 0x38, 0x7F },
470 { 0xE7, 0x06, 0xFF },
471#endif
472 { 0x8E, 0x15, 0xFF },
473 { 0x8F, 0x15, 0xFF },
474 { 0x90, 0x15, 0xFF },
475
476 { 0xE9, 0x21, 0xFF },
477 };
478
479 const struct bahama_config_register v20_bt_on_fm_on[] = {
480 { 0x11, 0x0C, 0xFF },
481 { 0x13, 0x01, 0xFF },
482 { 0xF4, 0x86, 0xFF },
483 { 0xF0, 0x06, 0xFF },
484 { 0xE9, 0x00, 0xFF },
485#ifdef CONFIG_WLAN
486 { 0x81, 0x00, 0x7F },
487 { 0x82, 0x00, 0xFF },
488 { 0xE6, 0x38, 0x7F },
489 { 0xE7, 0x06, 0xFF },
490#endif
491 { 0xE9, 0x21, 0xFF },
492 };
493
494 const struct bahama_config_register v10_bt_off[] = {
495 { 0xE9, 0x00, 0xFF },
496 };
497
498 const struct bahama_config_register v20_bt_off_fm_off[] = {
499 { 0xF4, 0x84, 0xFF },
500 { 0xF0, 0x04, 0xFF },
501 { 0xE9, 0x00, 0xFF }
502 };
503
504 const struct bahama_config_register v20_bt_off_fm_on[] = {
505 { 0xF4, 0x86, 0xFF },
506 { 0xF0, 0x06, 0xFF },
507 { 0xE9, 0x00, 0xFF }
508 };
509 const struct bahama_variant_register bt_bahama[2][3] = {
510 {
511 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
512 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
513 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
514 },
515 {
516 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
517 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
518 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
519 }
520 };
521
522 u8 offset = 0; /* index into bahama configs */
523 on = on ? 1 : 0;
524 version = marimba_read_bahama_ver(&config);
525 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
526 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
527 version read Error, version = %d \n",
528 __func__, version);
529 return -EIO;
530 }
531
532 if (version == BAHAMA_VER_2_0) {
533 if (marimba_get_fm_status(&config))
534 offset = 0x01;
535 }
536
537 p = bt_bahama[on][version + offset].set;
538
539 dev_info(&msm_bt_power_device.dev,
540 "%s: found version %d\n", __func__, version);
541
542 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
543 u8 value = (p+i)->value;
544 rc = marimba_write_bit_mask(&config,
545 (p+i)->reg,
546 &value,
547 sizeof((p+i)->value),
548 (p+i)->mask);
549 if (rc < 0) {
550 dev_err(&msm_bt_power_device.dev,
551 "%s: reg %x write failed: %d\n",
552 __func__, (p+i)->reg, rc);
553 return rc;
554 }
555 dev_dbg(&msm_bt_power_device.dev,
556 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
557 __func__, (p+i)->reg,
558 value, (p+i)->mask);
559 value = 0;
560 rc = marimba_read_bit_mask(&config,
561 (p+i)->reg, &value,
562 sizeof((p+i)->value), (p+i)->mask);
563 if (rc < 0)
564 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
565 __func__);
566 dev_dbg(&msm_bt_power_device.dev,
567 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
568 __func__, (p+i)->reg,
569 value, (p+i)->mask);
570 }
571 /* Update BT Status */
572 if (on)
573 marimba_set_bt_status(&config, true);
574 else
575 marimba_set_bt_status(&config, false);
576 return rc;
577}
578static int bluetooth_switch_regulators(int on)
579{
580 int i, rc = 0;
581 const char *id = "BTPW";
582
583 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
584 if (!bt_vregs[i].vregs) {
585 pr_err("%s: vreg_get %s failed(%d)\n",
586 __func__, bt_vregs[i].name, rc);
587 goto vreg_fail;
588 }
589 rc = on ? vreg_set_level(bt_vregs[i].vregs,
590 bt_vregs[i].level) : 0;
591
592 if (rc < 0) {
593 pr_err("%s: vreg set level failed (%d)\n",
594 __func__, rc);
595 goto vreg_set_level_fail;
596 }
597 if (bt_vregs[i].is_pin_controlled == 1) {
598 rc = pmapp_vreg_pincntrl_vote(id,
599 bt_vregs[i].pmapp_id,
600 PMAPP_CLOCK_ID_D1,
601 on ? PMAPP_CLOCK_VOTE_ON :
602 PMAPP_CLOCK_VOTE_OFF);
603 } else {
604 rc = on ? vreg_enable(bt_vregs[i].vregs) :
605 vreg_disable(bt_vregs[i].vregs);
606 }
607
608 if (rc < 0) {
609 pr_err("%s: vreg %s %s failed(%d)\n",
610 __func__, bt_vregs[i].name,
611 on ? "enable" : "disable", rc);
612 goto vreg_fail;
613 }
614 }
615
616 return rc;
617
618vreg_fail:
619 while (i) {
620 if (on)
621 vreg_disable(bt_vregs[--i].vregs);
622 }
623vreg_set_level_fail:
624 vreg_put(bt_vregs[0].vregs);
625 vreg_put(bt_vregs[1].vregs);
626 return rc;
627}
628
629static unsigned int msm_bahama_setup_power(void)
630{
631 int rc = 0;
632 struct vreg *vreg_s3 = NULL;
633
634 vreg_s3 = vreg_get(NULL, "msme1");
635 if (IS_ERR(vreg_s3)) {
636 pr_err("%s: vreg get failed (%ld)\n",
637 __func__, PTR_ERR(vreg_s3));
638 return PTR_ERR(vreg_s3);
639 }
640 rc = vreg_set_level(vreg_s3, 1800);
641 if (rc < 0) {
642 pr_err("%s: vreg set level failed (%d)\n",
643 __func__, rc);
644 goto vreg_fail;
645 }
646 rc = vreg_enable(vreg_s3);
647 if (rc < 0) {
648 pr_err("%s: vreg enable failed (%d)\n",
649 __func__, rc);
650 goto vreg_fail;
651 }
652
653 /*setup Bahama_sys_reset_n*/
654 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
655 if (rc < 0) {
656 pr_err("%s: gpio_request %d = %d\n", __func__,
657 GPIO_BT_SYS_REST_EN, rc);
658 goto vreg_fail;
659 }
660 rc = bt_set_gpio(1);
661 if (rc < 0) {
662 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
663 GPIO_BT_SYS_REST_EN, rc);
664 goto gpio_fail;
665 }
666 return rc;
667
668gpio_fail:
669 gpio_free(GPIO_BT_SYS_REST_EN);
670vreg_fail:
671 vreg_put(vreg_s3);
672 return rc;
673}
674
675static unsigned int msm_bahama_shutdown_power(int value)
676{
677 int rc = 0;
678 struct vreg *vreg_s3 = NULL;
679
680 vreg_s3 = vreg_get(NULL, "msme1");
681 if (IS_ERR(vreg_s3)) {
682 pr_err("%s: vreg get failed (%ld)\n",
683 __func__, PTR_ERR(vreg_s3));
684 return PTR_ERR(vreg_s3);
685 }
686 rc = vreg_disable(vreg_s3);
687 if (rc) {
688 pr_err("%s: vreg disable failed (%d)\n",
689 __func__, rc);
690 vreg_put(vreg_s3);
691 return rc;
692 }
693 if (value == BAHAMA_ID) {
694 rc = bt_set_gpio(0);
695 if (rc) {
696 pr_err("%s: bt_set_gpio = %d\n",
697 __func__, rc);
698 }
699 }
700 return rc;
701}
702
703static unsigned int msm_bahama_core_config(int type)
704{
705 int rc = 0;
706
707 if (type == BAHAMA_ID) {
708 int i;
709 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
710 const struct bahama_config_register v20_init[] = {
711 /* reg, value, mask */
712 { 0xF4, 0x84, 0xFF }, /* AREG */
713 { 0xF0, 0x04, 0xFF } /* DREG */
714 };
715 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
716 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
717 u8 value = v20_init[i].value;
718 rc = marimba_write_bit_mask(&config,
719 v20_init[i].reg,
720 &value,
721 sizeof(v20_init[i].value),
722 v20_init[i].mask);
723 if (rc < 0) {
724 pr_err("%s: reg %d write failed: %d\n",
725 __func__, v20_init[i].reg, rc);
726 return rc;
727 }
728 pr_debug("%s: reg 0x%02x value 0x%02x"
729 " mask 0x%02x\n",
730 __func__, v20_init[i].reg,
731 v20_init[i].value, v20_init[i].mask);
732 }
733 }
734 }
735 rc = bt_set_gpio(0);
736 if (rc) {
737 pr_err("%s: bt_set_gpio = %d\n",
738 __func__, rc);
739 }
740 pr_debug("core type: %d\n", type);
741 return rc;
742}
743
744static int bluetooth_power(int on)
745{
746 int pin, rc = 0;
747 const char *id = "BTPW";
748 int cid = 0;
749
750 cid = adie_get_detected_connectivity_type();
751 if (cid != BAHAMA_ID) {
752 pr_err("%s: unexpected adie connectivity type: %d\n",
753 __func__, cid);
754 return -ENODEV;
755 }
756 if (on) {
757 /*setup power for BT SOC*/
758 rc = bt_set_gpio(on);
759 if (rc) {
760 pr_err("%s: bt_set_gpio = %d\n",
761 __func__, rc);
762 goto exit;
763 }
764 rc = bluetooth_switch_regulators(on);
765 if (rc < 0) {
766 pr_err("%s: bluetooth_switch_regulators rc = %d",
767 __func__, rc);
768 goto exit;
769 }
770 /*setup BT GPIO lines*/
771 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
772 pin++) {
773 rc = gpio_tlmm_config(bt_config_power_on[pin],
774 GPIO_CFG_ENABLE);
775 if (rc < 0) {
776 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
777 __func__,
778 bt_config_power_on[pin],
779 rc);
780 goto fail_power;
781 }
782 }
783 /*Setup BT clocks*/
784 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
785 PMAPP_CLOCK_VOTE_ON);
786 if (rc < 0) {
787 pr_err("Failed to vote for TCXO_D1 ON\n");
788 goto fail_clock;
789 }
790 msleep(20);
791
792 /*I2C config for Bahama*/
793 rc = bahama_bt(1);
794 if (rc < 0) {
795 pr_err("%s: bahama_bt rc = %d", __func__, rc);
796 goto fail_i2c;
797 }
798 msleep(20);
799
800 /*setup BT PCM lines*/
801 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
802 if (rc < 0) {
803 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
804 __func__, rc);
805 goto fail_power;
806 }
807 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
808 PMAPP_CLOCK_VOTE_PIN_CTRL);
809 if (rc < 0)
810 pr_err("%s:Pin Control Failed, rc = %d",
811 __func__, rc);
812
813 } else {
814 rc = bahama_bt(0);
815 if (rc < 0)
816 pr_err("%s: bahama_bt rc = %d", __func__, rc);
817
818 rc = bt_set_gpio(on);
819 if (rc) {
820 pr_err("%s: bt_set_gpio = %d\n",
821 __func__, rc);
822 }
823fail_i2c:
824 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
825 PMAPP_CLOCK_VOTE_OFF);
826 if (rc < 0)
827 pr_err("%s: Failed to vote Off D1\n", __func__);
828fail_clock:
829 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
830 pin++) {
831 rc = gpio_tlmm_config(bt_config_power_off[pin],
832 GPIO_CFG_ENABLE);
833 if (rc < 0) {
834 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
835 __func__, bt_config_power_off[pin], rc);
836 }
837 }
838 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
839 if (rc < 0) {
840 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
841 __func__, rc);
842 }
843fail_power:
844 rc = bluetooth_switch_regulators(0);
845 if (rc < 0) {
846 pr_err("%s: switch_regulators : rc = %d",\
847 __func__, rc);
848 goto exit;
849 }
850 }
851 return rc;
852exit:
853 pr_err("%s: failed with rc = %d", __func__, rc);
854 return rc;
855}
856
857static int __init bt_power_init(void)
858{
859 int i, rc = 0;
860 for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) {
861 bt_vregs[i].vregs = vreg_get(NULL,
862 bt_vregs[i].name);
863 if (IS_ERR(bt_vregs[i].vregs)) {
864 pr_err("%s: vreg get %s failed (%ld)\n",
865 __func__, bt_vregs[i].name,
866 PTR_ERR(bt_vregs[i].vregs));
867 rc = PTR_ERR(bt_vregs[i].vregs);
868 goto vreg_get_fail;
869 }
870 }
871
872 msm_bt_power_device.dev.platform_data = &bluetooth_power;
873
874 return rc;
875
876vreg_get_fail:
877 while (i)
878 vreg_put(bt_vregs[--i].vregs);
879 return rc;
880}
881
882static struct marimba_platform_data marimba_pdata = {
883 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
884 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
885 .bahama_setup = msm_bahama_setup_power,
886 .bahama_shutdown = msm_bahama_shutdown_power,
887 .bahama_core_config = msm_bahama_core_config,
888 .fm = &marimba_fm_pdata,
889};
890
891#endif
892
893#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
894static struct i2c_board_info bahama_devices[] = {
895{
896 I2C_BOARD_INFO("marimba", 0xc),
897 .platform_data = &marimba_pdata,
898},
899};
900#endif
901
902static struct msm_gpio qup_i2c_gpios_io[] = {
903 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
904 "qup_scl" },
905 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
906 "qup_sda" },
907 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
908 "qup_scl" },
909 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
910 "qup_sda" },
911};
912
913static struct msm_gpio qup_i2c_gpios_hw[] = {
914 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
915 "qup_scl" },
916 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
917 "qup_sda" },
918 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
919 "qup_scl" },
920 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
921 "qup_sda" },
922};
923
924static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
925{
926 int rc;
927
928 if (adap_id < 0 || adap_id > 1)
929 return;
930
931 /* Each adapter gets 2 lines from the table */
932 if (config_type)
933 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
934 else
935 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
936 if (rc < 0)
937 pr_err("QUP GPIO request/enable failed: %d\n", rc);
938}
939
940static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
941 .clk_freq = 100000,
942 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
943};
944
945static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
946 .clk_freq = 100000,
947 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
948};
949
950#ifdef CONFIG_ARCH_MSM7X27A
951#define MSM_PMEM_MDP_SIZE 0x1DD1000
952#define MSM_PMEM_ADSP_SIZE 0x1000000
953
954#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
955#define MSM_FB_SIZE 0x260000
956#else
957#define MSM_FB_SIZE 0x195000
958#endif
959
960#endif
961
Taniya Dasda408822011-09-06 12:54:06 +0530962#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
963defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
964
965#ifndef CLEARPAD3000_ATTEN_GPIO
966#define CLEARPAD3000_ATTEN_GPIO (48)
967#endif
968
969#ifndef CLEARPAD3000_RESET_GPIO
970#define CLEARPAD3000_RESET_GPIO (26)
971#endif
972
973static int synaptics_touchpad_setup(void);
974
975static struct msm_gpio clearpad3000_cfg_data[] = {
976 {GPIO_CFG(CLEARPAD3000_ATTEN_GPIO, 0, GPIO_CFG_INPUT,
977 GPIO_CFG_NO_PULL, GPIO_CFG_6MA), "rmi4_attn"},
978 {GPIO_CFG(CLEARPAD3000_RESET_GPIO, 0, GPIO_CFG_OUTPUT,
979 GPIO_CFG_PULL_DOWN, GPIO_CFG_8MA), "rmi4_reset"},
980};
981
982static struct rmi_XY_pair rmi_offset = {.x = 0, .y = 0};
983static struct rmi_range rmi_clipx = {.min = 48, .max = 980};
984static struct rmi_range rmi_clipy = {.min = 7, .max = 1647};
985static struct rmi_f11_functiondata synaptics_f11_data = {
986 .swap_axes = false,
987 .flipX = false,
988 .flipY = false,
989 .offset = &rmi_offset,
990 .button_height = 113,
991 .clipX = &rmi_clipx,
992 .clipY = &rmi_clipy,
993};
994
995#define MAX_LEN 100
996
997static ssize_t clearpad3000_virtual_keys_register(struct kobject *kobj,
998 struct kobj_attribute *attr, char *buf)
999{
1000 char *virtual_keys = __stringify(EV_KEY) ":" __stringify(KEY_MENU) \
1001 ":60:830:120:60" ":" __stringify(EV_KEY) \
1002 ":" __stringify(KEY_HOME) ":180:830:120:60" \
1003 ":" __stringify(EV_KEY) ":" \
1004 __stringify(KEY_SEARCH) ":300:830:120:60" \
1005 ":" __stringify(EV_KEY) ":" \
1006 __stringify(KEY_BACK) ":420:830:120:60" "\n";
1007
1008 return snprintf(buf, strnlen(virtual_keys, MAX_LEN) + 1 , "%s",
1009 virtual_keys);
1010}
1011
1012static struct kobj_attribute clearpad3000_virtual_keys_attr = {
1013 .attr = {
1014 .name = "virtualkeys.sensor00fn11",
1015 .mode = S_IRUGO,
1016 },
1017 .show = &clearpad3000_virtual_keys_register,
1018};
1019
1020static struct attribute *virtual_key_properties_attrs[] = {
1021 &clearpad3000_virtual_keys_attr.attr,
1022 NULL
1023};
1024
1025static struct attribute_group virtual_key_properties_attr_group = {
1026 .attrs = virtual_key_properties_attrs,
1027};
1028
1029struct kobject *virtual_key_properties_kobj;
1030
1031static struct rmi_functiondata synaptics_functiondata[] = {
1032 {
1033 .function_index = RMI_F11_INDEX,
1034 .data = &synaptics_f11_data,
1035 },
1036};
1037
1038static struct rmi_functiondata_list synaptics_perfunctiondata = {
1039 .count = ARRAY_SIZE(synaptics_functiondata),
1040 .functiondata = synaptics_functiondata,
1041};
1042
1043static struct rmi_sensordata synaptics_sensordata = {
1044 .perfunctiondata = &synaptics_perfunctiondata,
1045 .rmi_sensor_setup = synaptics_touchpad_setup,
1046};
1047
1048static struct rmi_i2c_platformdata synaptics_platformdata = {
1049 .i2c_address = 0x2c,
1050 .irq_type = IORESOURCE_IRQ_LOWLEVEL,
1051 .sensordata = &synaptics_sensordata,
1052};
1053
1054static struct i2c_board_info synaptic_i2c_clearpad3k[] = {
1055 {
1056 I2C_BOARD_INFO("rmi4_ts", 0x2c),
1057 .platform_data = &synaptics_platformdata,
1058 },
1059};
1060
1061static int synaptics_touchpad_setup(void)
1062{
1063 int retval = 0;
1064
1065 virtual_key_properties_kobj =
1066 kobject_create_and_add("board_properties", NULL);
1067 if (virtual_key_properties_kobj)
1068 retval = sysfs_create_group(virtual_key_properties_kobj,
1069 &virtual_key_properties_attr_group);
1070 if (!virtual_key_properties_kobj || retval)
1071 pr_err("failed to create ft5202 board_properties\n");
1072
1073 retval = msm_gpios_request_enable(clearpad3000_cfg_data,
1074 sizeof(clearpad3000_cfg_data)/sizeof(struct msm_gpio));
1075 if (retval) {
1076 pr_err("%s:Failed to obtain touchpad GPIO %d. Code: %d.",
1077 __func__, CLEARPAD3000_ATTEN_GPIO, retval);
1078 retval = 0; /* ignore the err */
1079 }
1080 synaptics_platformdata.irq = gpio_to_irq(CLEARPAD3000_ATTEN_GPIO);
1081
1082 gpio_set_value(CLEARPAD3000_RESET_GPIO, 0);
1083 usleep(10000);
1084 gpio_set_value(CLEARPAD3000_RESET_GPIO, 1);
1085 usleep(50000);
1086
1087 return retval;
1088}
1089#endif
1090
1091
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301092static struct android_usb_platform_data android_usb_pdata = {
Pankaj Kumar6f841742011-10-10 15:52:14 +05301093 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301094};
1095
1096static struct platform_device android_usb_device = {
1097 .name = "android_usb",
1098 .id = -1,
1099 .dev = {
1100 .platform_data = &android_usb_pdata,
1101 },
1102};
1103
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301104#ifdef CONFIG_USB_EHCI_MSM_72K
1105static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1106{
1107 int rc = 0;
1108 unsigned gpio;
1109
1110 gpio = GPIO_HOST_VBUS_EN;
1111
1112 rc = gpio_request(gpio, "i2c_host_vbus_en");
1113 if (rc < 0) {
1114 pr_err("failed to request %d GPIO\n", gpio);
1115 return;
1116 }
1117 gpio_direction_output(gpio, !!on);
1118 gpio_set_value_cansleep(gpio, !!on);
1119 gpio_free(gpio);
1120}
1121
1122static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1123 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1124};
1125
1126static void __init msm7627a_init_host(void)
1127{
1128 msm_add_host(0, &msm_usb_host_pdata);
1129}
1130#endif
1131
1132#ifdef CONFIG_USB_MSM_OTG_72K
1133static int hsusb_rpc_connect(int connect)
1134{
1135 if (connect)
1136 return msm_hsusb_rpc_connect();
1137 else
1138 return msm_hsusb_rpc_close();
1139}
1140
1141static struct vreg *vreg_3p3;
1142static int msm_hsusb_ldo_init(int init)
1143{
1144 if (init) {
1145 vreg_3p3 = vreg_get(NULL, "usb");
1146 if (IS_ERR(vreg_3p3))
1147 return PTR_ERR(vreg_3p3);
1148 } else
1149 vreg_put(vreg_3p3);
1150
1151 return 0;
1152}
1153
1154static int msm_hsusb_ldo_enable(int enable)
1155{
1156 static int ldo_status;
1157
1158 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1159 return -ENODEV;
1160
1161 if (ldo_status == enable)
1162 return 0;
1163
1164 ldo_status = enable;
1165
1166 if (enable)
1167 return vreg_enable(vreg_3p3);
1168
1169 return vreg_disable(vreg_3p3);
1170}
1171
1172#ifndef CONFIG_USB_EHCI_MSM_72K
1173static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1174{
1175 int ret = 0;
1176
1177 if (init)
1178 ret = msm_pm_app_rpc_init(callback);
1179 else
1180 msm_pm_app_rpc_deinit(callback);
1181
1182 return ret;
1183}
1184#endif
1185
1186static struct msm_otg_platform_data msm_otg_pdata = {
1187#ifndef CONFIG_USB_EHCI_MSM_72K
1188 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1189#else
1190 .vbus_power = msm_hsusb_vbus_power,
1191#endif
1192 .rpc_connect = hsusb_rpc_connect,
1193 .core_clk = 1,
1194 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1195 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1196 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1197 .se1_gating = SE1_GATING_DISABLE,
1198 .ldo_init = msm_hsusb_ldo_init,
1199 .ldo_enable = msm_hsusb_ldo_enable,
1200 .chg_init = hsusb_chg_init,
1201 .chg_connected = hsusb_chg_connected,
1202 .chg_vbus_draw = hsusb_chg_vbus_draw,
1203};
1204#endif
1205
1206static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1207 .is_phy_status_timer_on = 1,
1208};
1209
1210#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1211 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1212 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1213 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1214
1215static unsigned long vreg_sts, gpio_sts;
1216static struct vreg *vreg_mmc;
1217static struct vreg *vreg_emmc;
1218
1219struct sdcc_vreg {
1220 struct vreg *vreg_data;
1221 unsigned level;
1222};
1223
1224static struct sdcc_vreg sdcc_vreg_data[4];
1225
1226struct sdcc_gpio {
1227 struct msm_gpio *cfg_data;
1228 uint32_t size;
1229 struct msm_gpio *sleep_cfg_data;
1230};
1231
1232/**
1233 * Due to insufficient drive strengths for SDC GPIO lines some old versioned
1234 * SD/MMC cards may cause data CRC errors. Hence, set optimal values
1235 * for SDC slots based on timing closure and marginality. SDC1 slot
1236 * require higher value since it should handle bad signal quality due
1237 * to size of T-flash adapters.
1238 */
1239static struct msm_gpio sdc1_cfg_data[] = {
1240 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1241 "sdc1_dat_3"},
1242 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1243 "sdc1_dat_2"},
1244 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1245 "sdc1_dat_1"},
1246 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1247 "sdc1_dat_0"},
1248 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA),
1249 "sdc1_cmd"},
1250 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA),
1251 "sdc1_clk"},
1252};
1253
1254static struct msm_gpio sdc2_cfg_data[] = {
1255 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1256 "sdc2_clk"},
1257 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1258 "sdc2_cmd"},
1259 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1260 "sdc2_dat_3"},
1261 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1262 "sdc2_dat_2"},
1263 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1264 "sdc2_dat_1"},
1265 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1266 "sdc2_dat_0"},
1267};
1268
1269static struct msm_gpio sdc2_sleep_cfg_data[] = {
1270 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1271 "sdc2_clk"},
1272 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1273 "sdc2_cmd"},
1274 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1275 "sdc2_dat_3"},
1276 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1277 "sdc2_dat_2"},
1278 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1279 "sdc2_dat_1"},
1280 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1281 "sdc2_dat_0"},
1282};
1283static struct msm_gpio sdc3_cfg_data[] = {
1284 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1285 "sdc3_clk"},
1286 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1287 "sdc3_cmd"},
1288 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1289 "sdc3_dat_3"},
1290 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1291 "sdc3_dat_2"},
1292 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1293 "sdc3_dat_1"},
1294 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1295 "sdc3_dat_0"},
1296#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1297 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1298 "sdc3_dat_7"},
1299 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1300 "sdc3_dat_6"},
1301 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1302 "sdc3_dat_5"},
1303 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1304 "sdc3_dat_4"},
1305#endif
1306};
1307
1308static struct msm_gpio sdc4_cfg_data[] = {
1309 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1310 "sdc4_dat_3"},
1311 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1312 "sdc4_dat_2"},
1313 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1314 "sdc4_dat_1"},
1315 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1316 "sdc4_cmd"},
1317 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA),
1318 "sdc4_dat_0"},
1319 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1320 "sdc4_clk"},
1321};
1322
1323static struct sdcc_gpio sdcc_cfg_data[] = {
1324 {
1325 .cfg_data = sdc1_cfg_data,
1326 .size = ARRAY_SIZE(sdc1_cfg_data),
1327 },
1328 {
1329 .cfg_data = sdc2_cfg_data,
1330 .size = ARRAY_SIZE(sdc2_cfg_data),
1331 .sleep_cfg_data = sdc2_sleep_cfg_data,
1332 },
1333 {
1334 .cfg_data = sdc3_cfg_data,
1335 .size = ARRAY_SIZE(sdc3_cfg_data),
1336 },
1337 {
1338 .cfg_data = sdc4_cfg_data,
1339 .size = ARRAY_SIZE(sdc4_cfg_data),
1340 },
1341};
1342
1343static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1344{
1345 int rc = 0;
1346 struct sdcc_gpio *curr;
1347
1348 curr = &sdcc_cfg_data[dev_id - 1];
1349 if (!(test_bit(dev_id, &gpio_sts)^enable))
1350 return rc;
1351
1352 if (enable) {
1353 set_bit(dev_id, &gpio_sts);
1354 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1355 if (rc)
1356 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1357 __func__, dev_id);
1358 } else {
1359 clear_bit(dev_id, &gpio_sts);
1360 if (curr->sleep_cfg_data) {
1361 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1362 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1363 return rc;
1364 }
1365 msm_gpios_disable_free(curr->cfg_data, curr->size);
1366 }
1367 return rc;
1368}
1369
1370static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1371{
1372 int rc = 0;
1373 struct sdcc_vreg *curr;
1374
1375 curr = &sdcc_vreg_data[dev_id - 1];
1376
1377 if (!(test_bit(dev_id, &vreg_sts)^enable))
1378 return rc;
1379
1380 if (enable) {
1381 set_bit(dev_id, &vreg_sts);
1382 rc = vreg_set_level(curr->vreg_data, curr->level);
1383 if (rc)
1384 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1385
1386 rc = vreg_enable(curr->vreg_data);
1387 if (rc)
1388 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1389 } else {
1390 clear_bit(dev_id, &vreg_sts);
1391 rc = vreg_disable(curr->vreg_data);
1392 if (rc)
1393 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1394 }
1395 return rc;
1396}
1397
1398static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1399{
1400 int rc = 0;
1401 struct platform_device *pdev;
1402
1403 pdev = container_of(dv, struct platform_device, dev);
1404
1405 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1406 if (rc)
1407 goto out;
1408
1409 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1410out:
1411 return rc;
1412}
1413
1414#define GPIO_SDC1_HW_DET 85
1415
1416#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1417 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1418static unsigned int msm7627a_sdcc_slot_status(struct device *dev)
1419{
1420 int status;
1421
1422 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1423 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1424 if (status)
1425 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1426 GPIO_SDC1_HW_DET);
1427
1428 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1429 if (status) {
1430 pr_err("%s:Failed to request GPIO %d\n", __func__,
1431 GPIO_SDC1_HW_DET);
1432 } else {
1433 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1434 if (!status)
1435 status = gpio_get_value(GPIO_SDC1_HW_DET);
1436 gpio_free(GPIO_SDC1_HW_DET);
1437 }
1438 return status;
1439}
1440#endif
1441
1442#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1443static struct mmc_platform_data sdc1_plat_data = {
1444 .ocr_mask = MMC_VDD_28_29,
1445 .translate_vdd = msm_sdcc_setup_power,
1446 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1447 .msmsdcc_fmin = 144000,
1448 .msmsdcc_fmid = 24576000,
1449 .msmsdcc_fmax = 49152000,
1450#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1451 .status = msm7627a_sdcc_slot_status,
1452 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1453 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1454#endif
1455};
1456#endif
1457
1458#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1459static struct mmc_platform_data sdc2_plat_data = {
1460 /*
1461 * SDC2 supports only 1.8V, claim for 2.85V range is just
1462 * for allowing buggy cards who advertise 2.8V even though
1463 * they can operate at 1.8V supply.
1464 */
1465 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1466 .translate_vdd = msm_sdcc_setup_power,
1467 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1468#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1469 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1470#endif
1471 .msmsdcc_fmin = 144000,
1472 .msmsdcc_fmid = 24576000,
1473 .msmsdcc_fmax = 49152000,
1474#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1475 .dummy52_required = 1,
1476#endif
1477};
1478#endif
1479
1480#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1481static struct mmc_platform_data sdc3_plat_data = {
1482 .ocr_mask = MMC_VDD_28_29,
1483 .translate_vdd = msm_sdcc_setup_power,
1484#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1485 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1486#else
1487 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1488#endif
1489 .msmsdcc_fmin = 144000,
1490 .msmsdcc_fmid = 24576000,
1491 .msmsdcc_fmax = 49152000,
1492 .nonremovable = 1,
1493};
1494#endif
1495
1496#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1497 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1498static struct mmc_platform_data sdc4_plat_data = {
1499 .ocr_mask = MMC_VDD_28_29,
1500 .translate_vdd = msm_sdcc_setup_power,
1501 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1502 .msmsdcc_fmin = 144000,
1503 .msmsdcc_fmid = 24576000,
1504 .msmsdcc_fmax = 49152000,
1505};
1506#endif
1507#endif
1508
1509#ifdef CONFIG_SERIAL_MSM_HS
1510static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1511 .inject_rx_on_wakeup = 1,
1512 .rx_to_inject = 0xFD,
1513};
1514#endif
1515static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1516 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1517 .idle_supported = 1,
1518 .suspend_supported = 1,
1519 .idle_enabled = 1,
1520 .suspend_enabled = 1,
1521 .latency = 16000,
1522 .residency = 20000,
1523 },
1524 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1525 .idle_supported = 1,
1526 .suspend_supported = 1,
1527 .idle_enabled = 1,
1528 .suspend_enabled = 1,
1529 .latency = 12000,
1530 .residency = 20000,
1531 },
1532 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1533 .idle_supported = 1,
1534 .suspend_supported = 1,
1535 .idle_enabled = 0,
1536 .suspend_enabled = 1,
1537 .latency = 2000,
1538 .residency = 0,
1539 },
1540 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1541 .idle_supported = 1,
1542 .suspend_supported = 1,
1543 .idle_enabled = 1,
1544 .suspend_enabled = 1,
1545 .latency = 2,
1546 .residency = 0,
1547 },
1548};
1549
1550static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1551 .name = "pmem_adsp",
1552 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1553 .cached = 1,
1554 .memory_type = MEMTYPE_EBI1,
1555};
1556
1557static struct platform_device android_pmem_adsp_device = {
1558 .name = "android_pmem",
1559 .id = 1,
1560 .dev = { .platform_data = &android_pmem_adsp_pdata },
1561};
1562
1563static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1564static int __init pmem_mdp_size_setup(char *p)
1565{
1566 pmem_mdp_size = memparse(p, NULL);
1567 return 0;
1568}
1569
1570early_param("pmem_mdp_size", pmem_mdp_size_setup);
1571
1572static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1573static int __init pmem_adsp_size_setup(char *p)
1574{
1575 pmem_adsp_size = memparse(p, NULL);
1576 return 0;
1577}
1578
1579early_param("pmem_adsp_size", pmem_adsp_size_setup);
1580
1581static unsigned fb_size = MSM_FB_SIZE;
1582static int __init fb_size_setup(char *p)
1583{
1584 fb_size = memparse(p, NULL);
1585 return 0;
1586}
1587
1588early_param("fb_size", fb_size_setup);
1589
Taniya Das0a5303a2011-08-23 18:47:48 +05301590static struct resource msm_fb_resources[] = {
1591 {
1592 .flags = IORESOURCE_DMA,
1593 }
1594};
1595
1596static int msm_fb_detect_panel(const char *name)
1597{
1598 int ret;
1599
1600 if (!strncmp(name, "mipi_video_truly_wvga", 21))
1601 ret = 0;
1602 else
1603 ret = -ENODEV;
1604
1605 return ret;
1606}
1607
1608static int mipi_truly_set_bl(int on)
1609{
1610 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
1611
1612 return 1;
1613}
1614
1615static struct msm_fb_platform_data msm_fb_pdata = {
1616 .detect_client = msm_fb_detect_panel,
1617};
1618
1619static struct platform_device msm_fb_device = {
1620 .name = "msm_fb",
1621 .id = 0,
1622 .num_resources = ARRAY_SIZE(msm_fb_resources),
1623 .resource = msm_fb_resources,
1624 .dev = {
1625 .platform_data = &msm_fb_pdata,
1626 }
1627};
1628
1629static struct msm_panel_common_pdata mipi_truly_pdata = {
1630 .pmic_backlight = mipi_truly_set_bl,
1631};
1632
1633static struct platform_device mipi_dsi_truly_panel_device = {
1634 .name = "mipi_truly",
1635 .id = 0,
1636 .dev = {
1637 .platform_data = &mipi_truly_pdata,
1638 }
1639};
1640
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301641static void __init msm7627a_init_mmc(void)
1642{
1643 vreg_emmc = vreg_get(NULL, "emmc");
1644 if (IS_ERR(vreg_emmc)) {
1645 pr_err("%s: vreg get failed (%ld)\n",
1646 __func__, PTR_ERR(vreg_emmc));
1647 return;
1648 }
1649
1650 vreg_mmc = vreg_get(NULL, "mmc");
1651 if (IS_ERR(vreg_mmc)) {
1652 pr_err("%s: vreg get failed (%ld)\n",
1653 __func__, PTR_ERR(vreg_mmc));
1654 return;
1655 }
1656
1657 /* eMMC slot */
1658#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1659 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1660 sdcc_vreg_data[2].level = 3000;
1661 msm_add_sdcc(3, &sdc3_plat_data);
1662#endif
1663 /* Micro-SD slot */
1664#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1665 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1666 sdcc_vreg_data[0].level = 2850;
1667 msm_add_sdcc(1, &sdc1_plat_data);
1668#endif
1669 /* SDIO WLAN slot */
1670#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1671 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1672 sdcc_vreg_data[1].level = 2850;
1673 msm_add_sdcc(2, &sdc2_plat_data);
1674#endif
1675 /* Not Used */
1676#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1677 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1678 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1679 sdcc_vreg_data[3].level = 2850;
1680 msm_add_sdcc(4, &sdc4_plat_data);
1681#endif
1682}
1683
1684#define SND(desc, num) { .name = #desc, .id = num }
1685static struct snd_endpoint snd_endpoints_list[] = {
1686 SND(HANDSET, 0),
1687 SND(MONO_HEADSET, 2),
1688 SND(HEADSET, 3),
1689 SND(SPEAKER, 6),
1690 SND(TTY_HEADSET, 8),
1691 SND(TTY_VCO, 9),
1692 SND(TTY_HCO, 10),
1693 SND(BT, 12),
1694 SND(IN_S_SADC_OUT_HANDSET, 16),
1695 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1696 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1697 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1698 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
Shashi Kumar64e07602011-10-11 13:18:57 +05301699 SND(STEREO_HEADSET_AND_SPEAKER, 31),
Phani Kumar Alladad6971252011-10-19 10:50:15 +05301700 SND(CURRENT, 0x7FFFFFFE),
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301701 SND(FM_ANALOG_STEREO_HEADSET, 35),
1702 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1703};
1704#undef SND
1705
1706static struct msm_snd_endpoints msm_device_snd_endpoints = {
1707 .endpoints = snd_endpoints_list,
1708 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1709};
1710
1711static struct platform_device msm_device_snd = {
1712 .name = "msm_snd",
1713 .id = -1,
1714 .dev = {
1715 .platform_data = &msm_device_snd_endpoints
1716 },
1717};
1718
1719#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1720 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1721 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1722 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1723 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1724 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1725#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1726 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1727 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1728 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1729 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1730 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1731#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1732 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1733 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1734 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1735 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1736 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1737#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1738 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1739 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1740 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1741 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1742 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1743#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1744
1745static unsigned int dec_concurrency_table[] = {
1746 /* Audio LP */
1747 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1748 0, 0, 0,
1749
1750 /* Concurrency 1 */
1751 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1752 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1753 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1754 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1755 (DEC4_FORMAT),
1756
1757 /* Concurrency 2 */
1758 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1759 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1760 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1761 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1762 (DEC4_FORMAT),
1763
1764 /* Concurrency 3 */
1765 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1766 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1767 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1768 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1769 (DEC4_FORMAT),
1770
1771 /* Concurrency 4 */
1772 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1773 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1774 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1775 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1776 (DEC4_FORMAT),
1777
1778 /* Concurrency 5 */
1779 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1780 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1781 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1782 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1783 (DEC4_FORMAT),
1784
1785 /* Concurrency 6 */
1786 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1787 0, 0, 0, 0,
1788
1789 /* Concurrency 7 */
1790 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1791 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1792 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1793 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1794 (DEC4_FORMAT),
1795};
1796
1797#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1798 .module_queueid = queueid, .module_decid = decid, \
1799 .nr_codec_support = nr_codec}
1800
1801static struct msm_adspdec_info dec_info_list[] = {
1802 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1803 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1804 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1805 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1806 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1807};
1808
1809static struct msm_adspdec_database msm_device_adspdec_database = {
1810 .num_dec = ARRAY_SIZE(dec_info_list),
1811 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
1812 ARRAY_SIZE(dec_info_list)),
1813 .dec_concurrency_table = dec_concurrency_table,
1814 .dec_info_list = dec_info_list,
1815};
1816
1817static struct platform_device msm_device_adspdec = {
1818 .name = "msm_adspdec",
1819 .id = -1,
1820 .dev = {
1821 .platform_data = &msm_device_adspdec_database
1822 },
1823};
1824
1825static struct android_pmem_platform_data android_pmem_audio_pdata = {
1826 .name = "pmem_audio",
1827 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1828 .cached = 0,
1829 .memory_type = MEMTYPE_EBI1,
1830};
1831
1832static struct platform_device android_pmem_audio_device = {
1833 .name = "android_pmem",
1834 .id = 2,
1835 .dev = { .platform_data = &android_pmem_audio_pdata },
1836};
1837
1838static struct android_pmem_platform_data android_pmem_pdata = {
1839 .name = "pmem",
1840 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1841 .cached = 1,
1842 .memory_type = MEMTYPE_EBI1,
1843};
1844static struct platform_device android_pmem_device = {
1845 .name = "android_pmem",
1846 .id = 0,
1847 .dev = { .platform_data = &android_pmem_pdata },
1848};
1849
1850static u32 msm_calculate_batt_capacity(u32 current_voltage);
1851
1852static struct msm_psy_batt_pdata msm_psy_batt_data = {
1853 .voltage_min_design = 2800,
1854 .voltage_max_design = 4300,
1855 .avail_chg_sources = AC_CHG | USB_CHG ,
1856 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
1857 .calculate_capacity = &msm_calculate_batt_capacity,
1858};
1859
1860static u32 msm_calculate_batt_capacity(u32 current_voltage)
1861{
1862 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
1863 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
1864
1865 return (current_voltage - low_voltage) * 100
1866 / (high_voltage - low_voltage);
1867}
1868
1869static struct platform_device msm_batt_device = {
1870 .name = "msm-battery",
1871 .id = -1,
1872 .dev.platform_data = &msm_psy_batt_data,
1873};
1874
1875static struct platform_device *qrd1_devices[] __initdata = {
1876 &msm_device_dmov,
1877 &msm_device_smd,
1878 &msm_device_uart1,
1879 &msm_device_uart_dm1,
1880 &msm_gsbi0_qup_i2c_device,
1881 &msm_gsbi1_qup_i2c_device,
1882 &msm_device_otg,
1883 &msm_device_gadget_peripheral,
1884 &android_usb_device,
1885 &android_pmem_device,
1886 &android_pmem_adsp_device,
Taniya Das0a5303a2011-08-23 18:47:48 +05301887 &msm_fb_device,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301888 &android_pmem_audio_device,
1889 &msm_device_snd,
1890 &msm_device_adspdec,
1891 &msm_batt_device,
1892 &msm_kgsl_3d0,
1893#ifdef CONFIG_BT
1894 &msm_bt_power_device,
1895#endif
Taniya Das0a5303a2011-08-23 18:47:48 +05301896 &mipi_dsi_truly_panel_device,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301897 &msm_wlan_ar6000_pm_device,
1898 &asoc_msm_pcm,
1899 &asoc_msm_dai0,
1900 &asoc_msm_dai1,
1901};
1902
1903static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
1904static int __init pmem_kernel_ebi1_size_setup(char *p)
1905{
1906 pmem_kernel_ebi1_size = memparse(p, NULL);
1907 return 0;
1908}
1909early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
1910
1911static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
1912static int __init pmem_audio_size_setup(char *p)
1913{
1914 pmem_audio_size = memparse(p, NULL);
1915 return 0;
1916}
1917early_param("pmem_audio_size", pmem_audio_size_setup);
1918
1919static void __init msm_msm7627a_allocate_memory_regions(void)
1920{
Taniya Das0a5303a2011-08-23 18:47:48 +05301921 void *addr;
1922 unsigned long size;
1923
1924 size = fb_size ? : MSM_FB_SIZE;
1925 addr = alloc_bootmem_align(size, 0x1000);
1926 msm_fb_resources[0].start = __pa(addr);
1927 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1928 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n", size,
1929 addr, __pa(addr));
Taniya Dasc98bfbc2011-08-23 09:58:55 +05301930}
1931
1932static struct memtype_reserve msm7627a_reserve_table[] __initdata = {
1933 [MEMTYPE_SMI] = {
1934 },
1935 [MEMTYPE_EBI0] = {
1936 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1937 },
1938 [MEMTYPE_EBI1] = {
1939 .flags = MEMTYPE_FLAGS_1M_ALIGN,
1940 },
1941};
1942
Taniya Das0a5303a2011-08-23 18:47:48 +05301943static struct msm_panel_common_pdata mdp_pdata = {
1944 .gpio = 97,
1945 .mdp_rev = MDP_REV_303,
1946};
1947
1948#define GPIO_LCDC_BRDG_PD 128
1949#define GPIO_LCDC_BRDG_RESET_N 129
1950#define GPIO_LCD_DSI_SEL 125
1951
1952static unsigned mipi_dsi_gpio[] = {
1953 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT,
1954 GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
1955 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT,
1956 GPIO_CFG_NO_PULL, GPIO_CFG_2MA), /* LCDC_BRDG_PD */
1957};
1958
1959static unsigned lcd_dsi_sel_gpio[] = {
1960 GPIO_CFG(GPIO_LCD_DSI_SEL, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP,
1961 GPIO_CFG_2MA),
1962};
1963
1964enum {
1965 DSI_SINGLE_LANE = 1,
1966 DSI_TWO_LANES,
1967};
1968
1969static int msm_fb_get_lane_config(void)
1970{
1971 pr_info("DSI_TWO_LANES\n");
1972 return DSI_TWO_LANES;
1973}
1974
1975static int mipi_truly_sel_mode(int video_mode)
1976{
1977 int rc = 0;
1978
1979 rc = gpio_request(GPIO_LCD_DSI_SEL, "lcd_dsi_sel");
1980 if (rc < 0)
1981 goto gpio_error;
1982
1983 rc = gpio_tlmm_config(lcd_dsi_sel_gpio[0], GPIO_CFG_ENABLE);
1984 if (rc)
1985 goto gpio_error;
1986
1987 rc = gpio_direction_output(GPIO_LCD_DSI_SEL, 1);
1988 if (!rc) {
1989 gpio_set_value_cansleep(GPIO_LCD_DSI_SEL, video_mode);
1990 return rc;
1991 } else {
1992 goto gpio_error;
1993 }
1994
1995gpio_error:
1996 pr_err("mipi_truly_sel_mode failed\n");
1997 gpio_free(GPIO_LCD_DSI_SEL);
1998 return rc;
1999}
2000
2001static int msm_fb_dsi_client_qrd1_reset(void)
2002{
2003 int rc = 0;
2004
2005 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2006 if (rc < 0) {
2007 pr_err("failed to request lcd brdg reset_n\n");
2008 return rc;
2009 }
2010
2011 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2012 if (rc < 0) {
2013 pr_err("Failed to enable LCDC Bridge reset enable\n");
2014 return rc;
2015 }
2016
2017 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2018 if (rc < 0) {
2019 pr_err("Failed GPIO bridge pd\n");
2020 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2021 return rc;
2022 }
2023
2024 mipi_truly_sel_mode(1);
2025
2026 return rc;
2027}
2028
2029static int msm_fb_dsi_client_reset(void)
2030{
2031 int rc = 0;
2032
2033 rc = msm_fb_dsi_client_qrd1_reset();
2034 return rc;
2035}
2036
2037static int dsi_gpio_initialized;
2038
2039static int mipi_dsi_panel_qrd1_power(int on)
2040{
2041 int rc = 0;
2042
2043 if (!dsi_gpio_initialized) {
2044 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2045 if (rc < 0)
2046 return rc;
2047
2048 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2049 if (rc < 0) {
2050 pr_err("failed to enable backlight\n");
2051 gpio_free(GPIO_BACKLIGHT_EN);
2052 return rc;
2053 }
2054 dsi_gpio_initialized = 1;
2055 }
2056
2057 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, !!on);
2058
2059 if (!on) {
2060 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
2061 msleep(20);
2062 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 0);
2063 msleep(20);
2064 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N, 1);
2065
2066 }
2067
2068 return rc;
2069}
2070
2071static int mipi_dsi_panel_power(int on)
2072{
2073 int rc = 0;
2074
2075 rc = mipi_dsi_panel_qrd1_power(on);
2076 return rc;
2077}
2078
2079#define MDP_303_VSYNC_GPIO 97
2080
2081#ifdef CONFIG_FB_MSM_MDP303
2082static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2083 .vsync_gpio = MDP_303_VSYNC_GPIO,
2084 .dsi_power_save = mipi_dsi_panel_power,
2085 .dsi_client_reset = msm_fb_dsi_client_reset,
2086 .get_lane_config = msm_fb_get_lane_config,
2087};
2088#endif
2089
2090static void __init msm_fb_add_devices(void)
2091{
2092 msm_fb_register_device("mdp", &mdp_pdata);
2093 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2094}
2095
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302096static void __init size_pmem_devices(void)
2097{
2098#ifdef CONFIG_ANDROID_PMEM
2099 android_pmem_adsp_pdata.size = pmem_adsp_size;
2100 android_pmem_pdata.size = pmem_mdp_size;
2101 android_pmem_audio_pdata.size = pmem_audio_size;
2102#endif
2103}
2104
2105static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2106{
2107 msm7627a_reserve_table[p->memory_type].size += p->size;
2108}
2109
2110static void __init reserve_pmem_memory(void)
2111{
2112#ifdef CONFIG_ANDROID_PMEM
2113 reserve_memory_for(&android_pmem_adsp_pdata);
2114 reserve_memory_for(&android_pmem_pdata);
2115 reserve_memory_for(&android_pmem_audio_pdata);
2116 msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2117#endif
2118}
2119
2120static void __init msm7627a_calculate_reserve_sizes(void)
2121{
2122 size_pmem_devices();
2123 reserve_pmem_memory();
2124}
2125
2126static int msm7627a_paddr_to_memtype(unsigned int paddr)
2127{
2128 return MEMTYPE_EBI1;
2129}
2130
2131static struct reserve_info msm7627a_reserve_info __initdata = {
2132 .memtype_reserve_table = msm7627a_reserve_table,
2133 .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes,
2134 .paddr_to_memtype = msm7627a_paddr_to_memtype,
2135};
2136
2137static void __init msm7627a_reserve(void)
2138{
2139 reserve_info = &msm7627a_reserve_info;
2140 msm_reserve();
2141}
2142
2143static void __init msm_device_i2c_init(void)
2144{
2145 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2146 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2147}
2148
2149static struct msm_handset_platform_data hs_platform_data = {
2150 .hs_name = "7k_handset",
2151 .pwr_key_delay_ms = 500, /* 0 will disable end key */
2152};
2153
2154static struct platform_device hs_pdev = {
2155 .name = "msm-handset",
2156 .id = -1,
2157 .dev = {
2158 .platform_data = &hs_platform_data,
2159 },
2160};
2161
2162#define UART1DM_RX_GPIO 45
2163static void __init msm_qrd1_init(void)
2164{
2165 msm7x2x_misc_init();
2166 msm_device_i2c_init();
2167 msm7627a_init_mmc();
2168
2169#ifdef CONFIG_SERIAL_MSM_HS
2170 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
2171 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
2172#endif
2173
2174#ifdef CONFIG_USB_MSM_OTG_72K
2175 msm_otg_pdata.swfi_latency = msm7627a_pm_data
2176 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
2177 msm_device_otg.dev.platform_data = &msm_otg_pdata;
2178#endif
2179 msm_device_gadget_peripheral.dev.platform_data =
2180 &msm_gadget_pdata;
2181 platform_add_devices(qrd1_devices,
2182 ARRAY_SIZE(qrd1_devices));
2183#ifdef CONFIG_USB_EHCI_MSM_72K
2184 msm7627a_init_host();
2185#endif
2186 msm_pm_set_platform_data(msm7627a_pm_data,
2187 ARRAY_SIZE(msm7627a_pm_data));
Taniya Das0a5303a2011-08-23 18:47:48 +05302188 msm_fb_add_devices();
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302189
2190#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
2191 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
2192 bahama_devices,
2193 ARRAY_SIZE(bahama_devices));
2194 bt_power_init();
2195#endif
Taniya Dasda408822011-09-06 12:54:06 +05302196
2197#if defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C) || \
2198 defined(CONFIG_TOUCHSCREEN_SYNAPTICS_RMI4_I2C_MODULE)
2199 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
2200 synaptic_i2c_clearpad3k,
2201 ARRAY_SIZE(synaptic_i2c_clearpad3k));
2202#endif
2203
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302204 platform_device_register(&hs_pdev);
2205
2206#ifdef CONFIG_MSM_RPC_VIBRATOR
2207 msm_init_pmic_vibrator();
2208#endif
2209}
2210
2211static void __init qrd7627a_init_early(void)
2212{
2213 msm_msm7627a_allocate_memory_regions();
2214}
2215
2216MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1")
2217 .boot_params = PHYS_OFFSET + 0x100,
2218 .map_io = msm_common_io_init,
2219 .reserve = msm7627a_reserve,
2220 .init_irq = msm_init_irq,
2221 .init_machine = msm_qrd1_init,
2222 .timer = &msm_timer,
2223 .init_early = qrd7627a_init_early,
Pankaj Kumarbf8a2a32011-10-21 11:47:21 +05302224 .handle_irq = vic_handle_irq,
Taniya Dasc98bfbc2011-08-23 09:58:55 +05302225MACHINE_END