| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1 | # | 
 | 2 | #	EDAC Kconfig | 
| Doug Thompson | 4577ca5 | 2009-04-02 16:58:43 -0700 | [diff] [blame] | 3 | #	Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 4 | #	Licensed and distributed under the GPL | 
 | 5 | # | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 6 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 7 | menuconfig EDAC | 
| Doug Thompson | 4577ca5 | 2009-04-02 16:58:43 -0700 | [diff] [blame] | 8 | 	bool "EDAC - error detection and reporting" | 
| Martin Schwidefsky | e25df12 | 2007-05-10 15:45:57 +0200 | [diff] [blame] | 9 | 	depends on HAS_IOMEM | 
| Andrew Morton | 4c6a1c1 | 2007-07-26 10:41:10 -0700 | [diff] [blame] | 10 | 	depends on X86 || PPC | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 11 | 	help | 
 | 12 | 	  EDAC is designed to report errors in the core system. | 
 | 13 | 	  These are low-level errors that are reported in the CPU or | 
| Douglas Thompson | 8cb2a39 | 2007-07-19 01:50:12 -0700 | [diff] [blame] | 14 | 	  supporting chipset or other subsystems: | 
 | 15 | 	  memory errors, cache errors, PCI errors, thermal throttling, etc.. | 
 | 16 | 	  If unsure, select 'Y'. | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 17 |  | 
| Tim Small | 57c432b | 2006-03-09 17:33:50 -0800 | [diff] [blame] | 18 | 	  If this code is reporting problems on your system, please | 
 | 19 | 	  see the EDAC project web pages for more information at: | 
 | 20 |  | 
 | 21 | 	  <http://bluesmoke.sourceforge.net/> | 
 | 22 |  | 
 | 23 | 	  and: | 
 | 24 |  | 
 | 25 | 	  <http://buttersideup.com/edacwiki> | 
 | 26 |  | 
 | 27 | 	  There is also a mailing list for the EDAC project, which can | 
 | 28 | 	  be found via the sourceforge page. | 
 | 29 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 30 | if EDAC | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 31 |  | 
 | 32 | comment "Reporting subsystems" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 33 |  | 
 | 34 | config EDAC_DEBUG | 
 | 35 | 	bool "Debugging" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 36 | 	help | 
 | 37 | 	  This turns on debugging information for the entire EDAC | 
 | 38 | 	  sub-system. You can insert module with "debug_level=x", current | 
 | 39 | 	  there're four debug levels (x=0,1,2,3 from low to high). | 
 | 40 | 	  Usually you should select 'N'. | 
 | 41 |  | 
| Hitoshi Mitake | cc18e3c | 2009-04-02 16:58:43 -0700 | [diff] [blame] | 42 | config EDAC_DEBUG_VERBOSE | 
 | 43 | 	bool "More verbose debugging" | 
 | 44 | 	depends on EDAC_DEBUG | 
 | 45 | 	help | 
 | 46 | 	  This option makes debugging information more verbose. | 
 | 47 | 	  Source file name and line number where debugging message | 
 | 48 | 	  printed will be added to debugging message. | 
 | 49 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 50 | config EDAC_MM_EDAC | 
 | 51 | 	tristate "Main Memory EDAC (Error Detection And Correction) reporting" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 52 | 	default y | 
 | 53 | 	help | 
 | 54 | 	  Some systems are able to detect and correct errors in main | 
 | 55 | 	  memory.  EDAC can report statistics on memory error | 
 | 56 | 	  detection and correction (EDAC - or commonly referred to ECC | 
 | 57 | 	  errors).  EDAC will also try to decode where these errors | 
 | 58 | 	  occurred so that a particular failing memory module can be | 
 | 59 | 	  replaced.  If unsure, select 'Y'. | 
 | 60 |  | 
 | 61 |  | 
 | 62 | config EDAC_AMD76X | 
 | 63 | 	tristate "AMD 76x (760, 762, 768)" | 
| Dave Jones | 90cbc45 | 2006-02-03 03:04:11 -0800 | [diff] [blame] | 64 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 65 | 	help | 
 | 66 | 	  Support for error detection and correction on the AMD 76x | 
 | 67 | 	  series of chipsets used with the Athlon processor. | 
 | 68 |  | 
 | 69 | config EDAC_E7XXX | 
 | 70 | 	tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 71 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 72 | 	help | 
 | 73 | 	  Support for error detection and correction on the Intel | 
 | 74 | 	  E7205, E7500, E7501 and E7505 server chipsets. | 
 | 75 |  | 
 | 76 | config EDAC_E752X | 
| Andrei Konovalov | 5135b79 | 2008-04-29 01:03:13 -0700 | [diff] [blame] | 77 | 	tristate "Intel e752x (e7520, e7525, e7320) and 3100" | 
| Randy Dunlap | da960a6 | 2006-03-31 02:30:34 -0800 | [diff] [blame] | 78 | 	depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 79 | 	help | 
 | 80 | 	  Support for error detection and correction on the Intel | 
 | 81 | 	  E7520, E7525, E7320 server chipsets. | 
 | 82 |  | 
| Tim Small | 5a2c675 | 2007-07-19 01:49:42 -0700 | [diff] [blame] | 83 | config EDAC_I82443BXGX | 
 | 84 | 	tristate "Intel 82443BX/GX (440BX/GX)" | 
 | 85 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Andrew Morton | 28f96eea | 2007-07-19 01:49:45 -0700 | [diff] [blame] | 86 | 	depends on BROKEN | 
| Tim Small | 5a2c675 | 2007-07-19 01:49:42 -0700 | [diff] [blame] | 87 | 	help | 
 | 88 | 	  Support for error detection and correction on the Intel | 
 | 89 | 	  82443BX/GX memory controllers (440BX/GX chipsets). | 
 | 90 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 91 | config EDAC_I82875P | 
 | 92 | 	tristate "Intel 82875p (D82875P, E7210)" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 93 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 94 | 	help | 
 | 95 | 	  Support for error detection and correction on the Intel | 
 | 96 | 	  DP82785P and E7210 server chipsets. | 
 | 97 |  | 
| Ranganathan Desikan | 420390f | 2007-07-19 01:50:31 -0700 | [diff] [blame] | 98 | config EDAC_I82975X | 
 | 99 | 	tristate "Intel 82975x (D82975x)" | 
 | 100 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 101 | 	help | 
 | 102 | 	  Support for error detection and correction on the Intel | 
 | 103 | 	  DP82975x server chipsets. | 
 | 104 |  | 
| Jason Uhlenkott | 535c6a5 | 2007-07-19 01:49:48 -0700 | [diff] [blame] | 105 | config EDAC_I3000 | 
 | 106 | 	tristate "Intel 3000/3010" | 
| Jason Uhlenkott | f5c0454 | 2008-02-07 00:15:01 -0800 | [diff] [blame] | 107 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
| Jason Uhlenkott | 535c6a5 | 2007-07-19 01:49:48 -0700 | [diff] [blame] | 108 | 	help | 
 | 109 | 	  Support for error detection and correction on the Intel | 
 | 110 | 	  3000 and 3010 server chipsets. | 
 | 111 |  | 
| Hitoshi Mitake | df8bc08 | 2008-10-29 14:00:50 -0700 | [diff] [blame] | 112 | config EDAC_X38 | 
 | 113 | 	tristate "Intel X38" | 
 | 114 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 115 | 	help | 
 | 116 | 	  Support for error detection and correction on the Intel | 
 | 117 | 	  X38 server chipsets. | 
 | 118 |  | 
| Mauro Carvalho Chehab | 920c8df | 2009-01-06 14:43:00 -0800 | [diff] [blame] | 119 | config EDAC_I5400 | 
 | 120 | 	tristate "Intel 5400 (Seaburg) chipsets" | 
 | 121 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 122 | 	help | 
 | 123 | 	  Support for error detection and correction the Intel | 
 | 124 | 	  i5400 MCH chipset (Seaburg). | 
 | 125 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 126 | config EDAC_I82860 | 
 | 127 | 	tristate "Intel 82860" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 128 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 129 | 	help | 
 | 130 | 	  Support for error detection and correction on the Intel | 
 | 131 | 	  82860 chipset. | 
 | 132 |  | 
 | 133 | config EDAC_R82600 | 
 | 134 | 	tristate "Radisys 82600 embedded chipset" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 135 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 136 | 	help | 
 | 137 | 	  Support for error detection and correction on the Radisys | 
 | 138 | 	  82600 embedded chipset. | 
 | 139 |  | 
| Eric Wollesen | eb60705 | 2007-07-19 01:49:39 -0700 | [diff] [blame] | 140 | config EDAC_I5000 | 
 | 141 | 	tristate "Intel Greencreek/Blackford chipset" | 
 | 142 | 	depends on EDAC_MM_EDAC && X86 && PCI | 
 | 143 | 	help | 
 | 144 | 	  Support for error detection and correction the Intel | 
 | 145 | 	  Greekcreek/Blackford chipsets. | 
 | 146 |  | 
| Arthur Jones | 8f421c5 | 2008-07-25 01:49:04 -0700 | [diff] [blame] | 147 | config EDAC_I5100 | 
 | 148 | 	tristate "Intel San Clemente MCH" | 
 | 149 | 	depends on EDAC_MM_EDAC && X86 && PCI | 
 | 150 | 	help | 
 | 151 | 	  Support for error detection and correction the Intel | 
 | 152 | 	  San Clemente MCH. | 
 | 153 |  | 
| Dave Jiang | a9a753d | 2008-02-07 00:14:55 -0800 | [diff] [blame] | 154 | config EDAC_MPC85XX | 
 | 155 | 	tristate "Freescale MPC85xx" | 
 | 156 | 	depends on EDAC_MM_EDAC && FSL_SOC && MPC85xx | 
 | 157 | 	help | 
 | 158 | 	  Support for error detection and correction on the Freescale | 
 | 159 | 	  MPC8560, MPC8540, MPC8548 | 
 | 160 |  | 
| Dave Jiang | 4f4aeea | 2008-02-07 00:14:56 -0800 | [diff] [blame] | 161 | config EDAC_MV64X60 | 
 | 162 | 	tristate "Marvell MV64x60" | 
 | 163 | 	depends on EDAC_MM_EDAC && MV64X60 | 
 | 164 | 	help | 
 | 165 | 	  Support for error detection and correction on the Marvell | 
 | 166 | 	  MV64360 and MV64460 chipsets. | 
 | 167 |  | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 168 | config EDAC_PASEMI | 
 | 169 | 	tristate "PA Semi PWRficient" | 
 | 170 | 	depends on EDAC_MM_EDAC && PCI | 
| Doug Thompson | ddcc305 | 2007-07-26 10:41:16 -0700 | [diff] [blame] | 171 | 	depends on PPC_PASEMI | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 172 | 	help | 
 | 173 | 	  Support for error detection and correction on PA Semi | 
 | 174 | 	  PWRficient. | 
 | 175 |  | 
| Benjamin Herrenschmidt | 48764e4 | 2008-02-07 00:14:53 -0800 | [diff] [blame] | 176 | config EDAC_CELL | 
 | 177 | 	tristate "Cell Broadband Engine memory controller" | 
| Benjamin Krill | def434c | 2008-11-27 16:15:44 +0100 | [diff] [blame] | 178 | 	depends on EDAC_MM_EDAC && PPC_CELL_COMMON | 
| Benjamin Herrenschmidt | 48764e4 | 2008-02-07 00:14:53 -0800 | [diff] [blame] | 179 | 	help | 
 | 180 | 	  Support for error detection and correction on the | 
 | 181 | 	  Cell Broadband Engine internal memory controller | 
 | 182 | 	  on platform without a hypervisor | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 183 |  | 
| Grant Erickson | dba7a77 | 2009-04-02 16:58:45 -0700 | [diff] [blame^] | 184 | config EDAC_PPC4XX | 
 | 185 | 	tristate "PPC4xx IBM DDR2 Memory Controller" | 
 | 186 | 	depends on EDAC_MM_EDAC && 4xx | 
 | 187 | 	help | 
 | 188 | 	  This enables support for EDAC on the ECC memory used | 
 | 189 | 	  with the IBM DDR2 memory controller found in various | 
 | 190 | 	  PowerPC 4xx embedded processors such as the 405EX[r], | 
 | 191 | 	  440SP, 440SPe, 460EX, 460GT and 460SX. | 
 | 192 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 193 | endif # EDAC |