blob: 987fb754d6ad58daabc62ba3742f73e82f02b53d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * TLB support routines.
3 *
4 * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 *
7 * 08/02/00 A. Mallick <asit.k.mallick@intel.com>
8 * Modified RID allocation for SMP
9 * Goutham Rao <goutham.rao@intel.com>
10 * IPI based ptc implementation and A-step IPI implementation.
11 */
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/smp.h>
18#include <linux/mm.h>
19
20#include <asm/delay.h>
21#include <asm/mmu_context.h>
22#include <asm/pgalloc.h>
23#include <asm/pal.h>
24#include <asm/tlbflush.h>
25
26static struct {
27 unsigned long mask; /* mask of supported purge page-sizes */
28 unsigned long max_bits; /* log2() of largest supported purge page-size */
29} purge;
30
31struct ia64_ctx ia64_ctx = {
32 .lock = SPIN_LOCK_UNLOCKED,
33 .next = 1,
34 .limit = (1 << 15) - 1, /* start out with the safe (architected) limit */
35 .max_ctx = ~0U
36};
37
38DEFINE_PER_CPU(u8, ia64_need_tlb_flush);
39
40/*
41 * Acquire the ia64_ctx.lock before calling this function!
42 */
43void
44wrap_mmu_context (struct mm_struct *mm)
45{
46 unsigned long tsk_context, max_ctx = ia64_ctx.max_ctx;
47 struct task_struct *tsk;
48 int i;
49
50 if (ia64_ctx.next > max_ctx)
51 ia64_ctx.next = 300; /* skip daemons */
52 ia64_ctx.limit = max_ctx + 1;
53
54 /*
55 * Scan all the task's mm->context and set proper safe range
56 */
57
58 read_lock(&tasklist_lock);
59 repeat:
60 for_each_process(tsk) {
61 if (!tsk->mm)
62 continue;
63 tsk_context = tsk->mm->context;
64 if (tsk_context == ia64_ctx.next) {
65 if (++ia64_ctx.next >= ia64_ctx.limit) {
66 /* empty range: reset the range limit and start over */
67 if (ia64_ctx.next > max_ctx)
68 ia64_ctx.next = 300;
69 ia64_ctx.limit = max_ctx + 1;
70 goto repeat;
71 }
72 }
73 if ((tsk_context > ia64_ctx.next) && (tsk_context < ia64_ctx.limit))
74 ia64_ctx.limit = tsk_context;
75 }
76 read_unlock(&tasklist_lock);
77 /* can't call flush_tlb_all() here because of race condition with O(1) scheduler [EF] */
78 {
79 int cpu = get_cpu(); /* prevent preemption/migration */
hawkes@sgi.comdc565b52005-10-10 08:43:26 -070080 for_each_online_cpu(i) {
81 if (i != cpu)
Linus Torvalds1da177e2005-04-16 15:20:36 -070082 per_cpu(ia64_need_tlb_flush, i) = 1;
hawkes@sgi.comdc565b52005-10-10 08:43:26 -070083 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 put_cpu();
85 }
86 local_flush_tlb_all();
87}
88
89void
90ia64_global_tlb_purge (unsigned long start, unsigned long end, unsigned long nbits)
91{
92 static DEFINE_SPINLOCK(ptcg_lock);
93
94 /* HW requires global serialization of ptc.ga. */
95 spin_lock(&ptcg_lock);
96 {
97 do {
98 /*
99 * Flush ALAT entries also.
100 */
101 ia64_ptcga(start, (nbits<<2));
102 ia64_srlz_i();
103 start += (1UL << nbits);
104 } while (start < end);
105 }
106 spin_unlock(&ptcg_lock);
107}
108
109void
110local_flush_tlb_all (void)
111{
112 unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
113
114 addr = local_cpu_data->ptce_base;
115 count0 = local_cpu_data->ptce_count[0];
116 count1 = local_cpu_data->ptce_count[1];
117 stride0 = local_cpu_data->ptce_stride[0];
118 stride1 = local_cpu_data->ptce_stride[1];
119
120 local_irq_save(flags);
121 for (i = 0; i < count0; ++i) {
122 for (j = 0; j < count1; ++j) {
123 ia64_ptce(addr);
124 addr += stride1;
125 }
126 addr += stride0;
127 }
128 local_irq_restore(flags);
129 ia64_srlz_i(); /* srlz.i implies srlz.d */
130}
131
132void
133flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end)
134{
135 struct mm_struct *mm = vma->vm_mm;
136 unsigned long size = end - start;
137 unsigned long nbits;
138
139 if (mm != current->active_mm) {
140 /* this does happen, but perhaps it's not worth optimizing for? */
141#ifdef CONFIG_SMP
142 flush_tlb_all();
143#else
144 mm->context = 0;
145#endif
146 return;
147 }
148
149 nbits = ia64_fls(size + 0xfff);
150 while (unlikely (((1UL << nbits) & purge.mask) == 0) && (nbits < purge.max_bits))
151 ++nbits;
152 if (nbits > purge.max_bits)
153 nbits = purge.max_bits;
154 start &= ~((1UL << nbits) - 1);
155
156# ifdef CONFIG_SMP
157 platform_global_tlb_purge(start, end, nbits);
158# else
159 do {
160 ia64_ptcl(start, (nbits<<2));
161 start += (1UL << nbits);
162 } while (start < end);
163# endif
164
165 ia64_srlz_i(); /* srlz.i implies srlz.d */
166}
167EXPORT_SYMBOL(flush_tlb_range);
168
169void __devinit
170ia64_tlb_init (void)
171{
172 ia64_ptce_info_t ptce_info;
173 unsigned long tr_pgbits;
174 long status;
175
176 if ((status = ia64_pal_vm_page_size(&tr_pgbits, &purge.mask)) != 0) {
177 printk(KERN_ERR "PAL_VM_PAGE_SIZE failed with status=%ld;"
178 "defaulting to architected purge page-sizes.\n", status);
179 purge.mask = 0x115557000UL;
180 }
181 purge.max_bits = ia64_fls(purge.mask);
182
183 ia64_get_ptce(&ptce_info);
184 local_cpu_data->ptce_base = ptce_info.base;
185 local_cpu_data->ptce_count[0] = ptce_info.count[0];
186 local_cpu_data->ptce_count[1] = ptce_info.count[1];
187 local_cpu_data->ptce_stride[0] = ptce_info.stride[0];
188 local_cpu_data->ptce_stride[1] = ptce_info.stride[1];
189
190 local_flush_tlb_all(); /* nuke left overs from bootstrapping... */
191}