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Duy Truonge833aca2013-02-12 13:35:08 -08001/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
Vikram Mulukutla8810e342011-10-20 20:26:53 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#ifndef __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H
15#define __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H
16
17#include <linux/spinlock.h>
Matt Wagantalld55b90f2012-02-23 23:27:44 -080018#include <mach/clk-provider.h>
19#include <mach/clk.h>
Vikram Mulukutla8810e342011-10-20 20:26:53 -070020
21/*
22 * Generic frequency-definition structs and macros
23 */
24
25/**
26 * @freq_hz: output rate
27 * @src_clk: source clock for freq_hz
28 * @m_val: M value corresponding to freq_hz
29 * @n_val: N value corresponding to freq_hz
30 * @d_val: D value corresponding to freq_hz
31 * @div_src_val: Pre divider value and source selection mux index for freq_hz
32 * @sys_vdd: Voltage level required for freq_hz
33 */
34struct clk_freq_tbl {
35 unsigned long freq_hz;
36 struct clk *src_clk;
37 const u32 m_val;
38 const u32 n_val;
39 const u32 d_val;
Vikram Mulukutlaf6e9fe42012-08-16 16:51:08 -070040 u32 div_src_val;
Vikram Mulukutla8810e342011-10-20 20:26:53 -070041 const unsigned sys_vdd;
42};
43
44#define FREQ_END (UINT_MAX-1)
45#define F_END { .freq_hz = FREQ_END }
46
47/*
48 * Generic clock-definition struct and macros
49 */
50/**
51 * struct rcg_clk - root clock generator
52 * @cmd_rcgr_reg: command register
53 * @set_rate: function to set frequency
54 * @freq_tbl: frequency table for this RCG
55 * @current_freq: current RCG frequency
56 * @c: generic clock data
57 * @base: pointer to base address of ioremapped registers.
58 */
59struct rcg_clk {
60 const u32 cmd_rcgr_reg;
61
62 void (*set_rate)(struct rcg_clk *, struct clk_freq_tbl *);
63
64 struct clk_freq_tbl *freq_tbl;
65 struct clk_freq_tbl *current_freq;
66 struct clk c;
67
68 void *const __iomem *base;
69};
70
71static inline struct rcg_clk *to_rcg_clk(struct clk *clk)
72{
73 return container_of(clk, struct rcg_clk, c);
74}
75
76extern struct clk_freq_tbl rcg_dummy_freq;
77
78/**
79 * struct fixed_clk - fixed rate clock (used for crystal oscillators)
80 * @rate: output rate
81 * @c: clk
82 */
83struct fixed_clk {
84 struct clk c;
85};
86
87/**
88 * struct branch_clk - branch clock
89 * @set_rate: Set the frequency of this branch clock.
90 * @parent: clock source
91 * @c: clk
92 * @cbcr_reg: branch control register
93 * @bcr_reg: block reset register
94 * @has_sibling: true if other branches are derived from this branch's source
95 * @cur_div: current branch divider value
96 * @max_div: maximum branch divider value (if zero, no divider exists)
97 * @halt_check: halt checking type
98 * @base: pointer to base address of ioremapped registers.
99 */
100struct branch_clk {
101 void (*set_rate)(struct branch_clk *, struct clk_freq_tbl *);
102 struct clk *parent;
103 struct clk c;
104 const u32 cbcr_reg;
105 const u32 bcr_reg;
106 int has_sibling;
107 u32 cur_div;
108 const u32 max_div;
109 const u32 halt_check;
110 void *const __iomem *base;
111};
112
113static inline struct branch_clk *to_branch_clk(struct clk *clk)
114{
115 return container_of(clk, struct branch_clk, c);
116}
117
118/**
119 * struct local_vote_clk - Voteable branch clock
120 * @c: clk
121 * @cbcr_reg: branch control register
122 * @vote_reg: voting register
123 * @en_mask: enable mask
124 * @halt_check: halt checking type
125 * @base: pointer to base address of ioremapped registers.
126 * An on/off switch with a rate derived from the parent.
127 */
128struct local_vote_clk {
129 struct clk c;
130 const u32 cbcr_reg;
131 const u32 vote_reg;
132 const u32 bcr_reg;
133 const u32 en_mask;
134 const u32 halt_check;
135 void *const __iomem *base;
136};
137
138static inline struct local_vote_clk *to_local_vote_clk(struct clk *clk)
139{
140 return container_of(clk, struct local_vote_clk, c);
141}
142
143/**
144 * struct measure_clk - for rate measurement debug use
145 * @sample_ticks: sample period in reference clock ticks
146 * @multiplier: measurement scale-up factor
147 * @divider: measurement scale-down factor
148 * @c: clk
149*/
150struct measure_clk {
151 u64 sample_ticks;
152 u32 multiplier;
153 u32 divider;
154 struct clk c;
155};
156
Vikram Mulukutla8810e342011-10-20 20:26:53 -0700157static inline struct measure_clk *to_measure_clk(struct clk *clk)
158{
159 return container_of(clk, struct measure_clk, c);
160}
161
162/*
163 * Generic set-rate implementations
164 */
165void set_rate_mnd(struct rcg_clk *clk, struct clk_freq_tbl *nf);
166void set_rate_hid(struct rcg_clk *clk, struct clk_freq_tbl *nf);
167
168/*
169 * Variables from the clock-local driver
170 */
171extern spinlock_t local_clock_reg_lock;
172
Matt Wagantalledf2fad2012-08-06 16:11:46 -0700173extern struct clk_ops clk_ops_empty;
Vikram Mulukutla8810e342011-10-20 20:26:53 -0700174extern struct clk_ops clk_ops_rcg;
175extern struct clk_ops clk_ops_rcg_mnd;
176extern struct clk_ops clk_ops_branch;
177extern struct clk_ops clk_ops_vote;
178
Matt Wagantalledf2fad2012-08-06 16:11:46 -0700179/*
180 * Clock definition macros
181 */
182#define DEFINE_CLK_MEASURE(name) \
183 struct clk name = { \
184 .ops = &clk_ops_empty, \
185 .dbg_name = #name, \
186 CLK_INIT(name), \
187 }; \
188
Abhimanyu Kapur90ced6e2012-06-26 17:41:25 -0700189#endif /* __ARCH_ARM_MACH_MSM_CLOCK_LOCAL_2_H */
Vikram Mulukutla8810e342011-10-20 20:26:53 -0700190