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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef _MSM_KGSL_H
2#define _MSM_KGSL_H
3
4#define KGSL_VERSION_MAJOR 3
Jordan Croused4bc9d22011-11-17 13:39:21 -07005#define KGSL_VERSION_MINOR 8
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006
7/*context flags */
8#define KGSL_CONTEXT_SAVE_GMEM 1
9#define KGSL_CONTEXT_NO_GMEM_ALLOC 2
10#define KGSL_CONTEXT_SUBMIT_IB_LIST 4
11#define KGSL_CONTEXT_CTX_SWITCH 8
12
13/* Memory allocayion flags */
14#define KGSL_MEMFLAGS_GPUREADONLY 0x01000000
15
16/* generic flag values */
17#define KGSL_FLAGS_NORMALMODE 0x00000000
18#define KGSL_FLAGS_SAFEMODE 0x00000001
19#define KGSL_FLAGS_INITIALIZED0 0x00000002
20#define KGSL_FLAGS_INITIALIZED 0x00000004
21#define KGSL_FLAGS_STARTED 0x00000008
22#define KGSL_FLAGS_ACTIVE 0x00000010
23#define KGSL_FLAGS_RESERVED0 0x00000020
24#define KGSL_FLAGS_RESERVED1 0x00000040
25#define KGSL_FLAGS_RESERVED2 0x00000080
26#define KGSL_FLAGS_SOFT_RESET 0x00000100
27
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -060028/* Clock flags to show which clocks should be controled by a given platform */
29#define KGSL_CLK_SRC 0x00000001
30#define KGSL_CLK_CORE 0x00000002
31#define KGSL_CLK_IFACE 0x00000004
32#define KGSL_CLK_MEM 0x00000008
33#define KGSL_CLK_MEM_IFACE 0x00000010
34#define KGSL_CLK_AXI 0x00000020
35
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070036#define KGSL_MAX_PWRLEVELS 5
37
Suman Tatiraju0123d182011-09-30 14:59:06 -070038#define KGSL_CONVERT_TO_MBPS(val) \
39 (val*1000*1000U)
40
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070041/* device id */
42enum kgsl_deviceid {
43 KGSL_DEVICE_3D0 = 0x00000000,
44 KGSL_DEVICE_2D0 = 0x00000001,
45 KGSL_DEVICE_2D1 = 0x00000002,
46 KGSL_DEVICE_MAX = 0x00000003
47};
48
49enum kgsl_user_mem_type {
50 KGSL_USER_MEM_TYPE_PMEM = 0x00000000,
51 KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001,
Jordan Crouse8eab35a2011-10-12 16:57:48 -060052 KGSL_USER_MEM_TYPE_ADDR = 0x00000002,
53 KGSL_USER_MEM_TYPE_ION = 0x00000003,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070054};
55
56struct kgsl_devinfo {
57
58 unsigned int device_id;
59 /* chip revision id
60 * coreid:8 majorrev:8 minorrev:8 patch:8
61 */
62 unsigned int chip_id;
63 unsigned int mmu_enabled;
64 unsigned int gmem_gpubaseaddr;
65 /*
66 * This field contains the adreno revision
67 * number 200, 205, 220, etc...
68 */
69 unsigned int gpu_id;
70 unsigned int gmem_sizebytes;
71};
72
73/* this structure defines the region of memory that can be mmap()ed from this
74 driver. The timestamp fields are volatile because they are written by the
75 GPU
76*/
77struct kgsl_devmemstore {
78 volatile unsigned int soptimestamp;
79 unsigned int sbz;
80 volatile unsigned int eoptimestamp;
81 unsigned int sbz2;
82 volatile unsigned int ts_cmp_enable;
83 unsigned int sbz3;
84 volatile unsigned int ref_wait_ts;
85 unsigned int sbz4;
86 unsigned int current_context;
87 unsigned int sbz5;
88};
89
90#define KGSL_DEVICE_MEMSTORE_OFFSET(field) \
91 offsetof(struct kgsl_devmemstore, field)
92
93
94/* timestamp id*/
95enum kgsl_timestamp_type {
96 KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */
97 KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/
98 KGSL_TIMESTAMP_MAX = 0x00000002,
99};
100
101/* property types - used with kgsl_device_getproperty */
102enum kgsl_property_type {
103 KGSL_PROP_DEVICE_INFO = 0x00000001,
104 KGSL_PROP_DEVICE_SHADOW = 0x00000002,
105 KGSL_PROP_DEVICE_POWER = 0x00000003,
106 KGSL_PROP_SHMEM = 0x00000004,
107 KGSL_PROP_SHMEM_APERTURES = 0x00000005,
108 KGSL_PROP_MMU_ENABLE = 0x00000006,
109 KGSL_PROP_INTERRUPT_WAITS = 0x00000007,
110 KGSL_PROP_VERSION = 0x00000008,
111};
112
113struct kgsl_shadowprop {
114 unsigned int gpuaddr;
115 unsigned int size;
116 unsigned int flags; /* contains KGSL_FLAGS_ values */
117};
118
119struct kgsl_pwrlevel {
120 unsigned int gpu_freq;
121 unsigned int bus_freq;
Lucille Sylvester596d4c22011-10-19 18:04:01 -0600122 unsigned int io_fraction;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700123};
124
125struct kgsl_version {
126 unsigned int drv_major;
127 unsigned int drv_minor;
128 unsigned int dev_major;
129 unsigned int dev_minor;
130};
131
132#ifdef __KERNEL__
133
134#define KGSL_3D0_REG_MEMORY "kgsl_3d0_reg_memory"
135#define KGSL_3D0_IRQ "kgsl_3d0_irq"
136#define KGSL_2D0_REG_MEMORY "kgsl_2d0_reg_memory"
137#define KGSL_2D0_IRQ "kgsl_2d0_irq"
138#define KGSL_2D1_REG_MEMORY "kgsl_2d1_reg_memory"
139#define KGSL_2D1_IRQ "kgsl_2d1_irq"
140
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600141struct kgsl_device_platform_data {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700142 struct kgsl_pwrlevel pwrlevel[KGSL_MAX_PWRLEVELS];
143 int init_level;
144 int num_levels;
145 int (*set_grp_async)(void);
146 unsigned int idle_timeout;
147 unsigned int nap_allowed;
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600148 unsigned int clk_map;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700149 struct msm_bus_scale_pdata *bus_scale_table;
Shubhraprakash Das767fdda2011-08-15 15:49:45 -0600150 const char *iommu_user_ctx_name;
151 const char *iommu_priv_ctx_name;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700152};
153
154#endif
155
156/* structure holds list of ibs */
157struct kgsl_ibdesc {
158 unsigned int gpuaddr;
159 void *hostptr;
160 unsigned int sizedwords;
161 unsigned int ctrl;
162};
163
164/* ioctls */
165#define KGSL_IOC_TYPE 0x09
166
167/* get misc info about the GPU
168 type should be a value from enum kgsl_property_type
169 value points to a structure that varies based on type
170 sizebytes is sizeof() that structure
171 for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo
172 this structure contaings hardware versioning info.
173 for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop
174 this is used to find mmap() offset and sizes for mapping
175 struct kgsl_memstore into userspace.
176*/
177struct kgsl_device_getproperty {
178 unsigned int type;
179 void *value;
180 unsigned int sizebytes;
181};
182
183#define IOCTL_KGSL_DEVICE_GETPROPERTY \
184 _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty)
185
186
187/* read a GPU register.
188 offsetwords it the 32 bit word offset from the beginning of the
189 GPU register space.
190 */
191struct kgsl_device_regread {
192 unsigned int offsetwords;
193 unsigned int value; /* output param */
194};
195
196#define IOCTL_KGSL_DEVICE_REGREAD \
197 _IOWR(KGSL_IOC_TYPE, 0x3, struct kgsl_device_regread)
198
199
200/* block until the GPU has executed past a given timestamp
201 * timeout is in milliseconds.
202 */
203struct kgsl_device_waittimestamp {
204 unsigned int timestamp;
205 unsigned int timeout;
206};
207
208#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \
209 _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp)
210
211
212/* issue indirect commands to the GPU.
213 * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE
214 * ibaddr and sizedwords must specify a subset of a buffer created
215 * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM
216 * flags may be a mask of KGSL_CONTEXT_ values
217 * timestamp is a returned counter value which can be passed to
218 * other ioctls to determine when the commands have been executed by
219 * the GPU.
220 */
221struct kgsl_ringbuffer_issueibcmds {
222 unsigned int drawctxt_id;
223 unsigned int ibdesc_addr;
224 unsigned int numibs;
225 unsigned int timestamp; /*output param */
226 unsigned int flags;
227};
228
229#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \
230 _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds)
231
232/* read the most recently executed timestamp value
233 * type should be a value from enum kgsl_timestamp_type
234 */
235struct kgsl_cmdstream_readtimestamp {
236 unsigned int type;
237 unsigned int timestamp; /*output param */
238};
239
Jason Varbedian80ba33d2011-07-11 17:29:05 -0700240#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700241 _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
242
Jason Varbedian80ba33d2011-07-11 17:29:05 -0700243#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \
244 _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
245
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700246/* free memory when the GPU reaches a given timestamp.
247 * gpuaddr specify a memory region created by a
248 * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call
249 * type should be a value from enum kgsl_timestamp_type
250 */
251struct kgsl_cmdstream_freememontimestamp {
252 unsigned int gpuaddr;
253 unsigned int type;
254 unsigned int timestamp;
255};
256
257#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \
258 _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
259
260/* Previous versions of this header had incorrectly defined
261 IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP as a read-only ioctl instead
262 of a write only ioctl. To ensure binary compatability, the following
263 #define will be used to intercept the incorrect ioctl
264*/
265
266#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD \
267 _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
268
269/* create a draw context, which is used to preserve GPU state.
270 * The flags field may contain a mask KGSL_CONTEXT_* values
271 */
272struct kgsl_drawctxt_create {
273 unsigned int flags;
274 unsigned int drawctxt_id; /*output param */
275};
276
277#define IOCTL_KGSL_DRAWCTXT_CREATE \
278 _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create)
279
280/* destroy a draw context */
281struct kgsl_drawctxt_destroy {
282 unsigned int drawctxt_id;
283};
284
285#define IOCTL_KGSL_DRAWCTXT_DESTROY \
286 _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy)
287
288/* add a block of pmem, fb, ashmem or user allocated address
289 * into the GPU address space */
290struct kgsl_map_user_mem {
291 int fd;
292 unsigned int gpuaddr; /*output param */
293 unsigned int len;
294 unsigned int offset;
295 unsigned int hostptr; /*input param */
296 enum kgsl_user_mem_type memtype;
297 unsigned int reserved; /* May be required to add
298 params for another mem type */
299};
300
301#define IOCTL_KGSL_MAP_USER_MEM \
302 _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem)
303
304/* add a block of pmem or fb into the GPU address space */
305struct kgsl_sharedmem_from_pmem {
306 int pmem_fd;
307 unsigned int gpuaddr; /*output param */
308 unsigned int len;
309 unsigned int offset;
310};
311
312#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \
313 _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem)
314
315/* remove memory from the GPU's address space */
316struct kgsl_sharedmem_free {
317 unsigned int gpuaddr;
318};
319
320#define IOCTL_KGSL_SHAREDMEM_FREE \
321 _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free)
322
Sushmita Susheelendra41f8fa32011-05-11 17:15:58 -0600323struct kgsl_cff_user_event {
324 unsigned char cff_opcode;
325 unsigned int op1;
326 unsigned int op2;
327 unsigned int op3;
328 unsigned int op4;
329 unsigned int op5;
330 unsigned int __pad[2];
331};
332
333#define IOCTL_KGSL_CFF_USER_EVENT \
334 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700335
336struct kgsl_gmem_desc {
337 unsigned int x;
338 unsigned int y;
339 unsigned int width;
340 unsigned int height;
341 unsigned int pitch;
342};
343
344struct kgsl_buffer_desc {
345 void *hostptr;
346 unsigned int gpuaddr;
347 int size;
348 unsigned int format;
349 unsigned int pitch;
350 unsigned int enabled;
351};
352
353struct kgsl_bind_gmem_shadow {
354 unsigned int drawctxt_id;
355 struct kgsl_gmem_desc gmem_desc;
356 unsigned int shadow_x;
357 unsigned int shadow_y;
358 struct kgsl_buffer_desc shadow_buffer;
359 unsigned int buffer_id;
360};
361
362#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \
363 _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow)
364
365/* add a block of memory into the GPU address space */
366struct kgsl_sharedmem_from_vmalloc {
367 unsigned int gpuaddr; /*output param */
368 unsigned int hostptr;
369 unsigned int flags;
370};
371
372#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \
373 _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc)
374
375#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \
376 _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free)
377
378struct kgsl_drawctxt_set_bin_base_offset {
379 unsigned int drawctxt_id;
380 unsigned int offset;
381};
382
383#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \
384 _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset)
385
386enum kgsl_cmdwindow_type {
387 KGSL_CMDWINDOW_MIN = 0x00000000,
388 KGSL_CMDWINDOW_2D = 0x00000000,
389 KGSL_CMDWINDOW_3D = 0x00000001, /* legacy */
390 KGSL_CMDWINDOW_MMU = 0x00000002,
391 KGSL_CMDWINDOW_ARBITER = 0x000000FF,
392 KGSL_CMDWINDOW_MAX = 0x000000FF,
393};
394
395/* write to the command window */
396struct kgsl_cmdwindow_write {
397 enum kgsl_cmdwindow_type target;
398 unsigned int addr;
399 unsigned int data;
400};
401
402#define IOCTL_KGSL_CMDWINDOW_WRITE \
403 _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write)
404
405struct kgsl_gpumem_alloc {
406 unsigned long gpuaddr;
407 size_t size;
408 unsigned int flags;
409};
410
411#define IOCTL_KGSL_GPUMEM_ALLOC \
412 _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc)
413
Jeremy Gebbena7423e42011-04-18 15:11:21 -0600414struct kgsl_cff_syncmem {
415 unsigned int gpuaddr;
416 unsigned int len;
417 unsigned int __pad[2]; /* For future binary compatibility */
418};
419
420#define IOCTL_KGSL_CFF_SYNCMEM \
421 _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem)
422
Jordan Croused4bc9d22011-11-17 13:39:21 -0700423/*
424 * A timestamp event allows the user space to register an action following an
425 * expired timestamp.
426 */
427
428struct kgsl_timestamp_event {
429 int type; /* Type of event (see list below) */
430 unsigned int timestamp; /* Timestamp to trigger event on */
431 unsigned int context_id; /* Context for the timestamp */
432 void *priv; /* Pointer to the event specific blob */
433 size_t len; /* Size of the event specific blob */
434};
435
436#define IOCTL_KGSL_TIMESTAMP_EVENT \
437 _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event)
438
439/* A genlock timestamp event releases an existing lock on timestamp expire */
440
441#define KGSL_TIMESTAMP_EVENT_GENLOCK 1
442
443struct kgsl_timestamp_event_genlock {
444 int handle; /* Handle of the genlock lock to release */
445};
446
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447#ifdef __KERNEL__
448#ifdef CONFIG_MSM_KGSL_DRM
449int kgsl_gem_obj_addr(int drm_fd, int handle, unsigned long *start,
450 unsigned long *len);
451#else
452#define kgsl_gem_obj_addr(...) 0
453#endif
454#endif
455#endif /* _MSM_KGSL_H */