| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 1 | # | 
 | 2 | #	EDAC Kconfig | 
| Doug Thompson | 4577ca5 | 2009-04-02 16:58:43 -0700 | [diff] [blame] | 3 | #	Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 4 | #	Licensed and distributed under the GPL | 
 | 5 | # | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 6 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 7 | menuconfig EDAC | 
| GeunSik Lim | e24aca6 | 2009-06-17 16:28:02 -0700 | [diff] [blame] | 8 | 	bool "EDAC (Error Detection And Correction) reporting" | 
| Martin Schwidefsky | e25df12 | 2007-05-10 15:45:57 +0200 | [diff] [blame] | 9 | 	depends on HAS_IOMEM | 
| Andrew Morton | 4c6a1c1 | 2007-07-26 10:41:10 -0700 | [diff] [blame] | 10 | 	depends on X86 || PPC | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 11 | 	help | 
 | 12 | 	  EDAC is designed to report errors in the core system. | 
 | 13 | 	  These are low-level errors that are reported in the CPU or | 
| Douglas Thompson | 8cb2a39 | 2007-07-19 01:50:12 -0700 | [diff] [blame] | 14 | 	  supporting chipset or other subsystems: | 
 | 15 | 	  memory errors, cache errors, PCI errors, thermal throttling, etc.. | 
 | 16 | 	  If unsure, select 'Y'. | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 17 |  | 
| Tim Small | 57c432b | 2006-03-09 17:33:50 -0800 | [diff] [blame] | 18 | 	  If this code is reporting problems on your system, please | 
 | 19 | 	  see the EDAC project web pages for more information at: | 
 | 20 |  | 
 | 21 | 	  <http://bluesmoke.sourceforge.net/> | 
 | 22 |  | 
 | 23 | 	  and: | 
 | 24 |  | 
 | 25 | 	  <http://buttersideup.com/edacwiki> | 
 | 26 |  | 
 | 27 | 	  There is also a mailing list for the EDAC project, which can | 
 | 28 | 	  be found via the sourceforge page. | 
 | 29 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 30 | if EDAC | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 31 |  | 
 | 32 | comment "Reporting subsystems" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 33 |  | 
 | 34 | config EDAC_DEBUG | 
 | 35 | 	bool "Debugging" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 36 | 	help | 
 | 37 | 	  This turns on debugging information for the entire EDAC | 
 | 38 | 	  sub-system. You can insert module with "debug_level=x", current | 
 | 39 | 	  there're four debug levels (x=0,1,2,3 from low to high). | 
 | 40 | 	  Usually you should select 'N'. | 
 | 41 |  | 
| Hitoshi Mitake | cc18e3c | 2009-04-02 16:58:43 -0700 | [diff] [blame] | 42 | config EDAC_DEBUG_VERBOSE | 
 | 43 | 	bool "More verbose debugging" | 
 | 44 | 	depends on EDAC_DEBUG | 
 | 45 | 	help | 
 | 46 | 	  This option makes debugging information more verbose. | 
 | 47 | 	  Source file name and line number where debugging message | 
 | 48 | 	  printed will be added to debugging message. | 
 | 49 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 50 | config EDAC_MM_EDAC | 
 | 51 | 	tristate "Main Memory EDAC (Error Detection And Correction) reporting" | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 52 | 	help | 
 | 53 | 	  Some systems are able to detect and correct errors in main | 
 | 54 | 	  memory.  EDAC can report statistics on memory error | 
 | 55 | 	  detection and correction (EDAC - or commonly referred to ECC | 
 | 56 | 	  errors).  EDAC will also try to decode where these errors | 
 | 57 | 	  occurred so that a particular failing memory module can be | 
 | 58 | 	  replaced.  If unsure, select 'Y'. | 
 | 59 |  | 
| Doug Thompson | 7d6034d | 2009-04-27 20:01:01 +0200 | [diff] [blame] | 60 | config EDAC_AMD64 | 
 | 61 | 	tristate "AMD64 (Opteron, Athlon64) K8, F10h, F11h" | 
| Ingo Molnar | b9183f9 | 2009-09-15 15:56:32 +0200 | [diff] [blame] | 62 | 	depends on EDAC_MM_EDAC && K8_NB && X86_64 && PCI && CPU_SUP_AMD | 
| Doug Thompson | 7d6034d | 2009-04-27 20:01:01 +0200 | [diff] [blame] | 63 | 	help | 
| Borislav Petkov | 3d37329 | 2009-05-20 20:18:46 +0200 | [diff] [blame] | 64 | 	  Support for error detection and correction on the AMD 64 | 
 | 65 | 	  Families of Memory Controllers (K8, F10h and F11h) | 
| Doug Thompson | 7d6034d | 2009-04-27 20:01:01 +0200 | [diff] [blame] | 66 |  | 
 | 67 | config EDAC_AMD64_ERROR_INJECTION | 
 | 68 | 	bool "Sysfs Error Injection facilities" | 
 | 69 | 	depends on EDAC_AMD64 | 
 | 70 | 	help | 
 | 71 | 	  Recent Opterons (Family 10h and later) provide for Memory Error | 
 | 72 | 	  Injection into the ECC detection circuits. The amd64_edac module | 
 | 73 | 	  allows the operator/user to inject Uncorrectable and Correctable | 
 | 74 | 	  errors into DRAM. | 
 | 75 |  | 
 | 76 | 	  When enabled, in each of the respective memory controller directories | 
 | 77 | 	  (/sys/devices/system/edac/mc/mcX), there are 3 input files: | 
 | 78 |  | 
 | 79 | 	  - inject_section (0..3, 16-byte section of 64-byte cacheline), | 
 | 80 | 	  - inject_word (0..8, 16-bit word of 16-byte section), | 
 | 81 | 	  - inject_ecc_vector (hex ecc vector: select bits of inject word) | 
 | 82 |  | 
 | 83 | 	  In addition, there are two control files, inject_read and inject_write, | 
 | 84 | 	  which trigger the DRAM ECC Read and Write respectively. | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 85 |  | 
 | 86 | config EDAC_AMD76X | 
 | 87 | 	tristate "AMD 76x (760, 762, 768)" | 
| Dave Jones | 90cbc45 | 2006-02-03 03:04:11 -0800 | [diff] [blame] | 88 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 89 | 	help | 
 | 90 | 	  Support for error detection and correction on the AMD 76x | 
 | 91 | 	  series of chipsets used with the Athlon processor. | 
 | 92 |  | 
 | 93 | config EDAC_E7XXX | 
 | 94 | 	tristate "Intel e7xxx (e7205, e7500, e7501, e7505)" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 95 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 96 | 	help | 
 | 97 | 	  Support for error detection and correction on the Intel | 
 | 98 | 	  E7205, E7500, E7501 and E7505 server chipsets. | 
 | 99 |  | 
 | 100 | config EDAC_E752X | 
| Andrei Konovalov | 5135b79 | 2008-04-29 01:03:13 -0700 | [diff] [blame] | 101 | 	tristate "Intel e752x (e7520, e7525, e7320) and 3100" | 
| Randy Dunlap | da960a6 | 2006-03-31 02:30:34 -0800 | [diff] [blame] | 102 | 	depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 103 | 	help | 
 | 104 | 	  Support for error detection and correction on the Intel | 
 | 105 | 	  E7520, E7525, E7320 server chipsets. | 
 | 106 |  | 
| Tim Small | 5a2c675 | 2007-07-19 01:49:42 -0700 | [diff] [blame] | 107 | config EDAC_I82443BXGX | 
 | 108 | 	tristate "Intel 82443BX/GX (440BX/GX)" | 
 | 109 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Andrew Morton | 28f96eea | 2007-07-19 01:49:45 -0700 | [diff] [blame] | 110 | 	depends on BROKEN | 
| Tim Small | 5a2c675 | 2007-07-19 01:49:42 -0700 | [diff] [blame] | 111 | 	help | 
 | 112 | 	  Support for error detection and correction on the Intel | 
 | 113 | 	  82443BX/GX memory controllers (440BX/GX chipsets). | 
 | 114 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 115 | config EDAC_I82875P | 
 | 116 | 	tristate "Intel 82875p (D82875P, E7210)" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 117 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 118 | 	help | 
 | 119 | 	  Support for error detection and correction on the Intel | 
 | 120 | 	  DP82785P and E7210 server chipsets. | 
 | 121 |  | 
| Ranganathan Desikan | 420390f | 2007-07-19 01:50:31 -0700 | [diff] [blame] | 122 | config EDAC_I82975X | 
 | 123 | 	tristate "Intel 82975x (D82975x)" | 
 | 124 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 125 | 	help | 
 | 126 | 	  Support for error detection and correction on the Intel | 
 | 127 | 	  DP82975x server chipsets. | 
 | 128 |  | 
| Jason Uhlenkott | 535c6a5 | 2007-07-19 01:49:48 -0700 | [diff] [blame] | 129 | config EDAC_I3000 | 
 | 130 | 	tristate "Intel 3000/3010" | 
| Jason Uhlenkott | f5c0454 | 2008-02-07 00:15:01 -0800 | [diff] [blame] | 131 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
| Jason Uhlenkott | 535c6a5 | 2007-07-19 01:49:48 -0700 | [diff] [blame] | 132 | 	help | 
 | 133 | 	  Support for error detection and correction on the Intel | 
 | 134 | 	  3000 and 3010 server chipsets. | 
 | 135 |  | 
| Jason Uhlenkott | dd8ef1d | 2009-09-23 15:57:27 -0700 | [diff] [blame^] | 136 | config EDAC_I3200 | 
 | 137 | 	tristate "Intel 3200" | 
 | 138 | 	depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL | 
 | 139 | 	help | 
 | 140 | 	  Support for error detection and correction on the Intel | 
 | 141 | 	  3200 and 3210 server chipsets. | 
 | 142 |  | 
| Hitoshi Mitake | df8bc08 | 2008-10-29 14:00:50 -0700 | [diff] [blame] | 143 | config EDAC_X38 | 
 | 144 | 	tristate "Intel X38" | 
 | 145 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 146 | 	help | 
 | 147 | 	  Support for error detection and correction on the Intel | 
 | 148 | 	  X38 server chipsets. | 
 | 149 |  | 
| Mauro Carvalho Chehab | 920c8df | 2009-01-06 14:43:00 -0800 | [diff] [blame] | 150 | config EDAC_I5400 | 
 | 151 | 	tristate "Intel 5400 (Seaburg) chipsets" | 
 | 152 | 	depends on EDAC_MM_EDAC && PCI && X86 | 
 | 153 | 	help | 
 | 154 | 	  Support for error detection and correction the Intel | 
 | 155 | 	  i5400 MCH chipset (Seaburg). | 
 | 156 |  | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 157 | config EDAC_I82860 | 
 | 158 | 	tristate "Intel 82860" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 159 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 160 | 	help | 
 | 161 | 	  Support for error detection and correction on the Intel | 
 | 162 | 	  82860 chipset. | 
 | 163 |  | 
 | 164 | config EDAC_R82600 | 
 | 165 | 	tristate "Radisys 82600 embedded chipset" | 
| Dave Peterson | 39f1d8d | 2006-03-26 01:38:50 -0800 | [diff] [blame] | 166 | 	depends on EDAC_MM_EDAC && PCI && X86_32 | 
| Alan Cox | da9bb1d | 2006-01-18 17:44:13 -0800 | [diff] [blame] | 167 | 	help | 
 | 168 | 	  Support for error detection and correction on the Radisys | 
 | 169 | 	  82600 embedded chipset. | 
 | 170 |  | 
| Eric Wollesen | eb60705 | 2007-07-19 01:49:39 -0700 | [diff] [blame] | 171 | config EDAC_I5000 | 
 | 172 | 	tristate "Intel Greencreek/Blackford chipset" | 
 | 173 | 	depends on EDAC_MM_EDAC && X86 && PCI | 
 | 174 | 	help | 
 | 175 | 	  Support for error detection and correction the Intel | 
 | 176 | 	  Greekcreek/Blackford chipsets. | 
 | 177 |  | 
| Arthur Jones | 8f421c5 | 2008-07-25 01:49:04 -0700 | [diff] [blame] | 178 | config EDAC_I5100 | 
 | 179 | 	tristate "Intel San Clemente MCH" | 
 | 180 | 	depends on EDAC_MM_EDAC && X86 && PCI | 
 | 181 | 	help | 
 | 182 | 	  Support for error detection and correction the Intel | 
 | 183 | 	  San Clemente MCH. | 
 | 184 |  | 
| Dave Jiang | a9a753d | 2008-02-07 00:14:55 -0800 | [diff] [blame] | 185 | config EDAC_MPC85XX | 
| Ira W. Snyder | b484625 | 2009-09-23 15:57:25 -0700 | [diff] [blame] | 186 | 	tristate "Freescale MPC83xx / MPC85xx" | 
 | 187 | 	depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx) | 
| Dave Jiang | a9a753d | 2008-02-07 00:14:55 -0800 | [diff] [blame] | 188 | 	help | 
 | 189 | 	  Support for error detection and correction on the Freescale | 
| Ira W. Snyder | b484625 | 2009-09-23 15:57:25 -0700 | [diff] [blame] | 190 | 	  MPC8349, MPC8560, MPC8540, MPC8548 | 
| Dave Jiang | a9a753d | 2008-02-07 00:14:55 -0800 | [diff] [blame] | 191 |  | 
| Dave Jiang | 4f4aeea | 2008-02-07 00:14:56 -0800 | [diff] [blame] | 192 | config EDAC_MV64X60 | 
 | 193 | 	tristate "Marvell MV64x60" | 
 | 194 | 	depends on EDAC_MM_EDAC && MV64X60 | 
 | 195 | 	help | 
 | 196 | 	  Support for error detection and correction on the Marvell | 
 | 197 | 	  MV64360 and MV64460 chipsets. | 
 | 198 |  | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 199 | config EDAC_PASEMI | 
 | 200 | 	tristate "PA Semi PWRficient" | 
 | 201 | 	depends on EDAC_MM_EDAC && PCI | 
| Doug Thompson | ddcc305 | 2007-07-26 10:41:16 -0700 | [diff] [blame] | 202 | 	depends on PPC_PASEMI | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 203 | 	help | 
 | 204 | 	  Support for error detection and correction on PA Semi | 
 | 205 | 	  PWRficient. | 
 | 206 |  | 
| Benjamin Herrenschmidt | 48764e4 | 2008-02-07 00:14:53 -0800 | [diff] [blame] | 207 | config EDAC_CELL | 
 | 208 | 	tristate "Cell Broadband Engine memory controller" | 
| Benjamin Krill | def434c | 2008-11-27 16:15:44 +0100 | [diff] [blame] | 209 | 	depends on EDAC_MM_EDAC && PPC_CELL_COMMON | 
| Benjamin Herrenschmidt | 48764e4 | 2008-02-07 00:14:53 -0800 | [diff] [blame] | 210 | 	help | 
 | 211 | 	  Support for error detection and correction on the | 
 | 212 | 	  Cell Broadband Engine internal memory controller | 
 | 213 | 	  on platform without a hypervisor | 
| Egor Martovetsky | 7d8536f | 2007-07-19 01:50:24 -0700 | [diff] [blame] | 214 |  | 
| Grant Erickson | dba7a77 | 2009-04-02 16:58:45 -0700 | [diff] [blame] | 215 | config EDAC_PPC4XX | 
 | 216 | 	tristate "PPC4xx IBM DDR2 Memory Controller" | 
 | 217 | 	depends on EDAC_MM_EDAC && 4xx | 
 | 218 | 	help | 
 | 219 | 	  This enables support for EDAC on the ECC memory used | 
 | 220 | 	  with the IBM DDR2 memory controller found in various | 
 | 221 | 	  PowerPC 4xx embedded processors such as the 405EX[r], | 
 | 222 | 	  440SP, 440SPe, 460EX, 460GT and 460SX. | 
 | 223 |  | 
| Harry Ciao | e876558 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 224 | config EDAC_AMD8131 | 
 | 225 | 	tristate "AMD8131 HyperTransport PCI-X Tunnel" | 
| Harry Ciao | 715fe7a | 2009-05-28 14:34:43 -0700 | [diff] [blame] | 226 | 	depends on EDAC_MM_EDAC && PCI && PPC_MAPLE | 
| Harry Ciao | e876558 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 227 | 	help | 
 | 228 | 	  Support for error detection and correction on the | 
 | 229 | 	  AMD8131 HyperTransport PCI-X Tunnel chip. | 
| Harry Ciao | 715fe7a | 2009-05-28 14:34:43 -0700 | [diff] [blame] | 230 | 	  Note, add more Kconfig dependency if it's adopted | 
 | 231 | 	  on some machine other than Maple. | 
| Harry Ciao | e876558 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 232 |  | 
| Harry Ciao | 58b4ce6 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 233 | config EDAC_AMD8111 | 
 | 234 | 	tristate "AMD8111 HyperTransport I/O Hub" | 
| Harry Ciao | 715fe7a | 2009-05-28 14:34:43 -0700 | [diff] [blame] | 235 | 	depends on EDAC_MM_EDAC && PCI && PPC_MAPLE | 
| Harry Ciao | 58b4ce6 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 236 | 	help | 
 | 237 | 	  Support for error detection and correction on the | 
 | 238 | 	  AMD8111 HyperTransport I/O Hub chip. | 
| Harry Ciao | 715fe7a | 2009-05-28 14:34:43 -0700 | [diff] [blame] | 239 | 	  Note, add more Kconfig dependency if it's adopted | 
 | 240 | 	  on some machine other than Maple. | 
| Harry Ciao | 58b4ce6 | 2009-04-02 16:58:51 -0700 | [diff] [blame] | 241 |  | 
| Harry Ciao | 2a9036a | 2009-06-17 16:27:58 -0700 | [diff] [blame] | 242 | config EDAC_CPC925 | 
 | 243 | 	tristate "IBM CPC925 Memory Controller (PPC970FX)" | 
 | 244 | 	depends on EDAC_MM_EDAC && PPC64 | 
 | 245 | 	help | 
 | 246 | 	  Support for error detection and correction on the | 
 | 247 | 	  IBM CPC925 Bridge and Memory Controller, which is | 
 | 248 | 	  a companion chip to the PowerPC 970 family of | 
 | 249 | 	  processors. | 
 | 250 |  | 
| Jan Engelhardt | 751cb5e | 2007-07-15 23:39:27 -0700 | [diff] [blame] | 251 | endif # EDAC |