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review.evervolv.com / android_kernel_htc_msm8960 / dda034bcb51a0a28318046d74d664e0fc5f7d1d4 / . / arch / powerpc / boot / dts / mpc8272ads.dts
blob: 423eedcf634f6be2e07ab64c108dceb935678803 [file] [log] [blame]
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]1/*
2 * MPC8272 ADS Device Tree Source
3 *
4 * Copyright 2005 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8272ADS";
14 compatible = "MPC8260ADS";
15 #address-cells = <1>;
16 #size-cells = <1>;
17 linux,phandle = <100>;
18
19 cpus {
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]20 #address-cells = <1>;
21 #size-cells = <0>;
22 linux,phandle = <200>;
23
24 PowerPC,8272@0 {
25 device_type = "cpu";
26 reg = <0>;
27 d-cache-line-size = <20>; // 32 bytes
28 i-cache-line-size = <20>; // 32 bytes
29 d-cache-size = <4000>; // L1, 16K
30 i-cache-size = <4000>; // L1, 16K
31 timebase-frequency = <0>;
32 bus-frequency = <0>;
33 clock-frequency = <0>;
34 32-bit;
35 linux,phandle = <201>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]36 };
37 };
38
39 interrupt-controller@f8200000 {
40 linux,phandle = <f8200000>;
41 #address-cells = <0>;
42 #interrupt-cells = <2>;
43 interrupt-controller;
44 reg = <f8200000 f8200004>;
45 built-in;
46 device_type = "pci-pic";
47 };
48 memory {
49 device_type = "memory";
50 linux,phandle = <300>;
51 reg = <00000000 4000000 f4500000 00000020>;
52 };
53
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]54 chosen {
55 name = "chosen";
56 linux,platform = <0>;
57 interrupt-controller = <10c00>;
58 linux,phandle = <400>;
59 };
60
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]61 soc8272@f0000000 {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 #interrupt-cells = <2>;
65 device_type = "soc";
Vitaly Bordug54278282007-01-31 02:09:00 +0300[diff] [blame]66 ranges = <00000000 f0000000 00053000>;
67 reg = <f0000000 10000>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]68
69 mdio@0 {
70 device_type = "mdio";
71 compatible = "fs_enet";
72 reg = <0 0>;
73 linux,phandle = <24520>;
74 #address-cells = <1>;
75 #size-cells = <0>;
76 ethernet-phy@0 {
77 linux,phandle = <2452000>;
78 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]79 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]80 reg = <0>;
81 bitbang = [ 12 12 13 02 02 01 ];
82 device_type = "ethernet-phy";
83 };
84 ethernet-phy@1 {
85 linux,phandle = <2452001>;
86 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]87 interrupts = <17 4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]88 bitbang = [ 12 12 13 02 02 01 ];
89 reg = <3>;
90 device_type = "ethernet-phy";
91 };
92 };
93
94 ethernet@24000 {
95 #address-cells = <1>;
96 #size-cells = <0>;
97 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]98 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]99 compatible = "fs_enet";
100 model = "FCC";
101 reg = <11300 20 8400 100 11380 30>;
102 mac-address = [ 00 11 2F 99 43 54 ];
103 interrupts = <20 2>;
104 interrupt-parent = <10c00>;
105 phy-handle = <2452000>;
106 rx-clock = <13>;
107 tx-clock = <12>;
108 };
109
110 ethernet@25000 {
111 device_type = "network";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]112 device-id = <2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]113 compatible = "fs_enet";
114 model = "FCC";
115 reg = <11320 20 8500 100 113b0 30>;
116 mac-address = [ 00 11 2F 99 44 54 ];
117 interrupts = <21 2>;
118 interrupt-parent = <10c00>;
119 phy-handle = <2452001>;
120 rx-clock = <17>;
121 tx-clock = <18>;
122 };
123
124 cpm@f0000000 {
125 linux,phandle = <f0000000>;
126 #address-cells = <1>;
127 #size-cells = <1>;
128 #interrupt-cells = <2>;
129 device_type = "cpm";
130 model = "CPM2";
Vitaly Bordug54278282007-01-31 02:09:00 +0300[diff] [blame]131 ranges = <00000000 00000000 20000>;
132 reg = <0 20000>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]133 command-proc = <119c0>;
134 brg-frequency = <17D7840>;
135 cpm_clk = <BEBC200>;
136
137 scc@11a00 {
138 device_type = "serial";
139 compatible = "cpm_uart";
140 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]141 device-id = <1>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]142 reg = <11a00 20 8000 100>;
143 current-speed = <1c200>;
144 interrupts = <28 2>;
145 interrupt-parent = <10c00>;
146 clock-setup = <0 00ffffff>;
147 rx-clock = <1>;
148 tx-clock = <1>;
149 };
150
151 scc@11a60 {
152 device_type = "serial";
153 compatible = "cpm_uart";
154 model = "SCC";
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]155 device-id = <4>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]156 reg = <11a60 20 8300 100>;
157 current-speed = <1c200>;
158 interrupts = <2b 2>;
159 interrupt-parent = <10c00>;
160 clock-setup = <1b ffffff00>;
161 rx-clock = <4>;
162 tx-clock = <4>;
163 };
164
165 };
166 interrupt-controller@10c00 {
167 linux,phandle = <10c00>;
168 #address-cells = <0>;
169 #interrupt-cells = <2>;
170 interrupt-controller;
171 reg = <10c00 80>;
172 built-in;
173 device_type = "cpm-pic";
174 compatible = "CPM2";
175 };
176 pci@0500 {
177 linux,phandle = <0500>;
178 #interrupt-cells = <1>;
179 #size-cells = <2>;
180 #address-cells = <3>;
181 compatible = "8272";
182 device_type = "pci";
183 reg = <10430 4dc>;
184 clock-frequency = <3f940aa>;
185 interrupt-map-mask = <f800 0 0 7>;
186 interrupt-map = <
187
188 /* IDSEL 0x16 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]189 b000 0 0 1 f8200000 40 8
190 b000 0 0 2 f8200000 41 8
191 b000 0 0 3 f8200000 42 8
192 b000 0 0 4 f8200000 43 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]193
194 /* IDSEL 0x17 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]195 b800 0 0 1 f8200000 43 8
196 b800 0 0 2 f8200000 40 8
197 b800 0 0 3 f8200000 41 8
198 b800 0 0 4 f8200000 42 8
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]199
200 /* IDSEL 0x18 */
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]201 c000 0 0 1 f8200000 42 8
202 c000 0 0 2 f8200000 43 8
203 c000 0 0 3 f8200000 40 8
204 c000 0 0 4 f8200000 41 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]205 interrupt-parent = <10c00>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]206 interrupts = <14 8>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]207 bus-range = <0 0>;
208 ranges = <02000000 0 80000000 80000000 0 40000000
209 01000000 0 00000000 f6000000 0 02000000>;
210 };
211
212/* May need to remove if on a part without crypto engine */
213 crypto@30000 {
214 device_type = "crypto";
215 model = "SEC2";
216 compatible = "talitos";
217 reg = <30000 10000>;
Vitaly Bordug73844ec2007-01-31 02:08:54 +0300[diff] [blame]218 interrupts = <b 2>;
Vitaly Borduge02f73e2006-10-02 22:22:36 +0400[diff] [blame]219 interrupt-parent = <10c00>;
220 num-channels = <4>;
221 channel-fifo-len = <18>;
222 exec-units-mask = <0000007e>;
223/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
224 descriptor-types-mask = <01010ebf>;
225 };
226
227 };
228};