blob: 6ba64748edcff2f680a3e13c3b01af5740bea1c5 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/regulator/pm8921-regulator.h>
15#include <linux/regulator/gpio-regulator.h>
16
17#include "board-msm8960.h"
18
19#define VREG_CONSUMERS(_id) \
20 static struct regulator_consumer_supply vreg_consumers_##_id[]
21
22/*
23 * Consumer specific regulator names:
24 * regulator name consumer dev_name
25 */
26VREG_CONSUMERS(L1) = {
27 REGULATOR_SUPPLY("8921_l1", NULL),
28};
29VREG_CONSUMERS(L2) = {
30 REGULATOR_SUPPLY("8921_l2", NULL),
31 REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"),
32 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_camera_imx074.0"),
33 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_camera_ov2720.0"),
Kevin Chandfecce22011-07-13 10:52:41 -070034 REGULATOR_SUPPLY("mipi_csi_vdd", "msm_camera_qs_mt9p017.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035};
36VREG_CONSUMERS(L3) = {
37 REGULATOR_SUPPLY("8921_l3", NULL),
38 REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"),
39};
40VREG_CONSUMERS(L4) = {
41 REGULATOR_SUPPLY("8921_l4", NULL),
42 REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"),
43 REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"),
44};
45VREG_CONSUMERS(L5) = {
46 REGULATOR_SUPPLY("8921_l5", NULL),
47 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"),
48};
49VREG_CONSUMERS(L6) = {
50 REGULATOR_SUPPLY("8921_l6", NULL),
51 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"),
52};
53VREG_CONSUMERS(L7) = {
54 REGULATOR_SUPPLY("8921_l7", NULL),
55 REGULATOR_SUPPLY("sdc_vddp", "msm_sdcc.3"),
56};
57VREG_CONSUMERS(L8) = {
58 REGULATOR_SUPPLY("8921_l8", NULL),
59 REGULATOR_SUPPLY("dsi_vdc", "mipi_dsi.1"),
60};
61VREG_CONSUMERS(L9) = {
62 REGULATOR_SUPPLY("8921_l9", NULL),
63 REGULATOR_SUPPLY("vdd", "3-0024"),
64};
65VREG_CONSUMERS(L10) = {
66 REGULATOR_SUPPLY("8921_l10", NULL),
67 REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"),
68
69};
70VREG_CONSUMERS(L11) = {
71 REGULATOR_SUPPLY("8921_l11", NULL),
72 REGULATOR_SUPPLY("cam_vana", "msm_camera_imx074.0"),
73 REGULATOR_SUPPLY("cam_vana", "msm_camera_ov2720.0"),
Kevin Chandfecce22011-07-13 10:52:41 -070074 REGULATOR_SUPPLY("cam_vana", "msm_camera_qs_mt9p017.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070075};
76VREG_CONSUMERS(L12) = {
77 REGULATOR_SUPPLY("8921_l12", NULL),
78 REGULATOR_SUPPLY("cam_vdig", "msm_camera_imx074.0"),
79 REGULATOR_SUPPLY("cam_vdig", "msm_camera_ov2720.0"),
Kevin Chandfecce22011-07-13 10:52:41 -070080 REGULATOR_SUPPLY("cam_vdig", "msm_camera_qs_mt9p017.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070081};
82VREG_CONSUMERS(L14) = {
83 REGULATOR_SUPPLY("8921_l14", NULL),
84};
85VREG_CONSUMERS(L15) = {
86 REGULATOR_SUPPLY("8921_l15", NULL),
87};
88VREG_CONSUMERS(L16) = {
89 REGULATOR_SUPPLY("8921_l16", NULL),
90 REGULATOR_SUPPLY("cam_vaf", "msm_camera_imx074.0"),
91 REGULATOR_SUPPLY("cam_vaf", "msm_camera_ov2720.0"),
Kevin Chandfecce22011-07-13 10:52:41 -070092 REGULATOR_SUPPLY("cam_vaf", "msm_camera_qs_mt9p017.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093};
94VREG_CONSUMERS(L17) = {
95 REGULATOR_SUPPLY("8921_l17", NULL),
96};
97VREG_CONSUMERS(L18) = {
98 REGULATOR_SUPPLY("8921_l18", NULL),
99};
100VREG_CONSUMERS(L21) = {
101 REGULATOR_SUPPLY("8921_l21", NULL),
102};
103VREG_CONSUMERS(L22) = {
104 REGULATOR_SUPPLY("8921_l22", NULL),
105};
106VREG_CONSUMERS(L23) = {
107 REGULATOR_SUPPLY("8921_l23", NULL),
108 REGULATOR_SUPPLY("dsi_vddio", "mipi_dsi.1"),
109 REGULATOR_SUPPLY("hdmi_avdd", "hdmi_msm.0"),
110};
111VREG_CONSUMERS(L24) = {
112 REGULATOR_SUPPLY("8921_l24", NULL),
113 REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"),
114};
115VREG_CONSUMERS(L25) = {
116 REGULATOR_SUPPLY("8921_l25", NULL),
117 REGULATOR_SUPPLY("VDDD_CDC_D", "tabla-slim"),
118 REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "tabla-slim"),
119};
120VREG_CONSUMERS(L26) = {
121 REGULATOR_SUPPLY("8921_l26", NULL),
Matt Wagantall0b2f9822011-07-12 20:11:28 -0700122 REGULATOR_SUPPLY("q6_lpass", NULL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700123};
124VREG_CONSUMERS(L27) = {
125 REGULATOR_SUPPLY("8921_l27", NULL),
Matt Wagantall0b2f9822011-07-12 20:11:28 -0700126 REGULATOR_SUPPLY("q6_modem_sw", NULL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127};
128VREG_CONSUMERS(L28) = {
129 REGULATOR_SUPPLY("8921_l28", NULL),
Matt Wagantall0b2f9822011-07-12 20:11:28 -0700130 REGULATOR_SUPPLY("q6_modem_fw", NULL),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700131};
132VREG_CONSUMERS(L29) = {
133 REGULATOR_SUPPLY("8921_l29", NULL),
134};
135VREG_CONSUMERS(S1) = {
136 REGULATOR_SUPPLY("8921_s1", NULL),
137};
138VREG_CONSUMERS(S2) = {
139 REGULATOR_SUPPLY("8921_s2", NULL),
140 REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"),
141
142};
143VREG_CONSUMERS(S3) = {
144 REGULATOR_SUPPLY("8921_s3", NULL),
145 REGULATOR_SUPPLY("HSUSB_VDDCX", "msm_otg"),
146 REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"),
147};
148VREG_CONSUMERS(S4) = {
149 REGULATOR_SUPPLY("8921_s4", NULL),
150 REGULATOR_SUPPLY("sdc_vccq", "msm_sdcc.1"),
151 REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"),
152 REGULATOR_SUPPLY("hdmi_vcc", "hdmi_msm.0"),
153 REGULATOR_SUPPLY("VDDIO_CDC", "tabla-slim"),
154 REGULATOR_SUPPLY("CDC_VDD_CP", "tabla-slim"),
155 REGULATOR_SUPPLY("CDC_VDDA_TX", "tabla-slim"),
156 REGULATOR_SUPPLY("CDC_VDDA_RX", "tabla-slim"),
157};
158VREG_CONSUMERS(S5) = {
159 REGULATOR_SUPPLY("8921_s5", NULL),
160 REGULATOR_SUPPLY("krait0", NULL),
161};
162VREG_CONSUMERS(S6) = {
163 REGULATOR_SUPPLY("8921_s6", NULL),
164 REGULATOR_SUPPLY("krait1", NULL),
165};
166VREG_CONSUMERS(S7) = {
167 REGULATOR_SUPPLY("8921_s7", NULL),
168};
169VREG_CONSUMERS(S8) = {
170 REGULATOR_SUPPLY("8921_s8", NULL),
171};
172VREG_CONSUMERS(LVS1) = {
173 REGULATOR_SUPPLY("8921_lvs1", NULL),
174 REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.4"),
175 REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"),
176};
177VREG_CONSUMERS(LVS2) = {
178 REGULATOR_SUPPLY("8921_lvs2", NULL),
179 REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"),
180};
181VREG_CONSUMERS(LVS3) = {
182 REGULATOR_SUPPLY("8921_lvs3", NULL),
183};
184VREG_CONSUMERS(LVS4) = {
185 REGULATOR_SUPPLY("8921_lvs4", NULL),
186 REGULATOR_SUPPLY("vcc_i2c", "3-0024"),
187};
188VREG_CONSUMERS(LVS5) = {
189 REGULATOR_SUPPLY("8921_lvs5", NULL),
190 REGULATOR_SUPPLY("cam_vio", "msm_camera_imx074.0"),
191 REGULATOR_SUPPLY("cam_vio", "msm_camera_ov2720.0"),
Kevin Chandfecce22011-07-13 10:52:41 -0700192 REGULATOR_SUPPLY("cam_vio", "msm_camera_qs_mt9p017.0"),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700193};
194VREG_CONSUMERS(LVS6) = {
195 REGULATOR_SUPPLY("8921_lvs6", NULL),
196 REGULATOR_SUPPLY("vdd_io", "spi0.0"),
197};
198VREG_CONSUMERS(LVS7) = {
199 REGULATOR_SUPPLY("8921_lvs7", NULL),
200};
201VREG_CONSUMERS(USB_OTG) = {
202 REGULATOR_SUPPLY("8921_usb_otg", NULL),
203 REGULATOR_SUPPLY("vbus_otg", "msm_otg"),
204};
205VREG_CONSUMERS(HDMI_MVS) = {
206 REGULATOR_SUPPLY("8921_hdmi_mvs", NULL),
207 REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"),
208};
209VREG_CONSUMERS(NCP) = {
210 REGULATOR_SUPPLY("8921_ncp", NULL),
211};
212VREG_CONSUMERS(EXT_5V) = {
213 REGULATOR_SUPPLY("ext_5v", NULL),
214};
215VREG_CONSUMERS(EXT_L2) = {
216 REGULATOR_SUPPLY("ext_l2", NULL),
217 REGULATOR_SUPPLY("vdd_phy", "spi0.0"),
218};
219
220#define PM8921_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
221 _pull_down, _always_on, _supply_regulator, \
222 _system_uA) \
223 { \
224 .init_data = { \
225 .constraints = { \
226 .valid_modes_mask = _modes, \
227 .valid_ops_mask = _ops, \
228 .min_uV = _min_uV, \
229 .max_uV = _max_uV, \
230 .input_uV = _max_uV, \
231 .apply_uV = _apply_uV, \
232 .always_on = _always_on, \
233 }, \
234 .num_consumer_supplies = \
235 ARRAY_SIZE(vreg_consumers_##_id), \
236 .consumer_supplies = vreg_consumers_##_id, \
237 .supply_regulator = _supply_regulator, \
238 }, \
239 .id = PM8921_VREG_ID_##_id, \
240 .pull_down_enable = _pull_down, \
241 .system_uA = _system_uA, \
242 }
243
244#define PM8921_VREG_INIT_LDO(_id, _always_on, _pull_down, _min_uV, _max_uV, \
245 _supply_regulator, _system_uA) \
246 PM8921_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
247 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
248 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
249 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
250 _supply_regulator, _system_uA)
251
252#define PM8921_VREG_INIT_NLDO1200(_id, _always_on, _pull_down, _min_uV, \
253 _max_uV, _supply_regulator, _system_uA) \
254 PM8921_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
255 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
256 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
257 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
258 _supply_regulator, _system_uA)
259
260#define PM8921_VREG_INIT_SMPS(_id, _always_on, _pull_down, _min_uV, _max_uV, \
261 _supply_regulator, _system_uA) \
262 PM8921_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \
263 | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \
264 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
265 REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \
266 _supply_regulator, _system_uA)
267
268#define PM8921_VREG_INIT_FTSMPS(_id, _always_on, _pull_down, _min_uV, _max_uV, \
269 _supply_regulator, _system_uA) \
270 PM8921_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
271 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \
272 | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \
273 _supply_regulator, _system_uA)
274
275#define PM8921_VREG_INIT_VS(_id, _always_on, _pull_down, _supply_regulator) \
276 PM8921_VREG_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, _pull_down, \
277 _always_on, _supply_regulator, 0)
278
279#define PM8921_VREG_INIT_VS300(_id, _always_on, _pull_down, _supply_regulator) \
280 PM8921_VREG_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, _pull_down, \
281 _always_on, _supply_regulator, 0)
282
283#define PM8921_VREG_INIT_NCP(_id, _always_on, _min_uV, _max_uV, \
284 _supply_regulator) \
285 PM8921_VREG_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE | \
286 REGULATOR_CHANGE_STATUS, 0, 0, _always_on, _supply_regulator, 0)
287
288/* Pin control initialization */
289#define PM8921_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \
290 { \
291 .init_data = { \
292 .constraints = { \
293 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
294 .always_on = _always_on, \
295 }, \
296 .num_consumer_supplies = \
297 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
298 .consumer_supplies = vreg_consumers_##_id##_PC, \
299 .supply_regulator = _supply_regulator, \
300 }, \
301 .id = PM8921_VREG_ID_##_id##_PC, \
302 .pin_fn = PM8921_VREG_PIN_FN_##_pin_fn, \
303 .pin_ctrl = _pin_ctrl, \
304 }
305
306#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio) \
307 [GPIO_VREG_ID_##_id] = { \
308 .init_data = { \
309 .constraints = { \
310 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
311 }, \
312 .num_consumer_supplies = \
313 ARRAY_SIZE(vreg_consumers_##_id), \
314 .consumer_supplies = vreg_consumers_##_id, \
315 }, \
316 .regulator_name = _reg_name, \
317 .gpio_label = _gpio_label, \
318 .gpio = _gpio, \
319 }
320
321#define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \
322 { \
323 .constraints = { \
324 .name = _name, \
325 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, \
326 .min_uV = _min_uV, \
327 .max_uV = _max_uV, \
328 }, \
329 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \
330 .consumer_supplies = vreg_consumers_##_id, \
331 }
332
333/* GPIO regulator constraints */
334struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] __devinitdata = {
335 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en", PM8921_MPP_PM_TO_SYS(7)),
336 GPIO_VREG_INIT(EXT_L2, "ext_l2", "ext_l2_en", 91),
337};
338
339/* SAW regulator constraints */
340struct regulator_init_data msm_saw_regulator_pdata_s5 =
341 /* ID vreg_name min_uV max_uV */
342 SAW_VREG_INIT(S5, "8921_s5", 1050000, 1150000);
343struct regulator_init_data msm_saw_regulator_pdata_s6 =
344 SAW_VREG_INIT(S6, "8921_s6", 1050000, 1150000);
345
346/* PM8921 regulator constraints */
347struct pm8921_regulator_platform_data
348msm_pm8921_regulator_pdata[] __devinitdata = {
349 /* ID always_on pd min_uV max_uV supply sys_uA */
350 PM8921_VREG_INIT_SMPS(S1, 1, 1, 1225000, 1225000, NULL, 100000),
351 PM8921_VREG_INIT_SMPS(S2, 0, 1, 1300000, 1300000, NULL, 0),
352 PM8921_VREG_INIT_SMPS(S3, 1, 1, 1150000, 1150000, NULL, 100000),
353 PM8921_VREG_INIT_SMPS(S4, 1, 1, 1800000, 1800000, NULL, 100000),
354 PM8921_VREG_INIT_SMPS(S7, 0, 1, 1150000, 1150000, NULL, 100000),
355 PM8921_VREG_INIT_SMPS(S8, 0, 1, 2200000, 2200000, NULL, 100000),
356
357 PM8921_VREG_INIT_LDO(L1, 1, 1, 1050000, 1050000, "8921_s4", 0),
358 PM8921_VREG_INIT_LDO(L2, 0, 1, 1200000, 1200000, "8921_s4", 0),
359 PM8921_VREG_INIT_LDO(L3, 0, 1, 3075000, 3075000, NULL, 0),
360 PM8921_VREG_INIT_LDO(L4, 1, 1, 1800000, 1800000, NULL, 0),
361 PM8921_VREG_INIT_LDO(L5, 0, 1, 2950000, 2950000, NULL, 0),
362 PM8921_VREG_INIT_LDO(L6, 0, 1, 2950000, 2950000, NULL, 0),
363 PM8921_VREG_INIT_LDO(L7, 1, 1, 1850000, 2950000, NULL, 0),
364 PM8921_VREG_INIT_LDO(L8, 0, 1, 2800000, 3000000, NULL, 0),
365 PM8921_VREG_INIT_LDO(L9, 0, 1, 2850000, 2850000, NULL, 0),
366 PM8921_VREG_INIT_LDO(L10, 0, 1, 2900000, 2900000, NULL, 0),
367 PM8921_VREG_INIT_LDO(L11, 0, 1, 2850000, 2850000, NULL, 0),
368 PM8921_VREG_INIT_LDO(L12, 0, 1, 1200000, 1200000, "8921_s4", 0),
369 PM8921_VREG_INIT_LDO(L14, 0, 1, 1800000, 1800000, NULL, 0),
370 PM8921_VREG_INIT_LDO(L15, 0, 1, 1800000, 2950000, NULL, 0),
371 PM8921_VREG_INIT_LDO(L16, 0, 1, 2800000, 2800000, NULL, 0),
372 PM8921_VREG_INIT_LDO(L17, 0, 1, 1800000, 2950000, NULL, 0),
373 PM8921_VREG_INIT_LDO(L18, 0, 1, 1300000, 1300000, "8921_s4", 0),
374 PM8921_VREG_INIT_LDO(L21, 0, 1, 1900000, 1900000, "8921_s8", 0),
375 PM8921_VREG_INIT_LDO(L22, 0, 1, 2750000, 2750000, NULL, 0),
376 PM8921_VREG_INIT_LDO(L23, 1, 1, 1800000, 1800000, "8921_s8", 0),
377 PM8921_VREG_INIT_NLDO1200(L24, 1, 1, 1150000, 1150000, "8921_s1",
378 10000),
379 PM8921_VREG_INIT_NLDO1200(L25, 1, 1, 1225000, 1225000, "8921_s1", 0),
380 PM8921_VREG_INIT_NLDO1200(L26, 0, 1, 1050000, 1050000, "8921_s7", 0),
381 PM8921_VREG_INIT_NLDO1200(L27, 0, 1, 1050000, 1050000, "8921_s7", 0),
382 PM8921_VREG_INIT_NLDO1200(L28, 0, 1, 1050000, 1050000, "8921_s7", 0),
383 PM8921_VREG_INIT_LDO(L29, 0, 1, 2050000, 2100000, "8921_s8", 0),
384
385 PM8921_VREG_INIT_VS(LVS1, 0, 1, "8921_s4"),
386 PM8921_VREG_INIT_VS300(LVS2, 0, 1, "8921_s1"),
387 PM8921_VREG_INIT_VS(LVS3, 0, 1, "8921_s4"),
388 PM8921_VREG_INIT_VS(LVS4, 0, 1, "8921_s4"),
389 PM8921_VREG_INIT_VS(LVS5, 0, 1, "8921_s4"),
390 PM8921_VREG_INIT_VS(LVS6, 0, 1, "8921_s4"),
391 PM8921_VREG_INIT_VS(LVS7, 0, 1, "8921_s4"),
392
393 PM8921_VREG_INIT_VS300(USB_OTG, 0, 1, "ext_5v"),
394 PM8921_VREG_INIT_VS300(HDMI_MVS, 0, 1, "ext_5v"),
395
396 PM8921_VREG_INIT_NCP(NCP, 0, 1800000, 1800000, "8921_l6"),
397};
398
399int msm_pm8921_regulator_pdata_len __devinitdata =
400 ARRAY_SIZE(msm_pm8921_regulator_pdata);