blob: 090a880927bfac48abd67f2c27cef1fc9442291a [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080010#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000012#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070013#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080014#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070015#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080016#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080017#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080021#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022#endif
Sonic Zhang7a9cc482009-12-22 04:47:04 +000023#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
Mike Frysinger0531c462010-01-19 07:04:29 +000025#include <linux/etherdevice.h>
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050026#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070027#include <linux/irq.h>
28#include <linux/interrupt.h>
David Brownell27f5d752007-10-04 18:06:16 -070029#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080030#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000031#include <linux/leds.h>
32#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080033#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080034#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080035#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080036#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080037#include <asm/dpmc.h>
Scott Jiang6f53dbb2011-03-01 09:43:50 +000038#include <asm/bfin_sport.h>
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000039#ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
40#include <linux/regulator/fixed.h>
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +000041#endif
Sonic Zhang1b04cbe2010-06-02 05:00:21 +000042#include <linux/regulator/machine.h>
Sonic Zhangf32792d2010-02-09 02:47:09 +000043#include <linux/regulator/consumer.h>
44#include <linux/regulator/userspace-consumer.h>
Bryan Wu1394f032007-05-06 14:50:22 -070045
46/*
47 * Name the Board for the /proc/cpuinfo
48 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080049const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070050
51/*
52 * Driver needs to know address, irq and flag pin.
53 */
54
Bryan Wu1394f032007-05-06 14:50:22 -070055#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080056#include <linux/usb/isp1760.h>
57static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070058 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080059 .start = 0x203C0000,
60 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070061 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080064 .start = IRQ_PF7,
65 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080066 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070067 },
68};
69
Michael Hennerich3f375692008-11-18 17:48:22 +080070static struct isp1760_platform_data isp1760_priv = {
71 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080072 .bus_width_16 = 1,
73 .port1_otg = 0,
74 .analog_oc = 0,
75 .dack_polarity_high = 0,
76 .dreq_polarity_high = 0,
77};
78
79static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb7682009-10-15 10:37:33 +000080 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070081 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080082 .dev = {
83 .platform_data = &isp1760_priv,
84 },
85 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
86 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070087};
Bryan Wu1394f032007-05-06 14:50:22 -070088#endif
89
Michael Hennerich2463ef22008-01-27 16:49:48 +080090#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080091#include <linux/gpio_keys.h>
92
93static struct gpio_keys_button bfin_gpio_keys_table[] = {
94 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
95 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
96 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
97 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
98};
99
100static struct gpio_keys_platform_data bfin_gpio_keys_data = {
101 .buttons = bfin_gpio_keys_table,
102 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
103};
104
105static struct platform_device bfin_device_gpiokeys = {
106 .name = "gpio-keys",
107 .dev = {
108 .platform_data = &bfin_gpio_keys_data,
109 },
110};
111#endif
112
Bryan Wu1394f032007-05-06 14:50:22 -0700113#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
114static struct resource bfin_pcmcia_cf_resources[] = {
115 {
116 .start = 0x20310000, /* IO PORT */
117 .end = 0x20312000,
118 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800119 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800120 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700121 .end = 0x20311FFF,
122 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800123 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700124 .start = IRQ_PF4,
125 .end = IRQ_PF4,
126 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800127 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700128 .start = 6, /* Card Detect PF6 */
129 .end = 6,
130 .flags = IORESOURCE_IRQ,
131 },
132};
133
134static struct platform_device bfin_pcmcia_cf_device = {
135 .name = "bfin_cf_pcmcia",
136 .id = -1,
137 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
138 .resource = bfin_pcmcia_cf_resources,
139};
140#endif
141
142#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
143static struct platform_device rtc_device = {
144 .name = "rtc-bfin",
145 .id = -1,
146};
147#endif
148
149#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000150#include <linux/smc91x.h>
151
152static struct smc91x_platdata smc91x_info = {
153 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
154 .leda = RPC_LED_100_10,
155 .ledb = RPC_LED_TX_RX,
156};
157
Bryan Wu1394f032007-05-06 14:50:22 -0700158static struct resource smc91x_resources[] = {
159 {
160 .name = "smc91x-regs",
161 .start = 0x20300300,
162 .end = 0x20300300 + 16,
163 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800164 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700165
166 .start = IRQ_PF7,
167 .end = IRQ_PF7,
168 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
169 },
170};
171static struct platform_device smc91x_device = {
172 .name = "smc91x",
173 .id = 0,
174 .num_resources = ARRAY_SIZE(smc91x_resources),
175 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000176 .dev = {
177 .platform_data = &smc91x_info,
178 },
Bryan Wu1394f032007-05-06 14:50:22 -0700179};
180#endif
181
Alex Landauf40d24d2007-07-12 12:11:48 +0800182#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
183static struct resource dm9000_resources[] = {
184 [0] = {
185 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000186 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000190 .start = 0x203FB804,
191 .end = 0x203FB804 + 1,
192 .flags = IORESOURCE_MEM,
193 },
194 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800195 .start = IRQ_PF9,
196 .end = IRQ_PF9,
197 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
198 },
199};
200
201static struct platform_device dm9000_device = {
202 .name = "dm9000",
203 .id = -1,
204 .num_resources = ARRAY_SIZE(dm9000_resources),
205 .resource = dm9000_resources,
206};
207#endif
208
Bryan Wu1394f032007-05-06 14:50:22 -0700209#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
210static struct resource sl811_hcd_resources[] = {
211 {
212 .start = 0x20340000,
213 .end = 0x20340000,
214 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800215 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700216 .start = 0x20340004,
217 .end = 0x20340004,
218 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800219 }, {
Mike Frysinger01218652009-12-21 15:07:43 +0000220 .start = IRQ_PF4,
221 .end = IRQ_PF4,
Bryan Wu1394f032007-05-06 14:50:22 -0700222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
223 },
224};
225
226#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
227void sl811_port_power(struct device *dev, int is_on)
228{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800229 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800230 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700231}
232#endif
233
234static struct sl811_platform_data sl811_priv = {
235 .potpg = 10,
236 .power = 250, /* == 500mA */
237#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
238 .port_power = &sl811_port_power,
239#endif
240};
241
242static struct platform_device sl811_hcd_device = {
243 .name = "sl811-hcd",
244 .id = 0,
245 .dev = {
246 .platform_data = &sl811_priv,
247 },
248 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
249 .resource = sl811_hcd_resources,
250};
251#endif
252
253#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
254static struct resource isp1362_hcd_resources[] = {
255 {
256 .start = 0x20360000,
257 .end = 0x20360000,
258 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800259 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700260 .start = 0x20360004,
261 .end = 0x20360004,
262 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800263 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000264 .start = IRQ_PF3,
265 .end = IRQ_PF3,
Michael Hennerich9e758942010-03-18 12:51:49 +0000266 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
Bryan Wu1394f032007-05-06 14:50:22 -0700267 },
268};
269
270static struct isp1362_platform_data isp1362_priv = {
271 .sel15Kres = 1,
272 .clknotstop = 0,
273 .oc_enable = 0,
274 .int_act_high = 0,
275 .int_edge_triggered = 0,
276 .remote_wakeup_connected = 0,
277 .no_power_switching = 1,
278 .power_switching_mode = 0,
279};
280
281static struct platform_device isp1362_hcd_device = {
282 .name = "isp1362-hcd",
283 .id = 0,
284 .dev = {
285 .platform_data = &isp1362_priv,
286 },
287 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
288 .resource = isp1362_hcd_resources,
289};
290#endif
291
Barry Song706a01b2009-11-02 07:29:07 +0000292#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000293static unsigned short bfin_can_peripherals[] = {
Barry Song706a01b2009-11-02 07:29:07 +0000294 P_CAN0_RX, P_CAN0_TX, 0
295};
296
297static struct resource bfin_can_resources[] = {
298 {
299 .start = 0xFFC02A00,
300 .end = 0xFFC02FFF,
301 .flags = IORESOURCE_MEM,
302 },
303 {
304 .start = IRQ_CAN_RX,
305 .end = IRQ_CAN_RX,
306 .flags = IORESOURCE_IRQ,
307 },
308 {
309 .start = IRQ_CAN_TX,
310 .end = IRQ_CAN_TX,
311 .flags = IORESOURCE_IRQ,
312 },
313 {
314 .start = IRQ_CAN_ERROR,
315 .end = IRQ_CAN_ERROR,
316 .flags = IORESOURCE_IRQ,
317 },
318};
319
320static struct platform_device bfin_can_device = {
321 .name = "bfin_can",
322 .num_resources = ARRAY_SIZE(bfin_can_resources),
323 .resource = bfin_can_resources,
324 .dev = {
325 .platform_data = &bfin_can_peripherals, /* Passed to driver */
326 },
327};
328#endif
329
Bryan Wu1394f032007-05-06 14:50:22 -0700330#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Sonic Zhang02460d02010-06-11 10:44:22 +0000331#include <linux/bfin_mac.h>
332static const unsigned short bfin_mac_peripherals[] = P_MII0;
333
334static struct bfin_phydev_platform_data bfin_phydev_data[] = {
335 {
336 .addr = 1,
337 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
338 },
339};
340
341static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
342 .phydev_number = 1,
343 .phydev_data = bfin_phydev_data,
344 .phy_mode = PHY_INTERFACE_MODE_MII,
345 .mac_peripherals = bfin_mac_peripherals,
346};
347
Graf Yang65319622009-02-04 16:49:45 +0800348static struct platform_device bfin_mii_bus = {
349 .name = "bfin_mii_bus",
Sonic Zhang02460d02010-06-11 10:44:22 +0000350 .dev = {
351 .platform_data = &bfin_mii_bus_data,
352 }
Graf Yang65319622009-02-04 16:49:45 +0800353};
354
Bryan Wu1394f032007-05-06 14:50:22 -0700355static struct platform_device bfin_mac_device = {
356 .name = "bfin_mac",
Sonic Zhang02460d02010-06-11 10:44:22 +0000357 .dev = {
358 .platform_data = &bfin_mii_bus,
359 }
Bryan Wu1394f032007-05-06 14:50:22 -0700360};
361#endif
362
363#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
364static struct resource net2272_bfin_resources[] = {
365 {
366 .start = 0x20300000,
367 .end = 0x20300000 + 0x100,
368 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800369 }, {
Mike Frysinger9be86312011-05-04 11:20:15 -0400370 .start = 1,
371 .flags = IORESOURCE_BUS,
372 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700373 .start = IRQ_PF7,
374 .end = IRQ_PF7,
375 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
376 },
377};
378
379static struct platform_device net2272_bfin_device = {
380 .name = "net2272",
381 .id = -1,
382 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
383 .resource = net2272_bfin_resources,
384};
385#endif
386
Mike Frysingerfc689112008-06-25 11:41:42 +0800387#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
Mike Frysingerfc689112008-06-25 11:41:42 +0800388const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
389
390static struct mtd_partition bfin_plat_nand_partitions[] = {
391 {
Robin Getzaa582972008-08-05 17:47:29 +0800392 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800393 .size = 0x400000,
394 .offset = 0,
395 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800396 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800397 .size = MTDPART_SIZ_FULL,
398 .offset = MTDPART_OFS_APPEND,
399 },
400};
Mike Frysingerfc689112008-06-25 11:41:42 +0800401
402#define BFIN_NAND_PLAT_CLE 2
403#define BFIN_NAND_PLAT_ALE 1
404static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
405{
406 struct nand_chip *this = mtd->priv;
407
408 if (cmd == NAND_CMD_NONE)
409 return;
410
411 if (ctrl & NAND_CLE)
412 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
413 else
414 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
415}
416
417#define BFIN_NAND_PLAT_READY GPIO_PF3
418static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
419{
420 return gpio_get_value(BFIN_NAND_PLAT_READY);
421}
422
423static struct platform_nand_data bfin_plat_nand_data = {
424 .chip = {
Marek Vasutef566092010-08-12 03:53:54 +0100425 .nr_chips = 1,
Mike Frysingerfc689112008-06-25 11:41:42 +0800426 .chip_delay = 30,
Mike Frysingerfc689112008-06-25 11:41:42 +0800427 .part_probe_types = part_probes,
428 .partitions = bfin_plat_nand_partitions,
429 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
Mike Frysingerfc689112008-06-25 11:41:42 +0800430 },
431 .ctrl = {
432 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
433 .dev_ready = bfin_plat_nand_dev_ready,
434 },
435};
436
437#define MAX(x, y) (x > y ? x : y)
438static struct resource bfin_plat_nand_resources = {
439 .start = 0x20212000,
440 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
Mike Frysinger67d99632010-03-16 14:28:44 +0000441 .flags = IORESOURCE_MEM,
Mike Frysingerfc689112008-06-25 11:41:42 +0800442};
443
444static struct platform_device bfin_async_nand_device = {
445 .name = "gen_nand",
446 .id = -1,
447 .num_resources = 1,
448 .resource = &bfin_plat_nand_resources,
449 .dev = {
450 .platform_data = &bfin_plat_nand_data,
451 },
452};
453
454static void bfin_plat_nand_init(void)
455{
456 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
457}
458#else
459static void bfin_plat_nand_init(void) {}
460#endif
461
Mike Frysinger793dc272008-03-26 08:09:12 +0800462#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800463static struct mtd_partition stamp_partitions[] = {
464 {
Robin Getzaa582972008-08-05 17:47:29 +0800465 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800466 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800467 .offset = 0,
468 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800469 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800470 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800471 .offset = MTDPART_OFS_APPEND,
472 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800473 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800474 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800475 .offset = MTDPART_OFS_APPEND,
476 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800477 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800478 .size = MTDPART_SIZ_FULL,
479 .offset = 0x3F0000,
480 .mask_flags = MTD_WRITEABLE,
481 }
482};
483
484static struct physmap_flash_data stamp_flash_data = {
485 .width = 2,
486 .parts = stamp_partitions,
487 .nr_parts = ARRAY_SIZE(stamp_partitions),
Barry Song38e76732010-01-15 03:24:39 +0000488#ifdef CONFIG_ROMKERNEL
489 .probe_type = "map_rom",
490#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800491};
492
493static struct resource stamp_flash_resource = {
494 .start = 0x20000000,
495 .end = 0x203fffff,
496 .flags = IORESOURCE_MEM,
497};
498
499static struct platform_device stamp_flash_device = {
500 .name = "physmap-flash",
501 .id = 0,
502 .dev = {
503 .platform_data = &stamp_flash_data,
504 },
505 .num_resources = 1,
506 .resource = &stamp_flash_resource,
507};
Mike Frysinger793dc272008-03-26 08:09:12 +0800508#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800509
Bryan Wu1394f032007-05-06 14:50:22 -0700510#if defined(CONFIG_MTD_M25P80) \
511 || defined(CONFIG_MTD_M25P80_MODULE)
512static struct mtd_partition bfin_spi_flash_partitions[] = {
513 {
Robin Getzaa582972008-08-05 17:47:29 +0800514 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800515 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700516 .offset = 0,
517 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800518 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800519 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800520 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800521 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800522 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800523 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800524 .size = MTDPART_SIZ_FULL,
525 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700526 }
527};
528
529static struct flash_platform_data bfin_spi_flash_data = {
530 .name = "m25p80",
531 .parts = bfin_spi_flash_partitions,
532 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a80782008-11-18 17:48:22 +0800533 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700534};
535
536/* SPI flash chip (m25p64) */
537static struct bfin5xx_spi_chip spi_flash_chip_info = {
538 .enable_dma = 0, /* use dma transfer with this chip*/
Yi Lia65912c2010-04-06 05:53:16 +0000539};
540#endif
541
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000542#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000543#include <linux/input/ad714x.h>
Barry Song427f2772009-07-17 07:04:55 +0000544
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000545static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000546 {
547 .start_stage = 0,
548 .end_stage = 7,
549 .max_coord = 128,
550 },
551};
552
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000553static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000554 {
555 .keycode = BTN_FORWARD,
556 .l_mask = 0,
557 .h_mask = 0x600,
558 },
559 {
560 .keycode = BTN_LEFT,
561 .l_mask = 0,
562 .h_mask = 0x500,
563 },
564 {
565 .keycode = BTN_MIDDLE,
566 .l_mask = 0,
567 .h_mask = 0x800,
568 },
569 {
570 .keycode = BTN_RIGHT,
571 .l_mask = 0x100,
572 .h_mask = 0x400,
573 },
574 {
575 .keycode = BTN_BACK,
576 .l_mask = 0x200,
577 .h_mask = 0x400,
578 },
579};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000580static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000581 .slider_num = 1,
582 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000583 .slider = ad7147_spi_slider_plat,
584 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000585 .stage_cfg_reg = {
586 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
587 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
588 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
591 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
592 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
593 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
594 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
595 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
596 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
597 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
598 },
599 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
600};
601#endif
602
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000603#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000604#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000605static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000606 {
607 .keycode = BTN_1,
608 .l_mask = 0,
609 .h_mask = 0x1,
610 },
611 {
612 .keycode = BTN_2,
613 .l_mask = 0,
614 .h_mask = 0x2,
615 },
616 {
617 .keycode = BTN_3,
618 .l_mask = 0,
619 .h_mask = 0x4,
620 },
621 {
622 .keycode = BTN_4,
623 .l_mask = 0x0,
624 .h_mask = 0x8,
625 },
626};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000627static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000628 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000629 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000630 .stage_cfg_reg = {
631 /* fixme: figure out right setting for all comoponent according
632 * to hardware feature of EVAL-AD7142EB board */
633 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
634 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
635 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
636 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
643 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
644 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
645 },
646 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
647};
648#endif
649
Graf Yangf5f95312010-02-10 07:15:59 +0000650#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
651static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
652 .enable_dma = 0,
Graf Yangf5f95312010-02-10 07:15:59 +0000653};
654#endif
655
Graf Yangdf6a9492010-02-21 10:23:07 +0000656#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000657static unsigned short ad2s120x_platform_data[] = {
Graf Yangdf6a9492010-02-21 10:23:07 +0000658 /* used as SAMPLE and RDVEL */
659 GPIO_PF5, GPIO_PF6, 0
660};
661
662static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
663 .enable_dma = 0,
Graf Yangdf6a9492010-02-21 10:23:07 +0000664};
665#endif
666
Graf Yang848c51c2010-02-26 11:49:52 +0000667#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
Mike Frysingera8b19882010-11-24 09:23:04 +0000668static unsigned short ad2s1210_platform_data[] = {
Graf Yang848c51c2010-02-26 11:49:52 +0000669 /* use as SAMPLE, A0, A1 */
670 GPIO_PF7, GPIO_PF8, GPIO_PF9,
671# if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
672 /* the RES0 and RES1 pins */
673 GPIO_PF4, GPIO_PF5,
674# endif
675 0,
676};
677
678static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
679 .enable_dma = 0,
Graf Yang848c51c2010-02-26 11:49:52 +0000680};
681#endif
682
Michael Hennerich0891bae2010-03-08 11:58:53 +0000683#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
684static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
685 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000686};
687#endif
688
689#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
690static unsigned short ad7816_platform_data[] = {
691 GPIO_PF4, /* rdwr_pin */
692 GPIO_PF5, /* convert_pin */
693 GPIO_PF7, /* busy_pin */
694 0,
695};
696
697static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
698 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000699};
700#endif
701
702#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
703static unsigned long adt7310_platform_data[3] = {
704/* INT bound temperature alarm event. line 1 */
705 IRQ_PG4, IRQF_TRIGGER_LOW,
706/* CT bound temperature alarm event irq_flags. line 0 */
707 IRQF_TRIGGER_LOW,
708};
709
710static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
711 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000712};
713#endif
714
715#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
716static unsigned short ad7298_platform_data[] = {
717 GPIO_PF7, /* busy_pin */
718 0,
719};
Michael Hennerich0891bae2010-03-08 11:58:53 +0000720#endif
721
722#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
723static unsigned long adt7316_spi_data[2] = {
724 IRQF_TRIGGER_LOW, /* interrupt flags */
725 GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
726};
727
728static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
729 .enable_dma = 0,
Michael Hennerich0891bae2010-03-08 11:58:53 +0000730};
731#endif
732
Yi Lif79ea4c2009-01-07 23:14:38 +0800733#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
734#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
735
736static int bfin_mmc_spi_init(struct device *dev,
737 irqreturn_t (*detect_int)(int, void *), void *data)
738{
739 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
740 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
741}
742
743static void bfin_mmc_spi_exit(struct device *dev, void *data)
744{
745 free_irq(MMC_SPI_CARD_DETECT_INT, data);
746}
747
748static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
749 .init = bfin_mmc_spi_init,
750 .exit = bfin_mmc_spi_exit,
751 .detect_delay = 100, /* msecs */
752};
753
754static struct bfin5xx_spi_chip mmc_spi_chip_info = {
755 .enable_dma = 0,
Yi Lie68d1eb2009-06-03 09:46:22 +0000756 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800757};
758#endif
759
Bryan Wu1394f032007-05-06 14:50:22 -0700760#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800761#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700762static const struct ad7877_platform_data bfin_ad7877_ts_info = {
763 .model = 7877,
764 .vref_delay_usecs = 50, /* internal, no capacitor */
765 .x_plate_ohms = 419,
766 .y_plate_ohms = 486,
767 .pressure_max = 1000,
768 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000769 .stopacq_polarity = 1,
770 .first_conversion_delay = 3,
771 .acquisition_time = 1,
772 .averaging = 1,
773 .pen_down_acc_interval = 1,
Bryan Wu1394f032007-05-06 14:50:22 -0700774};
775#endif
776
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800777#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
778#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800779static const struct ad7879_platform_data bfin_ad7879_ts_info = {
780 .model = 7879, /* Model = AD7879 */
781 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
782 .pressure_max = 10000,
783 .pressure_min = 0,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000784 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
785 .acquisition_time = 1, /* 4us acquisition time per sample */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800786 .median = 2, /* do 8 measurements */
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000787 .averaging = 1, /* take the average of 4 middle samples */
788 .pen_down_acc_interval = 255, /* 9.4 ms */
Michael Hennerich244d3422009-12-18 09:29:39 +0000789 .gpio_export = 1, /* Export GPIO to gpiolib */
790 .gpio_base = -1, /* Dynamic allocation */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800791};
792#endif
793
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000794#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000795#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000796static const struct adxl34x_platform_data adxl34x_info = {
797 .x_axis_offset = 0,
798 .y_axis_offset = 0,
799 .z_axis_offset = 0,
800 .tap_threshold = 0x31,
801 .tap_duration = 0x10,
802 .tap_latency = 0x60,
803 .tap_window = 0xF0,
804 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
805 .act_axis_control = 0xFF,
806 .activity_threshold = 5,
807 .inactivity_threshold = 3,
808 .inactivity_time = 4,
809 .free_fall_threshold = 0x7,
810 .free_fall_time = 0x20,
811 .data_rate = 0x8,
812 .data_range = ADXL_FULL_RES,
813
814 .ev_type = EV_ABS,
815 .ev_code_x = ABS_X, /* EV_REL */
816 .ev_code_y = ABS_Y, /* EV_REL */
817 .ev_code_z = ABS_Z, /* EV_REL */
818
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000819 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000820
821/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
822/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
823 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
824 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich6ba255f2009-12-08 11:34:07 +0000825 .orientation_enable = ADXL_EN_ORIENTATION_3D,
826 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
827 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
828 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
829 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000830};
831#endif
832
Michael Hennerich85a192e2009-01-07 23:14:38 +0800833#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
834static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
835 .enable_dma = 1,
Michael Hennerich85a192e2009-01-07 23:14:38 +0800836};
837#endif
838
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000839#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000840#include <linux/spi/adf702x.h>
841#define TXREG 0x0160A470
842static const u32 adf7021_regs[] = {
843 0x09608FA0,
844 0x00575011,
845 0x00A7F092,
846 0x2B141563,
847 0x81F29E94,
848 0x00003155,
849 0x050A4F66,
850 0x00000007,
851 0x00000008,
852 0x000231E9,
853 0x3296354A,
854 0x891A2B3B,
855 0x00000D9C,
856 0x0000000D,
857 0x0000000E,
858 0x0000000F,
859};
860
861static struct adf702x_platform_data adf7021_platform_data = {
862 .regs_base = (void *)SPORT1_TCR1,
863 .dma_ch_rx = CH_SPORT1_RX,
864 .dma_ch_tx = CH_SPORT1_TX,
865 .irq_sport_err = IRQ_SPORT1_ERROR,
866 .gpio_int_rfs = GPIO_PF8,
867 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
868 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
869 .adf702x_model = MODEL_ADF7021,
870 .adf702x_regs = adf7021_regs,
871 .tx_reg = TXREG,
872};
Mike Frysinger0531c462010-01-19 07:04:29 +0000873static inline void adf702x_mac_init(void)
874{
875 random_ether_addr(adf7021_platform_data.mac_addr);
876}
877#else
878static inline void adf702x_mac_init(void) {}
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000879#endif
880
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000881#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
882#include <linux/spi/ads7846.h>
Michael Hennerichfe5b25c2010-02-04 14:41:39 +0000883static int ads7873_get_pendown_state(void)
884{
885 return gpio_get_value(GPIO_PF6);
886}
887
888static struct ads7846_platform_data __initdata ad7873_pdata = {
889 .model = 7873, /* AD7873 */
890 .x_max = 0xfff,
891 .y_max = 0xfff,
892 .x_plate_ohms = 620,
893 .debounce_max = 1,
894 .debounce_rep = 0,
895 .debounce_tol = (~0),
896 .get_pendown_state = ads7873_get_pendown_state,
897};
898#endif
899
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800900#if defined(CONFIG_MTD_DATAFLASH) \
901 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800902
903static struct mtd_partition bfin_spi_dataflash_partitions[] = {
904 {
905 .name = "bootloader(spi)",
906 .size = 0x00040000,
907 .offset = 0,
908 .mask_flags = MTD_CAP_ROM
909 }, {
910 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800911 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800912 .offset = MTDPART_OFS_APPEND,
913 }, {
914 .name = "file system(spi)",
915 .size = MTDPART_SIZ_FULL,
916 .offset = MTDPART_OFS_APPEND,
917 }
918};
919
920static struct flash_platform_data bfin_spi_dataflash_data = {
921 .name = "SPI Dataflash",
922 .parts = bfin_spi_dataflash_partitions,
923 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
924};
925
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800926/* DataFlash chip */
927static struct bfin5xx_spi_chip data_flash_chip_info = {
928 .enable_dma = 0, /* use dma transfer with this chip*/
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000929};
930#endif
931
Michael Hennerich0891bae2010-03-08 11:58:53 +0000932#if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
933static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
934 .enable_dma = 0, /* use dma transfer with this chip*/
Michael Hennerich0891bae2010-03-08 11:58:53 +0000935};
936#endif
937
Bryan Wu1394f032007-05-06 14:50:22 -0700938static struct spi_board_info bfin_spi_board_info[] __initdata = {
939#if defined(CONFIG_MTD_M25P80) \
940 || defined(CONFIG_MTD_M25P80_MODULE)
941 {
942 /* the modalias must be the same as spi device driver name */
943 .modalias = "m25p80", /* Name of spi_driver for this device */
944 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800945 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700946 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
947 .platform_data = &bfin_spi_flash_data,
948 .controller_data = &spi_flash_chip_info,
949 .mode = SPI_MODE_3,
950 },
951#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800952#if defined(CONFIG_MTD_DATAFLASH) \
953 || defined(CONFIG_MTD_DATAFLASH_MODULE)
954 { /* DataFlash chip */
955 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +0800956 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800957 .bus_num = 0, /* Framework bus number */
958 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +0800959 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800960 .controller_data = &data_flash_chip_info,
961 .mode = SPI_MODE_3,
962 },
963#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700964
Scott Jiangd0556362011-08-12 19:31:30 -0400965#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
966 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700967 {
Scott Jiangd0556362011-08-12 19:31:30 -0400968 .modalias = "ad1836",
Bryan Wu1394f032007-05-06 14:50:22 -0700969 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800970 .bus_num = 0,
Barry Song7ba80062010-01-28 09:37:21 +0000971 .chip_select = 4,
Barry Songd40bd712010-02-22 10:31:06 +0000972 .platform_data = "ad1836", /* only includes chip name for the moment */
Barry Song83124402009-08-06 21:03:02 +0000973 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -0700974 },
975#endif
Barry Songd4b834c2009-06-04 10:14:17 +0000976
Barry Song3b827902010-01-27 09:01:36 +0000977#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
Barry Songd4b834c2009-06-04 10:14:17 +0000978 {
Barry Song3b827902010-01-27 09:01:36 +0000979 .modalias = "ad193x",
Barry Songd4b834c2009-06-04 10:14:17 +0000980 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
981 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +0000982 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +0000983 .mode = SPI_MODE_3,
984 },
985#endif
986
Yi Lia65912c2010-04-06 05:53:16 +0000987#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
988 {
989 .modalias = "adav80x",
990 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
991 .bus_num = 0,
992 .chip_select = 1,
Yi Lia65912c2010-04-06 05:53:16 +0000993 .mode = SPI_MODE_3,
994 },
995#endif
996
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000997#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000998 {
999 .modalias = "ad714x_captouch",
1000 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1001 .irq = IRQ_PF4,
1002 .bus_num = 0,
1003 .chip_select = 5,
1004 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001005 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +00001006 },
1007#endif
1008
Graf Yangf5f95312010-02-10 07:15:59 +00001009#if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1010 {
1011 .modalias = "ad2s90",
1012 .bus_num = 0,
1013 .chip_select = 3, /* change it for your board */
Barry Song6fbfa0c2010-04-12 05:04:15 +00001014 .mode = SPI_MODE_3,
Graf Yangf5f95312010-02-10 07:15:59 +00001015 .platform_data = NULL,
1016 .controller_data = &ad2s90_spi_chip_info,
1017 },
1018#endif
1019
Graf Yangdf6a9492010-02-21 10:23:07 +00001020#if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1021 {
1022 .modalias = "ad2s120x",
1023 .bus_num = 0,
1024 .chip_select = 4, /* CS, change it for your board */
1025 .platform_data = ad2s120x_platform_data,
1026 .controller_data = &ad2s120x_spi_chip_info,
1027 },
1028#endif
1029
Graf Yang848c51c2010-02-26 11:49:52 +00001030#if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1031 {
1032 .modalias = "ad2s1210",
1033 .max_speed_hz = 8192000,
1034 .bus_num = 0,
1035 .chip_select = 4, /* CS, change it for your board */
1036 .platform_data = ad2s1210_platform_data,
1037 .controller_data = &ad2s1210_spi_chip_info,
1038 },
1039#endif
1040
Michael Hennerich0891bae2010-03-08 11:58:53 +00001041#if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1042 {
1043 .modalias = "ad7314",
1044 .max_speed_hz = 1000000,
1045 .bus_num = 0,
1046 .chip_select = 4, /* CS, change it for your board */
1047 .controller_data = &ad7314_spi_chip_info,
1048 .mode = SPI_MODE_1,
1049 },
1050#endif
1051
1052#if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1053 {
1054 .modalias = "ad7818",
1055 .max_speed_hz = 1000000,
1056 .bus_num = 0,
1057 .chip_select = 4, /* CS, change it for your board */
1058 .platform_data = ad7816_platform_data,
1059 .controller_data = &ad7816_spi_chip_info,
1060 .mode = SPI_MODE_3,
1061 },
1062#endif
1063
1064#if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1065 {
1066 .modalias = "adt7310",
1067 .max_speed_hz = 1000000,
1068 .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1069 .bus_num = 0,
1070 .chip_select = 4, /* CS, change it for your board */
1071 .platform_data = adt7310_platform_data,
1072 .controller_data = &adt7310_spi_chip_info,
1073 .mode = SPI_MODE_3,
1074 },
1075#endif
1076
1077#if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1078 {
1079 .modalias = "ad7298",
1080 .max_speed_hz = 1000000,
1081 .bus_num = 0,
1082 .chip_select = 4, /* CS, change it for your board */
1083 .platform_data = ad7298_platform_data,
Michael Hennerich0891bae2010-03-08 11:58:53 +00001084 .mode = SPI_MODE_3,
1085 },
1086#endif
1087
1088#if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1089 {
1090 .modalias = "adt7316",
1091 .max_speed_hz = 1000000,
1092 .irq = IRQ_PG5, /* interrupt line */
1093 .bus_num = 0,
1094 .chip_select = 4, /* CS, change it for your board */
1095 .platform_data = adt7316_spi_data,
1096 .controller_data = &adt7316_spi_chip_info,
1097 .mode = SPI_MODE_3,
1098 },
1099#endif
1100
Yi Lif79ea4c2009-01-07 23:14:38 +08001101#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1102 {
1103 .modalias = "mmc_spi",
1104 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1105 .bus_num = 0,
1106 .chip_select = 4,
1107 .platform_data = &bfin_mmc_spi_pdata,
1108 .controller_data = &mmc_spi_chip_info,
1109 .mode = SPI_MODE_3,
1110 },
1111#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001112#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1113 {
1114 .modalias = "ad7877",
1115 .platform_data = &bfin_ad7877_ts_info,
1116 .irq = IRQ_PF6,
1117 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +08001118 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -07001119 .chip_select = 1,
Bryan Wu1394f032007-05-06 14:50:22 -07001120 },
1121#endif
Michael Hennerichf5150152008-10-16 23:23:18 +08001122#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001123 {
1124 .modalias = "ad7879",
1125 .platform_data = &bfin_ad7879_ts_info,
1126 .irq = IRQ_PF7,
1127 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1128 .bus_num = 0,
1129 .chip_select = 1,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001130 .mode = SPI_CPHA | SPI_CPOL,
1131 },
1132#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001133#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1134 {
1135 .modalias = "spidev",
1136 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1137 .bus_num = 0,
1138 .chip_select = 1,
Michael Hennerich6e668932008-02-09 01:54:09 +08001139 },
1140#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001141#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1142 {
1143 .modalias = "bfin-lq035q1-spi",
1144 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1145 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +08001146 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001147 .mode = SPI_CPHA | SPI_CPOL,
1148 },
1149#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +08001150#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1151 {
1152 .modalias = "enc28j60",
1153 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1154 .irq = IRQ_PF6,
1155 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001156 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerich85a192e2009-01-07 23:14:38 +08001157 .controller_data = &enc28j60_spi_chip_info,
1158 .mode = SPI_MODE_0,
1159 },
1160#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001161#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1162 {
1163 .modalias = "adxl34x",
1164 .platform_data = &adxl34x_info,
1165 .irq = IRQ_PF6,
1166 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1167 .bus_num = 0,
1168 .chip_select = 2,
Michael Hennerich57af8ed2009-10-16 12:35:20 +00001169 .mode = SPI_MODE_3,
1170 },
1171#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001172#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1173 {
1174 .modalias = "adf702x",
1175 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1176 .bus_num = 0,
Barry Songf9f0e3b2009-11-17 09:45:59 +00001177 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001178 .platform_data = &adf7021_platform_data,
1179 .mode = SPI_MODE_0,
1180 },
1181#endif
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001182#if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1183 {
1184 .modalias = "ads7846",
1185 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1186 .bus_num = 0,
1187 .irq = IRQ_PF6,
1188 .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
Michael Hennerichfe5b25c2010-02-04 14:41:39 +00001189 .platform_data = &ad7873_pdata,
1190 .mode = SPI_MODE_0,
1191 },
1192#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00001193#if defined(CONFIG_AD7476) \
1194 || defined(CONFIG_AD7476_MODULE)
1195 {
1196 .modalias = "ad7476", /* Name of spi_driver for this device */
1197 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1198 .bus_num = 0, /* Framework bus number */
1199 .chip_select = 1, /* Framework chip select. */
1200 .platform_data = NULL, /* No spi_driver specific config */
1201 .controller_data = &spi_ad7476_chip_info,
1202 .mode = SPI_MODE_3,
1203 },
1204#endif
1205#if defined(CONFIG_ADE7753) \
1206 || defined(CONFIG_ADE7753_MODULE)
1207 {
1208 .modalias = "ade7753",
1209 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1210 .bus_num = 0,
1211 .chip_select = 1, /* CS, change it for your board */
1212 .platform_data = NULL, /* No spi_driver specific config */
1213 .mode = SPI_MODE_1,
1214 },
1215#endif
1216#if defined(CONFIG_ADE7754) \
1217 || defined(CONFIG_ADE7754_MODULE)
1218 {
1219 .modalias = "ade7754",
1220 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1221 .bus_num = 0,
1222 .chip_select = 1, /* CS, change it for your board */
1223 .platform_data = NULL, /* No spi_driver specific config */
1224 .mode = SPI_MODE_1,
1225 },
1226#endif
1227#if defined(CONFIG_ADE7758) \
1228 || defined(CONFIG_ADE7758_MODULE)
1229 {
1230 .modalias = "ade7758",
1231 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1232 .bus_num = 0,
1233 .chip_select = 1, /* CS, change it for your board */
1234 .platform_data = NULL, /* No spi_driver specific config */
1235 .mode = SPI_MODE_1,
1236 },
1237#endif
1238#if defined(CONFIG_ADE7759) \
1239 || defined(CONFIG_ADE7759_MODULE)
1240 {
1241 .modalias = "ade7759",
1242 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1243 .bus_num = 0,
1244 .chip_select = 1, /* CS, change it for your board */
1245 .platform_data = NULL, /* No spi_driver specific config */
1246 .mode = SPI_MODE_1,
1247 },
1248#endif
1249#if defined(CONFIG_ADE7854_SPI) \
1250 || defined(CONFIG_ADE7854_SPI_MODULE)
1251 {
1252 .modalias = "ade7854",
1253 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1254 .bus_num = 0,
1255 .chip_select = 1, /* CS, change it for your board */
1256 .platform_data = NULL, /* No spi_driver specific config */
1257 .mode = SPI_MODE_3,
1258 },
1259#endif
1260#if defined(CONFIG_ADIS16060) \
1261 || defined(CONFIG_ADIS16060_MODULE)
1262 {
1263 .modalias = "adis16060_r",
1264 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1265 .bus_num = 0,
1266 .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1267 .platform_data = NULL, /* No spi_driver specific config */
1268 .mode = SPI_MODE_0,
1269 },
1270 {
1271 .modalias = "adis16060_w",
1272 .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1273 .bus_num = 0,
1274 .chip_select = 2, /* CS for write, change it for your board */
1275 .platform_data = NULL, /* No spi_driver specific config */
1276 .mode = SPI_MODE_1,
1277 },
1278#endif
1279#if defined(CONFIG_ADIS16130) \
1280 || defined(CONFIG_ADIS16130_MODULE)
1281 {
1282 .modalias = "adis16130",
1283 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1284 .bus_num = 0,
1285 .chip_select = 1, /* CS for read, change it for your board */
1286 .platform_data = NULL, /* No spi_driver specific config */
1287 .mode = SPI_MODE_3,
1288 },
1289#endif
1290#if defined(CONFIG_ADIS16201) \
1291 || defined(CONFIG_ADIS16201_MODULE)
1292 {
1293 .modalias = "adis16201",
1294 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1295 .bus_num = 0,
1296 .chip_select = 5, /* CS, change it for your board */
1297 .platform_data = NULL, /* No spi_driver specific config */
1298 .mode = SPI_MODE_3,
1299 .irq = IRQ_PF4,
1300 },
1301#endif
1302#if defined(CONFIG_ADIS16203) \
1303 || defined(CONFIG_ADIS16203_MODULE)
1304 {
1305 .modalias = "adis16203",
1306 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1307 .bus_num = 0,
1308 .chip_select = 5, /* CS, change it for your board */
1309 .platform_data = NULL, /* No spi_driver specific config */
1310 .mode = SPI_MODE_3,
1311 .irq = IRQ_PF4,
1312 },
1313#endif
1314#if defined(CONFIG_ADIS16204) \
1315 || defined(CONFIG_ADIS16204_MODULE)
1316 {
1317 .modalias = "adis16204",
1318 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1319 .bus_num = 0,
1320 .chip_select = 5, /* CS, change it for your board */
1321 .platform_data = NULL, /* No spi_driver specific config */
1322 .mode = SPI_MODE_3,
1323 .irq = IRQ_PF4,
1324 },
1325#endif
1326#if defined(CONFIG_ADIS16209) \
1327 || defined(CONFIG_ADIS16209_MODULE)
1328 {
1329 .modalias = "adis16209",
1330 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1331 .bus_num = 0,
1332 .chip_select = 5, /* CS, change it for your board */
1333 .platform_data = NULL, /* No spi_driver specific config */
1334 .mode = SPI_MODE_3,
1335 .irq = IRQ_PF4,
1336 },
1337#endif
1338#if defined(CONFIG_ADIS16220) \
1339 || defined(CONFIG_ADIS16220_MODULE)
1340 {
1341 .modalias = "adis16220",
1342 .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1343 .bus_num = 0,
1344 .chip_select = 5, /* CS, change it for your board */
1345 .platform_data = NULL, /* No spi_driver specific config */
1346 .mode = SPI_MODE_3,
1347 .irq = IRQ_PF4,
1348 },
1349#endif
1350#if defined(CONFIG_ADIS16240) \
1351 || defined(CONFIG_ADIS16240_MODULE)
1352 {
1353 .modalias = "adis16240",
1354 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1355 .bus_num = 0,
1356 .chip_select = 5, /* CS, change it for your board */
1357 .platform_data = NULL, /* No spi_driver specific config */
1358 .mode = SPI_MODE_3,
1359 .irq = IRQ_PF4,
1360 },
1361#endif
1362#if defined(CONFIG_ADIS16260) \
1363 || defined(CONFIG_ADIS16260_MODULE)
1364 {
1365 .modalias = "adis16260",
1366 .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1367 .bus_num = 0,
1368 .chip_select = 5, /* CS, change it for your board */
1369 .platform_data = NULL, /* No spi_driver specific config */
1370 .mode = SPI_MODE_3,
1371 .irq = IRQ_PF4,
1372 },
1373#endif
1374#if defined(CONFIG_ADIS16261) \
1375 || defined(CONFIG_ADIS16261_MODULE)
1376 {
1377 .modalias = "adis16261",
1378 .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1379 .bus_num = 0,
1380 .chip_select = 1, /* CS, change it for your board */
1381 .platform_data = NULL, /* No spi_driver specific config */
1382 .mode = SPI_MODE_3,
1383 },
1384#endif
1385#if defined(CONFIG_ADIS16300) \
1386 || defined(CONFIG_ADIS16300_MODULE)
1387 {
1388 .modalias = "adis16300",
1389 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1390 .bus_num = 0,
1391 .chip_select = 5, /* CS, change it for your board */
1392 .platform_data = NULL, /* No spi_driver specific config */
1393 .mode = SPI_MODE_3,
1394 .irq = IRQ_PF4,
1395 },
1396#endif
1397#if defined(CONFIG_ADIS16350) \
1398 || defined(CONFIG_ADIS16350_MODULE)
1399 {
1400 .modalias = "adis16364",
1401 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1402 .bus_num = 0,
1403 .chip_select = 5, /* CS, change it for your board */
1404 .platform_data = NULL, /* No spi_driver specific config */
1405 .mode = SPI_MODE_3,
1406 .irq = IRQ_PF4,
1407 },
1408#endif
1409#if defined(CONFIG_ADIS16400) \
1410 || defined(CONFIG_ADIS16400_MODULE)
1411 {
1412 .modalias = "adis16400",
1413 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1414 .bus_num = 0,
1415 .chip_select = 1, /* CS, change it for your board */
1416 .platform_data = NULL, /* No spi_driver specific config */
1417 .mode = SPI_MODE_3,
1418 },
1419#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001420};
1421
Mike Frysinger5bda2722008-06-07 15:03:01 +08001422#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001423/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001424static struct bfin5xx_spi_master bfin_spi0_info = {
Barry Songf9f0e3b2009-11-17 09:45:59 +00001425 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
Bryan Wu1394f032007-05-06 14:50:22 -07001426 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001427 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001428};
1429
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001430/* SPI (0) */
1431static struct resource bfin_spi0_resource[] = {
1432 [0] = {
1433 .start = SPI0_REGBASE,
1434 .end = SPI0_REGBASE + 0xFF,
1435 .flags = IORESOURCE_MEM,
1436 },
1437 [1] = {
1438 .start = CH_SPI,
1439 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001440 .flags = IORESOURCE_DMA,
1441 },
1442 [2] = {
1443 .start = IRQ_SPI,
1444 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001445 .flags = IORESOURCE_IRQ,
1446 },
1447};
1448
1449static struct platform_device bfin_spi0_device = {
1450 .name = "bfin-spi",
1451 .id = 0, /* Bus number */
1452 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1453 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001454 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001455 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001456 },
1457};
1458#endif /* spi master and devices */
1459
Cliff Cai1e9aa952009-03-28 23:28:51 +08001460#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1461
1462/* SPORT SPI controller data */
1463static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1464 .num_chipselect = 1, /* master only supports one device */
1465 .enable_dma = 0, /* master don't support DMA */
1466 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1467 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1468};
1469
1470static struct resource bfin_sport_spi0_resource[] = {
1471 [0] = {
1472 .start = SPORT0_TCR1,
1473 .end = SPORT0_TCR1 + 0xFF,
1474 .flags = IORESOURCE_MEM,
1475 },
1476 [1] = {
1477 .start = IRQ_SPORT0_ERROR,
1478 .end = IRQ_SPORT0_ERROR,
1479 .flags = IORESOURCE_IRQ,
1480 },
1481};
1482
1483static struct platform_device bfin_sport_spi0_device = {
1484 .name = "bfin-sport-spi",
1485 .id = 1, /* Bus number */
1486 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1487 .resource = bfin_sport_spi0_resource,
1488 .dev = {
1489 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1490 },
1491};
1492
1493static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1494 .num_chipselect = 1, /* master only supports one device */
1495 .enable_dma = 0, /* master don't support DMA */
1496 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1497 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1498};
1499
1500static struct resource bfin_sport_spi1_resource[] = {
1501 [0] = {
1502 .start = SPORT1_TCR1,
1503 .end = SPORT1_TCR1 + 0xFF,
1504 .flags = IORESOURCE_MEM,
1505 },
1506 [1] = {
1507 .start = IRQ_SPORT1_ERROR,
1508 .end = IRQ_SPORT1_ERROR,
1509 .flags = IORESOURCE_IRQ,
1510 },
1511};
1512
1513static struct platform_device bfin_sport_spi1_device = {
1514 .name = "bfin-sport-spi",
1515 .id = 2, /* Bus number */
1516 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1517 .resource = bfin_sport_spi1_resource,
1518 .dev = {
1519 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1520 },
1521};
1522
1523#endif /* sport spi master and devices */
1524
Bryan Wu1394f032007-05-06 14:50:22 -07001525#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1526static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001527 .name = "bf537-lq035",
1528};
1529#endif
1530
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001531#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1532#include <asm/bfin-lq035q1.h>
1533
1534static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001535 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1536 .ppi_mode = USE_RGB565_16_BIT_PPI,
1537 .use_bl = 0, /* let something else control the LCD Blacklight */
1538 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001539};
1540
1541static struct resource bfin_lq035q1_resources[] = {
1542 {
1543 .start = IRQ_PPI_ERROR,
1544 .end = IRQ_PPI_ERROR,
1545 .flags = IORESOURCE_IRQ,
1546 },
1547};
1548
1549static struct platform_device bfin_lq035q1_device = {
1550 .name = "bfin-lq035q1",
1551 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001552 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1553 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001554 .dev = {
1555 .platform_data = &bfin_lq035q1_data,
1556 },
1557};
1558#endif
1559
Bryan Wu1394f032007-05-06 14:50:22 -07001560#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001561#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001562static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001563 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001564 .start = UART0_THR,
1565 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001566 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001567 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001568 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001569 .start = IRQ_UART0_RX,
1570 .end = IRQ_UART0_RX+1,
1571 .flags = IORESOURCE_IRQ,
1572 },
1573 {
1574 .start = IRQ_UART0_ERROR,
1575 .end = IRQ_UART0_ERROR,
1576 .flags = IORESOURCE_IRQ,
1577 },
1578 {
1579 .start = CH_UART0_TX,
1580 .end = CH_UART0_TX,
1581 .flags = IORESOURCE_DMA,
1582 },
1583 {
1584 .start = CH_UART0_RX,
1585 .end = CH_UART0_RX,
1586 .flags = IORESOURCE_DMA,
1587 },
1588#ifdef CONFIG_BFIN_UART0_CTSRTS
1589 { /* CTS pin */
1590 .start = GPIO_PG7,
1591 .end = GPIO_PG7,
1592 .flags = IORESOURCE_IO,
1593 },
1594 { /* RTS pin */
1595 .start = GPIO_PG6,
1596 .end = GPIO_PG6,
1597 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001598 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001599#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001600};
1601
Mike Frysingera8b19882010-11-24 09:23:04 +00001602static unsigned short bfin_uart0_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001603 P_UART0_TX, P_UART0_RX, 0
1604};
1605
1606static struct platform_device bfin_uart0_device = {
1607 .name = "bfin-uart",
1608 .id = 0,
1609 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1610 .resource = bfin_uart0_resources,
1611 .dev = {
1612 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1613 },
1614};
1615#endif
1616#ifdef CONFIG_SERIAL_BFIN_UART1
1617static struct resource bfin_uart1_resources[] = {
1618 {
1619 .start = UART1_THR,
1620 .end = UART1_GCTL+2,
1621 .flags = IORESOURCE_MEM,
1622 },
1623 {
1624 .start = IRQ_UART1_RX,
1625 .end = IRQ_UART1_RX+1,
1626 .flags = IORESOURCE_IRQ,
1627 },
1628 {
1629 .start = IRQ_UART1_ERROR,
1630 .end = IRQ_UART1_ERROR,
1631 .flags = IORESOURCE_IRQ,
1632 },
1633 {
1634 .start = CH_UART1_TX,
1635 .end = CH_UART1_TX,
1636 .flags = IORESOURCE_DMA,
1637 },
1638 {
1639 .start = CH_UART1_RX,
1640 .end = CH_UART1_RX,
1641 .flags = IORESOURCE_DMA,
1642 },
1643};
1644
Mike Frysingera8b19882010-11-24 09:23:04 +00001645static unsigned short bfin_uart1_peripherals[] = {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001646 P_UART1_TX, P_UART1_RX, 0
1647};
1648
1649static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001650 .name = "bfin-uart",
1651 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001652 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1653 .resource = bfin_uart1_resources,
1654 .dev = {
1655 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1656 },
Bryan Wu1394f032007-05-06 14:50:22 -07001657};
1658#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001659#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001660
Graf Yang5be36d22008-04-25 03:09:15 +08001661#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001662#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001663static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001664 {
1665 .start = 0xFFC00400,
1666 .end = 0xFFC004FF,
1667 .flags = IORESOURCE_MEM,
1668 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001669 {
1670 .start = IRQ_UART0_RX,
1671 .end = IRQ_UART0_RX+1,
1672 .flags = IORESOURCE_IRQ,
1673 },
1674 {
1675 .start = CH_UART0_RX,
1676 .end = CH_UART0_RX+1,
1677 .flags = IORESOURCE_DMA,
1678 },
1679};
1680
1681static struct platform_device bfin_sir0_device = {
1682 .name = "bfin_sir",
1683 .id = 0,
1684 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1685 .resource = bfin_sir0_resources,
1686};
Graf Yang5be36d22008-04-25 03:09:15 +08001687#endif
1688#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001689static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001690 {
1691 .start = 0xFFC02000,
1692 .end = 0xFFC020FF,
1693 .flags = IORESOURCE_MEM,
1694 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001695 {
1696 .start = IRQ_UART1_RX,
1697 .end = IRQ_UART1_RX+1,
1698 .flags = IORESOURCE_IRQ,
1699 },
1700 {
1701 .start = CH_UART1_RX,
1702 .end = CH_UART1_RX+1,
1703 .flags = IORESOURCE_DMA,
1704 },
Graf Yang5be36d22008-04-25 03:09:15 +08001705};
1706
Graf Yang42bd8bc2009-01-07 23:14:39 +08001707static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001708 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001709 .id = 1,
1710 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1711 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001712};
1713#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001714#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001715
Bryan Wu1394f032007-05-06 14:50:22 -07001716#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001717static struct resource bfin_twi0_resource[] = {
1718 [0] = {
1719 .start = TWI0_REGBASE,
1720 .end = TWI0_REGBASE,
1721 .flags = IORESOURCE_MEM,
1722 },
1723 [1] = {
1724 .start = IRQ_TWI,
1725 .end = IRQ_TWI,
1726 .flags = IORESOURCE_IRQ,
1727 },
1728};
1729
Bryan Wu1394f032007-05-06 14:50:22 -07001730static struct platform_device i2c_bfin_twi_device = {
1731 .name = "i2c-bfin-twi",
1732 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001733 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1734 .resource = bfin_twi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001735};
1736#endif
1737
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001738#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001739static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1740 [0] = KEY_GRAVE,
1741 [1] = KEY_1,
1742 [2] = KEY_2,
1743 [3] = KEY_3,
1744 [4] = KEY_4,
1745 [5] = KEY_5,
1746 [6] = KEY_6,
1747 [7] = KEY_7,
1748 [8] = KEY_8,
1749 [9] = KEY_9,
1750 [10] = KEY_0,
1751 [11] = KEY_MINUS,
1752 [12] = KEY_EQUAL,
1753 [13] = KEY_BACKSLASH,
1754 [15] = KEY_KP0,
1755 [16] = KEY_Q,
1756 [17] = KEY_W,
1757 [18] = KEY_E,
1758 [19] = KEY_R,
1759 [20] = KEY_T,
1760 [21] = KEY_Y,
1761 [22] = KEY_U,
1762 [23] = KEY_I,
1763 [24] = KEY_O,
1764 [25] = KEY_P,
1765 [26] = KEY_LEFTBRACE,
1766 [27] = KEY_RIGHTBRACE,
1767 [29] = KEY_KP1,
1768 [30] = KEY_KP2,
1769 [31] = KEY_KP3,
1770 [32] = KEY_A,
1771 [33] = KEY_S,
1772 [34] = KEY_D,
1773 [35] = KEY_F,
1774 [36] = KEY_G,
1775 [37] = KEY_H,
1776 [38] = KEY_J,
1777 [39] = KEY_K,
1778 [40] = KEY_L,
1779 [41] = KEY_SEMICOLON,
1780 [42] = KEY_APOSTROPHE,
1781 [43] = KEY_BACKSLASH,
1782 [45] = KEY_KP4,
1783 [46] = KEY_KP5,
1784 [47] = KEY_KP6,
1785 [48] = KEY_102ND,
1786 [49] = KEY_Z,
1787 [50] = KEY_X,
1788 [51] = KEY_C,
1789 [52] = KEY_V,
1790 [53] = KEY_B,
1791 [54] = KEY_N,
1792 [55] = KEY_M,
1793 [56] = KEY_COMMA,
1794 [57] = KEY_DOT,
1795 [58] = KEY_SLASH,
1796 [60] = KEY_KPDOT,
1797 [61] = KEY_KP7,
1798 [62] = KEY_KP8,
1799 [63] = KEY_KP9,
1800 [64] = KEY_SPACE,
1801 [65] = KEY_BACKSPACE,
1802 [66] = KEY_TAB,
1803 [67] = KEY_KPENTER,
1804 [68] = KEY_ENTER,
1805 [69] = KEY_ESC,
1806 [70] = KEY_DELETE,
1807 [74] = KEY_KPMINUS,
1808 [76] = KEY_UP,
1809 [77] = KEY_DOWN,
1810 [78] = KEY_RIGHT,
1811 [79] = KEY_LEFT,
1812};
1813
1814static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1815 .rows = 8,
1816 .cols = 10,
1817 .keymap = adp5588_keymap,
1818 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1819 .repeat = 0,
1820};
1821#endif
1822
Michael Hennerich3ea57212009-03-28 22:15:07 +08001823#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1824#include <linux/mfd/adp5520.h>
1825
1826 /*
1827 * ADP5520/5501 Backlight Data
1828 */
1829
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001830static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1831 .fade_in = ADP5520_FADE_T_1200ms,
1832 .fade_out = ADP5520_FADE_T_1200ms,
1833 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1834 .en_ambl_sens = 1,
1835 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1836 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1837 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1838 .l2_office_max = ADP5520_BL_CUR_mA(7),
1839 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1840 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1841 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1842 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1843 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1844 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1845 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001846};
1847
1848 /*
1849 * ADP5520/5501 LEDs Data
1850 */
1851
Michael Hennerich3ea57212009-03-28 22:15:07 +08001852static struct led_info adp5520_leds[] = {
1853 {
1854 .name = "adp5520-led1",
1855 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001856 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001857 },
1858#ifdef ADP5520_EN_ALL_LEDS
1859 {
1860 .name = "adp5520-led2",
1861 .default_trigger = "none",
1862 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1863 },
1864 {
1865 .name = "adp5520-led3",
1866 .default_trigger = "none",
1867 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1868 },
1869#endif
1870};
1871
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001872static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001873 .num_leds = ARRAY_SIZE(adp5520_leds),
1874 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001875 .fade_in = ADP5520_FADE_T_600ms,
1876 .fade_out = ADP5520_FADE_T_600ms,
1877 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001878};
1879
1880 /*
1881 * ADP5520 GPIO Data
1882 */
1883
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001884static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001885 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001886 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1887 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001888};
1889
1890 /*
1891 * ADP5520 Keypad Data
1892 */
1893
Michael Hennerich3ea57212009-03-28 22:15:07 +08001894static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001895 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1896 [ADP5520_KEY(0, 1)] = KEY_1,
1897 [ADP5520_KEY(0, 2)] = KEY_2,
1898 [ADP5520_KEY(0, 3)] = KEY_3,
1899 [ADP5520_KEY(1, 0)] = KEY_4,
1900 [ADP5520_KEY(1, 1)] = KEY_5,
1901 [ADP5520_KEY(1, 2)] = KEY_6,
1902 [ADP5520_KEY(1, 3)] = KEY_7,
1903 [ADP5520_KEY(2, 0)] = KEY_8,
1904 [ADP5520_KEY(2, 1)] = KEY_9,
1905 [ADP5520_KEY(2, 2)] = KEY_0,
1906 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1907 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1908 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1909 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1910 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001911};
1912
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001913static struct adp5520_keys_platform_data adp5520_keys_data = {
1914 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1915 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001916 .keymap = adp5520_keymap,
1917 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1918 .repeat = 0,
1919};
1920
1921 /*
Stefan Weileef35c22010-08-06 21:11:15 +02001922 * ADP5520/5501 Multifunction Device Init Data
Michael Hennerich3ea57212009-03-28 22:15:07 +08001923 */
1924
Michael Hennerich3ea57212009-03-28 22:15:07 +08001925static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001926 .backlight = &adp5520_backlight_data,
1927 .leds = &adp5520_leds_data,
1928 .gpio = &adp5520_gpio_data,
1929 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001930};
1931
1932#endif
1933
Michael Hennerichba877d42009-08-27 04:09:32 +00001934#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001935static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00001936 .gpio_start = 50,
1937 .pullup_dis_mask = 0,
1938};
1939#endif
1940
Michael Hennerich78756c62009-10-13 15:28:33 +00001941#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1942#include <linux/i2c/adp8870.h>
1943static struct led_info adp8870_leds[] = {
1944 {
1945 .name = "adp8870-led7",
1946 .default_trigger = "none",
1947 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1948 },
1949};
1950
1951
1952static struct adp8870_backlight_platform_data adp8870_pdata = {
1953 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1954 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1955 .pwm_assign = 0, /* 1 = Enables PWM mode */
1956
1957 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1958 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1959 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1960
1961 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1962 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1963
1964 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1965 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1966 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1967 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1968 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1969 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1970 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1971 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1972 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1973 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1974
1975 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1976 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1977 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1978 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1979 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1980 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1981 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1982 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1983
1984 .leds = adp8870_leds,
1985 .num_leds = ARRAY_SIZE(adp8870_leds),
1986 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1987 .led_fade_in = ADP8870_FADE_T_600ms,
1988 .led_fade_out = ADP8870_FADE_T_600ms,
1989 .led_on_time = ADP8870_LED_ONT_200ms,
1990};
1991#endif
1992
Michael Hennerich72fa2e92010-02-24 21:05:35 +00001993#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
1994#include <linux/i2c/adp8860.h>
1995static struct led_info adp8860_leds[] = {
1996 {
1997 .name = "adp8860-led7",
1998 .default_trigger = "none",
1999 .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2000 },
2001};
2002
2003static struct adp8860_backlight_platform_data adp8860_pdata = {
2004 .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2005 ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2006
2007 .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2008 .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2009 .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2010
2011 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2012 .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2013
2014 .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2015 .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2016 .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2017 .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2018 .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2019 .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2020
2021 .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2022 .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2023 .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2024 .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2025
2026 .leds = adp8860_leds,
2027 .num_leds = ARRAY_SIZE(adp8860_leds),
2028 .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2029 .led_fade_in = ADP8860_FADE_T_600ms,
2030 .led_fade_out = ADP8860_FADE_T_600ms,
2031 .led_on_time = ADP8860_LED_ONT_200ms,
2032};
2033#endif
2034
Sonic Zhangf32792d2010-02-09 02:47:09 +00002035#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2036static struct regulator_consumer_supply ad5398_consumer = {
2037 .supply = "current",
2038};
2039
2040static struct regulator_init_data ad5398_regulator_data = {
2041 .constraints = {
2042 .name = "current range",
2043 .max_uA = 120000,
2044 .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2045 },
2046 .num_consumer_supplies = 1,
2047 .consumer_supplies = &ad5398_consumer,
2048};
2049
Sonic Zhangf32792d2010-02-09 02:47:09 +00002050#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2051 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2052static struct platform_device ad5398_virt_consumer_device = {
2053 .name = "reg-virt-consumer",
2054 .id = 0,
2055 .dev = {
2056 .platform_data = "current", /* Passed to driver */
2057 },
2058};
2059#endif
2060#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2061 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2062static struct regulator_bulk_data ad5398_bulk_data = {
2063 .supply = "current",
2064};
2065
2066static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2067 .name = "ad5398",
2068 .num_supplies = 1,
2069 .supplies = &ad5398_bulk_data,
2070};
2071
2072static struct platform_device ad5398_userspace_consumer_device = {
2073 .name = "reg-userspace-consumer",
2074 .id = 0,
2075 .dev = {
2076 .platform_data = &ad5398_userspace_comsumer_data,
2077 },
2078};
2079#endif
2080#endif
2081
Michael Hennerich0891bae2010-03-08 11:58:53 +00002082#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2083/* INT bound temperature alarm event. line 1 */
2084static unsigned long adt7410_platform_data[2] = {
2085 IRQ_PG4, IRQF_TRIGGER_LOW,
2086};
2087#endif
2088
2089#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2090/* INT bound temperature alarm event. line 1 */
2091static unsigned long adt7316_i2c_data[2] = {
2092 IRQF_TRIGGER_LOW, /* interrupt flags */
2093 GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2094};
2095#endif
2096
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002097static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Barry Song92b20f72010-03-17 08:12:30 +00002098#if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
2099 {
2100 I2C_BOARD_INFO("ad1937", 0x04),
2101 },
2102#endif
2103
Yi Lia65912c2010-04-06 05:53:16 +00002104#if defined(CONFIG_SND_BF5XX_SOC_ADAV80X) || defined(CONFIG_SND_BF5XX_SOC_ADAV80X_MODULE)
2105 {
2106 I2C_BOARD_INFO("adav803", 0x10),
2107 },
2108#endif
2109
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002110#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002111 {
Barry Song427f2772009-07-17 07:04:55 +00002112 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00002113 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00002114 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002115 },
2116#endif
Barry Songad6720c2010-02-03 09:15:31 +00002117
2118#if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2119 {
2120 I2C_BOARD_INFO("ad7150", 0x48),
2121 .irq = IRQ_PG5, /* fixme: use real interrupt number */
2122 },
2123#endif
2124
2125#if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2126 {
2127 I2C_BOARD_INFO("ad7152", 0x48),
2128 },
2129#endif
2130
2131#if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2132 {
2133 I2C_BOARD_INFO("ad774x", 0x48),
2134 },
2135#endif
2136
Sonic Zhang5f022592010-02-24 07:32:50 +00002137#if defined(CONFIG_AD7414) || defined(CONFIG_AD7414_MODULE)
2138 {
2139 I2C_BOARD_INFO("ad7414", 0x9),
2140 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002141 .irq_flags = IRQF_TRIGGER_LOW,
Sonic Zhang5f022592010-02-24 07:32:50 +00002142 },
2143#endif
2144
Sonic Zhangef8873e2010-02-25 10:27:48 +00002145#if defined(CONFIG_AD7416) || defined(CONFIG_AD7416_MODULE)
2146 {
2147 I2C_BOARD_INFO("ad7417", 0xb),
2148 .irq = IRQ_PG5,
Michael Hennerich0891bae2010-03-08 11:58:53 +00002149 .irq_flags = IRQF_TRIGGER_LOW,
2150 .platform_data = (void *)GPIO_PF4,
2151 },
2152#endif
2153
2154#if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2155 {
2156 I2C_BOARD_INFO("ade7854", 0x38),
2157 },
2158#endif
2159
2160#if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2161 {
2162 I2C_BOARD_INFO("adt75", 0x9),
2163 .irq = IRQ_PG5,
2164 .irq_flags = IRQF_TRIGGER_LOW,
2165 },
2166#endif
2167
2168#if defined(CONFIG_ADT7408) || defined(CONFIG_ADT7408_MODULE)
2169 {
2170 I2C_BOARD_INFO("adt7408", 0x18),
2171 .irq = IRQ_PG5,
2172 .irq_flags = IRQF_TRIGGER_LOW,
2173 },
2174#endif
2175
2176#if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2177 {
2178 I2C_BOARD_INFO("adt7410", 0x48),
2179 /* CT critical temperature event. line 0 */
2180 .irq = IRQ_PG5,
2181 .irq_flags = IRQF_TRIGGER_LOW,
2182 .platform_data = (void *)&adt7410_platform_data,
2183 },
2184#endif
2185
2186#if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2187 {
2188 I2C_BOARD_INFO("ad7291", 0x20),
2189 .irq = IRQ_PG5,
2190 .irq_flags = IRQF_TRIGGER_LOW,
2191 },
2192#endif
2193
2194#if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2195 {
2196 I2C_BOARD_INFO("adt7316", 0x48),
2197 .irq = IRQ_PG6,
2198 .platform_data = (void *)&adt7316_i2c_data,
Sonic Zhangef8873e2010-02-25 10:27:48 +00002199 },
2200#endif
2201
Michael Hennerichebd58332009-07-02 11:00:38 +00002202#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002203 {
2204 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002205 },
2206#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00002207#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002208 {
2209 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08002210 .irq = IRQ_PG6,
2211 },
2212#endif
2213#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2214 {
2215 I2C_BOARD_INFO("ad7879", 0x2F),
2216 .irq = IRQ_PG5,
2217 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002218 },
2219#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08002220#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2221 {
2222 I2C_BOARD_INFO("adp5588-keys", 0x34),
2223 .irq = IRQ_PG0,
2224 .platform_data = (void *)&adp5588_kpad_data,
2225 },
2226#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08002227#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2228 {
2229 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04002230 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08002231 .platform_data = (void *)&adp5520_pdev_data,
2232 },
2233#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00002234#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2235 {
2236 I2C_BOARD_INFO("adxl34x", 0x53),
2237 .irq = IRQ_PG3,
2238 .platform_data = (void *)&adxl34x_info,
2239 },
2240#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00002241#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2242 {
2243 I2C_BOARD_INFO("adp5588-gpio", 0x34),
2244 .platform_data = (void *)&adp5588_gpio_data,
2245 },
2246#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00002247#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2248 {
2249 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2250 },
2251#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002252#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2253 {
Sonic Zhang948ca1a2010-08-18 09:17:25 +00002254 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00002255 },
2256#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00002257#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2258 {
2259 I2C_BOARD_INFO("adp8870", 0x2B),
2260 .platform_data = (void *)&adp8870_pdata,
2261 },
2262#endif
Cliff Caid53127f2009-10-15 02:33:04 +00002263#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2264 {
2265 I2C_BOARD_INFO("adau1371", 0x1A),
2266 },
2267#endif
Cliff Cai04267632009-10-28 06:50:36 +00002268#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2269 {
2270 I2C_BOARD_INFO("adau1761", 0x38),
2271 },
2272#endif
Cliff Caic48d7672010-02-11 09:27:18 +00002273#if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2274 {
2275 I2C_BOARD_INFO("adau1361", 0x38),
2276 },
2277#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00002278#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2279 {
2280 I2C_BOARD_INFO("ad5258", 0x18),
2281 },
2282#endif
Cliff Cai29bb3bc2010-01-14 08:28:38 +00002283#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2284 {
2285 I2C_BOARD_INFO("ssm2602", 0x1b),
2286 },
2287#endif
Sonic Zhangf32792d2010-02-09 02:47:09 +00002288#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2289 {
2290 I2C_BOARD_INFO("ad5398", 0xC),
Sonic Zhang27e9f0b2010-06-02 08:24:18 +00002291 .platform_data = (void *)&ad5398_regulator_data,
Sonic Zhangf32792d2010-02-09 02:47:09 +00002292 },
2293#endif
Michael Hennerich72fa2e92010-02-24 21:05:35 +00002294#if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2295 {
2296 I2C_BOARD_INFO("adp8860", 0x2A),
2297 .platform_data = (void *)&adp8860_pdata,
2298 },
2299#endif
Cliff Cai3cbcb162010-04-22 05:55:56 +00002300#if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2301 {
2302 I2C_BOARD_INFO("adau1373", 0x1A),
2303 },
2304#endif
steven miao39d3c1c2010-08-26 08:25:13 +00002305#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2306 {
2307 I2C_BOARD_INFO("ad5252", 0x2e),
2308 },
2309#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002310};
Bryan Wu81d9c7f2008-03-26 10:02:13 +08002311
Bryan Wu1394f032007-05-06 14:50:22 -07002312#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002313#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2314static struct resource bfin_sport0_uart_resources[] = {
2315 {
2316 .start = SPORT0_TCR1,
2317 .end = SPORT0_MRCS3+4,
2318 .flags = IORESOURCE_MEM,
2319 },
2320 {
2321 .start = IRQ_SPORT0_RX,
2322 .end = IRQ_SPORT0_RX+1,
2323 .flags = IORESOURCE_IRQ,
2324 },
2325 {
2326 .start = IRQ_SPORT0_ERROR,
2327 .end = IRQ_SPORT0_ERROR,
2328 .flags = IORESOURCE_IRQ,
2329 },
2330};
2331
Mike Frysingera8b19882010-11-24 09:23:04 +00002332static unsigned short bfin_sport0_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +00002333 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +00002334 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Sonic Zhangdf5de262009-09-23 05:01:56 +00002335};
2336
Bryan Wu1394f032007-05-06 14:50:22 -07002337static struct platform_device bfin_sport0_uart_device = {
2338 .name = "bfin-sport-uart",
2339 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002340 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2341 .resource = bfin_sport0_uart_resources,
2342 .dev = {
2343 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2344 },
2345};
2346#endif
2347#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2348static struct resource bfin_sport1_uart_resources[] = {
2349 {
2350 .start = SPORT1_TCR1,
2351 .end = SPORT1_MRCS3+4,
2352 .flags = IORESOURCE_MEM,
2353 },
2354 {
2355 .start = IRQ_SPORT1_RX,
2356 .end = IRQ_SPORT1_RX+1,
2357 .flags = IORESOURCE_IRQ,
2358 },
2359 {
2360 .start = IRQ_SPORT1_ERROR,
2361 .end = IRQ_SPORT1_ERROR,
2362 .flags = IORESOURCE_IRQ,
2363 },
2364};
2365
Mike Frysingera8b19882010-11-24 09:23:04 +00002366static unsigned short bfin_sport1_peripherals[] = {
Sonic Zhangdf5de262009-09-23 05:01:56 +00002367 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
Sonic Zhange54b6732010-11-12 02:45:38 +00002368 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
Bryan Wu1394f032007-05-06 14:50:22 -07002369};
2370
2371static struct platform_device bfin_sport1_uart_device = {
2372 .name = "bfin-sport-uart",
2373 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002374 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2375 .resource = bfin_sport1_uart_resources,
2376 .dev = {
2377 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2378 },
Bryan Wu1394f032007-05-06 14:50:22 -07002379};
2380#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002381#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002382
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002383#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002384#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2385/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002386
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002387#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2388#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002389static struct pata_platform_info bfin_pata_platform_data = {
2390 .ioport_shift = 1,
Mike Frysinger64e5c512007-10-30 11:56:13 +08002391 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002392};
2393
2394static struct resource bfin_pata_resources[] = {
2395 {
2396 .start = 0x20314020,
2397 .end = 0x2031403F,
2398 .flags = IORESOURCE_MEM,
2399 },
2400 {
2401 .start = 0x2031401C,
2402 .end = 0x2031401F,
2403 .flags = IORESOURCE_MEM,
2404 },
2405 {
2406 .start = PATA_INT,
2407 .end = PATA_INT,
2408 .flags = IORESOURCE_IRQ,
2409 },
2410};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002411#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2412static struct pata_platform_info bfin_pata_platform_data = {
2413 .ioport_shift = 0,
2414};
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002415/* CompactFlash Storage Card Memory Mapped Addressing
Michael Hennerich648882d2009-04-21 12:05:50 +00002416 * /REG = A11 = 1
2417 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002418static struct resource bfin_pata_resources[] = {
2419 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002420 .start = 0x20211800,
2421 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002422 .flags = IORESOURCE_MEM,
2423 },
2424 {
Michael Hennerich648882d2009-04-21 12:05:50 +00002425 .start = 0x2021180E, /* Device Ctl */
2426 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08002427 .flags = IORESOURCE_MEM,
2428 },
2429};
2430#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002431
2432static struct platform_device bfin_pata_device = {
2433 .name = "pata_platform",
2434 .id = -1,
2435 .num_resources = ARRAY_SIZE(bfin_pata_resources),
2436 .resource = bfin_pata_resources,
2437 .dev = {
2438 .platform_data = &bfin_pata_platform_data,
2439 }
2440};
2441#endif
2442
Michael Hennerich14b03202008-05-07 11:41:26 +08002443static const unsigned int cclk_vlev_datasheet[] =
2444{
2445 VRPAIR(VLEV_085, 250000000),
2446 VRPAIR(VLEV_090, 376000000),
2447 VRPAIR(VLEV_095, 426000000),
2448 VRPAIR(VLEV_100, 426000000),
2449 VRPAIR(VLEV_105, 476000000),
2450 VRPAIR(VLEV_110, 476000000),
2451 VRPAIR(VLEV_115, 476000000),
2452 VRPAIR(VLEV_120, 500000000),
2453 VRPAIR(VLEV_125, 533000000),
2454 VRPAIR(VLEV_130, 600000000),
2455};
2456
2457static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2458 .tuple_tab = cclk_vlev_datasheet,
2459 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2460 .vr_settling_time = 25 /* us */,
2461};
2462
2463static struct platform_device bfin_dpmc = {
2464 .name = "bfin dpmc",
2465 .dev = {
2466 .platform_data = &bfin_dmpc_vreg_data,
2467 },
2468};
2469
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002470#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2471 defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2472 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2473
2474#define SPORT_REQ(x) \
2475 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2476 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2477
2478static const u16 bfin_snd_pin[][7] = {
2479 SPORT_REQ(0),
2480 SPORT_REQ(1),
2481};
2482
2483static struct bfin_snd_platform_data bfin_snd_data[] = {
2484 {
2485 .pin_req = &bfin_snd_pin[0][0],
2486 },
2487 {
2488 .pin_req = &bfin_snd_pin[1][0],
2489 },
2490};
2491
2492#define BFIN_SND_RES(x) \
2493 [x] = { \
2494 { \
2495 .start = SPORT##x##_TCR1, \
2496 .end = SPORT##x##_TCR1, \
2497 .flags = IORESOURCE_MEM \
2498 }, \
2499 { \
2500 .start = CH_SPORT##x##_RX, \
2501 .end = CH_SPORT##x##_RX, \
2502 .flags = IORESOURCE_DMA, \
2503 }, \
2504 { \
2505 .start = CH_SPORT##x##_TX, \
2506 .end = CH_SPORT##x##_TX, \
2507 .flags = IORESOURCE_DMA, \
2508 }, \
2509 { \
2510 .start = IRQ_SPORT##x##_ERROR, \
2511 .end = IRQ_SPORT##x##_ERROR, \
2512 .flags = IORESOURCE_IRQ, \
2513 } \
2514 }
2515
2516static struct resource bfin_snd_resources[][4] = {
2517 BFIN_SND_RES(0),
2518 BFIN_SND_RES(1),
2519};
Scott Jiang2b6678c52011-07-05 19:27:25 -04002520#endif
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002521
Scott Jiang2b6678c52011-07-05 19:27:25 -04002522#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2523static struct platform_device bfin_i2s_pcm = {
2524 .name = "bfin-i2s-pcm-audio",
2525 .id = -1,
2526};
2527#endif
2528
2529#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2530static struct platform_device bfin_tdm_pcm = {
2531 .name = "bfin-tdm-pcm-audio",
2532 .id = -1,
2533};
2534#endif
2535
2536#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2537static struct platform_device bfin_ac97_pcm = {
2538 .name = "bfin-ac97-pcm-audio",
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002539 .id = -1,
2540};
2541#endif
2542
Scott Jiange0754d82011-08-16 19:08:42 -04002543#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002544static struct platform_device bfin_ad73311_codec_device = {
2545 .name = "ad73311",
2546 .id = -1,
2547};
2548#endif
2549
2550#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002551static struct platform_device bfin_i2s = {
2552 .name = "bfin-i2s",
2553 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002554 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2555 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2556 .dev = {
2557 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2558 },
Barry Song336746e2009-10-13 09:19:18 +00002559};
2560#endif
2561
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002562#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
Barry Song83124402009-08-06 21:03:02 +00002563static struct platform_device bfin_tdm = {
2564 .name = "bfin-tdm",
Barry Song336746e2009-10-13 09:19:18 +00002565 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002566 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2567 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2568 .dev = {
2569 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2570 },
Barry Song336746e2009-10-13 09:19:18 +00002571};
2572#endif
2573
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002574#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002575static struct platform_device bfin_ac97 = {
2576 .name = "bfin-ac97",
2577 .id = CONFIG_SND_BF5XX_SPORT_NUM,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002578 .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2579 .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2580 .dev = {
2581 .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2582 },
Barry Song83124402009-08-06 21:03:02 +00002583};
2584#endif
2585
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002586#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2587#define REGULATOR_ADP122 "adp122"
2588#define REGULATOR_ADP122_UV 2500000
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002589
2590static struct regulator_consumer_supply adp122_consumers = {
2591 .supply = REGULATOR_ADP122,
2592};
2593
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002594static struct regulator_init_data adp_switch_regulator_data = {
2595 .constraints = {
2596 .name = REGULATOR_ADP122,
2597 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2598 .min_uV = REGULATOR_ADP122_UV,
2599 .max_uV = REGULATOR_ADP122_UV,
2600 .min_uA = 0,
2601 .max_uA = 300000,
2602 },
2603 .num_consumer_supplies = 1, /* only 1 */
2604 .consumer_supplies = &adp122_consumers,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002605};
2606
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002607static struct fixed_voltage_config adp_switch_pdata = {
2608 .supply_name = REGULATOR_ADP122,
2609 .microvolts = REGULATOR_ADP122_UV,
2610 .gpio = GPIO_PF2,
2611 .enable_high = 1,
2612 .enabled_at_boot = 0,
2613 .init_data = &adp_switch_regulator_data,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002614};
2615
2616static struct platform_device adp_switch_device = {
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002617 .name = "reg-fixed-voltage",
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002618 .id = 0,
2619 .dev = {
2620 .platform_data = &adp_switch_pdata,
2621 },
2622};
2623
2624#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2625 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2626static struct regulator_bulk_data adp122_bulk_data = {
2627 .supply = REGULATOR_ADP122,
2628};
2629
2630static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2631 .name = REGULATOR_ADP122,
2632 .num_supplies = 1,
2633 .supplies = &adp122_bulk_data,
2634};
2635
2636static struct platform_device adp122_userspace_consumer_device = {
2637 .name = "reg-userspace-consumer",
2638 .id = 0,
2639 .dev = {
2640 .platform_data = &adp122_userspace_comsumer_data,
2641 },
2642};
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002643#endif
2644#endif
2645
Michael Hennerich0891bae2010-03-08 11:58:53 +00002646#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2647 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2648
2649static struct resource iio_gpio_trigger_resources[] = {
2650 [0] = {
2651 .start = IRQ_PF5,
2652 .end = IRQ_PF5,
2653 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2654 },
2655};
2656
2657static struct platform_device iio_gpio_trigger = {
2658 .name = "iio_gpio_trigger",
2659 .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2660 .resource = iio_gpio_trigger_resources,
2661};
2662#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002663
Bryan Wu1394f032007-05-06 14:50:22 -07002664static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08002665
2666 &bfin_dpmc,
2667
Bryan Wu1394f032007-05-06 14:50:22 -07002668#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2669 &bfin_pcmcia_cf_device,
2670#endif
2671
2672#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2673 &rtc_device,
2674#endif
2675
2676#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2677 &sl811_hcd_device,
2678#endif
2679
2680#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2681 &isp1362_hcd_device,
2682#endif
2683
Michael Hennerich3f375692008-11-18 17:48:22 +08002684#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2685 &bfin_isp1760_device,
2686#endif
2687
Bryan Wu1394f032007-05-06 14:50:22 -07002688#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2689 &smc91x_device,
2690#endif
2691
Alex Landauf40d24d2007-07-12 12:11:48 +08002692#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2693 &dm9000_device,
2694#endif
2695
Barry Song706a01b2009-11-02 07:29:07 +00002696#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2697 &bfin_can_device,
2698#endif
2699
Bryan Wu1394f032007-05-06 14:50:22 -07002700#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08002701 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07002702 &bfin_mac_device,
2703#endif
2704
2705#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2706 &net2272_bfin_device,
2707#endif
2708
2709#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002710 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07002711#endif
2712
Cliff Cai1e9aa952009-03-28 23:28:51 +08002713#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2714 &bfin_sport_spi0_device,
2715 &bfin_sport_spi1_device,
2716#endif
2717
Bryan Wu1394f032007-05-06 14:50:22 -07002718#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2719 &bfin_fb_device,
2720#endif
2721
Michael Hennerich2043f3f2008-10-13 14:46:30 +08002722#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2723 &bfin_lq035q1_device,
2724#endif
2725
Bryan Wu1394f032007-05-06 14:50:22 -07002726#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00002727#ifdef CONFIG_SERIAL_BFIN_UART0
2728 &bfin_uart0_device,
2729#endif
2730#ifdef CONFIG_SERIAL_BFIN_UART1
2731 &bfin_uart1_device,
2732#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002733#endif
2734
Graf Yang5be36d22008-04-25 03:09:15 +08002735#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08002736#ifdef CONFIG_BFIN_SIR0
2737 &bfin_sir0_device,
2738#endif
2739#ifdef CONFIG_BFIN_SIR1
2740 &bfin_sir1_device,
2741#endif
Graf Yang5be36d22008-04-25 03:09:15 +08002742#endif
2743
Bryan Wu1394f032007-05-06 14:50:22 -07002744#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2745 &i2c_bfin_twi_device,
2746#endif
2747
2748#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00002749#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002750 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00002751#endif
2752#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07002753 &bfin_sport1_uart_device,
2754#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00002755#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002756
2757#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2758 &bfin_pata_device,
2759#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08002760
2761#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2762 &bfin_device_gpiokeys,
2763#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08002764
Mike Frysingerfc689112008-06-25 11:41:42 +08002765#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2766 &bfin_async_nand_device,
2767#endif
2768
Mike Frysinger793dc272008-03-26 08:09:12 +08002769#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08002770 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08002771#endif
Barry Song83124402009-08-06 21:03:02 +00002772
Scott Jiang2b6678c52011-07-05 19:27:25 -04002773#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2774 &bfin_i2s_pcm,
2775#endif
2776
2777#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2778 &bfin_tdm_pcm,
2779#endif
2780
2781#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2782 &bfin_ac97_pcm,
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002783#endif
2784
Scott Jiange0754d82011-08-16 19:08:42 -04002785#if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002786 &bfin_ad73311_codec_device,
2787#endif
2788
2789#if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002790 &bfin_i2s,
2791#endif
2792
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002793#if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
Barry Song83124402009-08-06 21:03:02 +00002794 &bfin_tdm,
2795#endif
Barry Song336746e2009-10-13 09:19:18 +00002796
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002797#if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
Barry Song336746e2009-10-13 09:19:18 +00002798 &bfin_ac97,
2799#endif
Scott Jiang6f53dbb2011-03-01 09:43:50 +00002800
Sonic Zhangf32792d2010-02-09 02:47:09 +00002801#if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2802#if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2803 defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2804 &ad5398_virt_consumer_device,
2805#endif
2806#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2807 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2808 &ad5398_userspace_consumer_device,
2809#endif
2810#endif
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002811
Sonic Zhang1b04cbe2010-06-02 05:00:21 +00002812#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002813 &adp_switch_device,
2814#if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2815 defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2816 &adp122_userspace_consumer_device,
Sonic Zhangf8e6dbf2010-02-10 09:09:05 +00002817#endif
2818#endif
Michael Hennerich0891bae2010-03-08 11:58:53 +00002819
2820#if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2821 defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2822 &iio_gpio_trigger,
2823#endif
Bryan Wu1394f032007-05-06 14:50:22 -07002824};
2825
Mike Frysinger9be86312011-05-04 11:20:15 -04002826static int __init net2272_init(void)
2827{
2828#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2829 int ret;
2830
2831 ret = gpio_request(GPIO_PF6, "net2272");
2832 if (ret)
2833 return ret;
2834
2835 /* Reset the USB chip */
2836 gpio_direction_output(GPIO_PF6, 0);
2837 mdelay(2);
2838 gpio_set_value(GPIO_PF6, 1);
2839#endif
2840
2841 return 0;
2842}
2843
Bryan Wu1394f032007-05-06 14:50:22 -07002844static int __init stamp_init(void)
2845{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08002846 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08002847 bfin_plat_nand_init();
Mike Frysinger0531c462010-01-19 07:04:29 +00002848 adf702x_mac_init();
Bryan Wu1394f032007-05-06 14:50:22 -07002849 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00002850 i2c_register_board_info(0, bfin_i2c_board_info,
2851 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08002852 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002853
Mike Frysinger9be86312011-05-04 11:20:15 -04002854 if (net2272_init())
2855 pr_warning("unable to configure net2272; it probably won't work\n");
2856
Bryan Wu1394f032007-05-06 14:50:22 -07002857 return 0;
2858}
2859
2860arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002861
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00002862
2863static struct platform_device *stamp_early_devices[] __initdata = {
2864#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2865#ifdef CONFIG_SERIAL_BFIN_UART0
2866 &bfin_uart0_device,
2867#endif
2868#ifdef CONFIG_SERIAL_BFIN_UART1
2869 &bfin_uart1_device,
2870#endif
2871#endif
2872
2873#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
2874#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2875 &bfin_sport0_uart_device,
2876#endif
2877#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2878 &bfin_sport1_uart_device,
2879#endif
2880#endif
2881};
2882
2883void __init native_machine_early_platform_add_devices(void)
2884{
2885 printk(KERN_INFO "register early platform devices\n");
2886 early_platform_add_devices(stamp_early_devices,
2887 ARRAY_SIZE(stamp_early_devices));
2888}
2889
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002890void native_machine_restart(char *cmd)
2891{
2892 /* workaround reboot hang when booting from SPI */
2893 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08002894 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002895}
Mike Frysinger137b1522007-11-22 16:07:03 +08002896
2897/*
2898 * Currently the MAC address is saved in Flash by U-Boot
2899 */
2900#define FLASH_MAC 0x203f0000
Mike Frysinger9862cc52007-11-15 21:21:20 +08002901void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08002902{
2903 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2904 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2905}
Mike Frysinger9862cc52007-11-15 21:21:20 +08002906EXPORT_SYMBOL(bfin_get_ether_addr);