blob: e3a90e60e2496e5d1c85cfde81ee983aa3f0aff1 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/toto.c
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * Derived from drivers/mtd/autcpu12.c
7 *
8 * Copyright (c) 2002 Thomas Gleixner <tgxl@linutronix.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Overview:
15 * This is a device driver for the NAND flash device found on the
16 * TI fido board. It supports 32MiB and 64MiB cards
17 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000018 * $Id: toto.c,v 1.5 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070019 */
20
21#include <linux/slab.h>
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/delay.h>
25#include <linux/mtd/mtd.h>
26#include <linux/mtd/nand.h>
27#include <linux/mtd/partitions.h>
28#include <asm/io.h>
29#include <asm/arch/hardware.h>
30#include <asm/sizes.h>
31#include <asm/arch/toto.h>
32#include <asm/arch-omap1510/hardware.h>
33#include <asm/arch/gpio.h>
34
35/*
36 * MTD structure for TOTO board
37 */
38static struct mtd_info *toto_mtd = NULL;
39
40static unsigned long toto_io_base = OMAP_FLASH_1_BASE;
41
42#define CONFIG_NAND_WORKAROUND 1
43
44#define NAND_NCE 0x4000
45#define NAND_CLE 0x1000
46#define NAND_ALE 0x0002
47#define NAND_MASK (NAND_CLE | NAND_ALE | NAND_NCE)
48
49#define T_NAND_CTL_CLRALE(iob) gpiosetout(NAND_ALE, 0)
50#define T_NAND_CTL_SETALE(iob) gpiosetout(NAND_ALE, NAND_ALE)
David Woodhousee0c7d762006-05-13 18:07:53 +010051#ifdef CONFIG_NAND_WORKAROUND /* "some" dev boards busted, blue wired to rts2 :( */
Linus Torvalds1da177e2005-04-16 15:20:36 -070052#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0); rts2setout(2, 2)
53#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE); rts2setout(2, 0)
54#else
55#define T_NAND_CTL_CLRCLE(iob) gpiosetout(NAND_CLE, 0)
56#define T_NAND_CTL_SETCLE(iob) gpiosetout(NAND_CLE, NAND_CLE)
57#endif
58#define T_NAND_CTL_SETNCE(iob) gpiosetout(NAND_NCE, 0)
59#define T_NAND_CTL_CLRNCE(iob) gpiosetout(NAND_NCE, NAND_NCE)
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000060
Linus Torvalds1da177e2005-04-16 15:20:36 -070061/*
62 * Define partitions for flash devices
63 */
64
65static struct mtd_partition partition_info64M[] = {
66 { .name = "toto kernel partition 1",
67 .offset = 0,
68 .size = 2 * SZ_1M },
69 { .name = "toto file sys partition 2",
70 .offset = 2 * SZ_1M,
71 .size = 14 * SZ_1M },
72 { .name = "toto user partition 3",
73 .offset = 16 * SZ_1M,
74 .size = 16 * SZ_1M },
75 { .name = "toto devboard extra partition 4",
76 .offset = 32 * SZ_1M,
77 .size = 32 * SZ_1M },
78};
79
80static struct mtd_partition partition_info32M[] = {
81 { .name = "toto kernel partition 1",
82 .offset = 0,
83 .size = 2 * SZ_1M },
84 { .name = "toto file sys partition 2",
85 .offset = 2 * SZ_1M,
86 .size = 14 * SZ_1M },
87 { .name = "toto user partition 3",
88 .offset = 16 * SZ_1M,
89 .size = 16 * SZ_1M },
90};
91
92#define NUM_PARTITIONS32M 3
93#define NUM_PARTITIONS64M 4
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000094/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 * hardware specific access to control-lines
96*/
97
98static void toto_hwcontrol(struct mtd_info *mtd, int cmd)
99{
100
David Woodhousee0c7d762006-05-13 18:07:53 +0100101 udelay(1); /* hopefully enough time for tc make proceding write to clear */
102 switch (cmd) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 case NAND_CTL_SETCLE: T_NAND_CTL_SETCLE(cmd); break;
104 case NAND_CTL_CLRCLE: T_NAND_CTL_CLRCLE(cmd); break;
105
106 case NAND_CTL_SETALE: T_NAND_CTL_SETALE(cmd); break;
107 case NAND_CTL_CLRALE: T_NAND_CTL_CLRALE(cmd); break;
108
109 case NAND_CTL_SETNCE: T_NAND_CTL_SETNCE(cmd); break;
110 case NAND_CTL_CLRNCE: T_NAND_CTL_CLRNCE(cmd); break;
111 }
David Woodhousee0c7d762006-05-13 18:07:53 +0100112 udelay(1); /* allow time to ensure gpio state to over take memory write */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113}
114
115/*
116 * Main initialization routine
117 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100118int __init toto_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119{
120 struct nand_chip *this;
121 int err = 0;
122
123 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100124 toto_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 if (!toto_mtd) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100126 printk(KERN_WARNING "Unable to allocate toto NAND MTD device structure.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 err = -ENOMEM;
128 goto out;
129 }
130
131 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100132 this = (struct nand_chip *)(&toto_mtd[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
134 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100135 memset(toto_mtd, 0, sizeof(struct mtd_info));
136 memset(this, 0, sizeof(struct nand_chip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
138 /* Link the private data with the MTD structure */
139 toto_mtd->priv = this;
140
141 /* Set address of NAND IO lines */
142 this->IO_ADDR_R = toto_io_base;
143 this->IO_ADDR_W = toto_io_base;
144 this->hwcontrol = toto_hwcontrol;
145 this->dev_ready = NULL;
146 /* 25 us command delay time */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000147 this->chip_delay = 30;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 this->eccmode = NAND_ECC_SOFT;
149
David Woodhousee0c7d762006-05-13 18:07:53 +0100150 /* Scan to find existance of the device */
151 if (nand_scan(toto_mtd, 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 err = -ENXIO;
153 goto out_mtd;
154 }
155
156 /* Register the partitions */
David Woodhousee0c7d762006-05-13 18:07:53 +0100157 switch (toto_mtd->size) {
158 case SZ_64M:
159 add_mtd_partitions(toto_mtd, partition_info64M, NUM_PARTITIONS64M);
160 break;
161 case SZ_32M:
162 add_mtd_partitions(toto_mtd, partition_info32M, NUM_PARTITIONS32M);
163 break;
164 default:{
165 printk(KERN_WARNING "Unsupported Nand device\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166 err = -ENXIO;
167 goto out_buf;
168 }
169 }
170
David Woodhousee0c7d762006-05-13 18:07:53 +0100171 gpioreserve(NAND_MASK); /* claim our gpios */
172 archflashwp(0, 0); /* open up flash for writing */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173
174 goto out;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000175
David Woodhousee0c7d762006-05-13 18:07:53 +0100176 out_buf:
177 kfree(this->data_buf);
178 out_mtd:
179 kfree(toto_mtd);
180 out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 return err;
182}
183
184module_init(toto_init);
185
186/*
187 * Clean up routine
188 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100189static void __exit toto_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190{
191 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100192 nand_release(toto_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
194 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100195 kfree(toto_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196
197 /* stop flash writes */
David Woodhousee0c7d762006-05-13 18:07:53 +0100198 archflashwp(0, 1);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000199
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 /* release gpios to system */
David Woodhousee0c7d762006-05-13 18:07:53 +0100201 gpiorelease(NAND_MASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202}
David Woodhousee0c7d762006-05-13 18:07:53 +0100203
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204module_exit(toto_cleanup);
205
206MODULE_LICENSE("GPL");
207MODULE_AUTHOR("Richard Woodruff <r-woodruff2@ti.com>");
208MODULE_DESCRIPTION("Glue layer for NAND flash on toto board");