blob: 9ceaa7a7bd00a62c818b8201baf29ec8e485bd12 [file] [log] [blame]
Stephen Rothwellcabb5582005-09-30 16:16:52 +10001#include <linux/config.h>
Stephen Rothwellcabb5582005-09-30 16:16:52 +10002#include <asm/page.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +10003#include <asm-generic/vmlinux.lds.h>
4
Michael Ellermane19e4ab2005-11-03 16:03:06 +11005ENTRY(_stext)
6
Stephen Rothwellcabb5582005-09-30 16:16:52 +10007#ifdef CONFIG_PPC64
8OUTPUT_ARCH(powerpc:common64)
9jiffies = jiffies_64;
10#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +100011OUTPUT_ARCH(powerpc:common)
12jiffies = jiffies_64 + 4;
Stephen Rothwellcabb5582005-09-30 16:16:52 +100013#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100014SECTIONS
15{
Stephen Rothwellcabb5582005-09-30 16:16:52 +100016 /* Sections to be discarded. */
17 /DISCARD/ : {
18 *(.exitcall.exit)
Stephen Rothwellcabb5582005-09-30 16:16:52 +100019 *(.exit.data)
Stephen Rothwellcabb5582005-09-30 16:16:52 +100020 }
21
Michael Ellermane19e4ab2005-11-03 16:03:06 +110022 . = KERNELBASE;
Stephen Rothwellcabb5582005-09-30 16:16:52 +100023
Paul Mackerras14cf11a2005-09-26 16:04:21 +100024 /* Read-only sections, merged into text segment: */
Stephen Rothwellcabb5582005-09-30 16:16:52 +100025#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100026 . = + SIZEOF_HEADERS;
27 .interp : { *(.interp) }
28 .hash : { *(.hash) }
29 .dynsym : { *(.dynsym) }
30 .dynstr : { *(.dynstr) }
31 .rel.text : { *(.rel.text) }
32 .rela.text : { *(.rela.text) }
33 .rel.data : { *(.rel.data) }
34 .rela.data : { *(.rela.data) }
35 .rel.rodata : { *(.rel.rodata) }
36 .rela.rodata : { *(.rela.rodata) }
37 .rel.got : { *(.rel.got) }
38 .rela.got : { *(.rela.got) }
39 .rel.ctors : { *(.rel.ctors) }
40 .rela.ctors : { *(.rela.ctors) }
41 .rel.dtors : { *(.rel.dtors) }
42 .rela.dtors : { *(.rela.dtors) }
43 .rel.bss : { *(.rel.bss) }
44 .rela.bss : { *(.rela.bss) }
45 .rel.plt : { *(.rel.plt) }
46 .rela.plt : { *(.rela.plt) }
47/* .init : { *(.init) } =0*/
48 .plt : { *(.plt) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100049#endif
50 .text : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +100051 *(.text .text.*)
Paul Mackerras14cf11a2005-09-26 16:04:21 +100052 SCHED_TEXT
53 LOCK_TEXT
Stephen Rothwellcabb5582005-09-30 16:16:52 +100054 KPROBES_TEXT
Paul Mackerras14cf11a2005-09-26 16:04:21 +100055 *(.fixup)
Stephen Rothwellcabb5582005-09-30 16:16:52 +100056#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100057 *(.got1)
58 __got2_start = .;
59 *(.got2)
60 __got2_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +100061#else
62 . = ALIGN(PAGE_SIZE);
63 _etext = .;
64#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100065 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100066#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100067 _etext = .;
68 PROVIDE (etext = .);
69
70 RODATA
71 .fini : { *(.fini) } =0
72 .ctors : { *(.ctors) }
73 .dtors : { *(.dtors) }
74
75 .fixup : { *(.fixup) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +100076#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100077
78 __ex_table : {
79 __start___ex_table = .;
80 *(__ex_table)
81 __stop___ex_table = .;
82 }
83
84 __bug_table : {
85 __start___bug_table = .;
86 *(__bug_table)
87 __stop___bug_table = .;
88 }
89
Stephen Rothwellcabb5582005-09-30 16:16:52 +100090#ifdef CONFIG_PPC64
91 __ftr_fixup : {
92 __start___ftr_fixup = .;
93 *(__ftr_fixup)
94 __stop___ftr_fixup = .;
95 }
96
97 RODATA
98#endif
99
100#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000101 /* Read-write section, merged into data segment: */
Paul Mackerras4a288562005-10-10 22:38:46 +1000102 . = ALIGN(PAGE_SIZE);
Paul Mackerrasc16ff7e2005-10-06 13:28:31 +1000103 _sdata = .;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000104 .data :
105 {
106 *(.data)
107 *(.data1)
108 *(.sdata)
109 *(.sdata2)
110 *(.got.plt) *(.got)
111 *(.dynamic)
112 CONSTRUCTORS
113 }
114
Paul Mackerras4a288562005-10-10 22:38:46 +1000115 . = ALIGN(PAGE_SIZE);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000116 __nosave_begin = .;
117 .data_nosave : { *(.data.nosave) }
Paul Mackerras4a288562005-10-10 22:38:46 +1000118 . = ALIGN(PAGE_SIZE);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000119 __nosave_end = .;
120
121 . = ALIGN(32);
122 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
123
124 _edata = .;
125 PROVIDE (edata = .);
126
127 . = ALIGN(8192);
128 .data.init_task : { *(.data.init_task) }
Paul Mackerras4a288562005-10-10 22:38:46 +1000129#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000130
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000131 /* will be freed after init */
132 . = ALIGN(PAGE_SIZE);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000133 __init_begin = .;
134 .init.text : {
135 _sinittext = .;
136 *(.init.text)
137 _einittext = .;
138 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000139#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000140 /* .exit.text is discarded at runtime, not link time,
141 to deal with references from __bug_table */
142 .exit.text : { *(.exit.text) }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000143#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000144 .init.data : {
145 *(.init.data);
146 __vtop_table_begin = .;
147 *(.vtop_fixup);
148 __vtop_table_end = .;
149 __ptov_table_begin = .;
150 *(.ptov_fixup);
151 __ptov_table_end = .;
152 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000153
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000154 . = ALIGN(16);
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000155 .init.setup : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000156 __setup_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000157 *(.init.setup)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000158 __setup_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000159 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000160
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000161 .initcall.init : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000162 __initcall_start = .;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000163 *(.initcall1.init)
164 *(.initcall2.init)
165 *(.initcall3.init)
166 *(.initcall4.init)
167 *(.initcall5.init)
168 *(.initcall6.init)
169 *(.initcall7.init)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000170 __initcall_end = .;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000171 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000172
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000173 .con_initcall.init : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000174 __con_initcall_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000175 *(.con_initcall.init)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000176 __con_initcall_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000177 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000178
179 SECURITY_INIT
180
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000181#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000182 __start___ftr_fixup = .;
183 __ftr_fixup : { *(__ftr_fixup) }
184 __stop___ftr_fixup = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000185#else
186 . = ALIGN(PAGE_SIZE);
187 .init.ramfs : {
188 __initramfs_start = .;
189 *(.init.ramfs)
190 __initramfs_end = .;
191 }
192#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000193
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000194#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000195 . = ALIGN(32);
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000196#endif
197 .data.percpu : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000198 __per_cpu_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000199 *(.data.percpu)
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000200 __per_cpu_end = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000201 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000202
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000203 . = ALIGN(PAGE_SIZE);
Paul Mackerras4a288562005-10-10 22:38:46 +1000204#ifdef CONFIG_PPC64
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000205 . = ALIGN(16384);
206 __init_end = .;
207 /* freed after init ends here */
208
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000209 /* Read/write sections */
210 . = ALIGN(PAGE_SIZE);
211 . = ALIGN(16384);
Paul Mackerras4a288562005-10-10 22:38:46 +1000212 _sdata = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000213 /* The initial task and kernel stack */
214 .data.init_task : {
215 *(.data.init_task)
216 }
217
218 . = ALIGN(PAGE_SIZE);
219 .data.page_aligned : {
220 *(.data.page_aligned)
221 }
222
223 .data.cacheline_aligned : {
224 *(.data.cacheline_aligned)
225 }
226
227 .data : {
228 *(.data .data.rel* .toc1)
229 *(.branch_lt)
230 }
231
232 .opd : {
233 *(.opd)
234 }
235
236 .got : {
237 __toc_start = .;
238 *(.got)
239 *(.toc)
240 . = ALIGN(PAGE_SIZE);
241 _edata = .;
242 }
243
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000244 . = ALIGN(PAGE_SIZE);
245#else
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000246 __initramfs_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000247 .init.ramfs : {
248 *(.init.ramfs)
249 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000250 __initramfs_end = .;
251
252 . = ALIGN(4096);
253 __init_end = .;
254
255 . = ALIGN(4096);
256 _sextratext = .;
257 _eextratext = .;
258
259 __bss_start = .;
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000260#endif
Paul Mackerras4a288562005-10-10 22:38:46 +1000261
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000262 .bss : {
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000263 __bss_start = .;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000264 *(.sbss) *(.scommon)
265 *(.dynbss)
266 *(.bss)
267 *(COMMON)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000268 __bss_stop = .;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000269 }
Stephen Rothwellcabb5582005-09-30 16:16:52 +1000270
271#ifdef CONFIG_PPC64
272 . = ALIGN(PAGE_SIZE);
273#endif
274 _end = . ;
275#ifdef CONFIG_PPC32
276 PROVIDE (end = .);
277#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000278}