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review.evervolv.com / android_kernel_htc_msm8960 / e1a228973646bfa09575423cf5c40b3d0f40d670 / . / arch / powerpc / boot / dts / mpc8536ds.dts
blob: b6fd8564c0e37a9da47549bbfef3b10557f02545 [file] [log] [blame]
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]1/*
2 * MPC8536 DS Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 pci3 = &pci3;
29 };
30
31 cpus {
32 #cpus = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8536@0 {
37 device_type = "cpu";
38 reg = <0>;
39 next-level-cache = <&L2>;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 00000000>; // Filled by U-Boot
46 };
47
48 soc@ffe00000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
Kim Phillipscf0d19f2008-07-29 15:29:24 -0500[diff] [blame]52 compatible = "simple-bus";
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]53 ranges = <0x0 0xffe00000 0x100000>;
54 reg = <0xffe00000 0x1000>;
55 bus-frequency = <0>; // Filled out by uboot.
56
Kumar Galae1a22892009-04-22 13:17:42 -0500[diff] [blame^]57 ecm-law@0 {
58 compatible = "fsl,ecm-law";
59 reg = <0x0 0x1000>;
60 fsl,num-laws = <12>;
61 };
62
63 ecm@1000 {
64 compatible = "fsl,mpc8536-ecm", "fsl,ecm";
65 reg = <0x1000 0x1000>;
66 interrupts = <17 2>;
67 interrupt-parent = <&mpic>;
68 };
69
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]70 memory-controller@2000 {
71 compatible = "fsl,mpc8536-memory-controller";
72 reg = <0x2000 0x1000>;
73 interrupt-parent = <&mpic>;
74 interrupts = <18 0x2>;
75 };
76
77 L2: l2-cache-controller@20000 {
78 compatible = "fsl,mpc8536-l2-cache-controller";
79 reg = <0x20000 0x1000>;
80 interrupt-parent = <&mpic>;
81 interrupts = <16 0x2>;
82 };
83
84 i2c@3000 {
85 #address-cells = <1>;
86 #size-cells = <0>;
87 cell-index = <0>;
88 compatible = "fsl-i2c";
89 reg = <0x3000 0x100>;
90 interrupts = <43 0x2>;
91 interrupt-parent = <&mpic>;
92 dfsrr;
93 };
94
95 i2c@3100 {
96 #address-cells = <1>;
97 #size-cells = <0>;
98 cell-index = <1>;
99 compatible = "fsl-i2c";
100 reg = <0x3100 0x100>;
101 interrupts = <43 0x2>;
102 interrupt-parent = <&mpic>;
103 dfsrr;
104 rtc@68 {
105 compatible = "dallas,ds3232";
106 reg = <0x68>;
Kumar Gala92ae9542008-10-02 03:58:08 -0500[diff] [blame]107 interrupts = <0 0x1>;
108 interrupt-parent = <&mpic>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]109 };
110 };
111
112 dma@21300 {
113 #address-cells = <1>;
114 #size-cells = <1>;
115 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
116 reg = <0x21300 4>;
117 ranges = <0 0x21100 0x200>;
118 cell-index = <0>;
119 dma-channel@0 {
120 compatible = "fsl,mpc8536-dma-channel",
121 "fsl,eloplus-dma-channel";
122 reg = <0x0 0x80>;
123 cell-index = <0>;
124 interrupt-parent = <&mpic>;
Ed Swarthout13690332008-10-17 00:41:32 -0500[diff] [blame]125 interrupts = <20 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]126 };
127 dma-channel@80 {
128 compatible = "fsl,mpc8536-dma-channel",
129 "fsl,eloplus-dma-channel";
130 reg = <0x80 0x80>;
131 cell-index = <1>;
132 interrupt-parent = <&mpic>;
Ed Swarthout13690332008-10-17 00:41:32 -0500[diff] [blame]133 interrupts = <21 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]134 };
135 dma-channel@100 {
136 compatible = "fsl,mpc8536-dma-channel",
137 "fsl,eloplus-dma-channel";
138 reg = <0x100 0x80>;
139 cell-index = <2>;
140 interrupt-parent = <&mpic>;
Ed Swarthout13690332008-10-17 00:41:32 -0500[diff] [blame]141 interrupts = <22 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]142 };
143 dma-channel@180 {
144 compatible = "fsl,mpc8536-dma-channel",
145 "fsl,eloplus-dma-channel";
146 reg = <0x180 0x80>;
147 cell-index = <3>;
148 interrupt-parent = <&mpic>;
Ed Swarthout13690332008-10-17 00:41:32 -0500[diff] [blame]149 interrupts = <23 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]150 };
151 };
152
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]153 usb@22000 {
154 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
155 reg = <0x22000 0x1000>;
156 #address-cells = <1>;
157 #size-cells = <0>;
158 interrupt-parent = <&mpic>;
159 interrupts = <28 0x2>;
160 phy_type = "ulpi";
161 };
162
163 usb@23000 {
164 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
165 reg = <0x23000 0x1000>;
166 #address-cells = <1>;
167 #size-cells = <0>;
168 interrupt-parent = <&mpic>;
169 interrupts = <46 0x2>;
170 phy_type = "ulpi";
171 };
172
173 enet0: ethernet@24000 {
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]174 #address-cells = <1>;
175 #size-cells = <1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]176 cell-index = <0>;
177 device_type = "network";
Jason Jinba556ed2008-10-16 17:31:32 +0800[diff] [blame]178 model = "eTSEC";
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]179 compatible = "gianfar";
180 reg = <0x24000 0x1000>;
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]181 ranges = <0x0 0x24000 0x1000>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <29 2 30 2 34 2>;
184 interrupt-parent = <&mpic>;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800[diff] [blame]185 tbi-handle = <&tbi0>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]186 phy-handle = <&phy1>;
187 phy-connection-type = "rgmii-id";
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]188
189 mdio@520 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 compatible = "fsl,gianfar-mdio";
193 reg = <0x520 0x20>;
194
195 phy0: ethernet-phy@0 {
196 interrupt-parent = <&mpic>;
197 interrupts = <10 0x1>;
198 reg = <0>;
199 device_type = "ethernet-phy";
200 };
201 phy1: ethernet-phy@1 {
202 interrupt-parent = <&mpic>;
203 interrupts = <10 0x1>;
204 reg = <1>;
205 device_type = "ethernet-phy";
206 };
207 tbi0: tbi-phy@11 {
208 reg = <0x11>;
209 device_type = "tbi-phy";
210 };
211 };
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]212 };
213
214 enet1: ethernet@26000 {
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]215 #address-cells = <1>;
216 #size-cells = <1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]217 cell-index = <1>;
218 device_type = "network";
Jason Jinba556ed2008-10-16 17:31:32 +0800[diff] [blame]219 model = "eTSEC";
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]220 compatible = "gianfar";
221 reg = <0x26000 0x1000>;
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]222 ranges = <0x0 0x26000 0x1000>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]223 local-mac-address = [ 00 00 00 00 00 00 ];
224 interrupts = <31 2 32 2 33 2>;
225 interrupt-parent = <&mpic>;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800[diff] [blame]226 tbi-handle = <&tbi1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]227 phy-handle = <&phy0>;
228 phy-connection-type = "rgmii-id";
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300[diff] [blame]229
230 mdio@520 {
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "fsl,gianfar-tbi";
234 reg = <0x520 0x20>;
235
236 tbi1: tbi-phy@11 {
237 reg = <0x11>;
238 device_type = "tbi-phy";
239 };
240 };
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]241 };
242
243 usb@2b000 {
244 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
245 reg = <0x2b000 0x1000>;
246 #address-cells = <1>;
247 #size-cells = <0>;
248 interrupt-parent = <&mpic>;
249 interrupts = <60 0x2>;
250 dr_mode = "peripheral";
251 phy_type = "ulpi";
252 };
253
254 serial0: serial@4500 {
255 cell-index = <0>;
256 device_type = "serial";
257 compatible = "ns16550";
258 reg = <0x4500 0x100>;
259 clock-frequency = <0>;
260 interrupts = <42 0x2>;
261 interrupt-parent = <&mpic>;
262 };
263
264 serial1: serial@4600 {
265 cell-index = <1>;
266 device_type = "serial";
267 compatible = "ns16550";
268 reg = <0x4600 0x100>;
269 clock-frequency = <0>;
270 interrupts = <42 0x2>;
271 interrupt-parent = <&mpic>;
272 };
273
Kim Phillips3fd44732008-07-08 19:13:33 -0500[diff] [blame]274 crypto@30000 {
275 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
276 "fsl,sec2.1", "fsl,sec2.0";
277 reg = <0x30000 0x10000>;
278 interrupts = <45 2 58 2>;
279 interrupt-parent = <&mpic>;
280 fsl,num-channels = <4>;
281 fsl,channel-fifo-len = <24>;
282 fsl,exec-units-mask = <0x9fe>;
283 fsl,descriptor-types-mask = <0x3ab0ebf>;
284 };
285
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]286 sata@18000 {
287 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
288 reg = <0x18000 0x1000>;
289 cell-index = <1>;
290 interrupts = <74 0x2>;
291 interrupt-parent = <&mpic>;
292 };
293
294 sata@19000 {
295 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
296 reg = <0x19000 0x1000>;
297 cell-index = <2>;
298 interrupts = <41 0x2>;
299 interrupt-parent = <&mpic>;
300 };
301
302 global-utilities@e0000 { //global utilities block
303 compatible = "fsl,mpc8548-guts";
304 reg = <0xe0000 0x1000>;
305 fsl,has-rstcr;
306 };
307
308 mpic: pic@40000 {
309 clock-frequency = <0>;
310 interrupt-controller;
311 #address-cells = <0>;
312 #interrupt-cells = <2>;
313 reg = <0x40000 0x40000>;
314 compatible = "chrp,open-pic";
315 device_type = "open-pic";
316 big-endian;
317 };
318
319 msi@41600 {
320 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
321 reg = <0x41600 0x80>;
322 msi-available-ranges = <0 0x100>;
323 interrupts = <
324 0xe0 0
325 0xe1 0
326 0xe2 0
327 0xe3 0
328 0xe4 0
329 0xe5 0
330 0xe6 0
331 0xe7 0>;
332 interrupt-parent = <&mpic>;
333 };
334 };
335
336 pci0: pci@ffe08000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]337 compatible = "fsl,mpc8540-pci";
338 device_type = "pci";
339 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
340 interrupt-map = <
341
342 /* IDSEL 0x11 J17 Slot 1 */
343 0x8800 0 0 1 &mpic 1 1
344 0x8800 0 0 2 &mpic 2 1
345 0x8800 0 0 3 &mpic 3 1
346 0x8800 0 0 4 &mpic 4 1>;
347
348 interrupt-parent = <&mpic>;
349 interrupts = <24 0x2>;
350 bus-range = <0 0xff>;
351 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
352 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
353 clock-frequency = <66666666>;
354 #interrupt-cells = <1>;
355 #size-cells = <2>;
356 #address-cells = <3>;
357 reg = <0xffe08000 0x1000>;
358 };
359
360 pci1: pcie@ffe09000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]361 compatible = "fsl,mpc8548-pcie";
362 device_type = "pci";
363 #interrupt-cells = <1>;
364 #size-cells = <2>;
365 #address-cells = <3>;
366 reg = <0xffe09000 0x1000>;
367 bus-range = <0 0xff>;
368 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
369 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
370 clock-frequency = <33333333>;
371 interrupt-parent = <&mpic>;
372 interrupts = <25 0x2>;
373 interrupt-map-mask = <0xf800 0 0 7>;
374 interrupt-map = <
375 /* IDSEL 0x0 */
376 0000 0 0 1 &mpic 4 1
377 0000 0 0 2 &mpic 5 1
378 0000 0 0 3 &mpic 6 1
379 0000 0 0 4 &mpic 7 1
380 >;
381 pcie@0 {
382 reg = <0 0 0 0 0>;
383 #size-cells = <2>;
384 #address-cells = <3>;
385 device_type = "pci";
386 ranges = <0x02000000 0 0x98000000
387 0x02000000 0 0x98000000
388 0 0x08000000
389
390 0x01000000 0 0x00000000
391 0x01000000 0 0x00000000
392 0 0x00010000>;
393 };
394 };
395
396 pci2: pcie@ffe0a000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]397 compatible = "fsl,mpc8548-pcie";
398 device_type = "pci";
399 #interrupt-cells = <1>;
400 #size-cells = <2>;
401 #address-cells = <3>;
402 reg = <0xffe0a000 0x1000>;
403 bus-range = <0 0xff>;
404 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
405 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
406 clock-frequency = <33333333>;
407 interrupt-parent = <&mpic>;
408 interrupts = <26 0x2>;
409 interrupt-map-mask = <0xf800 0 0 7>;
410 interrupt-map = <
411 /* IDSEL 0x0 */
412 0000 0 0 1 &mpic 0 1
413 0000 0 0 2 &mpic 1 1
414 0000 0 0 3 &mpic 2 1
415 0000 0 0 4 &mpic 3 1
416 >;
417 pcie@0 {
418 reg = <0 0 0 0 0>;
419 #size-cells = <2>;
420 #address-cells = <3>;
421 device_type = "pci";
422 ranges = <0x02000000 0 0x90000000
423 0x02000000 0 0x90000000
424 0 0x08000000
425
426 0x01000000 0 0x00000000
427 0x01000000 0 0x00000000
428 0 0x00010000>;
429 };
430 };
431
432 pci3: pcie@ffe0b000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500[diff] [blame]433 compatible = "fsl,mpc8548-pcie";
434 device_type = "pci";
435 #interrupt-cells = <1>;
436 #size-cells = <2>;
437 #address-cells = <3>;
438 reg = <0xffe0b000 0x1000>;
439 bus-range = <0 0xff>;
440 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
441 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
442 clock-frequency = <33333333>;
443 interrupt-parent = <&mpic>;
444 interrupts = <27 0x2>;
445 interrupt-map-mask = <0xf800 0 0 7>;
446 interrupt-map = <
447 /* IDSEL 0x0 */
448 0000 0 0 1 &mpic 8 1
449 0000 0 0 2 &mpic 9 1
450 0000 0 0 3 &mpic 10 1
451 0000 0 0 4 &mpic 11 1
452 >;
453
454 pcie@0 {
455 reg = <0 0 0 0 0>;
456 #size-cells = <2>;
457 #address-cells = <3>;
458 device_type = "pci";
459 ranges = <0x02000000 0 0xa0000000
460 0x02000000 0 0xa0000000
461 0 0x20000000
462
463 0x01000000 0 0x00000000
464 0x01000000 0 0x00000000
465 0 0x00100000>;
466 };
467 };
468};