blob: b2a811347b655070472857cac98e6f782c692a78 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Mike Frysinger550d5532008-02-02 15:55:37 +08002 * arch/blackfin/kernel/setup.c
Bryan Wu1394f032007-05-06 14:50:22 -07003 *
Mike Frysinger550d5532008-02-02 15:55:37 +08004 * Copyright 2004-2006 Analog Devices Inc.
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Mike Frysinger550d5532008-02-02 15:55:37 +08006 * Enter bugs at http://blackfin.uclinux.org/
Bryan Wu1394f032007-05-06 14:50:22 -07007 *
Mike Frysinger550d5532008-02-02 15:55:37 +08008 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07009 */
10
11#include <linux/delay.h>
12#include <linux/console.h>
13#include <linux/bootmem.h>
14#include <linux/seq_file.h>
15#include <linux/cpu.h>
Mike Frysinger259fea42009-01-07 23:14:39 +080016#include <linux/mm.h>
Bryan Wu1394f032007-05-06 14:50:22 -070017#include <linux/module.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/tty.h>
Yi Li856783b2008-02-09 02:26:01 +080019#include <linux/pfn.h>
Bryan Wu1394f032007-05-06 14:50:22 -070020
21#include <linux/ext2_fs.h>
22#include <linux/cramfs_fs.h>
23#include <linux/romfs_fs.h>
24
Robin Getz3bebca22007-10-10 23:55:26 +080025#include <asm/cplb.h>
Bryan Wu1394f032007-05-06 14:50:22 -070026#include <asm/cacheflush.h>
27#include <asm/blackfin.h>
28#include <asm/cplbinit.h>
Mike Frysinger1754a5d2007-11-23 11:28:11 +080029#include <asm/div64.h>
Graf Yang8f658732008-11-18 17:48:22 +080030#include <asm/cpu.h>
Bernd Schmidt7adfb582007-06-21 11:34:16 +080031#include <asm/fixed_code.h>
Robin Getzce3afa12007-10-09 17:28:36 +080032#include <asm/early_printk.h>
Bryan Wu1394f032007-05-06 14:50:22 -070033
Mike Frysingera9c59c22007-05-21 18:09:32 +080034u16 _bfin_swrst;
Mike Frysingerd45118b2008-02-25 12:24:44 +080035EXPORT_SYMBOL(_bfin_swrst);
Mike Frysingera9c59c22007-05-21 18:09:32 +080036
Bryan Wu1394f032007-05-06 14:50:22 -070037unsigned long memory_start, memory_end, physical_mem_end;
Mike Frysinger3132b582008-04-24 05:12:09 +080038unsigned long _rambase, _ramstart, _ramend;
Bryan Wu1394f032007-05-06 14:50:22 -070039unsigned long reserved_mem_dcache_on;
40unsigned long reserved_mem_icache_on;
41EXPORT_SYMBOL(memory_start);
42EXPORT_SYMBOL(memory_end);
43EXPORT_SYMBOL(physical_mem_end);
44EXPORT_SYMBOL(_ramend);
Vitja Makarov58c35bd2008-10-13 15:23:56 +080045EXPORT_SYMBOL(reserved_mem_dcache_on);
Bryan Wu1394f032007-05-06 14:50:22 -070046
47#ifdef CONFIG_MTD_UCLINUX
48unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
49unsigned long _ebss;
50EXPORT_SYMBOL(memory_mtd_end);
51EXPORT_SYMBOL(memory_mtd_start);
52EXPORT_SYMBOL(mtd_size);
53#endif
54
Mike Frysinger5e10b4a2007-06-11 16:44:09 +080055char __initdata command_line[COMMAND_LINE_SIZE];
Robin Getz0c7a6b22008-10-08 16:27:12 +080056void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
57 *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
Bryan Wu1394f032007-05-06 14:50:22 -070058
Yi Li856783b2008-02-09 02:26:01 +080059/* boot memmap, for parsing "memmap=" */
60#define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
61#define BFIN_MEMMAP_RAM 1
62#define BFIN_MEMMAP_RESERVED 2
63struct bfin_memmap {
64 int nr_map;
65 struct bfin_memmap_entry {
66 unsigned long long addr; /* start of memory segment */
67 unsigned long long size;
68 unsigned long type;
69 } map[BFIN_MEMMAP_MAX];
70} bfin_memmap __initdata;
71
72/* for memmap sanitization */
73struct change_member {
74 struct bfin_memmap_entry *pentry; /* pointer to original entry */
75 unsigned long long addr; /* address for this change point */
76};
77static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
78static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
79static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
80static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
81
Graf Yang8f658732008-11-18 17:48:22 +080082DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
83
Mike Frysinger7f1e2f92009-01-07 23:14:38 +080084static int early_init_clkin_hz(char *buf);
85
Robin Getz3bebca22007-10-10 23:55:26 +080086#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
Graf Yang8f658732008-11-18 17:48:22 +080087void __init generate_cplb_tables(void)
88{
89 unsigned int cpu;
90
Bernd Schmidtdbdf20d2009-01-07 23:14:38 +080091 generate_cplb_tables_all();
Graf Yang8f658732008-11-18 17:48:22 +080092 /* Generate per-CPU I&D CPLB tables */
93 for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
94 generate_cplb_tables_cpu(cpu);
95}
Bryan Wu1394f032007-05-06 14:50:22 -070096#endif
97
Graf Yang8f658732008-11-18 17:48:22 +080098void __cpuinit bfin_setup_caches(unsigned int cpu)
99{
Robin Getz3bebca22007-10-10 23:55:26 +0800100#ifdef CONFIG_BFIN_ICACHE
Graf Yang8f658732008-11-18 17:48:22 +0800101 bfin_icache_init(icplb_tbl[cpu]);
Bryan Wu1394f032007-05-06 14:50:22 -0700102#endif
103
Robin Getz3bebca22007-10-10 23:55:26 +0800104#ifdef CONFIG_BFIN_DCACHE
Graf Yang8f658732008-11-18 17:48:22 +0800105 bfin_dcache_init(dcplb_tbl[cpu]);
Graf Yang8f658732008-11-18 17:48:22 +0800106#endif
107
108 /*
109 * In cache coherence emulation mode, we need to have the
110 * D-cache enabled before running any atomic operation which
111 * might invove cache invalidation (i.e. spinlock, rwlock).
112 * So printk's are deferred until then.
113 */
114#ifdef CONFIG_BFIN_ICACHE
115 printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
116#endif
117#ifdef CONFIG_BFIN_DCACHE
118 printk(KERN_INFO "Data Cache Enabled for CPU%u"
Robin Getz3bebca22007-10-10 23:55:26 +0800119# if defined CONFIG_BFIN_WB
Bryan Wu1394f032007-05-06 14:50:22 -0700120 " (write-back)"
Robin Getz3bebca22007-10-10 23:55:26 +0800121# elif defined CONFIG_BFIN_WT
Bryan Wu1394f032007-05-06 14:50:22 -0700122 " (write-through)"
123# endif
Graf Yang8f658732008-11-18 17:48:22 +0800124 "\n", cpu);
Bryan Wu1394f032007-05-06 14:50:22 -0700125#endif
126}
127
Graf Yang8f658732008-11-18 17:48:22 +0800128void __cpuinit bfin_setup_cpudata(unsigned int cpu)
129{
130 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
131
132 cpudata->idle = current;
133 cpudata->loops_per_jiffy = loops_per_jiffy;
Graf Yang8f658732008-11-18 17:48:22 +0800134 cpudata->imemctl = bfin_read_IMEM_CONTROL();
135 cpudata->dmemctl = bfin_read_DMEM_CONTROL();
136}
137
138void __init bfin_cache_init(void)
139{
140#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
141 generate_cplb_tables();
142#endif
143 bfin_setup_caches(0);
144}
145
Graf Yang5b04f272008-10-08 17:32:57 +0800146void __init bfin_relocate_l1_mem(void)
Bryan Wu1394f032007-05-06 14:50:22 -0700147{
148 unsigned long l1_code_length;
149 unsigned long l1_data_a_length;
150 unsigned long l1_data_b_length;
Sonic Zhang262c3822008-07-19 15:42:41 +0800151 unsigned long l2_length;
Bryan Wu1394f032007-05-06 14:50:22 -0700152
Mike Frysingerdd3dd382009-01-07 23:14:39 +0800153 blackfin_dma_early_init();
154
Bryan Wu1394f032007-05-06 14:50:22 -0700155 l1_code_length = _etext_l1 - _stext_l1;
156 if (l1_code_length > L1_CODE_LENGTH)
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800157 panic("L1 Instruction SRAM Overflow\n");
Bryan Wu1394f032007-05-06 14:50:22 -0700158 /* cannot complain as printk is not available as yet.
159 * But we can continue booting and complain later!
160 */
161
162 /* Copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
163 dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
164
Mike Frysinger3b1f26a2008-10-27 18:21:43 +0800165 l1_data_a_length = _sbss_l1 - _sdata_l1;
Bryan Wu1394f032007-05-06 14:50:22 -0700166 if (l1_data_a_length > L1_DATA_A_LENGTH)
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800167 panic("L1 Data SRAM Bank A Overflow\n");
Bryan Wu1394f032007-05-06 14:50:22 -0700168
Mike Frysinger3b1f26a2008-10-27 18:21:43 +0800169 /* Copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
Bryan Wu1394f032007-05-06 14:50:22 -0700170 dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
171
Mike Frysinger3b1f26a2008-10-27 18:21:43 +0800172 l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
Bryan Wu1394f032007-05-06 14:50:22 -0700173 if (l1_data_b_length > L1_DATA_B_LENGTH)
Sonic Zhangb85b82d2008-04-24 06:13:37 +0800174 panic("L1 Data SRAM Bank B Overflow\n");
Bryan Wu1394f032007-05-06 14:50:22 -0700175
Mike Frysinger3b1f26a2008-10-27 18:21:43 +0800176 /* Copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
Bryan Wu1394f032007-05-06 14:50:22 -0700177 dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
178 l1_data_a_length, l1_data_b_length);
Sonic Zhang262c3822008-07-19 15:42:41 +0800179
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800180 if (L2_LENGTH != 0) {
Mike Frysinger3b1f26a2008-10-27 18:21:43 +0800181 l2_length = _sbss_l2 - _stext_l2;
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800182 if (l2_length > L2_LENGTH)
183 panic("L2 SRAM Overflow\n");
Sonic Zhang262c3822008-07-19 15:42:41 +0800184
Mike Frysinger07aa7be2008-08-13 16:16:11 +0800185 /* Copy _stext_l2 to _edata_l2 to L2 SRAM */
186 dma_memcpy(_stext_l2, _l2_lma_start, l2_length);
187 }
Bryan Wu1394f032007-05-06 14:50:22 -0700188}
189
Yi Li856783b2008-02-09 02:26:01 +0800190/* add_memory_region to memmap */
191static void __init add_memory_region(unsigned long long start,
192 unsigned long long size, int type)
193{
194 int i;
195
196 i = bfin_memmap.nr_map;
197
198 if (i == BFIN_MEMMAP_MAX) {
199 printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
200 return;
201 }
202
203 bfin_memmap.map[i].addr = start;
204 bfin_memmap.map[i].size = size;
205 bfin_memmap.map[i].type = type;
206 bfin_memmap.nr_map++;
207}
208
209/*
210 * Sanitize the boot memmap, removing overlaps.
211 */
212static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
213{
214 struct change_member *change_tmp;
215 unsigned long current_type, last_type;
216 unsigned long long last_addr;
217 int chgidx, still_changing;
218 int overlap_entries;
219 int new_entry;
220 int old_nr, new_nr, chg_nr;
221 int i;
222
223 /*
224 Visually we're performing the following (1,2,3,4 = memory types)
225
226 Sample memory map (w/overlaps):
227 ____22__________________
228 ______________________4_
229 ____1111________________
230 _44_____________________
231 11111111________________
232 ____________________33__
233 ___________44___________
234 __________33333_________
235 ______________22________
236 ___________________2222_
237 _________111111111______
238 _____________________11_
239 _________________4______
240
241 Sanitized equivalent (no overlap):
242 1_______________________
243 _44_____________________
244 ___1____________________
245 ____22__________________
246 ______11________________
247 _________1______________
248 __________3_____________
249 ___________44___________
250 _____________33_________
251 _______________2________
252 ________________1_______
253 _________________4______
254 ___________________2____
255 ____________________33__
256 ______________________4_
257 */
258 /* if there's only one memory region, don't bother */
259 if (*pnr_map < 2)
260 return -1;
261
262 old_nr = *pnr_map;
263
264 /* bail out if we find any unreasonable addresses in memmap */
265 for (i = 0; i < old_nr; i++)
266 if (map[i].addr + map[i].size < map[i].addr)
267 return -1;
268
269 /* create pointers for initial change-point information (for sorting) */
270 for (i = 0; i < 2*old_nr; i++)
271 change_point[i] = &change_point_list[i];
272
273 /* record all known change-points (starting and ending addresses),
274 omitting those that are for empty memory regions */
275 chgidx = 0;
Graf Yang8f658732008-11-18 17:48:22 +0800276 for (i = 0; i < old_nr; i++) {
Yi Li856783b2008-02-09 02:26:01 +0800277 if (map[i].size != 0) {
278 change_point[chgidx]->addr = map[i].addr;
279 change_point[chgidx++]->pentry = &map[i];
280 change_point[chgidx]->addr = map[i].addr + map[i].size;
281 change_point[chgidx++]->pentry = &map[i];
282 }
283 }
Graf Yang8f658732008-11-18 17:48:22 +0800284 chg_nr = chgidx; /* true number of change-points */
Yi Li856783b2008-02-09 02:26:01 +0800285
286 /* sort change-point list by memory addresses (low -> high) */
287 still_changing = 1;
Graf Yang8f658732008-11-18 17:48:22 +0800288 while (still_changing) {
Yi Li856783b2008-02-09 02:26:01 +0800289 still_changing = 0;
Graf Yang8f658732008-11-18 17:48:22 +0800290 for (i = 1; i < chg_nr; i++) {
Yi Li856783b2008-02-09 02:26:01 +0800291 /* if <current_addr> > <last_addr>, swap */
292 /* or, if current=<start_addr> & last=<end_addr>, swap */
293 if ((change_point[i]->addr < change_point[i-1]->addr) ||
294 ((change_point[i]->addr == change_point[i-1]->addr) &&
295 (change_point[i]->addr == change_point[i]->pentry->addr) &&
296 (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
297 ) {
298 change_tmp = change_point[i];
299 change_point[i] = change_point[i-1];
300 change_point[i-1] = change_tmp;
301 still_changing = 1;
302 }
303 }
304 }
305
306 /* create a new memmap, removing overlaps */
Graf Yang8f658732008-11-18 17:48:22 +0800307 overlap_entries = 0; /* number of entries in the overlap table */
308 new_entry = 0; /* index for creating new memmap entries */
309 last_type = 0; /* start with undefined memory type */
310 last_addr = 0; /* start with 0 as last starting address */
Yi Li856783b2008-02-09 02:26:01 +0800311 /* loop through change-points, determining affect on the new memmap */
312 for (chgidx = 0; chgidx < chg_nr; chgidx++) {
313 /* keep track of all overlapping memmap entries */
314 if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
315 /* add map entry to overlap list (> 1 entry implies an overlap) */
316 overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
317 } else {
318 /* remove entry from list (order independent, so swap with last) */
319 for (i = 0; i < overlap_entries; i++) {
320 if (overlap_list[i] == change_point[chgidx]->pentry)
321 overlap_list[i] = overlap_list[overlap_entries-1];
322 }
323 overlap_entries--;
324 }
325 /* if there are overlapping entries, decide which "type" to use */
326 /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
327 current_type = 0;
328 for (i = 0; i < overlap_entries; i++)
329 if (overlap_list[i]->type > current_type)
330 current_type = overlap_list[i]->type;
331 /* continue building up new memmap based on this information */
Graf Yang8f658732008-11-18 17:48:22 +0800332 if (current_type != last_type) {
Yi Li856783b2008-02-09 02:26:01 +0800333 if (last_type != 0) {
334 new_map[new_entry].size =
335 change_point[chgidx]->addr - last_addr;
336 /* move forward only if the new size was non-zero */
337 if (new_map[new_entry].size != 0)
338 if (++new_entry >= BFIN_MEMMAP_MAX)
Graf Yang8f658732008-11-18 17:48:22 +0800339 break; /* no more space left for new entries */
Yi Li856783b2008-02-09 02:26:01 +0800340 }
341 if (current_type != 0) {
342 new_map[new_entry].addr = change_point[chgidx]->addr;
343 new_map[new_entry].type = current_type;
344 last_addr = change_point[chgidx]->addr;
345 }
346 last_type = current_type;
347 }
348 }
Graf Yang8f658732008-11-18 17:48:22 +0800349 new_nr = new_entry; /* retain count for new entries */
Yi Li856783b2008-02-09 02:26:01 +0800350
Graf Yang8f658732008-11-18 17:48:22 +0800351 /* copy new mapping into original location */
Yi Li856783b2008-02-09 02:26:01 +0800352 memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
353 *pnr_map = new_nr;
354
355 return 0;
356}
357
358static void __init print_memory_map(char *who)
359{
360 int i;
361
362 for (i = 0; i < bfin_memmap.nr_map; i++) {
363 printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
364 bfin_memmap.map[i].addr,
365 bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
366 switch (bfin_memmap.map[i].type) {
367 case BFIN_MEMMAP_RAM:
368 printk("(usable)\n");
369 break;
370 case BFIN_MEMMAP_RESERVED:
371 printk("(reserved)\n");
372 break;
373 default: printk("type %lu\n", bfin_memmap.map[i].type);
374 break;
375 }
376 }
377}
378
379static __init int parse_memmap(char *arg)
380{
381 unsigned long long start_at, mem_size;
382
383 if (!arg)
384 return -EINVAL;
385
386 mem_size = memparse(arg, &arg);
387 if (*arg == '@') {
388 start_at = memparse(arg+1, &arg);
389 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
390 } else if (*arg == '$') {
391 start_at = memparse(arg+1, &arg);
392 add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
393 }
394
395 return 0;
396}
397
Bryan Wu1394f032007-05-06 14:50:22 -0700398/*
399 * Initial parsing of the command line. Currently, we support:
400 * - Controlling the linux memory size: mem=xxx[KMG]
401 * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
402 * $ -> reserved memory is dcacheable
403 * # -> reserved memory is icacheable
Yi Li856783b2008-02-09 02:26:01 +0800404 * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
405 * @ from <start> to <start>+<mem>, type RAM
406 * $ from <start> to <start>+<mem>, type RESERVED
Bryan Wu1394f032007-05-06 14:50:22 -0700407 */
408static __init void parse_cmdline_early(char *cmdline_p)
409{
410 char c = ' ', *to = cmdline_p;
411 unsigned int memsize;
412 for (;;) {
413 if (c == ' ') {
Bryan Wu1394f032007-05-06 14:50:22 -0700414 if (!memcmp(to, "mem=", 4)) {
415 to += 4;
416 memsize = memparse(to, &to);
417 if (memsize)
418 _ramend = memsize;
419
420 } else if (!memcmp(to, "max_mem=", 8)) {
421 to += 8;
422 memsize = memparse(to, &to);
423 if (memsize) {
424 physical_mem_end = memsize;
425 if (*to != ' ') {
426 if (*to == '$'
427 || *(to + 1) == '$')
Graf Yang8f658732008-11-18 17:48:22 +0800428 reserved_mem_dcache_on = 1;
Bryan Wu1394f032007-05-06 14:50:22 -0700429 if (*to == '#'
430 || *(to + 1) == '#')
Graf Yang8f658732008-11-18 17:48:22 +0800431 reserved_mem_icache_on = 1;
Bryan Wu1394f032007-05-06 14:50:22 -0700432 }
433 }
Mike Frysinger7f1e2f92009-01-07 23:14:38 +0800434 } else if (!memcmp(to, "clkin_hz=", 9)) {
435 to += 9;
436 early_init_clkin_hz(to);
Robin Getzce3afa12007-10-09 17:28:36 +0800437 } else if (!memcmp(to, "earlyprintk=", 12)) {
438 to += 12;
439 setup_early_printk(to);
Yi Li856783b2008-02-09 02:26:01 +0800440 } else if (!memcmp(to, "memmap=", 7)) {
441 to += 7;
442 parse_memmap(to);
Bryan Wu1394f032007-05-06 14:50:22 -0700443 }
Bryan Wu1394f032007-05-06 14:50:22 -0700444 }
445 c = *(to++);
446 if (!c)
447 break;
448 }
449}
450
Yi Li856783b2008-02-09 02:26:01 +0800451/*
452 * Setup memory defaults from user config.
453 * The physical memory layout looks like:
454 *
455 * [_rambase, _ramstart]: kernel image
456 * [memory_start, memory_end]: dynamic memory managed by kernel
457 * [memory_end, _ramend]: reserved memory
Bryan Wu3094c982008-10-10 21:22:01 +0800458 * [memory_mtd_start(memory_end),
Yi Li856783b2008-02-09 02:26:01 +0800459 * memory_mtd_start + mtd_size]: rootfs (if any)
460 * [_ramend - DMA_UNCACHED_REGION,
461 * _ramend]: uncached DMA region
462 * [_ramend, physical_mem_end]: memory not managed by kernel
Yi Li856783b2008-02-09 02:26:01 +0800463 */
Graf Yang8f658732008-11-18 17:48:22 +0800464static __init void memory_setup(void)
Bryan Wu1394f032007-05-06 14:50:22 -0700465{
Mike Frysingerc0eab3b2008-02-02 15:36:11 +0800466#ifdef CONFIG_MTD_UCLINUX
467 unsigned long mtd_phys = 0;
468#endif
469
Yi Li856783b2008-02-09 02:26:01 +0800470 _rambase = (unsigned long)_stext;
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800471 _ramstart = (unsigned long)_end;
Bryan Wu1394f032007-05-06 14:50:22 -0700472
Yi Li856783b2008-02-09 02:26:01 +0800473 if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
474 console_init();
475 panic("DMA region exceeds memory limit: %lu.\n",
476 _ramend - _ramstart);
Mike Frysinger1aafd902007-07-25 11:19:14 +0800477 }
Bryan Wu1394f032007-05-06 14:50:22 -0700478 memory_end = _ramend - DMA_UNCACHED_REGION;
479
Bernd Schmidtb97b8a92008-01-27 18:39:16 +0800480#ifdef CONFIG_MPU
Graf Yang8f658732008-11-18 17:48:22 +0800481 /* Round up to multiple of 4MB */
Bernd Schmidtb97b8a92008-01-27 18:39:16 +0800482 memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
483#else
Bryan Wu1394f032007-05-06 14:50:22 -0700484 memory_start = PAGE_ALIGN(_ramstart);
Bernd Schmidtb97b8a92008-01-27 18:39:16 +0800485#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700486
487#if defined(CONFIG_MTD_UCLINUX)
488 /* generic memory mapped MTD driver */
489 memory_mtd_end = memory_end;
490
491 mtd_phys = _ramstart;
492 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
493
494# if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
495 if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
496 mtd_size =
497 PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
498# endif
499
500# if defined(CONFIG_CRAMFS)
501 if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
502 mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
503# endif
504
505# if defined(CONFIG_ROMFS_FS)
506 if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
507 && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
508 mtd_size =
509 PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
Robin Getz3bebca22007-10-10 23:55:26 +0800510# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
Bryan Wu1394f032007-05-06 14:50:22 -0700511 /* Due to a Hardware Anomaly we need to limit the size of usable
512 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
513 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
514 */
515# if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
516 if (memory_end >= 56 * 1024 * 1024)
517 memory_end = 56 * 1024 * 1024;
518# else
519 if (memory_end >= 60 * 1024 * 1024)
520 memory_end = 60 * 1024 * 1024;
521# endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
522# endif /* ANOMALY_05000263 */
523# endif /* CONFIG_ROMFS_FS */
524
525 memory_end -= mtd_size;
526
527 if (mtd_size == 0) {
528 console_init();
529 panic("Don't boot kernel without rootfs attached.\n");
530 }
531
532 /* Relocate MTD image to the top of memory after the uncached memory area */
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800533 dma_memcpy((char *)memory_end, _end, mtd_size);
Bryan Wu1394f032007-05-06 14:50:22 -0700534
535 memory_mtd_start = memory_end;
536 _ebss = memory_mtd_start; /* define _ebss for compatible */
537#endif /* CONFIG_MTD_UCLINUX */
538
Robin Getz3bebca22007-10-10 23:55:26 +0800539#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
Bryan Wu1394f032007-05-06 14:50:22 -0700540 /* Due to a Hardware Anomaly we need to limit the size of usable
541 * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
542 * 05000263 - Hardware loop corrupted when taking an ICPLB exception
543 */
544#if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
545 if (memory_end >= 56 * 1024 * 1024)
546 memory_end = 56 * 1024 * 1024;
547#else
548 if (memory_end >= 60 * 1024 * 1024)
549 memory_end = 60 * 1024 * 1024;
550#endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
551 printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
552#endif /* ANOMALY_05000263 */
553
Bernd Schmidtb97b8a92008-01-27 18:39:16 +0800554#ifdef CONFIG_MPU
555 page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
556 page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
557#endif
558
Bryan Wu1394f032007-05-06 14:50:22 -0700559#if !defined(CONFIG_MTD_UCLINUX)
Yi Li856783b2008-02-09 02:26:01 +0800560 /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
561 memory_end -= SIZE_4K;
Bryan Wu1394f032007-05-06 14:50:22 -0700562#endif
Yi Li856783b2008-02-09 02:26:01 +0800563
Bryan Wu1394f032007-05-06 14:50:22 -0700564 init_mm.start_code = (unsigned long)_stext;
565 init_mm.end_code = (unsigned long)_etext;
566 init_mm.end_data = (unsigned long)_edata;
567 init_mm.brk = (unsigned long)0;
568
Yi Li856783b2008-02-09 02:26:01 +0800569 printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
570 printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
571
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800572 printk(KERN_INFO "Memory map:\n"
Mike Frysinger8929ecf82008-02-22 16:35:20 +0800573 KERN_INFO " fixedcode = 0x%p-0x%p\n"
Yi Li856783b2008-02-09 02:26:01 +0800574 KERN_INFO " text = 0x%p-0x%p\n"
575 KERN_INFO " rodata = 0x%p-0x%p\n"
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800576 KERN_INFO " bss = 0x%p-0x%p\n"
Yi Li856783b2008-02-09 02:26:01 +0800577 KERN_INFO " data = 0x%p-0x%p\n"
578 KERN_INFO " stack = 0x%p-0x%p\n"
579 KERN_INFO " init = 0x%p-0x%p\n"
Yi Li856783b2008-02-09 02:26:01 +0800580 KERN_INFO " available = 0x%p-0x%p\n"
581#ifdef CONFIG_MTD_UCLINUX
582 KERN_INFO " rootfs = 0x%p-0x%p\n"
583#endif
584#if DMA_UNCACHED_REGION > 0
585 KERN_INFO " DMA Zone = 0x%p-0x%p\n"
586#endif
Mike Frysinger8929ecf82008-02-22 16:35:20 +0800587 , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
588 _stext, _etext,
Yi Li856783b2008-02-09 02:26:01 +0800589 __start_rodata, __end_rodata,
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800590 __bss_start, __bss_stop,
Yi Li856783b2008-02-09 02:26:01 +0800591 _sdata, _edata,
592 (void *)&init_thread_union,
593 (void *)((int)(&init_thread_union) + 0x2000),
Mike Frysingerb7627ac2008-02-02 15:53:17 +0800594 __init_begin, __init_end,
595 (void *)_ramstart, (void *)memory_end
Yi Li856783b2008-02-09 02:26:01 +0800596#ifdef CONFIG_MTD_UCLINUX
597 , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
598#endif
599#if DMA_UNCACHED_REGION > 0
600 , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
601#endif
602 );
603}
604
Yi Li2e8d7962008-03-26 07:08:12 +0800605/*
606 * Find the lowest, highest page frame number we have available
607 */
608void __init find_min_max_pfn(void)
609{
610 int i;
611
612 max_pfn = 0;
613 min_low_pfn = memory_end;
614
615 for (i = 0; i < bfin_memmap.nr_map; i++) {
616 unsigned long start, end;
617 /* RAM? */
618 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
619 continue;
620 start = PFN_UP(bfin_memmap.map[i].addr);
621 end = PFN_DOWN(bfin_memmap.map[i].addr +
622 bfin_memmap.map[i].size);
623 if (start >= end)
624 continue;
625 if (end > max_pfn)
626 max_pfn = end;
627 if (start < min_low_pfn)
628 min_low_pfn = start;
629 }
630}
631
Yi Li856783b2008-02-09 02:26:01 +0800632static __init void setup_bootmem_allocator(void)
633{
634 int bootmap_size;
635 int i;
Yi Li2e8d7962008-03-26 07:08:12 +0800636 unsigned long start_pfn, end_pfn;
Yi Li856783b2008-02-09 02:26:01 +0800637 unsigned long curr_pfn, last_pfn, size;
638
639 /* mark memory between memory_start and memory_end usable */
640 add_memory_region(memory_start,
641 memory_end - memory_start, BFIN_MEMMAP_RAM);
642 /* sanity check for overlap */
643 sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
644 print_memory_map("boot memmap");
645
Yi Li2e8d7962008-03-26 07:08:12 +0800646 /* intialize globals in linux/bootmem.h */
647 find_min_max_pfn();
648 /* pfn of the last usable page frame */
649 if (max_pfn > memory_end >> PAGE_SHIFT)
650 max_pfn = memory_end >> PAGE_SHIFT;
651 /* pfn of last page frame directly mapped by kernel */
652 max_low_pfn = max_pfn;
653 /* pfn of the first usable page frame after kernel image*/
654 if (min_low_pfn < memory_start >> PAGE_SHIFT)
655 min_low_pfn = memory_start >> PAGE_SHIFT;
656
657 start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
658 end_pfn = memory_end >> PAGE_SHIFT;
Yi Li856783b2008-02-09 02:26:01 +0800659
660 /*
Graf Yang8f658732008-11-18 17:48:22 +0800661 * give all the memory to the bootmap allocator, tell it to put the
Yi Li856783b2008-02-09 02:26:01 +0800662 * boot mem_map at the start of memory.
663 */
664 bootmap_size = init_bootmem_node(NODE_DATA(0),
665 memory_start >> PAGE_SHIFT, /* map goes here */
Yi Li2e8d7962008-03-26 07:08:12 +0800666 start_pfn, end_pfn);
Yi Li856783b2008-02-09 02:26:01 +0800667
668 /* register the memmap regions with the bootmem allocator */
669 for (i = 0; i < bfin_memmap.nr_map; i++) {
670 /*
671 * Reserve usable memory
672 */
673 if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
674 continue;
675 /*
676 * We are rounding up the start address of usable memory:
677 */
678 curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
Yi Li2e8d7962008-03-26 07:08:12 +0800679 if (curr_pfn >= end_pfn)
Yi Li856783b2008-02-09 02:26:01 +0800680 continue;
681 /*
682 * ... and at the end of the usable range downwards:
683 */
684 last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
685 bfin_memmap.map[i].size);
686
Yi Li2e8d7962008-03-26 07:08:12 +0800687 if (last_pfn > end_pfn)
688 last_pfn = end_pfn;
Yi Li856783b2008-02-09 02:26:01 +0800689
690 /*
691 * .. finally, did all the rounding and playing
692 * around just make the area go away?
693 */
694 if (last_pfn <= curr_pfn)
695 continue;
696
697 size = last_pfn - curr_pfn;
698 free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
699 }
700
701 /* reserve memory before memory_start, including bootmap */
702 reserve_bootmem(PAGE_OFFSET,
703 memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
704 BOOTMEM_DEFAULT);
705}
706
Mike Frysingera086ee22008-04-25 02:04:05 +0800707#define EBSZ_TO_MEG(ebsz) \
708({ \
709 int meg = 0; \
710 switch (ebsz & 0xf) { \
711 case 0x1: meg = 16; break; \
712 case 0x3: meg = 32; break; \
713 case 0x5: meg = 64; break; \
714 case 0x7: meg = 128; break; \
715 case 0x9: meg = 256; break; \
716 case 0xb: meg = 512; break; \
717 } \
718 meg; \
719})
720static inline int __init get_mem_size(void)
721{
Michael Hennerich99d95bb2008-07-14 17:04:14 +0800722#if defined(EBIU_SDBCTL)
723# if defined(BF561_FAMILY)
Mike Frysingera086ee22008-04-25 02:04:05 +0800724 int ret = 0;
725 u32 sdbctl = bfin_read_EBIU_SDBCTL();
726 ret += EBSZ_TO_MEG(sdbctl >> 0);
727 ret += EBSZ_TO_MEG(sdbctl >> 8);
728 ret += EBSZ_TO_MEG(sdbctl >> 16);
729 ret += EBSZ_TO_MEG(sdbctl >> 24);
730 return ret;
Michael Hennerich99d95bb2008-07-14 17:04:14 +0800731# else
Mike Frysingera086ee22008-04-25 02:04:05 +0800732 return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
Michael Hennerich99d95bb2008-07-14 17:04:14 +0800733# endif
734#elif defined(EBIU_DDRCTL1)
Michael Hennerich1e780422008-04-25 04:31:23 +0800735 u32 ddrctl = bfin_read_EBIU_DDRCTL1();
736 int ret = 0;
737 switch (ddrctl & 0xc0000) {
738 case DEVSZ_64: ret = 64 / 8;
739 case DEVSZ_128: ret = 128 / 8;
740 case DEVSZ_256: ret = 256 / 8;
741 case DEVSZ_512: ret = 512 / 8;
Mike Frysingera086ee22008-04-25 02:04:05 +0800742 }
Michael Hennerich1e780422008-04-25 04:31:23 +0800743 switch (ddrctl & 0x30000) {
744 case DEVWD_4: ret *= 2;
745 case DEVWD_8: ret *= 2;
746 case DEVWD_16: break;
747 }
Mike Frysingerb1b154e2008-07-26 18:02:05 +0800748 if ((ddrctl & 0xc000) == 0x4000)
749 ret *= 2;
Michael Hennerich1e780422008-04-25 04:31:23 +0800750 return ret;
Mike Frysingera086ee22008-04-25 02:04:05 +0800751#endif
752 BUG();
753}
754
Yi Li856783b2008-02-09 02:26:01 +0800755void __init setup_arch(char **cmdline_p)
756{
Mike Frysinger9f8e8952008-04-24 06:20:11 +0800757 unsigned long sclk, cclk;
Yi Li856783b2008-02-09 02:26:01 +0800758
759#ifdef CONFIG_DUMMY_CONSOLE
760 conswitchp = &dummy_con;
761#endif
762
763#if defined(CONFIG_CMDLINE_BOOL)
764 strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
765 command_line[sizeof(command_line) - 1] = 0;
766#endif
767
768 /* Keep a copy of command line */
769 *cmdline_p = &command_line[0];
770 memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
771 boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
772
773 /* setup memory defaults from the user config */
774 physical_mem_end = 0;
Mike Frysingera086ee22008-04-25 02:04:05 +0800775 _ramend = get_mem_size() * 1024 * 1024;
Yi Li856783b2008-02-09 02:26:01 +0800776
777 memset(&bfin_memmap, 0, sizeof(bfin_memmap));
778
779 parse_cmdline_early(&command_line[0]);
780
781 if (physical_mem_end == 0)
782 physical_mem_end = _ramend;
783
784 memory_setup();
785
Mike Frysinger7e64aca2008-08-06 17:17:10 +0800786 /* Initialize Async memory banks */
787 bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
788 bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
789 bfin_write_EBIU_AMGCTL(AMGCTLVAL);
790#ifdef CONFIG_EBIU_MBSCTLVAL
791 bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
792 bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
793 bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
794#endif
795
Yi Li856783b2008-02-09 02:26:01 +0800796 cclk = get_cclk();
797 sclk = get_sclk();
798
799#if !defined(CONFIG_BFIN_KERNEL_CLOCK)
800 if (ANOMALY_05000273 && cclk == sclk)
801 panic("ANOMALY 05000273, SCLK can not be same as CCLK");
802#endif
803
804#ifdef BF561_FAMILY
805 if (ANOMALY_05000266) {
806 bfin_read_IMDMA_D0_IRQ_STATUS();
807 bfin_read_IMDMA_D1_IRQ_STATUS();
808 }
809#endif
810 printk(KERN_INFO "Hardware Trace ");
811 if (bfin_read_TBUFCTL() & 0x1)
812 printk("Active ");
813 else
814 printk("Off ");
815 if (bfin_read_TBUFCTL() & 0x2)
816 printk("and Enabled\n");
817 else
818 printk("and Disabled\n");
819
820#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
821 /* we need to initialize the Flashrom device here since we might
822 * do things with flash early on in the boot
823 */
824 flash_probe();
825#endif
826
Robin Getz7728ec32007-10-29 18:12:15 +0800827 _bfin_swrst = bfin_read_SWRST();
828
Robin Getz0c7a6b22008-10-08 16:27:12 +0800829#ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
830 bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
831#endif
832#ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
833 bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
834#endif
Robin Getz2d200982008-07-26 19:41:40 +0800835
Graf Yang8f658732008-11-18 17:48:22 +0800836#ifdef CONFIG_SMP
837 if (_bfin_swrst & SWRST_DBL_FAULT_A) {
838#else
Robin Getz0c7a6b22008-10-08 16:27:12 +0800839 if (_bfin_swrst & RESET_DOUBLE) {
Graf Yang8f658732008-11-18 17:48:22 +0800840#endif
Robin Getz0c7a6b22008-10-08 16:27:12 +0800841 printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
842#ifdef CONFIG_DEBUG_DOUBLEFAULT
843 /* We assume the crashing kernel, and the current symbol table match */
844 printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
845 (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
846 printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
847 printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
848#endif
849 printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
850 init_retx);
851 } else if (_bfin_swrst & RESET_WDOG)
Robin Getz7728ec32007-10-29 18:12:15 +0800852 printk(KERN_INFO "Recovering from Watchdog event\n");
853 else if (_bfin_swrst & RESET_SOFTWARE)
854 printk(KERN_NOTICE "Reset caused by Software reset\n");
855
Mike Frysinger550d5532008-02-02 15:55:37 +0800856 printk(KERN_INFO "Blackfin support (C) 2004-2008 Analog Devices, Inc.\n");
Jie Zhangde3025f2007-06-25 18:04:12 +0800857 if (bfin_compiled_revid() == 0xffff)
858 printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
859 else if (bfin_compiled_revid() == -1)
860 printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
861 else
862 printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
Robin Getze482cad2008-10-10 18:21:45 +0800863
864 if (unlikely(CPUID != bfin_cpuid()))
865 printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
866 CPU, bfin_cpuid(), bfin_revid());
867 else {
868 if (bfin_revid() != bfin_compiled_revid()) {
869 if (bfin_compiled_revid() == -1)
870 printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
871 bfin_revid());
Robin Getz7419a322009-01-07 23:14:39 +0800872 else if (bfin_compiled_revid() != 0xffff) {
Robin Getze482cad2008-10-10 18:21:45 +0800873 printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
874 bfin_compiled_revid(), bfin_revid());
Robin Getz7419a322009-01-07 23:14:39 +0800875 if (bfin_compiled_revid() > bfin_revid())
876 panic("Error: you are missing anomaly workarounds for this rev\n");
877 }
Robin Getze482cad2008-10-10 18:21:45 +0800878 }
Mike Frysingerda986b92008-10-28 13:58:15 +0800879 if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
Robin Getze482cad2008-10-10 18:21:45 +0800880 printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
881 CPU, bfin_revid());
Jie Zhangde3025f2007-06-25 18:04:12 +0800882 }
Mike Frysinger0c0497c2008-10-09 17:32:28 +0800883
Bryan Wu1394f032007-05-06 14:50:22 -0700884 printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
885
Mike Frysingerb5c0e2e2007-09-12 17:31:59 +0800886 printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
Graf Yang8f658732008-11-18 17:48:22 +0800887 cclk / 1000000, sclk / 1000000);
Bryan Wu1394f032007-05-06 14:50:22 -0700888
Mike Frysinger1aafd902007-07-25 11:19:14 +0800889 if (ANOMALY_05000273 && (cclk >> 1) <= sclk)
Bryan Wu1394f032007-05-06 14:50:22 -0700890 printk("\n\n\nANOMALY_05000273: CCLK must be >= 2*SCLK !!!\n\n\n");
Bryan Wu1394f032007-05-06 14:50:22 -0700891
Yi Li856783b2008-02-09 02:26:01 +0800892 setup_bootmem_allocator();
Bryan Wu1394f032007-05-06 14:50:22 -0700893
Bryan Wu1394f032007-05-06 14:50:22 -0700894 paging_init();
895
Bernd Schmidt7adfb582007-06-21 11:34:16 +0800896 /* Copy atomic sequences to their fixed location, and sanity check that
897 these locations are the ones that we advertise to userspace. */
898 memcpy((void *)FIXED_CODE_START, &fixed_code_start,
899 FIXED_CODE_END - FIXED_CODE_START);
900 BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
901 != SIGRETURN_STUB - FIXED_CODE_START);
902 BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
903 != ATOMIC_XCHG32 - FIXED_CODE_START);
904 BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
905 != ATOMIC_CAS32 - FIXED_CODE_START);
906 BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
907 != ATOMIC_ADD32 - FIXED_CODE_START);
908 BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
909 != ATOMIC_SUB32 - FIXED_CODE_START);
910 BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
911 != ATOMIC_IOR32 - FIXED_CODE_START);
912 BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
913 != ATOMIC_AND32 - FIXED_CODE_START);
914 BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
915 != ATOMIC_XOR32 - FIXED_CODE_START);
Robin Getz9f336a52007-10-29 18:23:28 +0800916 BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
917 != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
Bernd Schmidt29440a22007-07-12 16:25:29 +0800918
Graf Yang8f658732008-11-18 17:48:22 +0800919#ifdef CONFIG_SMP
920 platform_init_cpus();
921#endif
Bernd Schmidt8be80ed2007-07-25 14:44:49 +0800922 init_exception_vectors();
Graf Yang8f658732008-11-18 17:48:22 +0800923 bfin_cache_init(); /* Initialize caches for the boot CPU */
Bryan Wu1394f032007-05-06 14:50:22 -0700924}
925
Bryan Wu1394f032007-05-06 14:50:22 -0700926static int __init topology_init(void)
927{
Graf Yang8f658732008-11-18 17:48:22 +0800928 unsigned int cpu;
929 /* Record CPU-private information for the boot processor. */
930 bfin_setup_cpudata(0);
Michael Hennerich6cda2e92008-02-02 15:10:51 +0800931
932 for_each_possible_cpu(cpu) {
Graf Yang8f658732008-11-18 17:48:22 +0800933 register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
Michael Hennerich6cda2e92008-02-02 15:10:51 +0800934 }
935
Bryan Wu1394f032007-05-06 14:50:22 -0700936 return 0;
Bryan Wu1394f032007-05-06 14:50:22 -0700937}
938
939subsys_initcall(topology_init);
940
Mike Frysinger7f1e2f92009-01-07 23:14:38 +0800941/* Get the input clock frequency */
942static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
943static u_long get_clkin_hz(void)
944{
945 return cached_clkin_hz;
946}
947static int __init early_init_clkin_hz(char *buf)
948{
949 cached_clkin_hz = simple_strtoul(buf, NULL, 0);
Mike Frysinger508808c2009-01-07 23:14:38 +0800950#ifdef BFIN_KERNEL_CLOCK
951 if (cached_clkin_hz != CONFIG_CLKIN_HZ)
952 panic("cannot change clkin_hz when reprogramming clocks");
953#endif
Mike Frysinger7f1e2f92009-01-07 23:14:38 +0800954 return 1;
955}
956early_param("clkin_hz=", early_init_clkin_hz);
957
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800958/* Get the voltage input multiplier */
Mike Frysinger52a07812007-06-11 15:31:30 +0800959static u_long get_vco(void)
Bryan Wu1394f032007-05-06 14:50:22 -0700960{
Mike Frysingere32f55d2009-01-07 23:14:39 +0800961 static u_long cached_vco;
962 u_long msel, pll_ctl;
Bryan Wu1394f032007-05-06 14:50:22 -0700963
Mike Frysingere32f55d2009-01-07 23:14:39 +0800964 /* The assumption here is that VCO never changes at runtime.
965 * If, someday, we support that, then we'll have to change this.
966 */
967 if (cached_vco)
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800968 return cached_vco;
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800969
Mike Frysingere32f55d2009-01-07 23:14:39 +0800970 pll_ctl = bfin_read_PLL_CTL();
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800971 msel = (pll_ctl >> 9) & 0x3F;
Bryan Wu1394f032007-05-06 14:50:22 -0700972 if (0 == msel)
973 msel = 64;
974
Mike Frysinger7f1e2f92009-01-07 23:14:38 +0800975 cached_vco = get_clkin_hz();
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800976 cached_vco >>= (1 & pll_ctl); /* DF bit */
977 cached_vco *= msel;
978 return cached_vco;
Bryan Wu1394f032007-05-06 14:50:22 -0700979}
980
Mike Frysinger2f6cf7b2007-10-21 22:59:49 +0800981/* Get the Core clock */
Bryan Wu1394f032007-05-06 14:50:22 -0700982u_long get_cclk(void)
983{
Mike Frysingere32f55d2009-01-07 23:14:39 +0800984 static u_long cached_cclk_pll_div, cached_cclk;
Bryan Wu1394f032007-05-06 14:50:22 -0700985 u_long csel, ssel;
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800986
Bryan Wu1394f032007-05-06 14:50:22 -0700987 if (bfin_read_PLL_STAT() & 0x1)
Mike Frysinger7f1e2f92009-01-07 23:14:38 +0800988 return get_clkin_hz();
Bryan Wu1394f032007-05-06 14:50:22 -0700989
990 ssel = bfin_read_PLL_DIV();
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800991 if (ssel == cached_cclk_pll_div)
992 return cached_cclk;
993 else
994 cached_cclk_pll_div = ssel;
995
Bryan Wu1394f032007-05-06 14:50:22 -0700996 csel = ((ssel >> 4) & 0x03);
997 ssel &= 0xf;
998 if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
Mike Frysinger3a2521f2008-07-26 18:52:56 +0800999 cached_cclk = get_vco() / ssel;
1000 else
1001 cached_cclk = get_vco() >> csel;
1002 return cached_cclk;
Bryan Wu1394f032007-05-06 14:50:22 -07001003}
Bryan Wu1394f032007-05-06 14:50:22 -07001004EXPORT_SYMBOL(get_cclk);
1005
1006/* Get the System clock */
1007u_long get_sclk(void)
1008{
Mike Frysingere32f55d2009-01-07 23:14:39 +08001009 static u_long cached_sclk;
Bryan Wu1394f032007-05-06 14:50:22 -07001010 u_long ssel;
1011
Mike Frysingere32f55d2009-01-07 23:14:39 +08001012 /* The assumption here is that SCLK never changes at runtime.
1013 * If, someday, we support that, then we'll have to change this.
1014 */
1015 if (cached_sclk)
1016 return cached_sclk;
1017
Bryan Wu1394f032007-05-06 14:50:22 -07001018 if (bfin_read_PLL_STAT() & 0x1)
Mike Frysinger7f1e2f92009-01-07 23:14:38 +08001019 return get_clkin_hz();
Bryan Wu1394f032007-05-06 14:50:22 -07001020
Mike Frysingere32f55d2009-01-07 23:14:39 +08001021 ssel = bfin_read_PLL_DIV() & 0xf;
Bryan Wu1394f032007-05-06 14:50:22 -07001022 if (0 == ssel) {
1023 printk(KERN_WARNING "Invalid System Clock\n");
1024 ssel = 1;
1025 }
1026
Mike Frysinger3a2521f2008-07-26 18:52:56 +08001027 cached_sclk = get_vco() / ssel;
1028 return cached_sclk;
Bryan Wu1394f032007-05-06 14:50:22 -07001029}
Bryan Wu1394f032007-05-06 14:50:22 -07001030EXPORT_SYMBOL(get_sclk);
1031
Mike Frysinger2f6cf7b2007-10-21 22:59:49 +08001032unsigned long sclk_to_usecs(unsigned long sclk)
1033{
Mike Frysinger1754a5d2007-11-23 11:28:11 +08001034 u64 tmp = USEC_PER_SEC * (u64)sclk;
1035 do_div(tmp, get_sclk());
1036 return tmp;
Mike Frysinger2f6cf7b2007-10-21 22:59:49 +08001037}
1038EXPORT_SYMBOL(sclk_to_usecs);
1039
1040unsigned long usecs_to_sclk(unsigned long usecs)
1041{
Mike Frysinger1754a5d2007-11-23 11:28:11 +08001042 u64 tmp = get_sclk() * (u64)usecs;
1043 do_div(tmp, USEC_PER_SEC);
1044 return tmp;
Mike Frysinger2f6cf7b2007-10-21 22:59:49 +08001045}
1046EXPORT_SYMBOL(usecs_to_sclk);
1047
Bryan Wu1394f032007-05-06 14:50:22 -07001048/*
1049 * Get CPU information for use by the procfs.
1050 */
1051static int show_cpuinfo(struct seq_file *m, void *v)
1052{
Mike Frysinger066954a2007-10-21 22:36:06 +08001053 char *cpu, *mmu, *fpu, *vendor, *cache;
Bryan Wu1394f032007-05-06 14:50:22 -07001054 uint32_t revid;
Mike Frysinger275123e2009-01-07 23:14:39 +08001055 int cpu_num = *(unsigned int *)v;
Michael Hennericha5f07172008-11-18 18:04:31 +08001056 u_long sclk, cclk;
Robin Getz9de3a0b2008-07-26 19:39:19 +08001057 u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
Mike Frysinger275123e2009-01-07 23:14:39 +08001058 struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
Bryan Wu1394f032007-05-06 14:50:22 -07001059
1060 cpu = CPU;
1061 mmu = "none";
1062 fpu = "none";
1063 revid = bfin_revid();
Bryan Wu1394f032007-05-06 14:50:22 -07001064
Bryan Wu1394f032007-05-06 14:50:22 -07001065 sclk = get_sclk();
Michael Hennericha5f07172008-11-18 18:04:31 +08001066 cclk = get_cclk();
Bryan Wu1394f032007-05-06 14:50:22 -07001067
Robin Getz73b0c0b2007-10-21 17:03:31 +08001068 switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
Mike Frysinger066954a2007-10-21 22:36:06 +08001069 case 0xca:
1070 vendor = "Analog Devices";
Robin Getz73b0c0b2007-10-21 17:03:31 +08001071 break;
1072 default:
Mike Frysinger066954a2007-10-21 22:36:06 +08001073 vendor = "unknown";
1074 break;
Robin Getz73b0c0b2007-10-21 17:03:31 +08001075 }
Bryan Wu1394f032007-05-06 14:50:22 -07001076
Mike Frysinger275123e2009-01-07 23:14:39 +08001077 seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
Robin Getze482cad2008-10-10 18:21:45 +08001078
1079 if (CPUID == bfin_cpuid())
1080 seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
1081 else
1082 seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
1083 CPUID, bfin_cpuid());
1084
1085 seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
1086 "stepping\t: %d\n",
Michael Hennericha5f07172008-11-18 18:04:31 +08001087 cpu, cclk/1000000, sclk/1000000,
Robin Getz253bcf42008-04-24 05:57:13 +08001088#ifdef CONFIG_MPU
1089 "mpu on",
1090#else
1091 "mpu off",
1092#endif
Robin Getz73b0c0b2007-10-21 17:03:31 +08001093 revid);
Bryan Wu1394f032007-05-06 14:50:22 -07001094
Robin Getz73b0c0b2007-10-21 17:03:31 +08001095 seq_printf(m, "cpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
Michael Hennericha5f07172008-11-18 18:04:31 +08001096 cclk/1000000, cclk%1000000,
Robin Getz73b0c0b2007-10-21 17:03:31 +08001097 sclk/1000000, sclk%1000000);
1098 seq_printf(m, "bogomips\t: %lu.%02lu\n"
1099 "Calibration\t: %lu loops\n",
Graf Yang8f658732008-11-18 17:48:22 +08001100 (cpudata->loops_per_jiffy * HZ) / 500000,
1101 ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
1102 (cpudata->loops_per_jiffy * HZ));
Robin Getz73b0c0b2007-10-21 17:03:31 +08001103
1104 /* Check Cache configutation */
Graf Yang8f658732008-11-18 17:48:22 +08001105 switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
Mike Frysinger1f83b8f2007-07-12 22:58:21 +08001106 case ACACHE_BSRAM:
Mike Frysinger066954a2007-10-21 22:36:06 +08001107 cache = "dbank-A/B\t: cache/sram";
Mike Frysinger1f83b8f2007-07-12 22:58:21 +08001108 dcache_size = 16;
1109 dsup_banks = 1;
1110 break;
1111 case ACACHE_BCACHE:
Mike Frysinger066954a2007-10-21 22:36:06 +08001112 cache = "dbank-A/B\t: cache/cache";
Mike Frysinger1f83b8f2007-07-12 22:58:21 +08001113 dcache_size = 32;
1114 dsup_banks = 2;
1115 break;
1116 case ASRAM_BSRAM:
Mike Frysinger066954a2007-10-21 22:36:06 +08001117 cache = "dbank-A/B\t: sram/sram";
Mike Frysinger1f83b8f2007-07-12 22:58:21 +08001118 dcache_size = 0;
1119 dsup_banks = 0;
1120 break;
1121 default:
Mike Frysinger066954a2007-10-21 22:36:06 +08001122 cache = "unknown";
Robin Getz73b0c0b2007-10-21 17:03:31 +08001123 dcache_size = 0;
1124 dsup_banks = 0;
Bryan Wu1394f032007-05-06 14:50:22 -07001125 break;
1126 }
1127
Robin Getz73b0c0b2007-10-21 17:03:31 +08001128 /* Is it turned on? */
Graf Yang8f658732008-11-18 17:48:22 +08001129 if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
Robin Getz73b0c0b2007-10-21 17:03:31 +08001130 dcache_size = 0;
Bryan Wu1394f032007-05-06 14:50:22 -07001131
Graf Yang8f658732008-11-18 17:48:22 +08001132 if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
Robin Getz9de3a0b2008-07-26 19:39:19 +08001133 icache_size = 0;
1134
Robin Getz73b0c0b2007-10-21 17:03:31 +08001135 seq_printf(m, "cache size\t: %d KB(L1 icache) "
1136 "%d KB(L1 dcache-%s) %d KB(L2 cache)\n",
Robin Getz9de3a0b2008-07-26 19:39:19 +08001137 icache_size, dcache_size,
Robin Getz73b0c0b2007-10-21 17:03:31 +08001138#if defined CONFIG_BFIN_WB
1139 "wb"
1140#elif defined CONFIG_BFIN_WT
1141 "wt"
1142#endif
Mike Frysingerda27abb2007-10-22 10:55:35 +08001143 "", 0);
Robin Getz73b0c0b2007-10-21 17:03:31 +08001144
1145 seq_printf(m, "%s\n", cache);
1146
Robin Getz9de3a0b2008-07-26 19:39:19 +08001147 if (icache_size)
1148 seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
1149 BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
1150 else
1151 seq_printf(m, "icache setup\t: off\n");
1152
Bryan Wu1394f032007-05-06 14:50:22 -07001153 seq_printf(m,
Robin Getz73b0c0b2007-10-21 17:03:31 +08001154 "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
Robin Getz3bebca22007-10-10 23:55:26 +08001155 dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
1156 BFIN_DLINES);
Graf Yang8f658732008-11-18 17:48:22 +08001157#ifdef __ARCH_SYNC_CORE_DCACHE
Mike Frysinger275123e2009-01-07 23:14:39 +08001158 seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
Graf Yang8f658732008-11-18 17:48:22 +08001159#endif
Robin Getz3bebca22007-10-10 23:55:26 +08001160#ifdef CONFIG_BFIN_ICACHE_LOCK
Graf Yang8f658732008-11-18 17:48:22 +08001161 switch ((cpudata->imemctl >> 3) & WAYALL_L) {
Bryan Wu1394f032007-05-06 14:50:22 -07001162 case WAY0_L:
1163 seq_printf(m, "Way0 Locked-Down\n");
1164 break;
1165 case WAY1_L:
1166 seq_printf(m, "Way1 Locked-Down\n");
1167 break;
1168 case WAY01_L:
1169 seq_printf(m, "Way0,Way1 Locked-Down\n");
1170 break;
1171 case WAY2_L:
1172 seq_printf(m, "Way2 Locked-Down\n");
1173 break;
1174 case WAY02_L:
1175 seq_printf(m, "Way0,Way2 Locked-Down\n");
1176 break;
1177 case WAY12_L:
1178 seq_printf(m, "Way1,Way2 Locked-Down\n");
1179 break;
1180 case WAY012_L:
1181 seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
1182 break;
1183 case WAY3_L:
1184 seq_printf(m, "Way3 Locked-Down\n");
1185 break;
1186 case WAY03_L:
1187 seq_printf(m, "Way0,Way3 Locked-Down\n");
1188 break;
1189 case WAY13_L:
1190 seq_printf(m, "Way1,Way3 Locked-Down\n");
1191 break;
1192 case WAY013_L:
1193 seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
1194 break;
1195 case WAY32_L:
1196 seq_printf(m, "Way3,Way2 Locked-Down\n");
1197 break;
1198 case WAY320_L:
1199 seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
1200 break;
1201 case WAY321_L:
1202 seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
1203 break;
1204 case WAYALL_L:
1205 seq_printf(m, "All Ways are locked\n");
1206 break;
1207 default:
1208 seq_printf(m, "No Ways are locked\n");
1209 }
1210#endif
Mike Frysinger275123e2009-01-07 23:14:39 +08001211
1212 if (cpu_num != num_possible_cpus() - 1)
Graf Yang8f658732008-11-18 17:48:22 +08001213 return 0;
1214
Mike Frysinger275123e2009-01-07 23:14:39 +08001215 if (L2_LENGTH)
1216 seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
Mike Frysinger066954a2007-10-21 22:36:06 +08001217 seq_printf(m, "board name\t: %s\n", bfin_board_name);
Robin Getz73b0c0b2007-10-21 17:03:31 +08001218 seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
1219 physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
1220 seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
1221 ((int)memory_end - (int)_stext) >> 10,
1222 _stext,
1223 (void *)memory_end);
Graf Yang8f658732008-11-18 17:48:22 +08001224 seq_printf(m, "\n");
Robin Getz73b0c0b2007-10-21 17:03:31 +08001225
Bryan Wu1394f032007-05-06 14:50:22 -07001226 return 0;
1227}
1228
1229static void *c_start(struct seq_file *m, loff_t *pos)
1230{
Graf Yang55f2fea2008-10-09 15:37:47 +08001231 if (*pos == 0)
1232 *pos = first_cpu(cpu_online_map);
1233 if (*pos >= num_online_cpus())
1234 return NULL;
1235
1236 return pos;
Bryan Wu1394f032007-05-06 14:50:22 -07001237}
1238
1239static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1240{
Graf Yang55f2fea2008-10-09 15:37:47 +08001241 *pos = next_cpu(*pos, cpu_online_map);
1242
Bryan Wu1394f032007-05-06 14:50:22 -07001243 return c_start(m, pos);
1244}
1245
1246static void c_stop(struct seq_file *m, void *v)
1247{
1248}
1249
Jan Engelhardt03a44822008-02-08 04:21:19 -08001250const struct seq_operations cpuinfo_op = {
Bryan Wu1394f032007-05-06 14:50:22 -07001251 .start = c_start,
1252 .next = c_next,
1253 .stop = c_stop,
1254 .show = show_cpuinfo,
1255};
1256
Mike Frysinger5e10b4a2007-06-11 16:44:09 +08001257void __init cmdline_init(const char *r0)
Bryan Wu1394f032007-05-06 14:50:22 -07001258{
1259 if (r0)
Mike Frysinger52a07812007-06-11 15:31:30 +08001260 strncpy(command_line, r0, COMMAND_LINE_SIZE);
Bryan Wu1394f032007-05-06 14:50:22 -07001261}