blob: cad990793ccca512c0e23c48e3b6b44821dbdf96 [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +053021#include <linux/mfd/wcd9xxx/core.h>
22#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
23#include <linux/mfd/wcd9xxx/wcd9310_registers.h>
24#include <linux/mfd/wcd9xxx/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053025#include <sound/pcm.h>
26#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
Kuirong Wanga545e722012-02-06 19:12:54 -080032#include <linux/pm_runtime.h>
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070033#include <linux/kernel.h>
34#include <linux/gpio.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070035#include "wcd9310.h"
36
Kiran Kandi1e6371d2012-03-29 11:48:57 -070037#define WCD9310_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
38 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
39 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000)
40
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070041
42#define NUM_DECIMATORS 10
43#define NUM_INTERPOLATORS 7
44#define BITS_PER_REG 8
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080045#define TABLA_CFILT_FAST_MODE 0x00
46#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080047#define MBHC_FW_READ_ATTEMPTS 15
48#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070049
Joonwoo Park03324832012-03-19 19:36:16 -070050enum {
51 MBHC_USE_HPHL_TRIGGER = 1,
52 MBHC_USE_MB_TRIGGER = 2
53};
54
55#define MBHC_NUM_DCE_PLUG_DETECT 3
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070056#define NUM_ATTEMPTS_INSERT_DETECT 25
57#define NUM_ATTEMPTS_TO_REPORT 5
Joonwoo Park03324832012-03-19 19:36:16 -070058
Patrick Lai49efeac2011-11-03 11:01:12 -070059#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
60
Santosh Mardie15e2302011-11-15 10:39:23 +053061#define TABLA_I2S_MASTER_MODE_MASK 0x08
62
Patrick Laic7cae882011-11-18 11:52:49 -080063#define TABLA_OCP_ATTEMPT 1
64
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080065#define AIF1_PB 1
66#define AIF1_CAP 2
Neema Shettyd3a89262012-02-16 10:23:50 -080067#define AIF2_PB 3
Kiran Kandi1e6371d2012-03-29 11:48:57 -070068#define AIF2_CAP 4
Neema Shetty3fb1b802012-04-27 13:53:24 -070069#define AIF3_CAP 5
Kiran Kandi1e6371d2012-03-29 11:48:57 -070070
Neema Shetty3fb1b802012-04-27 13:53:24 -070071#define NUM_CODEC_DAIS 5
Kuirong Wang0f8ade32012-02-27 16:29:45 -080072#define TABLA_COMP_DIGITAL_GAIN_OFFSET 3
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -080073
74struct tabla_codec_dai_data {
75 u32 rate;
76 u32 *ch_num;
77 u32 ch_act;
78 u32 ch_tot;
79};
80
Joonwoo Park0976d012011-12-22 11:48:18 -080081#define TABLA_MCLK_RATE_12288KHZ 12288000
82#define TABLA_MCLK_RATE_9600KHZ 9600000
83
Joonwoo Parkf4267c22012-01-10 13:25:24 -080084#define TABLA_FAKE_INS_THRESHOLD_MS 2500
Joonwoo Park6b9b03f2012-01-23 18:48:54 -080085#define TABLA_FAKE_REMOVAL_MIN_PERIOD_MS 50
Joonwoo Parkf4267c22012-01-10 13:25:24 -080086
Joonwoo Park03324832012-03-19 19:36:16 -070087#define TABLA_MBHC_BUTTON_MIN 0x8000
88
Joonwoo Park03324832012-03-19 19:36:16 -070089#define TABLA_MBHC_FAKE_INSERT_LOW 10
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070090#define TABLA_MBHC_FAKE_INSERT_HIGH 80
91#define TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO 150
Joonwoo Park03324832012-03-19 19:36:16 -070092
93#define TABLA_MBHC_STATUS_REL_DETECTION 0x0C
94
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070095#define TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 200
96
Joonwoo Parkcf473b42012-03-29 19:48:16 -070097#define TABLA_MBHC_FAKE_INS_DELTA_MV 200
98#define TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV 300
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -070099
100#define TABLA_HS_DETECT_PLUG_TIME_MS (5 * 1000)
101#define TABLA_HS_DETECT_PLUG_INERVAL_MS 100
102
103#define TABLA_GPIO_IRQ_DEBOUNCE_TIME_US 5000
104
105#define TABLA_ACQUIRE_LOCK(x) do { mutex_lock(&x); } while (0)
106#define TABLA_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
109static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
110static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800111static struct snd_soc_dai_driver tabla_dai[];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800112static const DECLARE_TLV_DB_SCALE(aux_pga_gain, 0, 2, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700113
114enum tabla_bandgap_type {
115 TABLA_BANDGAP_OFF = 0,
116 TABLA_BANDGAP_AUDIO_MODE,
117 TABLA_BANDGAP_MBHC_MODE,
118};
119
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700120struct mbhc_micbias_regs {
121 u16 cfilt_val;
122 u16 cfilt_ctl;
123 u16 mbhc_reg;
124 u16 int_rbias;
125 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -0800126 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700127};
128
Ben Romberger1f045a72011-11-04 10:14:57 -0700129/* Codec supports 2 IIR filters */
130enum {
131 IIR1 = 0,
132 IIR2,
133 IIR_MAX,
134};
135/* Codec supports 5 bands */
136enum {
137 BAND1 = 0,
138 BAND2,
139 BAND3,
140 BAND4,
141 BAND5,
142 BAND_MAX,
143};
144
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800145enum {
146 COMPANDER_1 = 0,
147 COMPANDER_2,
148 COMPANDER_MAX,
149};
150
151enum {
152 COMPANDER_FS_8KHZ = 0,
153 COMPANDER_FS_16KHZ,
154 COMPANDER_FS_32KHZ,
155 COMPANDER_FS_48KHZ,
Kiran Kandi1e6371d2012-03-29 11:48:57 -0700156 COMPANDER_FS_96KHZ,
157 COMPANDER_FS_192KHZ,
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800158 COMPANDER_FS_MAX,
159};
160
Joonwoo Parka9444452011-12-08 18:48:27 -0800161/* Flags to track of PA and DAC state.
162 * PA and DAC should be tracked separately as AUXPGA loopback requires
163 * only PA to be turned on without DAC being on. */
164enum tabla_priv_ack_flags {
165 TABLA_HPHL_PA_OFF_ACK = 0,
166 TABLA_HPHR_PA_OFF_ACK,
167 TABLA_HPHL_DAC_OFF_ACK,
168 TABLA_HPHR_DAC_OFF_ACK
169};
170
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800171
172struct comp_sample_dependent_params {
173 u32 peak_det_timeout;
174 u32 rms_meter_div_fact;
175 u32 rms_meter_resamp_fact;
176};
177
Joonwoo Park0976d012011-12-22 11:48:18 -0800178/* Data used by MBHC */
179struct mbhc_internal_cal_data {
180 u16 dce_z;
181 u16 dce_mb;
182 u16 sta_z;
183 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800184 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800185 u32 t_dce;
186 u32 t_sta;
187 u32 micb_mv;
188 u16 v_ins_hu;
189 u16 v_ins_h;
190 u16 v_b1_hu;
191 u16 v_b1_h;
192 u16 v_b1_huc;
193 u16 v_brh;
194 u16 v_brl;
195 u16 v_no_mic;
Joonwoo Park0976d012011-12-22 11:48:18 -0800196 u8 npoll;
197 u8 nbounce_wait;
Joonwoo Parkcf473b42012-03-29 19:48:16 -0700198 s16 adj_v_hs_max;
199 u16 adj_v_ins_hu;
200 u16 adj_v_ins_h;
201 s16 v_inval_ins_low;
202 s16 v_inval_ins_high;
Joonwoo Park0976d012011-12-22 11:48:18 -0800203};
204
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800205struct tabla_reg_address {
206 u16 micb_4_ctl;
207 u16 micb_4_int_rbias;
208 u16 micb_4_mbhc;
209};
210
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700211enum tabla_mbhc_plug_type {
Joonwoo Park41956722012-04-18 13:13:07 -0700212 PLUG_TYPE_INVALID = -1,
213 PLUG_TYPE_NONE,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700214 PLUG_TYPE_HEADSET,
215 PLUG_TYPE_HEADPHONE,
216 PLUG_TYPE_HIGH_HPH,
217};
218
219enum tabla_mbhc_state {
220 MBHC_STATE_NONE = -1,
221 MBHC_STATE_POTENTIAL,
222 MBHC_STATE_POTENTIAL_RECOVERY,
223 MBHC_STATE_RELEASE,
224};
225
Kiran Kandid8cf5212012-03-02 15:34:53 -0800226struct hpf_work {
227 struct tabla_priv *tabla;
228 u32 decimator;
229 u8 tx_hpf_cut_of_freq;
230 struct delayed_work dwork;
231};
232
233static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
234
Bradley Rubin229c6a52011-07-12 16:18:48 -0700235struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700236 struct snd_soc_codec *codec;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -0800237 struct tabla_reg_address reg_addr;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700239 u32 cfilt1_cnt;
240 u32 cfilt2_cnt;
241 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700242 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700243 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700244 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700245 bool clock_active;
246 bool config_mode_active;
247 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800248 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700249 int buttons_pressed;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700250 enum tabla_mbhc_state mbhc_state;
251 struct tabla_mbhc_config mbhc_cfg;
Joonwoo Park0976d012011-12-22 11:48:18 -0800252 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700253
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +0530254 struct wcd9xxx_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700255 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700256
257 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700258 /* Delayed work to report long button press */
Joonwoo Park03324832012-03-19 19:36:16 -0700259 struct delayed_work mbhc_btn_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700260
261 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700262 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700263
Joonwoo Parka9444452011-12-08 18:48:27 -0800264 /* track PA/DAC state */
265 unsigned long hph_pa_dac_state;
266
Santosh Mardie15e2302011-11-15 10:39:23 +0530267 /*track tabla interface type*/
268 u8 intf_type;
269
Patrick Lai49efeac2011-11-03 11:01:12 -0700270 u32 hph_status; /* track headhpone status */
271 /* define separate work for left and right headphone OCP to avoid
272 * additional checking on which OCP event to report so no locking
273 * to ensure synchronization is required
274 */
275 struct work_struct hphlocp_work; /* reporting left hph ocp off */
276 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800277
Patrick Laic7cae882011-11-18 11:52:49 -0800278 u8 hphlocp_cnt; /* headphone left ocp retry */
279 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800280
Patrick Lai64b43262011-12-06 17:29:15 -0800281 /* Work to perform MBHC Firmware Read */
282 struct delayed_work mbhc_firmware_dwork;
283 const struct firmware *mbhc_fw;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -0800284
285 /* num of slim ports required */
286 struct tabla_codec_dai_data dai[NUM_CODEC_DAIS];
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800287
288 /*compander*/
289 int comp_enabled[COMPANDER_MAX];
290 u32 comp_fs[COMPANDER_MAX];
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800291
292 /* Maintain the status of AUX PGA */
293 int aux_pga_cnt;
294 u8 aux_l_gain;
295 u8 aux_r_gain;
Joonwoo Park03324832012-03-19 19:36:16 -0700296
Joonwoo Park03324832012-03-19 19:36:16 -0700297 struct delayed_work mbhc_insert_dwork;
298 unsigned long mbhc_last_resume; /* in jiffies */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -0700299
300 u8 current_plug;
301 struct work_struct hs_correct_plug_work;
302 bool hs_detect_work_stop;
303 bool hs_polling_irq_prepared;
304 bool lpi_enabled; /* low power insertion detection */
305 bool in_gpio_handler;
306 /* Currently, only used for mbhc purpose, to protect
307 * concurrent execution of mbhc threaded irq handlers and
308 * kill race between DAPM and MBHC.But can serve as a
309 * general lock to protect codec resource
310 */
311 struct mutex codec_resource_lock;
312
Bradley Rubincb3950a2011-08-18 13:07:26 -0700313#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700314 struct dentry *debugfs_poke;
315 struct dentry *debugfs_mbhc;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700316#endif
Joonwoo Park179b9ec2012-03-26 10:56:20 -0700317};
318
Bradley Rubincb3950a2011-08-18 13:07:26 -0700319
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800320static const u32 comp_shift[] = {
321 0,
322 2,
323};
324
325static const int comp_rx_path[] = {
326 COMPANDER_1,
327 COMPANDER_1,
328 COMPANDER_2,
329 COMPANDER_2,
330 COMPANDER_2,
331 COMPANDER_2,
332 COMPANDER_MAX,
333};
334
335static const struct comp_sample_dependent_params comp_samp_params[] = {
336 {
337 .peak_det_timeout = 0x2,
338 .rms_meter_div_fact = 0x8 << 4,
339 .rms_meter_resamp_fact = 0x21,
340 },
341 {
342 .peak_det_timeout = 0x3,
343 .rms_meter_div_fact = 0x9 << 4,
344 .rms_meter_resamp_fact = 0x28,
345 },
346
347 {
348 .peak_det_timeout = 0x5,
349 .rms_meter_div_fact = 0xB << 4,
350 .rms_meter_resamp_fact = 0x28,
351 },
352
353 {
354 .peak_det_timeout = 0x5,
355 .rms_meter_div_fact = 0xB << 4,
356 .rms_meter_resamp_fact = 0x28,
357 },
358};
359
Kuirong Wange9c8a222012-03-28 16:24:09 -0700360static unsigned short rx_digital_gain_reg[] = {
361 TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
362 TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
363 TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
364 TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
365 TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
366 TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
367 TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
368};
369
370
371static unsigned short tx_digital_gain_reg[] = {
372 TABLA_A_CDC_TX1_VOL_CTL_GAIN,
373 TABLA_A_CDC_TX2_VOL_CTL_GAIN,
374 TABLA_A_CDC_TX3_VOL_CTL_GAIN,
375 TABLA_A_CDC_TX4_VOL_CTL_GAIN,
376 TABLA_A_CDC_TX5_VOL_CTL_GAIN,
377 TABLA_A_CDC_TX6_VOL_CTL_GAIN,
378 TABLA_A_CDC_TX7_VOL_CTL_GAIN,
379 TABLA_A_CDC_TX8_VOL_CTL_GAIN,
380 TABLA_A_CDC_TX9_VOL_CTL_GAIN,
381 TABLA_A_CDC_TX10_VOL_CTL_GAIN,
382};
383
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700384static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
385 struct snd_kcontrol *kcontrol, int event)
386{
387 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700388
389 pr_debug("%s %d\n", __func__, event);
390 switch (event) {
391 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700392 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
393 0x01);
394 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
395 usleep_range(200, 200);
396 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
397 break;
398 case SND_SOC_DAPM_PRE_PMD:
399 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
400 0x10);
401 usleep_range(20, 20);
402 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
403 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
404 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
405 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
406 0x00);
407 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700408 break;
409 }
410 return 0;
411}
412
Bradley Rubina7096d02011-08-03 18:29:02 -0700413static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
414 struct snd_ctl_elem_value *ucontrol)
415{
416 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
417 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
418 ucontrol->value.integer.value[0] = tabla->anc_slot;
419 return 0;
420}
421
422static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
423 struct snd_ctl_elem_value *ucontrol)
424{
425 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
426 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
427 tabla->anc_slot = ucontrol->value.integer.value[0];
428 return 0;
429}
430
Kiran Kandid2d86b52011-09-09 17:44:28 -0700431static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
432 struct snd_ctl_elem_value *ucontrol)
433{
434 u8 ear_pa_gain;
435 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
436
437 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
438
439 ear_pa_gain = ear_pa_gain >> 5;
440
441 if (ear_pa_gain == 0x00) {
442 ucontrol->value.integer.value[0] = 0;
443 } else if (ear_pa_gain == 0x04) {
444 ucontrol->value.integer.value[0] = 1;
445 } else {
446 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
447 __func__, ear_pa_gain);
448 return -EINVAL;
449 }
450
451 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
452
453 return 0;
454}
455
456static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
457 struct snd_ctl_elem_value *ucontrol)
458{
459 u8 ear_pa_gain;
460 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
461
462 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
463 ucontrol->value.integer.value[0]);
464
465 switch (ucontrol->value.integer.value[0]) {
466 case 0:
467 ear_pa_gain = 0x00;
468 break;
469 case 1:
470 ear_pa_gain = 0x80;
471 break;
472 default:
473 return -EINVAL;
474 }
475
476 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
477 return 0;
478}
479
Ben Romberger1f045a72011-11-04 10:14:57 -0700480static int tabla_get_iir_enable_audio_mixer(
481 struct snd_kcontrol *kcontrol,
482 struct snd_ctl_elem_value *ucontrol)
483{
484 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
485 int iir_idx = ((struct soc_multi_mixer_control *)
486 kcontrol->private_value)->reg;
487 int band_idx = ((struct soc_multi_mixer_control *)
488 kcontrol->private_value)->shift;
489
490 ucontrol->value.integer.value[0] =
491 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
492 (1 << band_idx);
493
494 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
495 iir_idx, band_idx,
496 (uint32_t)ucontrol->value.integer.value[0]);
497 return 0;
498}
499
500static int tabla_put_iir_enable_audio_mixer(
501 struct snd_kcontrol *kcontrol,
502 struct snd_ctl_elem_value *ucontrol)
503{
504 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
505 int iir_idx = ((struct soc_multi_mixer_control *)
506 kcontrol->private_value)->reg;
507 int band_idx = ((struct soc_multi_mixer_control *)
508 kcontrol->private_value)->shift;
509 int value = ucontrol->value.integer.value[0];
510
511 /* Mask first 5 bits, 6-8 are reserved */
512 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
513 (1 << band_idx), (value << band_idx));
514
515 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
516 iir_idx, band_idx, value);
517 return 0;
518}
519static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
520 int iir_idx, int band_idx,
521 int coeff_idx)
522{
523 /* Address does not automatically update if reading */
Ben Romberger0915aae2012-02-06 23:32:43 -0800524 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700525 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800526 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700527
528 /* Mask bits top 2 bits since they are reserved */
529 return ((snd_soc_read(codec,
530 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
531 (snd_soc_read(codec,
532 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
533 (snd_soc_read(codec,
534 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
535 (snd_soc_read(codec,
536 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
537 0x3FFFFFFF;
538}
539
540static int tabla_get_iir_band_audio_mixer(
541 struct snd_kcontrol *kcontrol,
542 struct snd_ctl_elem_value *ucontrol)
543{
544 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
545 int iir_idx = ((struct soc_multi_mixer_control *)
546 kcontrol->private_value)->reg;
547 int band_idx = ((struct soc_multi_mixer_control *)
548 kcontrol->private_value)->shift;
549
550 ucontrol->value.integer.value[0] =
551 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
552 ucontrol->value.integer.value[1] =
553 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
554 ucontrol->value.integer.value[2] =
555 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
556 ucontrol->value.integer.value[3] =
557 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
558 ucontrol->value.integer.value[4] =
559 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
560
561 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
562 "%s: IIR #%d band #%d b1 = 0x%x\n"
563 "%s: IIR #%d band #%d b2 = 0x%x\n"
564 "%s: IIR #%d band #%d a1 = 0x%x\n"
565 "%s: IIR #%d band #%d a2 = 0x%x\n",
566 __func__, iir_idx, band_idx,
567 (uint32_t)ucontrol->value.integer.value[0],
568 __func__, iir_idx, band_idx,
569 (uint32_t)ucontrol->value.integer.value[1],
570 __func__, iir_idx, band_idx,
571 (uint32_t)ucontrol->value.integer.value[2],
572 __func__, iir_idx, band_idx,
573 (uint32_t)ucontrol->value.integer.value[3],
574 __func__, iir_idx, band_idx,
575 (uint32_t)ucontrol->value.integer.value[4]);
576 return 0;
577}
578
579static void set_iir_band_coeff(struct snd_soc_codec *codec,
580 int iir_idx, int band_idx,
581 int coeff_idx, uint32_t value)
582{
583 /* Mask top 3 bits, 6-8 are reserved */
584 /* Update address manually each time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800585 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700586 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800587 (band_idx * BAND_MAX + coeff_idx) & 0x1F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700588
589 /* Mask top 2 bits, 7-8 are reserved */
Ben Romberger0915aae2012-02-06 23:32:43 -0800590 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700591 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800592 (value >> 24) & 0x3F);
Ben Romberger1f045a72011-11-04 10:14:57 -0700593
594 /* Isolate 8bits at a time */
Ben Romberger0915aae2012-02-06 23:32:43 -0800595 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700596 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800597 (value >> 16) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700598
Ben Romberger0915aae2012-02-06 23:32:43 -0800599 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700600 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800601 (value >> 8) & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700602
Ben Romberger0915aae2012-02-06 23:32:43 -0800603 snd_soc_write(codec,
Ben Romberger1f045a72011-11-04 10:14:57 -0700604 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
Ben Romberger0915aae2012-02-06 23:32:43 -0800605 value & 0xFF);
Ben Romberger1f045a72011-11-04 10:14:57 -0700606}
607
608static int tabla_put_iir_band_audio_mixer(
609 struct snd_kcontrol *kcontrol,
610 struct snd_ctl_elem_value *ucontrol)
611{
612 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
613 int iir_idx = ((struct soc_multi_mixer_control *)
614 kcontrol->private_value)->reg;
615 int band_idx = ((struct soc_multi_mixer_control *)
616 kcontrol->private_value)->shift;
617
618 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
619 ucontrol->value.integer.value[0]);
620 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
621 ucontrol->value.integer.value[1]);
622 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
623 ucontrol->value.integer.value[2]);
624 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
625 ucontrol->value.integer.value[3]);
626 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
627 ucontrol->value.integer.value[4]);
628
629 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
630 "%s: IIR #%d band #%d b1 = 0x%x\n"
631 "%s: IIR #%d band #%d b2 = 0x%x\n"
632 "%s: IIR #%d band #%d a1 = 0x%x\n"
633 "%s: IIR #%d band #%d a2 = 0x%x\n",
634 __func__, iir_idx, band_idx,
635 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
636 __func__, iir_idx, band_idx,
637 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
638 __func__, iir_idx, band_idx,
639 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
640 __func__, iir_idx, band_idx,
641 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
642 __func__, iir_idx, band_idx,
643 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
644 return 0;
645}
646
Kuirong Wang0f8ade32012-02-27 16:29:45 -0800647static int tabla_compander_gain_offset(
648 struct snd_soc_codec *codec, u32 enable,
649 unsigned int reg, int mask, int event)
650{
651 int pa_mode = snd_soc_read(codec, reg) & mask;
652 int gain_offset = 0;
653 /* if PMU && enable is 1-> offset is 3
654 * if PMU && enable is 0-> offset is 0
655 * if PMD && pa_mode is PA -> offset is 0: PMU compander is off
656 * if PMD && pa_mode is comp -> offset is -3: PMU compander is on.
657 */
658
659 if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0))
660 gain_offset = TABLA_COMP_DIGITAL_GAIN_OFFSET;
661 if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0))
662 gain_offset = -TABLA_COMP_DIGITAL_GAIN_OFFSET;
663 return gain_offset;
664}
665
666
667static int tabla_config_gain_compander(
668 struct snd_soc_codec *codec,
669 u32 compander, u32 enable, int event)
670{
671 int value = 0;
672 int mask = 1 << 4;
673 int gain = 0;
674 int gain_offset;
675 if (compander >= COMPANDER_MAX) {
676 pr_err("%s: Error, invalid compander channel\n", __func__);
677 return -EINVAL;
678 }
679
680 if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
681 value = 1 << 4;
682
683 if (compander == COMPANDER_1) {
684 gain_offset = tabla_compander_gain_offset(codec, enable,
685 TABLA_A_RX_HPH_L_GAIN, mask, event);
686 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_GAIN, mask, value);
687 gain = snd_soc_read(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL);
688 snd_soc_update_bits(codec, TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
689 0xFF, gain - gain_offset);
690 gain_offset = tabla_compander_gain_offset(codec, enable,
691 TABLA_A_RX_HPH_R_GAIN, mask, event);
692 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_GAIN, mask, value);
693 gain = snd_soc_read(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL);
694 snd_soc_update_bits(codec, TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
695 0xFF, gain - gain_offset);
696 } else if (compander == COMPANDER_2) {
697 gain_offset = tabla_compander_gain_offset(codec, enable,
698 TABLA_A_RX_LINE_1_GAIN, mask, event);
699 snd_soc_update_bits(codec, TABLA_A_RX_LINE_1_GAIN, mask, value);
700 gain = snd_soc_read(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL);
701 snd_soc_update_bits(codec, TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
702 0xFF, gain - gain_offset);
703 gain_offset = tabla_compander_gain_offset(codec, enable,
704 TABLA_A_RX_LINE_3_GAIN, mask, event);
705 snd_soc_update_bits(codec, TABLA_A_RX_LINE_3_GAIN, mask, value);
706 gain = snd_soc_read(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL);
707 snd_soc_update_bits(codec, TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
708 0xFF, gain - gain_offset);
709 gain_offset = tabla_compander_gain_offset(codec, enable,
710 TABLA_A_RX_LINE_2_GAIN, mask, event);
711 snd_soc_update_bits(codec, TABLA_A_RX_LINE_2_GAIN, mask, value);
712 gain = snd_soc_read(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL);
713 snd_soc_update_bits(codec, TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
714 0xFF, gain - gain_offset);
715 gain_offset = tabla_compander_gain_offset(codec, enable,
716 TABLA_A_RX_LINE_4_GAIN, mask, event);
717 snd_soc_update_bits(codec, TABLA_A_RX_LINE_4_GAIN, mask, value);
718 gain = snd_soc_read(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL);
719 snd_soc_update_bits(codec, TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
720 0xFF, gain - gain_offset);
721 }
722 return 0;
723}
724static int tabla_get_compander(struct snd_kcontrol *kcontrol,
725 struct snd_ctl_elem_value *ucontrol)
726{
727
728 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
729 int comp = ((struct soc_multi_mixer_control *)
730 kcontrol->private_value)->max;
731 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
732
733 ucontrol->value.integer.value[0] = tabla->comp_enabled[comp];
734
735 return 0;
736}
737
738static int tabla_set_compander(struct snd_kcontrol *kcontrol,
739 struct snd_ctl_elem_value *ucontrol)
740{
741 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
742 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
743 int comp = ((struct soc_multi_mixer_control *)
744 kcontrol->private_value)->max;
745 int value = ucontrol->value.integer.value[0];
746
747 if (value == tabla->comp_enabled[comp]) {
748 pr_debug("%s: compander #%d enable %d no change\n",
749 __func__, comp, value);
750 return 0;
751 }
752 tabla->comp_enabled[comp] = value;
753 return 0;
754}
755
756
757static int tabla_config_compander(struct snd_soc_dapm_widget *w,
758 struct snd_kcontrol *kcontrol,
759 int event)
760{
761 struct snd_soc_codec *codec = w->codec;
762 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
763 u32 rate = tabla->comp_fs[w->shift];
764
765 switch (event) {
766 case SND_SOC_DAPM_PRE_PMU:
767 if (tabla->comp_enabled[w->shift] != 0) {
768 /* Enable both L/R compander clocks */
769 snd_soc_update_bits(codec,
770 TABLA_A_CDC_CLK_RX_B2_CTL,
771 0x03 << comp_shift[w->shift],
772 0x03 << comp_shift[w->shift]);
773 /* Clar the HALT for the compander*/
774 snd_soc_update_bits(codec,
775 TABLA_A_CDC_COMP1_B1_CTL +
776 w->shift * 8, 1 << 2, 0);
777 /* Toggle compander reset bits*/
778 snd_soc_update_bits(codec,
779 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
780 0x03 << comp_shift[w->shift],
781 0x03 << comp_shift[w->shift]);
782 snd_soc_update_bits(codec,
783 TABLA_A_CDC_CLK_OTHR_RESET_CTL,
784 0x03 << comp_shift[w->shift], 0);
785 tabla_config_gain_compander(codec, w->shift, 1, event);
786 /* Update the RMS meter resampling*/
787 snd_soc_update_bits(codec,
788 TABLA_A_CDC_COMP1_B3_CTL +
789 w->shift * 8, 0xFF, 0x01);
790 /* Wait for 1ms*/
791 usleep_range(1000, 1000);
792 }
793 break;
794 case SND_SOC_DAPM_POST_PMU:
795 /* Set sample rate dependent paramater*/
796 if (tabla->comp_enabled[w->shift] != 0) {
797 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_FS_CFG +
798 w->shift * 8, 0x03, rate);
799 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
800 w->shift * 8, 0x0F,
801 comp_samp_params[rate].peak_det_timeout);
802 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B2_CTL +
803 w->shift * 8, 0xF0,
804 comp_samp_params[rate].rms_meter_div_fact);
805 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B3_CTL +
806 w->shift * 8, 0xFF,
807 comp_samp_params[rate].rms_meter_resamp_fact);
808 /* Compander enable -> 0x370/0x378*/
809 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
810 w->shift * 8, 0x03, 0x03);
811 }
812 break;
813 case SND_SOC_DAPM_PRE_PMD:
814 /* Halt the compander*/
815 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
816 w->shift * 8, 1 << 2, 1 << 2);
817 break;
818 case SND_SOC_DAPM_POST_PMD:
819 /* Restore the gain */
820 tabla_config_gain_compander(codec, w->shift,
821 tabla->comp_enabled[w->shift], event);
822 /* Disable the compander*/
823 snd_soc_update_bits(codec, TABLA_A_CDC_COMP1_B1_CTL +
824 w->shift * 8, 0x03, 0x00);
825 /* Turn off the clock for compander in pair*/
826 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_B2_CTL,
827 0x03 << comp_shift[w->shift], 0);
828 break;
829 }
830 return 0;
831}
832
Kiran Kandid2d86b52011-09-09 17:44:28 -0700833static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
834static const struct soc_enum tabla_ear_pa_gain_enum[] = {
835 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
836};
837
Santosh Mardi024010f2011-10-18 06:27:21 +0530838/*cut of frequency for high pass filter*/
839static const char *cf_text[] = {
840 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
841};
842
843static const struct soc_enum cf_dec1_enum =
844 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
845
846static const struct soc_enum cf_dec2_enum =
847 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
848
849static const struct soc_enum cf_dec3_enum =
850 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
851
852static const struct soc_enum cf_dec4_enum =
853 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
854
855static const struct soc_enum cf_dec5_enum =
856 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
857
858static const struct soc_enum cf_dec6_enum =
859 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
860
861static const struct soc_enum cf_dec7_enum =
862 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
863
864static const struct soc_enum cf_dec8_enum =
865 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
866
867static const struct soc_enum cf_dec9_enum =
868 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
869
870static const struct soc_enum cf_dec10_enum =
871 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
872
873static const struct soc_enum cf_rxmix1_enum =
874 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
875
876static const struct soc_enum cf_rxmix2_enum =
877 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
878
879static const struct soc_enum cf_rxmix3_enum =
880 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
881
882static const struct soc_enum cf_rxmix4_enum =
883 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
884
885static const struct soc_enum cf_rxmix5_enum =
886 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
887;
888static const struct soc_enum cf_rxmix6_enum =
889 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
890
891static const struct soc_enum cf_rxmix7_enum =
892 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
893
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700894static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700895
896 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
897 tabla_pa_gain_get, tabla_pa_gain_put),
898
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700899 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
900 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700901 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
902 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700903 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
904 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700905 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
906 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700907 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
908 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700909
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700910 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
911 line_gain),
912 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
913 line_gain),
914
Bradley Rubin410383f2011-07-22 13:44:23 -0700915 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
916 -84, 40, digital_gain),
917 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
918 -84, 40, digital_gain),
919 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
920 -84, 40, digital_gain),
921 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
922 -84, 40, digital_gain),
923 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
924 -84, 40, digital_gain),
925 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
926 -84, 40, digital_gain),
Neema Shettyd3a89262012-02-16 10:23:50 -0800927 SOC_SINGLE_S8_TLV("RX7 Digital Volume", TABLA_A_CDC_RX7_VOL_CTL_B2_CTL,
928 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700929
Bradley Rubin410383f2011-07-22 13:44:23 -0700930 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700931 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700932 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700933 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700934 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
935 digital_gain),
936 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
937 digital_gain),
938 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
939 digital_gain),
940 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
941 digital_gain),
942 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
943 digital_gain),
944 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
945 digital_gain),
946 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
947 digital_gain),
948 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
949 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700950 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
951 40, digital_gain),
952 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
953 40, digital_gain),
954 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
955 40, digital_gain),
956 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
957 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700958 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
959 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700960 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
961 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700962 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
963 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700964
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -0800965 SOC_SINGLE_TLV("AUX_PGA_LEFT Volume", TABLA_A_AUX_L_GAIN, 0, 39, 0,
966 aux_pga_gain),
967 SOC_SINGLE_TLV("AUX_PGA_RIGHT Volume", TABLA_A_AUX_R_GAIN, 0, 39, 0,
968 aux_pga_gain),
969
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700970 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800971 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700972 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700973
974 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
975 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530976 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
977 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
978 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
979 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
980 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
981 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
982 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
983 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
984 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
985 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
986
987 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
988 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
989 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
990 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
991 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
992 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
993 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
994 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
995 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
996 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
997
998 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
999 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
1000 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
1001 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
1002 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
1003 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
1004 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
1005
1006 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
1007 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
1008 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
1009 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
1010 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
1011 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
1012 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -07001013
1014 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
1015 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1016 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
1017 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1018 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
1019 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1020 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
1021 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1022 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
1023 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1024 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
1025 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1026 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
1027 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1028 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
1029 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1030 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
1031 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1032 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
1033 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
1034
1035 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
1036 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1037 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
1038 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1039 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
1040 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1041 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
1042 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1043 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
1044 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1045 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
1046 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1047 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
1048 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1049 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
1050 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1051 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
1052 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
1053 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
1054 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Kuirong Wang0f8ade32012-02-27 16:29:45 -08001055 SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, 1, COMPANDER_1, 0,
1056 tabla_get_compander, tabla_set_compander),
1057 SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, 0, COMPANDER_2, 0,
1058 tabla_get_compander, tabla_set_compander),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001059};
1060
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08001061static const struct snd_kcontrol_new tabla_1_x_snd_controls[] = {
1062 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_1_A_MICB_4_CTL, 4, 1, 1),
1063};
1064
1065static const struct snd_kcontrol_new tabla_2_higher_snd_controls[] = {
1066 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_2_A_MICB_4_CTL, 4, 1, 1),
1067};
1068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069static const char *rx_mix1_text[] = {
1070 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
1071 "RX5", "RX6", "RX7"
1072};
1073
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001074static const char *rx_mix2_text[] = {
1075 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2"
1076};
1077
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001078static const char *rx_dsm_text[] = {
1079 "CIC_OUT", "DSM_INV"
1080};
1081
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001082static const char *sb_tx1_mux_text[] = {
1083 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1084 "DEC1"
1085};
1086
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001087static const char *sb_tx2_mux_text[] = {
1088 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1089 "DEC2"
1090};
1091
1092static const char *sb_tx3_mux_text[] = {
1093 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1094 "DEC3"
1095};
1096
1097static const char *sb_tx4_mux_text[] = {
1098 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1099 "DEC4"
1100};
1101
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102static const char *sb_tx5_mux_text[] = {
1103 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1104 "DEC5"
1105};
1106
1107static const char *sb_tx6_mux_text[] = {
1108 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1109 "DEC6"
1110};
1111
1112static const char const *sb_tx7_to_tx10_mux_text[] = {
1113 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
1114 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1115 "DEC9", "DEC10"
1116};
1117
1118static const char *dec1_mux_text[] = {
1119 "ZERO", "DMIC1", "ADC6",
1120};
1121
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001122static const char *dec2_mux_text[] = {
1123 "ZERO", "DMIC2", "ADC5",
1124};
1125
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001126static const char *dec3_mux_text[] = {
1127 "ZERO", "DMIC3", "ADC4",
1128};
1129
1130static const char *dec4_mux_text[] = {
1131 "ZERO", "DMIC4", "ADC3",
1132};
1133
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001134static const char *dec5_mux_text[] = {
1135 "ZERO", "DMIC5", "ADC2",
1136};
1137
1138static const char *dec6_mux_text[] = {
1139 "ZERO", "DMIC6", "ADC1",
1140};
1141
1142static const char const *dec7_mux_text[] = {
1143 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
1144};
1145
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001146static const char *dec8_mux_text[] = {
1147 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
1148};
1149
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001150static const char *dec9_mux_text[] = {
1151 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
1152};
1153
1154static const char *dec10_mux_text[] = {
1155 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
1156};
1157
Bradley Rubin229c6a52011-07-12 16:18:48 -07001158static const char const *anc_mux_text[] = {
1159 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
1160 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
1161};
1162
1163static const char const *anc1_fb_mux_text[] = {
1164 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
1165};
1166
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001167static const char *iir1_inp1_text[] = {
1168 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
1169 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
1170};
1171
1172static const struct soc_enum rx_mix1_inp1_chain_enum =
1173 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
1174
Bradley Rubin229c6a52011-07-12 16:18:48 -07001175static const struct soc_enum rx_mix1_inp2_chain_enum =
1176 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
1177
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001178static const struct soc_enum rx2_mix1_inp1_chain_enum =
1179 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
1180
Bradley Rubin229c6a52011-07-12 16:18:48 -07001181static const struct soc_enum rx2_mix1_inp2_chain_enum =
1182 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
1183
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001184static const struct soc_enum rx3_mix1_inp1_chain_enum =
1185 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
1186
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001187static const struct soc_enum rx3_mix1_inp2_chain_enum =
1188 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
1189
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001190static const struct soc_enum rx4_mix1_inp1_chain_enum =
1191 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
1192
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001193static const struct soc_enum rx4_mix1_inp2_chain_enum =
1194 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
1195
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001196static const struct soc_enum rx5_mix1_inp1_chain_enum =
1197 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
1198
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001199static const struct soc_enum rx5_mix1_inp2_chain_enum =
1200 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
1201
1202static const struct soc_enum rx6_mix1_inp1_chain_enum =
1203 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
1204
1205static const struct soc_enum rx6_mix1_inp2_chain_enum =
1206 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
1207
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001208static const struct soc_enum rx7_mix1_inp1_chain_enum =
1209 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
1210
1211static const struct soc_enum rx7_mix1_inp2_chain_enum =
1212 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
1213
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001214static const struct soc_enum rx1_mix2_inp1_chain_enum =
1215 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 0, 5, rx_mix2_text);
1216
1217static const struct soc_enum rx1_mix2_inp2_chain_enum =
1218 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B3_CTL, 3, 5, rx_mix2_text);
1219
1220static const struct soc_enum rx2_mix2_inp1_chain_enum =
1221 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 0, 5, rx_mix2_text);
1222
1223static const struct soc_enum rx2_mix2_inp2_chain_enum =
1224 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B3_CTL, 3, 5, rx_mix2_text);
1225
1226static const struct soc_enum rx3_mix2_inp1_chain_enum =
1227 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 0, 5, rx_mix2_text);
1228
1229static const struct soc_enum rx3_mix2_inp2_chain_enum =
1230 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B3_CTL, 3, 5, rx_mix2_text);
1231
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001232static const struct soc_enum rx4_dsm_enum =
1233 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
1234
1235static const struct soc_enum rx6_dsm_enum =
1236 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
1237
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001238static const struct soc_enum sb_tx1_mux_enum =
1239 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
1240
1241static const struct soc_enum sb_tx2_mux_enum =
1242 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
1243
1244static const struct soc_enum sb_tx3_mux_enum =
1245 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
1246
1247static const struct soc_enum sb_tx4_mux_enum =
1248 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
1249
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001250static const struct soc_enum sb_tx5_mux_enum =
1251 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
1252
1253static const struct soc_enum sb_tx6_mux_enum =
1254 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
1255
1256static const struct soc_enum sb_tx7_mux_enum =
1257 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
1258 sb_tx7_to_tx10_mux_text);
1259
1260static const struct soc_enum sb_tx8_mux_enum =
1261 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
1262 sb_tx7_to_tx10_mux_text);
1263
Kiran Kandi3426e512011-09-13 22:50:10 -07001264static const struct soc_enum sb_tx9_mux_enum =
1265 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
1266 sb_tx7_to_tx10_mux_text);
1267
1268static const struct soc_enum sb_tx10_mux_enum =
1269 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
1270 sb_tx7_to_tx10_mux_text);
1271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001272static const struct soc_enum dec1_mux_enum =
1273 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
1274
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001275static const struct soc_enum dec2_mux_enum =
1276 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
1277
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001278static const struct soc_enum dec3_mux_enum =
1279 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
1280
1281static const struct soc_enum dec4_mux_enum =
1282 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
1283
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001284static const struct soc_enum dec5_mux_enum =
1285 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
1286
1287static const struct soc_enum dec6_mux_enum =
1288 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
1289
1290static const struct soc_enum dec7_mux_enum =
1291 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
1292
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001293static const struct soc_enum dec8_mux_enum =
1294 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
1295
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001296static const struct soc_enum dec9_mux_enum =
1297 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
1298
1299static const struct soc_enum dec10_mux_enum =
1300 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
1301
Bradley Rubin229c6a52011-07-12 16:18:48 -07001302static const struct soc_enum anc1_mux_enum =
1303 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
1304
1305static const struct soc_enum anc2_mux_enum =
1306 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
1307
1308static const struct soc_enum anc1_fb_mux_enum =
1309 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
1310
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001311static const struct soc_enum iir1_inp1_mux_enum =
1312 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
1313
1314static const struct snd_kcontrol_new rx_mix1_inp1_mux =
1315 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
1316
Bradley Rubin229c6a52011-07-12 16:18:48 -07001317static const struct snd_kcontrol_new rx_mix1_inp2_mux =
1318 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
1319
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001320static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
1321 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
1322
Bradley Rubin229c6a52011-07-12 16:18:48 -07001323static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
1324 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
1325
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001326static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
1327 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
1328
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001329static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
1330 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
1331
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001332static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
1333 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
1334
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001335static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
1336 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
1337
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001338static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
1339 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
1340
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001341static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
1342 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
1343
1344static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
1345 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
1346
1347static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
1348 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
1349
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001350static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
1351 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
1352
1353static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
1354 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
1355
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08001356static const struct snd_kcontrol_new rx1_mix2_inp1_mux =
1357 SOC_DAPM_ENUM("RX1 MIX2 INP1 Mux", rx1_mix2_inp1_chain_enum);
1358
1359static const struct snd_kcontrol_new rx1_mix2_inp2_mux =
1360 SOC_DAPM_ENUM("RX1 MIX2 INP2 Mux", rx1_mix2_inp2_chain_enum);
1361
1362static const struct snd_kcontrol_new rx2_mix2_inp1_mux =
1363 SOC_DAPM_ENUM("RX2 MIX2 INP1 Mux", rx2_mix2_inp1_chain_enum);
1364
1365static const struct snd_kcontrol_new rx2_mix2_inp2_mux =
1366 SOC_DAPM_ENUM("RX2 MIX2 INP2 Mux", rx2_mix2_inp2_chain_enum);
1367
1368static const struct snd_kcontrol_new rx3_mix2_inp1_mux =
1369 SOC_DAPM_ENUM("RX3 MIX2 INP1 Mux", rx3_mix2_inp1_chain_enum);
1370
1371static const struct snd_kcontrol_new rx3_mix2_inp2_mux =
1372 SOC_DAPM_ENUM("RX3 MIX2 INP2 Mux", rx3_mix2_inp2_chain_enum);
1373
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001374static const struct snd_kcontrol_new rx4_dsm_mux =
1375 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
1376
1377static const struct snd_kcontrol_new rx6_dsm_mux =
1378 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
1379
Kiran Kandi1e6371d2012-03-29 11:48:57 -07001380static const struct snd_kcontrol_new sb_tx1_mux =
1381 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
1382
1383static const struct snd_kcontrol_new sb_tx2_mux =
1384 SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
1385
1386static const struct snd_kcontrol_new sb_tx3_mux =
1387 SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
1388
1389static const struct snd_kcontrol_new sb_tx4_mux =
1390 SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
1391
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001392static const struct snd_kcontrol_new sb_tx5_mux =
1393 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
1394
1395static const struct snd_kcontrol_new sb_tx6_mux =
1396 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
1397
1398static const struct snd_kcontrol_new sb_tx7_mux =
1399 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
1400
1401static const struct snd_kcontrol_new sb_tx8_mux =
1402 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
1403
Kiran Kandi3426e512011-09-13 22:50:10 -07001404static const struct snd_kcontrol_new sb_tx9_mux =
1405 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
1406
1407static const struct snd_kcontrol_new sb_tx10_mux =
1408 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
1409
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001410
Kiran Kandi59a96b12012-01-16 02:20:03 -08001411static int wcd9310_put_dec_enum(struct snd_kcontrol *kcontrol,
1412 struct snd_ctl_elem_value *ucontrol)
1413{
1414 struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
1415 struct snd_soc_dapm_widget *w = wlist->widgets[0];
1416 struct snd_soc_codec *codec = w->codec;
1417 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1418 unsigned int dec_mux, decimator;
1419 char *dec_name = NULL;
1420 char *widget_name = NULL;
1421 char *temp;
1422 u16 tx_mux_ctl_reg;
1423 u8 adc_dmic_sel = 0x0;
1424 int ret = 0;
1425
1426 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1427 return -EINVAL;
1428
1429 dec_mux = ucontrol->value.enumerated.item[0];
1430
1431 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
1432 if (!widget_name)
1433 return -ENOMEM;
1434 temp = widget_name;
1435
1436 dec_name = strsep(&widget_name, " ");
1437 widget_name = temp;
1438 if (!dec_name) {
1439 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
1440 ret = -EINVAL;
1441 goto out;
1442 }
1443
1444 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
1445 if (ret < 0) {
1446 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
1447 ret = -EINVAL;
1448 goto out;
1449 }
1450
1451 dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"
1452 " dec_mux = %u\n", __func__, w->name, dec_name, decimator,
1453 dec_mux);
1454
1455
1456 switch (decimator) {
1457 case 1:
1458 case 2:
1459 case 3:
1460 case 4:
1461 case 5:
1462 case 6:
1463 if (dec_mux == 1)
1464 adc_dmic_sel = 0x1;
1465 else
1466 adc_dmic_sel = 0x0;
1467 break;
1468 case 7:
1469 case 8:
1470 case 9:
1471 case 10:
1472 if ((dec_mux == 1) || (dec_mux == 2))
1473 adc_dmic_sel = 0x1;
1474 else
1475 adc_dmic_sel = 0x0;
1476 break;
1477 default:
1478 pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
1479 ret = -EINVAL;
1480 goto out;
1481 }
1482
1483 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
1484
1485 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
1486
1487 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
1488
1489out:
1490 kfree(widget_name);
1491 return ret;
1492}
1493
1494#define WCD9310_DEC_ENUM(xname, xenum) \
1495{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1496 .info = snd_soc_info_enum_double, \
1497 .get = snd_soc_dapm_get_enum_double, \
1498 .put = wcd9310_put_dec_enum, \
1499 .private_value = (unsigned long)&xenum }
1500
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001501static const struct snd_kcontrol_new dec1_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001502 WCD9310_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001503
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001504static const struct snd_kcontrol_new dec2_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001505 WCD9310_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001506
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001507static const struct snd_kcontrol_new dec3_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001508 WCD9310_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001509
1510static const struct snd_kcontrol_new dec4_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001511 WCD9310_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001512
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001513static const struct snd_kcontrol_new dec5_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001514 WCD9310_DEC_ENUM("DEC5 MUX Mux", dec5_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001515
1516static const struct snd_kcontrol_new dec6_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001517 WCD9310_DEC_ENUM("DEC6 MUX Mux", dec6_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001518
1519static const struct snd_kcontrol_new dec7_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001520 WCD9310_DEC_ENUM("DEC7 MUX Mux", dec7_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001521
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001522static const struct snd_kcontrol_new dec8_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001523 WCD9310_DEC_ENUM("DEC8 MUX Mux", dec8_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07001524
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001525static const struct snd_kcontrol_new dec9_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001526 WCD9310_DEC_ENUM("DEC9 MUX Mux", dec9_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001527
1528static const struct snd_kcontrol_new dec10_mux =
Kiran Kandi59a96b12012-01-16 02:20:03 -08001529 WCD9310_DEC_ENUM("DEC10 MUX Mux", dec10_mux_enum);
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001530
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001531static const struct snd_kcontrol_new iir1_inp1_mux =
1532 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
1533
Kiran Kandi59a96b12012-01-16 02:20:03 -08001534static const struct snd_kcontrol_new anc1_mux =
1535 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
1536
Bradley Rubin229c6a52011-07-12 16:18:48 -07001537static const struct snd_kcontrol_new anc2_mux =
1538 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001539
Bradley Rubin229c6a52011-07-12 16:18:48 -07001540static const struct snd_kcontrol_new anc1_fb_mux =
1541 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001542
Bradley Rubin229c6a52011-07-12 16:18:48 -07001543static const struct snd_kcontrol_new dac1_switch[] = {
1544 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
1545};
1546static const struct snd_kcontrol_new hphl_switch[] = {
1547 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
1548};
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001549
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001550static const struct snd_kcontrol_new hphl_pa_mix[] = {
1551 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1552 7, 1, 0),
1553 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1554 7, 1, 0),
1555 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1556 TABLA_A_AUX_L_PA_CONN_INV, 7, 1, 0),
1557 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1558 TABLA_A_AUX_R_PA_CONN_INV, 7, 1, 0),
1559};
1560
1561static const struct snd_kcontrol_new hphr_pa_mix[] = {
1562 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1563 6, 1, 0),
1564 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1565 6, 1, 0),
1566 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1567 TABLA_A_AUX_L_PA_CONN_INV, 6, 1, 0),
1568 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1569 TABLA_A_AUX_R_PA_CONN_INV, 6, 1, 0),
1570};
1571
1572static const struct snd_kcontrol_new lineout1_pa_mix[] = {
1573 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1574 5, 1, 0),
1575 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1576 5, 1, 0),
1577 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1578 TABLA_A_AUX_L_PA_CONN_INV, 5, 1, 0),
1579 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1580 TABLA_A_AUX_R_PA_CONN_INV, 5, 1, 0),
1581};
1582
1583static const struct snd_kcontrol_new lineout2_pa_mix[] = {
1584 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1585 4, 1, 0),
1586 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1587 4, 1, 0),
1588 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1589 TABLA_A_AUX_L_PA_CONN_INV, 4, 1, 0),
1590 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1591 TABLA_A_AUX_R_PA_CONN_INV, 4, 1, 0),
1592};
1593
1594static const struct snd_kcontrol_new lineout3_pa_mix[] = {
1595 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1596 3, 1, 0),
1597 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1598 3, 1, 0),
1599 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1600 TABLA_A_AUX_L_PA_CONN_INV, 3, 1, 0),
1601 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1602 TABLA_A_AUX_R_PA_CONN_INV, 3, 1, 0),
1603};
1604
1605static const struct snd_kcontrol_new lineout4_pa_mix[] = {
1606 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1607 2, 1, 0),
1608 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1609 2, 1, 0),
1610 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1611 TABLA_A_AUX_L_PA_CONN_INV, 2, 1, 0),
1612 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1613 TABLA_A_AUX_R_PA_CONN_INV, 2, 1, 0),
1614};
1615
1616static const struct snd_kcontrol_new lineout5_pa_mix[] = {
1617 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1618 1, 1, 0),
1619 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1620 1, 1, 0),
1621 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1622 TABLA_A_AUX_L_PA_CONN_INV, 1, 1, 0),
1623 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1624 TABLA_A_AUX_R_PA_CONN_INV, 1, 1, 0),
1625};
1626
1627static const struct snd_kcontrol_new ear_pa_mix[] = {
1628 SOC_DAPM_SINGLE("AUX_PGA_L Switch", TABLA_A_AUX_L_PA_CONN,
1629 0, 1, 0),
1630 SOC_DAPM_SINGLE("AUX_PGA_R Switch", TABLA_A_AUX_R_PA_CONN,
1631 0, 1, 0),
1632 SOC_DAPM_SINGLE("AUX_PGA_L_INV Switch",
1633 TABLA_A_AUX_L_PA_CONN_INV, 0, 1, 0),
1634 SOC_DAPM_SINGLE("AUX_PGA_R_INV Switch",
1635 TABLA_A_AUX_R_PA_CONN_INV, 0, 1, 0),
1636};
1637
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001638static const struct snd_kcontrol_new lineout3_ground_switch =
1639 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1640
1641static const struct snd_kcontrol_new lineout4_ground_switch =
1642 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001643
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001644static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001645 int enable)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001646{
1647 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1648
1649 pr_debug("%s %d\n", __func__, enable);
1650
1651 if (enable) {
1652 tabla->adc_count++;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001653 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1654 } else {
1655 tabla->adc_count--;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001656 if (!tabla->adc_count)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001657 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
Joonwoo Park03324832012-03-19 19:36:16 -07001658 0x2, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001659 }
1660}
1661
1662static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1663 struct snd_kcontrol *kcontrol, int event)
1664{
1665 struct snd_soc_codec *codec = w->codec;
1666 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001667 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001668
1669 pr_debug("%s %d\n", __func__, event);
1670
1671 if (w->reg == TABLA_A_TX_1_2_EN)
1672 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1673 else if (w->reg == TABLA_A_TX_3_4_EN)
1674 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1675 else if (w->reg == TABLA_A_TX_5_6_EN)
1676 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1677 else {
1678 pr_err("%s: Error, invalid adc register\n", __func__);
1679 return -EINVAL;
1680 }
1681
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001682 if (w->shift == 3)
1683 init_bit_shift = 6;
1684 else if (w->shift == 7)
1685 init_bit_shift = 7;
1686 else {
1687 pr_err("%s: Error, invalid init bit postion adc register\n",
1688 __func__);
1689 return -EINVAL;
1690 }
1691
1692
1693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001694 switch (event) {
1695 case SND_SOC_DAPM_PRE_PMU:
1696 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001697 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1698 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001699 break;
1700 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001701
1702 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1703
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001704 break;
1705 case SND_SOC_DAPM_POST_PMD:
1706 tabla_codec_enable_adc_block(codec, 0);
1707 break;
1708 }
1709 return 0;
1710}
1711
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001712static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
1713{
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001714 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1715 0x80);
1716 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
1717 0x04);
1718 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1719 0x01);
1720 usleep_range(1000, 1000);
1721 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1722 0x00);
1723}
1724
1725static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
1726 enum tabla_bandgap_type choice)
1727{
1728 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1729
1730 /* TODO lock resources accessed by audio streams and threaded
1731 * interrupt handlers
1732 */
1733
1734 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
1735 tabla->bandgap_type);
1736
1737 if (tabla->bandgap_type == choice)
1738 return;
1739
1740 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
1741 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1742 tabla_codec_enable_audio_mode_bandgap(codec);
1743 } else if (choice == TABLA_BANDGAP_MBHC_MODE) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001744 /* bandgap mode becomes fast,
1745 * mclk should be off or clk buff source souldn't be VBG
1746 * Let's turn off mclk always */
1747 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001748 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
1749 0x2);
1750 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1751 0x80);
1752 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
1753 0x4);
1754 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
1755 0x01);
1756 usleep_range(1000, 1000);
1757 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
1758 0x00);
1759 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
1760 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
1761 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1762 usleep_range(100, 100);
1763 tabla_codec_enable_audio_mode_bandgap(codec);
1764 } else if (choice == TABLA_BANDGAP_OFF) {
1765 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
1766 } else {
1767 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
1768 }
1769 tabla->bandgap_type = choice;
1770}
1771
1772static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
1773{
1774 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1775 pr_debug("%s\n", __func__);
1776 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001777 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001778 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
1779 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001780 usleep_range(50, 50);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001781 tabla->clock_active = false;
1782}
1783
1784static int tabla_codec_mclk_index(const struct tabla_priv *tabla)
1785{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001786 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001787 return 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07001788 else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001789 return 1;
1790 else {
1791 BUG_ON(1);
1792 return -EINVAL;
1793 }
1794}
1795
1796static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1797{
1798 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1799
1800 if (enable) {
1801 tabla->rx_bias_count++;
1802 if (tabla->rx_bias_count == 1)
1803 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1804 0x80, 0x80);
1805 } else {
1806 tabla->rx_bias_count--;
1807 if (!tabla->rx_bias_count)
1808 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1809 0x80, 0x00);
1810 }
1811}
1812
1813static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
1814 int enable)
1815{
1816 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1817
1818 pr_debug("%s: enable = %d\n", __func__, enable);
1819 if (enable) {
1820 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001821 /* bandgap mode to fast */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001822 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
1823 usleep_range(5, 5);
1824 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001825 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001826 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001827 0x80);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001828 usleep_range(10, 10);
1829 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001830 usleep_range(10000, 10000);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001831 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
1832 } else {
1833 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001834 0);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001835 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001836 /* clk source to ext clk and clk buff ref to VBG */
1837 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x0C, 0x04);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001838 }
1839 tabla->config_mode_active = enable ? true : false;
1840
1841 return 0;
1842}
1843
1844static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001845 int config_mode)
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001846{
1847 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1848
1849 pr_debug("%s: config_mode = %d\n", __func__, config_mode);
1850
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001851 /* transit to RCO requires mclk off */
1852 WARN_ON(snd_soc_read(codec, TABLA_A_CLK_BUFF_EN2) & (1 << 2));
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001853 if (config_mode) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001854 /* enable RCO and switch to it */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001855 tabla_codec_enable_config_mode(codec, 1);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001856 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001857 usleep_range(1000, 1000);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001858 } else {
1859 /* switch to MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001860 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
1861
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001862 if (tabla->mbhc_polling_active) {
1863 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
1864 tabla_codec_enable_config_mode(codec, 0);
1865 }
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001866 }
1867
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001868 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x01, 0x01);
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001869 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07001870 /* on MCLK */
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08001871 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
1872 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
1873 usleep_range(50, 50);
1874 tabla->clock_active = true;
1875 return 0;
1876}
1877
1878static int tabla_codec_enable_aux_pga(struct snd_soc_dapm_widget *w,
1879 struct snd_kcontrol *kcontrol, int event)
1880{
1881 struct snd_soc_codec *codec = w->codec;
1882 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1883
1884 pr_debug("%s: %d\n", __func__, event);
1885
1886 switch (event) {
1887 case SND_SOC_DAPM_PRE_PMU:
1888 tabla_codec_enable_bandgap(codec,
1889 TABLA_BANDGAP_AUDIO_MODE);
1890 tabla_enable_rx_bias(codec, 1);
1891
1892 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1893 0x08, 0x08);
1894 /* Enable Zero Cross detect for AUX PGA channel
1895 * and set the initial AUX PGA gain to NEG_0P0_DB
1896 * to avoid glitches.
1897 */
1898 if (w->reg == TABLA_A_AUX_L_EN) {
1899 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1900 0x20, 0x20);
1901 tabla->aux_l_gain = snd_soc_read(codec,
1902 TABLA_A_AUX_L_GAIN);
1903 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1904 } else {
1905 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1906 0x20, 0x20);
1907 tabla->aux_r_gain = snd_soc_read(codec,
1908 TABLA_A_AUX_R_GAIN);
1909 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1910 }
1911 if (tabla->aux_pga_cnt++ == 1
1912 && !tabla->mclk_enabled) {
1913 tabla_codec_enable_clock_block(codec, 1);
1914 pr_debug("AUX PGA enabled RC osc\n");
1915 }
1916 break;
1917
1918 case SND_SOC_DAPM_POST_PMU:
1919 if (w->reg == TABLA_A_AUX_L_EN)
1920 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1921 tabla->aux_l_gain);
1922 else
1923 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1924 tabla->aux_r_gain);
1925 break;
1926
1927 case SND_SOC_DAPM_PRE_PMD:
1928 /* Mute AUX PGA channel in use before disabling AUX PGA */
1929 if (w->reg == TABLA_A_AUX_L_EN) {
1930 tabla->aux_l_gain = snd_soc_read(codec,
1931 TABLA_A_AUX_L_GAIN);
1932 snd_soc_write(codec, TABLA_A_AUX_L_GAIN, 0x1F);
1933 } else {
1934 tabla->aux_r_gain = snd_soc_read(codec,
1935 TABLA_A_AUX_R_GAIN);
1936 snd_soc_write(codec, TABLA_A_AUX_R_GAIN, 0x1F);
1937 }
1938 break;
1939
1940 case SND_SOC_DAPM_POST_PMD:
1941 tabla_enable_rx_bias(codec, 0);
1942
1943 snd_soc_update_bits(codec, TABLA_A_AUX_COM_CTL,
1944 0x08, 0x00);
1945 if (w->reg == TABLA_A_AUX_L_EN) {
1946 snd_soc_write(codec, TABLA_A_AUX_L_GAIN,
1947 tabla->aux_l_gain);
1948 snd_soc_update_bits(codec, TABLA_A_AUX_L_EN,
1949 0x20, 0x00);
1950 } else {
1951 snd_soc_write(codec, TABLA_A_AUX_R_GAIN,
1952 tabla->aux_r_gain);
1953 snd_soc_update_bits(codec, TABLA_A_AUX_R_EN,
1954 0x20, 0x00);
1955 }
1956
1957 if (tabla->aux_pga_cnt-- == 0) {
1958 if (tabla->mbhc_polling_active)
1959 tabla_codec_enable_bandgap(codec,
1960 TABLA_BANDGAP_MBHC_MODE);
1961 else
1962 tabla_codec_enable_bandgap(codec,
1963 TABLA_BANDGAP_OFF);
1964
1965 if (!tabla->mclk_enabled &&
1966 !tabla->mbhc_polling_active) {
1967 tabla_codec_enable_clock_block(codec, 0);
1968 }
1969 }
1970 break;
1971 }
1972 return 0;
1973}
1974
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001975static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1976 struct snd_kcontrol *kcontrol, int event)
1977{
1978 struct snd_soc_codec *codec = w->codec;
1979 u16 lineout_gain_reg;
1980
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001981 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001982
1983 switch (w->shift) {
1984 case 0:
1985 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1986 break;
1987 case 1:
1988 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1989 break;
1990 case 2:
1991 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1992 break;
1993 case 3:
1994 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1995 break;
1996 case 4:
1997 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1998 break;
1999 default:
2000 pr_err("%s: Error, incorrect lineout register value\n",
2001 __func__);
2002 return -EINVAL;
2003 }
2004
2005 switch (event) {
2006 case SND_SOC_DAPM_PRE_PMU:
2007 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
2008 break;
2009 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002010 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002011 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08002012 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002013 break;
2014 case SND_SOC_DAPM_POST_PMD:
2015 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
2016 break;
2017 }
2018 return 0;
2019}
2020
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002021
2022static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002023 struct snd_kcontrol *kcontrol, int event)
2024{
2025 struct snd_soc_codec *codec = w->codec;
Kiran Kandi59a96b12012-01-16 02:20:03 -08002026 u16 tx_dmic_ctl_reg;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002027 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002028 unsigned int dmic;
2029 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002030
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002031 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
2032 if (ret < 0) {
2033 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002034 return -EINVAL;
2035 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002036
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002037 switch (dmic) {
2038 case 1:
2039 case 2:
2040 dmic_clk_sel = 0x02;
2041 dmic_clk_en = 0x01;
2042 break;
2043
2044 case 3:
2045 case 4:
2046 dmic_clk_sel = 0x08;
2047 dmic_clk_en = 0x04;
2048 break;
2049
2050 case 5:
2051 case 6:
2052 dmic_clk_sel = 0x20;
2053 dmic_clk_en = 0x10;
2054 break;
2055
2056 default:
2057 pr_err("%s: Invalid DMIC Selection\n", __func__);
2058 return -EINVAL;
2059 }
2060
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002061 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
2062
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002063 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002064
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002065 switch (event) {
2066 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002067
2068 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2069 dmic_clk_sel, dmic_clk_sel);
2070
2071 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
2072
2073 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2074 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002075 break;
2076 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002077 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
2078 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002079 break;
2080 }
2081 return 0;
2082}
2083
Bradley Rubin229c6a52011-07-12 16:18:48 -07002084static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
2085 struct snd_kcontrol *kcontrol, int event)
2086{
2087 struct snd_soc_codec *codec = w->codec;
2088 const char *filename;
2089 const struct firmware *fw;
2090 int i;
2091 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07002092 int num_anc_slots;
2093 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002094 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07002095 u32 anc_writes_size = 0;
2096 int anc_size_remaining;
2097 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002098 u16 reg;
2099 u8 mask, val, old_val;
2100
2101 pr_debug("%s %d\n", __func__, event);
2102 switch (event) {
2103 case SND_SOC_DAPM_PRE_PMU:
2104
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002105 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07002106
2107 ret = request_firmware(&fw, filename, codec->dev);
2108 if (ret != 0) {
2109 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
2110 ret);
2111 return -ENODEV;
2112 }
2113
Bradley Rubina7096d02011-08-03 18:29:02 -07002114 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07002115 dev_err(codec->dev, "Not enough data\n");
2116 release_firmware(fw);
2117 return -ENOMEM;
2118 }
2119
2120 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07002121 anc_head = (struct anc_header *)(fw->data);
2122 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
2123 anc_size_remaining = fw->size - sizeof(struct anc_header);
2124 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002125
Bradley Rubina7096d02011-08-03 18:29:02 -07002126 if (tabla->anc_slot >= num_anc_slots) {
2127 dev_err(codec->dev, "Invalid ANC slot selected\n");
2128 release_firmware(fw);
2129 return -EINVAL;
2130 }
2131
2132 for (i = 0; i < num_anc_slots; i++) {
2133
2134 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
2135 dev_err(codec->dev, "Invalid register format\n");
2136 release_firmware(fw);
2137 return -EINVAL;
2138 }
2139 anc_writes_size = (u32)(*anc_ptr);
2140 anc_size_remaining -= sizeof(u32);
2141 anc_ptr += 1;
2142
2143 if (anc_writes_size * TABLA_PACKED_REG_SIZE
2144 > anc_size_remaining) {
2145 dev_err(codec->dev, "Invalid register format\n");
2146 release_firmware(fw);
2147 return -ENOMEM;
2148 }
2149
2150 if (tabla->anc_slot == i)
2151 break;
2152
2153 anc_size_remaining -= (anc_writes_size *
2154 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07002155 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07002156 }
2157 if (i == num_anc_slots) {
2158 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07002159 release_firmware(fw);
2160 return -ENOMEM;
2161 }
2162
Bradley Rubina7096d02011-08-03 18:29:02 -07002163 for (i = 0; i < anc_writes_size; i++) {
2164 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07002165 mask, val);
2166 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07002167 snd_soc_write(codec, reg, (old_val & ~mask) |
2168 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07002169 }
2170 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002171
2172 break;
2173 case SND_SOC_DAPM_POST_PMD:
2174 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
2175 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
2176 break;
2177 }
2178 return 0;
2179}
2180
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002181/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002182static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
2183{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002184 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07002185 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
2186 int mbhc_state = tabla->mbhc_state;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002187
Joonwoo Park03324832012-03-19 19:36:16 -07002188 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002189 if (!tabla->mbhc_polling_active) {
2190 pr_debug("Polling is not active, do not start polling\n");
2191 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002192 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002193 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Joonwoo Park03324832012-03-19 19:36:16 -07002194
2195 if (!tabla->no_mic_headset_override) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002196 if (mbhc_state == MBHC_STATE_POTENTIAL) {
2197 pr_debug("%s recovering MBHC state macine\n", __func__);
2198 tabla->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
Joonwoo Park03324832012-03-19 19:36:16 -07002199 /* set to max button press threshold */
2200 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2201 0x7F);
2202 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2203 0xFF);
2204 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2205 (TABLA_IS_1_X(tabla_core->version) ?
2206 0x07 : 0x7F));
2207 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2208 0xFF);
2209 /* set to max */
2210 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2211 0x7F);
2212 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2213 0xFF);
2214 }
2215 }
2216
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002217 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
2218 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
2219 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
Joonwoo Park03324832012-03-19 19:36:16 -07002220 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002221}
2222
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002223/* called under codec_resource_lock acquisition */
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002224static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
2225{
Bradley Rubincb3950a2011-08-18 13:07:26 -07002226 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2227
Joonwoo Park03324832012-03-19 19:36:16 -07002228 pr_debug("%s: enter\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002229 if (!tabla->mbhc_polling_active) {
2230 pr_debug("polling not active, nothing to pause\n");
2231 return;
Bradley Rubincb3950a2011-08-18 13:07:26 -07002232 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002233
2234 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Joonwoo Park03324832012-03-19 19:36:16 -07002235 pr_debug("%s: leave\n", __func__);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002236}
2237
Joonwoo Park03324832012-03-19 19:36:16 -07002238static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec, int mode)
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002239{
2240 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2241 u8 reg_mode_val, cur_mode_val;
2242 bool mbhc_was_polling = false;
2243
2244 if (mode)
2245 reg_mode_val = TABLA_CFILT_FAST_MODE;
2246 else
2247 reg_mode_val = TABLA_CFILT_SLOW_MODE;
2248
2249 cur_mode_val = snd_soc_read(codec,
2250 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
2251
2252 if (cur_mode_val != reg_mode_val) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002253 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002254 if (tabla->mbhc_polling_active) {
2255 tabla_codec_pause_hs_polling(codec);
2256 mbhc_was_polling = true;
2257 }
2258 snd_soc_update_bits(codec,
2259 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
2260 if (mbhc_was_polling)
2261 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002262 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002263 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
2264 cur_mode_val, reg_mode_val);
2265 } else {
2266 pr_debug("%s: CFILT Value is already %x\n",
2267 __func__, cur_mode_val);
2268 }
2269}
2270
2271static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
2272 u8 cfilt_sel, int inc)
2273{
2274 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2275 u32 *cfilt_cnt_ptr = NULL;
2276 u16 micb_cfilt_reg;
2277
2278 switch (cfilt_sel) {
2279 case TABLA_CFILT1_SEL:
2280 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
2281 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
2282 break;
2283 case TABLA_CFILT2_SEL:
2284 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
2285 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
2286 break;
2287 case TABLA_CFILT3_SEL:
2288 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
2289 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
2290 break;
2291 default:
2292 return; /* should not happen */
2293 }
2294
2295 if (inc) {
2296 if (!(*cfilt_cnt_ptr)++) {
2297 /* Switch CFILT to slow mode if MBHC CFILT being used */
2298 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2299 tabla_codec_switch_cfilt_mode(codec, 0);
2300
2301 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
2302 }
2303 } else {
2304 /* check if count not zero, decrement
2305 * then check if zero, go ahead disable cfilter
2306 */
2307 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
2308 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
2309
2310 /* Switch CFILT to fast mode if MBHC CFILT being used */
2311 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
2312 tabla_codec_switch_cfilt_mode(codec, 1);
2313 }
2314 }
2315}
2316
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002317static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
2318{
2319 int rc = -EINVAL;
2320 unsigned min_mv, max_mv;
2321
2322 switch (ldoh_v) {
2323 case TABLA_LDOH_1P95_V:
2324 min_mv = 160;
2325 max_mv = 1800;
2326 break;
2327 case TABLA_LDOH_2P35_V:
2328 min_mv = 200;
2329 max_mv = 2200;
2330 break;
2331 case TABLA_LDOH_2P75_V:
2332 min_mv = 240;
2333 max_mv = 2600;
2334 break;
2335 case TABLA_LDOH_2P85_V:
2336 min_mv = 250;
2337 max_mv = 2700;
2338 break;
2339 default:
2340 goto done;
2341 }
2342
2343 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
2344 goto done;
2345
2346 for (rc = 4; rc <= 44; rc++) {
2347 min_mv = max_mv * (rc) / 44;
2348 if (min_mv >= cfilt_mv) {
2349 rc -= 4;
2350 break;
2351 }
2352 }
2353done:
2354 return rc;
2355}
2356
2357static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
2358{
2359 u8 hph_reg_val = 0;
2360 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
2361
2362 return (hph_reg_val & 0x30) ? true : false;
2363}
2364
Joonwoo Parka9444452011-12-08 18:48:27 -08002365static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
2366{
2367 u8 hph_reg_val = 0;
2368 if (left)
2369 hph_reg_val = snd_soc_read(codec,
2370 TABLA_A_RX_HPH_L_DAC_CTL);
2371 else
2372 hph_reg_val = snd_soc_read(codec,
2373 TABLA_A_RX_HPH_R_DAC_CTL);
2374
2375 return (hph_reg_val & 0xC0) ? true : false;
2376}
2377
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002378static void tabla_turn_onoff_override(struct snd_soc_codec *codec, bool on)
2379{
2380 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
2381}
2382
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002383/* called under codec_resource_lock acquisition */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002384static void tabla_codec_drive_v_to_micbias(struct snd_soc_codec *codec,
2385 int usec)
2386{
2387 int cfilt_k_val;
2388 bool set = true;
2389 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2390
2391 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
2392 tabla->mbhc_micbias_switched) {
2393 pr_debug("%s: set mic V to micbias V\n", __func__);
2394 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
2395 tabla_turn_onoff_override(codec, true);
2396 while (1) {
2397 cfilt_k_val = tabla_find_k_value(
2398 tabla->pdata->micbias.ldoh_v,
2399 set ? tabla->mbhc_data.micb_mv :
2400 VDDIO_MICBIAS_MV);
2401 snd_soc_update_bits(codec,
2402 tabla->mbhc_bias_regs.cfilt_val,
2403 0xFC, (cfilt_k_val << 2));
2404 if (!set)
2405 break;
2406 usleep_range(usec, usec);
2407 set = false;
2408 }
2409 tabla_turn_onoff_override(codec, false);
2410 }
2411}
2412
2413/* called under codec_resource_lock acquisition */
2414static void __tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2415 int vddio_switch, bool restartpolling,
2416 bool checkpolling)
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002417{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002418 int cfilt_k_val;
Joonwoo Park41956722012-04-18 13:13:07 -07002419 bool override;
2420 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002421
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002422 if (vddio_switch && !tabla->mbhc_micbias_switched &&
2423 (!checkpolling || tabla->mbhc_polling_active)) {
2424 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002425 tabla_codec_pause_hs_polling(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07002426 override = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04;
2427 if (!override)
2428 tabla_turn_onoff_override(codec, true);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002429 /* Adjust threshold if Mic Bias voltage changes */
2430 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002431 cfilt_k_val = tabla_find_k_value(
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002432 tabla->pdata->micbias.ldoh_v,
2433 VDDIO_MICBIAS_MV);
2434 usleep_range(10000, 10000);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002435 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002436 tabla->mbhc_bias_regs.cfilt_val,
2437 0xFC, (cfilt_k_val << 2));
2438 usleep_range(10000, 10000);
2439 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2440 tabla->mbhc_data.adj_v_ins_hu & 0xFF);
2441 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2442 (tabla->mbhc_data.adj_v_ins_hu >> 8) &
2443 0xFF);
2444 pr_debug("%s: Programmed MBHC thresholds to VDDIO\n",
2445 __func__);
2446 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002447
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002448 /* enable MIC BIAS Switch to VDDIO */
2449 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2450 0x80, 0x80);
2451 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2452 0x10, 0x00);
Joonwoo Park41956722012-04-18 13:13:07 -07002453 if (!override)
2454 tabla_turn_onoff_override(codec, false);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002455 if (restartpolling)
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08002456 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002457
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002458 tabla->mbhc_micbias_switched = true;
2459 pr_debug("%s: VDDIO switch enabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002460
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002461 } else if (!vddio_switch && tabla->mbhc_micbias_switched) {
2462 if ((!checkpolling || tabla->mbhc_polling_active) &&
2463 restartpolling)
2464 tabla_codec_pause_hs_polling(codec);
2465 /* Reprogram thresholds */
2466 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
2467 cfilt_k_val = tabla_find_k_value(
2468 tabla->pdata->micbias.ldoh_v,
2469 tabla->mbhc_data.micb_mv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002470 snd_soc_update_bits(codec,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002471 tabla->mbhc_bias_regs.cfilt_val,
2472 0xFC, (cfilt_k_val << 2));
2473 usleep_range(10000, 10000);
2474 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2475 tabla->mbhc_data.v_ins_hu & 0xFF);
2476 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2477 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
2478 pr_debug("%s: Programmed MBHC thresholds to MICBIAS\n",
2479 __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002480 }
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002481
2482 /* Disable MIC BIAS Switch to VDDIO */
2483 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2484 0x80, 0x00);
2485 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
2486 0x10, 0x00);
2487
2488 if ((!checkpolling || tabla->mbhc_polling_active) &&
2489 restartpolling)
2490 tabla_codec_start_hs_polling(codec);
2491
2492 tabla->mbhc_micbias_switched = false;
2493 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002494 }
2495}
2496
Joonwoo Parkcf473b42012-03-29 19:48:16 -07002497static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
2498 int vddio_switch)
2499{
2500 return __tabla_codec_switch_micbias(codec, vddio_switch, true, true);
2501}
2502
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002503static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
2504 struct snd_kcontrol *kcontrol, int event)
2505{
2506 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07002507 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2508 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002509 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002510 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07002511 char *internal1_text = "Internal1";
2512 char *internal2_text = "Internal2";
2513 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002514
2515 pr_debug("%s %d\n", __func__, event);
2516 switch (w->reg) {
2517 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002518 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002519 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002520 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002521 break;
2522 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002524 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002525 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002526 break;
2527 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002528 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07002529 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002530 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002531 break;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002532 case TABLA_1_A_MICB_4_CTL:
2533 case TABLA_2_A_MICB_4_CTL:
2534 micb_int_reg = tabla->reg_addr.micb_4_int_rbias;
Patrick Lai3043fba2011-08-01 14:15:57 -07002535 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002536 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537 break;
2538 default:
2539 pr_err("%s: Error, invalid micbias register\n", __func__);
2540 return -EINVAL;
2541 }
2542
2543 switch (event) {
2544 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002545 /* Decide whether to switch the micbias for MBHC */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002546 if (w->reg == tabla->mbhc_bias_regs.ctl_reg) {
2547 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002548 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002549 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2550 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002551
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002552 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07002553 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002554
2555 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002556 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002557 else if (strnstr(w->name, internal2_text, 30))
2558 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
2559 else if (strnstr(w->name, internal3_text, 30))
2560 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
2561
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002562 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002563 case SND_SOC_DAPM_POST_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002564
2565 usleep_range(20000, 20000);
2566
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002567 if (tabla->mbhc_polling_active &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002568 tabla->mbhc_cfg.micbias == micb_line) {
2569 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002570 tabla_codec_pause_hs_polling(codec);
2571 tabla_codec_start_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002572 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002573 }
2574 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002575
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002576 case SND_SOC_DAPM_POST_PMD:
Joonwoo Park03324832012-03-19 19:36:16 -07002577 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg) &&
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002578 tabla_is_hph_pa_on(codec)) {
2579 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002580 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002581 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2582 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002583
Bradley Rubin229c6a52011-07-12 16:18:48 -07002584 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002585 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07002586 else if (strnstr(w->name, internal2_text, 30))
2587 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
2588 else if (strnstr(w->name, internal3_text, 30))
2589 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
2590
Patrick Lai3043fba2011-08-01 14:15:57 -07002591 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002592 break;
2593 }
2594
2595 return 0;
2596}
2597
Kiran Kandid8cf5212012-03-02 15:34:53 -08002598
2599static void tx_hpf_corner_freq_callback(struct work_struct *work)
2600{
2601 struct delayed_work *hpf_delayed_work;
2602 struct hpf_work *hpf_work;
2603 struct tabla_priv *tabla;
2604 struct snd_soc_codec *codec;
2605 u16 tx_mux_ctl_reg;
2606 u8 hpf_cut_of_freq;
2607
2608 hpf_delayed_work = to_delayed_work(work);
2609 hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
2610 tabla = hpf_work->tabla;
2611 codec = hpf_work->tabla->codec;
2612 hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
2613
2614 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL +
2615 (hpf_work->decimator - 1) * 8;
2616
2617 pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
2618 hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
2619
2620 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30, hpf_cut_of_freq << 4);
2621}
2622
2623#define TX_MUX_CTL_CUT_OFF_FREQ_MASK 0x30
2624#define CF_MIN_3DB_4HZ 0x0
2625#define CF_MIN_3DB_75HZ 0x1
2626#define CF_MIN_3DB_150HZ 0x2
2627
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002628static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
2629 struct snd_kcontrol *kcontrol, int event)
2630{
2631 struct snd_soc_codec *codec = w->codec;
Kiran Kandid8cf5212012-03-02 15:34:53 -08002632 unsigned int decimator;
2633 char *dec_name = NULL;
2634 char *widget_name = NULL;
2635 char *temp;
2636 int ret = 0;
2637 u16 dec_reset_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
2638 u8 dec_hpf_cut_of_freq;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002639 int offset;
2640
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002641
2642 pr_debug("%s %d\n", __func__, event);
2643
Kiran Kandid8cf5212012-03-02 15:34:53 -08002644 widget_name = kstrndup(w->name, 15, GFP_KERNEL);
2645 if (!widget_name)
2646 return -ENOMEM;
2647 temp = widget_name;
2648
2649 dec_name = strsep(&widget_name, " ");
2650 widget_name = temp;
2651 if (!dec_name) {
2652 pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
2653 ret = -EINVAL;
2654 goto out;
2655 }
2656
2657 ret = kstrtouint(strpbrk(dec_name, "123456789"), 10, &decimator);
2658 if (ret < 0) {
2659 pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
2660 ret = -EINVAL;
2661 goto out;
2662 }
2663
2664 pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
2665 w->name, dec_name, decimator);
2666
Kuirong Wange9c8a222012-03-28 16:24:09 -07002667 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002669 offset = 0;
2670 } else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002671 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002672 offset = 8;
2673 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002674 pr_err("%s: Error, incorrect dec\n", __func__);
2675 return -EINVAL;
2676 }
2677
Kiran Kandid8cf5212012-03-02 15:34:53 -08002678 tx_vol_ctl_reg = TABLA_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator -1);
2679 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
2680
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002681 switch (event) {
2682 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandid8cf5212012-03-02 15:34:53 -08002683
2684 // Enableable TX digital mute */
2685 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2686
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002687 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
2688 1 << w->shift);
2689 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
Kiran Kandid8cf5212012-03-02 15:34:53 -08002690
2691 dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
2692
2693 dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq & 0x30) >> 4;
2694
2695 tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
2696 dec_hpf_cut_of_freq;
2697
2698 if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
2699
2700 /* set cut of freq to CF_MIN_3DB_150HZ (0x1); */
2701 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2702 CF_MIN_3DB_150HZ << 4);
2703 }
2704
2705 /* enable HPF */
2706 snd_soc_update_bits(codec, tx_mux_ctl_reg , 0x08, 0x00);
2707
2708 break;
2709
2710 case SND_SOC_DAPM_POST_PMU:
2711
2712 /* Disable TX digital mute */
2713 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
2714
2715 if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
2716 CF_MIN_3DB_150HZ) {
2717
2718 schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
2719 msecs_to_jiffies(300));
2720 }
Kuirong Wange9c8a222012-03-28 16:24:09 -07002721 /* apply the digital gain after the decimator is enabled*/
2722 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2723 snd_soc_write(codec,
2724 tx_digital_gain_reg[w->shift + offset],
2725 snd_soc_read(codec,
2726 tx_digital_gain_reg[w->shift + offset])
2727 );
2728
Kiran Kandid8cf5212012-03-02 15:34:53 -08002729 break;
2730
2731 case SND_SOC_DAPM_PRE_PMD:
2732
2733 snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
2734 cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
2735 break;
2736
2737 case SND_SOC_DAPM_POST_PMD:
2738
2739 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
2740 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x30,
2741 (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
2742
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002743 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002744 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08002745out:
2746 kfree(widget_name);
2747 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002748}
2749
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002750static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751 struct snd_kcontrol *kcontrol, int event)
2752{
2753 struct snd_soc_codec *codec = w->codec;
2754
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002755 pr_debug("%s %d %s\n", __func__, event, w->name);
2756
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002757 switch (event) {
2758 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002759 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2760 1 << w->shift, 1 << w->shift);
2761 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
2762 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002763 break;
Kuirong Wange9c8a222012-03-28 16:24:09 -07002764 case SND_SOC_DAPM_POST_PMU:
2765 /* apply the digital gain after the interpolator is enabled*/
2766 if ((w->shift) < ARRAY_SIZE(rx_digital_gain_reg))
2767 snd_soc_write(codec,
2768 rx_digital_gain_reg[w->shift],
2769 snd_soc_read(codec,
2770 rx_digital_gain_reg[w->shift])
2771 );
2772 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002773 }
2774 return 0;
2775}
2776
Bradley Rubin229c6a52011-07-12 16:18:48 -07002777static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
2778 struct snd_kcontrol *kcontrol, int event)
2779{
2780 switch (event) {
2781 case SND_SOC_DAPM_POST_PMU:
2782 case SND_SOC_DAPM_POST_PMD:
2783 usleep_range(1000, 1000);
2784 break;
2785 }
2786 return 0;
2787}
2788
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002789static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
2790 struct snd_kcontrol *kcontrol, int event)
2791{
2792 struct snd_soc_codec *codec = w->codec;
2793
2794 pr_debug("%s %d\n", __func__, event);
2795
2796 switch (event) {
2797 case SND_SOC_DAPM_PRE_PMU:
2798 tabla_enable_rx_bias(codec, 1);
2799 break;
2800 case SND_SOC_DAPM_POST_PMD:
2801 tabla_enable_rx_bias(codec, 0);
2802 break;
2803 }
2804 return 0;
2805}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002806static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
2807 struct snd_kcontrol *kcontrol, int event)
2808{
2809 struct snd_soc_codec *codec = w->codec;
2810
2811 pr_debug("%s %s %d\n", __func__, w->name, event);
2812
2813 switch (event) {
2814 case SND_SOC_DAPM_PRE_PMU:
2815 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
2816 break;
2817 case SND_SOC_DAPM_POST_PMD:
2818 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
2819 break;
2820 }
2821 return 0;
2822}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002823
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002824static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
2825 struct snd_soc_jack *jack, int status,
2826 int mask)
2827{
2828 /* XXX: wake_lock_timeout()? */
Joonwoo Park03324832012-03-19 19:36:16 -07002829 snd_soc_jack_report_no_dapm(jack, status, mask);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002830}
2831
Patrick Lai49efeac2011-11-03 11:01:12 -07002832static void hphocp_off_report(struct tabla_priv *tabla,
2833 u32 jack_status, int irq)
2834{
2835 struct snd_soc_codec *codec;
Joonwoo Park03324832012-03-19 19:36:16 -07002836 if (!tabla) {
2837 pr_err("%s: Bad tabla private data\n", __func__);
2838 return;
2839 }
Patrick Lai49efeac2011-11-03 11:01:12 -07002840
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002841 pr_debug("%s: clear ocp status %x\n", __func__, jack_status);
Joonwoo Park03324832012-03-19 19:36:16 -07002842 codec = tabla->codec;
2843 if (tabla->hph_status & jack_status) {
Patrick Lai49efeac2011-11-03 11:01:12 -07002844 tabla->hph_status &= ~jack_status;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002845 if (tabla->mbhc_cfg.headset_jack)
2846 tabla_snd_soc_jack_report(tabla,
2847 tabla->mbhc_cfg.headset_jack,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08002848 tabla->hph_status,
2849 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08002850 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
2851 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08002852 /* reset retry counter as PA is turned off signifying
2853 * start of new OCP detection session
2854 */
2855 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
2856 tabla->hphlocp_cnt = 0;
2857 else
2858 tabla->hphrocp_cnt = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05302859 wcd9xxx_enable_irq(codec->control_data, irq);
Patrick Lai49efeac2011-11-03 11:01:12 -07002860 }
2861}
2862
2863static void hphlocp_off_report(struct work_struct *work)
2864{
2865 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2866 hphlocp_work);
2867 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
2868}
2869
2870static void hphrocp_off_report(struct work_struct *work)
2871{
2872 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
2873 hphrocp_work);
2874 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
2875}
2876
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002877static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
2878 struct snd_kcontrol *kcontrol, int event)
2879{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002880 struct snd_soc_codec *codec = w->codec;
2881 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2882 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002883 pr_debug("%s: event = %d\n", __func__, event);
2884
2885 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002886 case SND_SOC_DAPM_PRE_PMU:
2887 mbhc_micb_ctl_val = snd_soc_read(codec,
2888 tabla->mbhc_bias_regs.ctl_reg);
2889
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002890 if (!(mbhc_micb_ctl_val & 0x80)) {
2891 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002892 tabla_codec_switch_micbias(codec, 1);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002893 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
2894 }
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002895 break;
2896
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002897 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07002898 /* schedule work is required because at the time HPH PA DAPM
2899 * event callback is called by DAPM framework, CODEC dapm mutex
2900 * would have been locked while snd_soc_jack_report also
2901 * attempts to acquire same lock.
2902 */
Joonwoo Parka9444452011-12-08 18:48:27 -08002903 if (w->shift == 5) {
2904 clear_bit(TABLA_HPHL_PA_OFF_ACK,
2905 &tabla->hph_pa_dac_state);
2906 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
2907 &tabla->hph_pa_dac_state);
2908 if (tabla->hph_status & SND_JACK_OC_HPHL)
2909 schedule_work(&tabla->hphlocp_work);
2910 } else if (w->shift == 4) {
2911 clear_bit(TABLA_HPHR_PA_OFF_ACK,
2912 &tabla->hph_pa_dac_state);
2913 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
2914 &tabla->hph_pa_dac_state);
2915 if (tabla->hph_status & SND_JACK_OC_HPHR)
2916 schedule_work(&tabla->hphrocp_work);
2917 }
2918
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002919 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park03324832012-03-19 19:36:16 -07002920 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002921 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07002922
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002923 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
2924 w->name);
2925 usleep_range(10000, 10000);
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07002926 break;
2927 }
2928 return 0;
2929}
2930
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002931static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002932 struct mbhc_micbias_regs *micbias_regs)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002933{
2934 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002935 unsigned int cfilt;
2936
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07002937 switch (tabla->mbhc_cfg.micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002938 case TABLA_MICBIAS1:
2939 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
2940 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
2941 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
2942 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
2943 break;
2944 case TABLA_MICBIAS2:
2945 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
2946 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
2947 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
2948 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
2949 break;
2950 case TABLA_MICBIAS3:
2951 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
2952 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
2953 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
2954 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
2955 break;
2956 case TABLA_MICBIAS4:
2957 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08002958 micbias_regs->mbhc_reg = tabla->reg_addr.micb_4_mbhc;
2959 micbias_regs->int_rbias = tabla->reg_addr.micb_4_int_rbias;
2960 micbias_regs->ctl_reg = tabla->reg_addr.micb_4_ctl;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002961 break;
2962 default:
2963 /* Should never reach here */
2964 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07002965 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002966 }
2967
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08002968 micbias_regs->cfilt_sel = cfilt;
2969
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002970 switch (cfilt) {
2971 case TABLA_CFILT1_SEL:
2972 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
2973 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002974 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002975 break;
2976 case TABLA_CFILT2_SEL:
2977 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
2978 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002979 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002980 break;
2981 case TABLA_CFILT3_SEL:
2982 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
2983 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08002984 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002985 break;
2986 }
2987}
Santosh Mardie15e2302011-11-15 10:39:23 +05302988static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
2989 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
2990 4, 0, NULL, 0),
2991 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
2992 0, NULL, 0),
2993};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07002994
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002995static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
2996 struct snd_kcontrol *kcontrol, int event)
2997{
2998 struct snd_soc_codec *codec = w->codec;
2999
3000 pr_debug("%s %s %d\n", __func__, w->name, event);
3001
3002 switch (event) {
3003 case SND_SOC_DAPM_PRE_PMU:
3004 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
3005 break;
3006
3007 case SND_SOC_DAPM_POST_PMD:
3008 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
3009 break;
3010 }
3011 return 0;
3012}
3013
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003014static const struct snd_soc_dapm_widget tabla_1_x_dapm_widgets[] = {
3015 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_1_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303016 0, tabla_codec_enable_micbias,
3017 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3018 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003019};
3020
3021static const struct snd_soc_dapm_widget tabla_2_higher_dapm_widgets[] = {
3022 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_2_A_MICB_4_CTL, 7,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303023 0, tabla_codec_enable_micbias,
3024 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
3025 SND_SOC_DAPM_POST_PMD),
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003026};
3027
Santosh Mardie15e2302011-11-15 10:39:23 +05303028static const struct snd_soc_dapm_route audio_i2s_map[] = {
3029 {"RX_I2S_CLK", NULL, "CDC_CONN"},
3030 {"SLIM RX1", NULL, "RX_I2S_CLK"},
3031 {"SLIM RX2", NULL, "RX_I2S_CLK"},
3032 {"SLIM RX3", NULL, "RX_I2S_CLK"},
3033 {"SLIM RX4", NULL, "RX_I2S_CLK"},
3034
3035 {"SLIM TX7", NULL, "TX_I2S_CLK"},
3036 {"SLIM TX8", NULL, "TX_I2S_CLK"},
3037 {"SLIM TX9", NULL, "TX_I2S_CLK"},
3038 {"SLIM TX10", NULL, "TX_I2S_CLK"},
3039};
3040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003041static const struct snd_soc_dapm_route audio_map[] = {
3042 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003043
3044 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
3045 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
3046
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003047 {"SLIM TX2", NULL, "SLIM TX2 MUX"},
3048 {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
3049
3050 {"SLIM TX3", NULL, "SLIM TX3 MUX"},
3051 {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003052 {"SLIM TX3 MUX", "RMIX1", "RX1 MIX1"},
3053 {"SLIM TX3 MUX", "RMIX2", "RX2 MIX1"},
3054 {"SLIM TX3 MUX", "RMIX3", "RX3 MIX1"},
3055 {"SLIM TX3 MUX", "RMIX4", "RX4 MIX1"},
3056 {"SLIM TX3 MUX", "RMIX5", "RX5 MIX1"},
3057 {"SLIM TX3 MUX", "RMIX6", "RX6 MIX1"},
3058 {"SLIM TX3 MUX", "RMIX7", "RX7 MIX1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003059
3060 {"SLIM TX4", NULL, "SLIM TX4 MUX"},
3061 {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
3062
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003063 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
3064 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003065 {"SLIM TX5 MUX", "RMIX1", "RX1 MIX1"},
3066 {"SLIM TX5 MUX", "RMIX2", "RX2 MIX1"},
3067 {"SLIM TX5 MUX", "RMIX3", "RX3 MIX1"},
3068 {"SLIM TX5 MUX", "RMIX4", "RX4 MIX1"},
3069 {"SLIM TX5 MUX", "RMIX5", "RX5 MIX1"},
3070 {"SLIM TX5 MUX", "RMIX6", "RX6 MIX1"},
3071 {"SLIM TX5 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003072
3073 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
3074 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
3075
3076 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
3077 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003078 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003079 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
3080 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003081 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
3082 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07003083 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
3084 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003085 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
3086 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Neema Shetty3fb1b802012-04-27 13:53:24 -07003087 {"SLIM TX7 MUX", "RMIX1", "RX1 MIX1"},
3088 {"SLIM TX7 MUX", "RMIX2", "RX2 MIX1"},
3089 {"SLIM TX7 MUX", "RMIX3", "RX3 MIX1"},
3090 {"SLIM TX7 MUX", "RMIX4", "RX4 MIX1"},
3091 {"SLIM TX7 MUX", "RMIX5", "RX5 MIX1"},
3092 {"SLIM TX7 MUX", "RMIX6", "RX6 MIX1"},
3093 {"SLIM TX7 MUX", "RMIX7", "RX7 MIX1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003094
3095 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003096 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
3097 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
3098 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07003099 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003100 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
3101 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003102 {"SLIM TX8 MUX", "DEC7", "DEC7 MUX"},
3103 {"SLIM TX8 MUX", "DEC8", "DEC8 MUX"},
3104 {"SLIM TX8 MUX", "DEC9", "DEC9 MUX"},
3105 {"SLIM TX8 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003106
Kiran Kandi3426e512011-09-13 22:50:10 -07003107 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
3108 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
3109 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
3110 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
3111 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
3112 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
3113 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
3114 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
3115 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
3116 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
3117 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
3118
3119 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
3120 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
3121 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
3122 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
3123 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
3124 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
3125 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
3126 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
3127 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
3128 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
3129 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
3130
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003131 /* Earpiece (RX MIX1) */
3132 {"EAR", NULL, "EAR PA"},
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003133 {"EAR PA", NULL, "EAR_PA_MIXER"},
3134 {"EAR_PA_MIXER", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003135 {"DAC1", NULL, "CP"},
3136
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003137 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX2"},
3138 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003139 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003140
3141 /* Headset (RX MIX1 and RX MIX2) */
3142 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003143 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003144
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003145 {"HPHL", NULL, "HPHL_PA_MIXER"},
3146 {"HPHL_PA_MIXER", NULL, "HPHL DAC"},
3147
3148 {"HPHR", NULL, "HPHR_PA_MIXER"},
3149 {"HPHR_PA_MIXER", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003150
3151 {"HPHL DAC", NULL, "CP"},
3152 {"HPHR DAC", NULL, "CP"},
3153
3154 {"ANC", NULL, "ANC1 MUX"},
3155 {"ANC", NULL, "ANC2 MUX"},
3156 {"ANC1 MUX", "ADC1", "ADC1"},
3157 {"ANC1 MUX", "ADC2", "ADC2"},
3158 {"ANC1 MUX", "ADC3", "ADC3"},
3159 {"ANC1 MUX", "ADC4", "ADC4"},
3160 {"ANC2 MUX", "ADC1", "ADC1"},
3161 {"ANC2 MUX", "ADC2", "ADC2"},
3162 {"ANC2 MUX", "ADC3", "ADC3"},
3163 {"ANC2 MUX", "ADC4", "ADC4"},
3164
Bradley Rubine1d08622011-07-20 18:01:35 -07003165 {"ANC", NULL, "CDC_CONN"},
3166
Bradley Rubin229c6a52011-07-12 16:18:48 -07003167 {"DAC1", "Switch", "RX1 CHAIN"},
3168 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003169 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003170
Kiran Kandidb0a4b02011-08-23 09:32:09 -07003171 {"LINEOUT1", NULL, "LINEOUT1 PA"},
3172 {"LINEOUT2", NULL, "LINEOUT2 PA"},
3173 {"LINEOUT3", NULL, "LINEOUT3 PA"},
3174 {"LINEOUT4", NULL, "LINEOUT4 PA"},
3175 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003176
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003177 {"LINEOUT1 PA", NULL, "LINEOUT1_PA_MIXER"},
3178 {"LINEOUT1_PA_MIXER", NULL, "LINEOUT1 DAC"},
3179 {"LINEOUT2 PA", NULL, "LINEOUT2_PA_MIXER"},
3180 {"LINEOUT2_PA_MIXER", NULL, "LINEOUT2 DAC"},
3181 {"LINEOUT3 PA", NULL, "LINEOUT3_PA_MIXER"},
3182 {"LINEOUT3_PA_MIXER", NULL, "LINEOUT3 DAC"},
3183 {"LINEOUT4 PA", NULL, "LINEOUT4_PA_MIXER"},
3184 {"LINEOUT4_PA_MIXER", NULL, "LINEOUT4 DAC"},
3185 {"LINEOUT5 PA", NULL, "LINEOUT5_PA_MIXER"},
3186 {"LINEOUT5_PA_MIXER", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003187
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003188 {"LINEOUT1 DAC", NULL, "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003189 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
3190
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003191 {"RX1 CHAIN", NULL, "RX1 MIX2"},
3192 {"RX2 CHAIN", NULL, "RX2 MIX2"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003193 {"RX1 CHAIN", NULL, "ANC"},
3194 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003195
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003196 {"CP", NULL, "RX_BIAS"},
3197 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
3198 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
3199 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
3200 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003201 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003202
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003203 {"RX1 MIX1", NULL, "COMP1_CLK"},
3204 {"RX2 MIX1", NULL, "COMP1_CLK"},
3205 {"RX3 MIX1", NULL, "COMP2_CLK"},
3206 {"RX5 MIX1", NULL, "COMP2_CLK"},
3207
3208
Bradley Rubin229c6a52011-07-12 16:18:48 -07003209 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
3210 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
3211 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
3212 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003213 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
3214 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
3215 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
3216 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
3217 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
3218 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
3219 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
3220 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003221 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
3222 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003223 {"RX1 MIX2", NULL, "RX1 MIX1"},
3224 {"RX1 MIX2", NULL, "RX1 MIX2 INP1"},
3225 {"RX1 MIX2", NULL, "RX1 MIX2 INP2"},
3226 {"RX2 MIX2", NULL, "RX2 MIX1"},
3227 {"RX2 MIX2", NULL, "RX2 MIX2 INP1"},
3228 {"RX2 MIX2", NULL, "RX2 MIX2 INP2"},
3229 {"RX3 MIX2", NULL, "RX3 MIX1"},
3230 {"RX3 MIX2", NULL, "RX3 MIX2 INP1"},
3231 {"RX3 MIX2", NULL, "RX3 MIX2 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07003232
Bradley Rubin229c6a52011-07-12 16:18:48 -07003233 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
3234 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303235 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
3236 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003237 {"RX1 MIX1 INP1", "RX6", "SLIM RX6"},
3238 {"RX1 MIX1 INP1", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003239 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
3240 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
3241 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303242 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
3243 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003244 {"RX1 MIX1 INP2", "RX6", "SLIM RX6"},
3245 {"RX1 MIX1 INP2", "RX7", "SLIM RX7"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003246 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
3247 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
3248 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303249 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
3250 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003251 {"RX2 MIX1 INP1", "RX6", "SLIM RX6"},
3252 {"RX2 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003253 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003254 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
3255 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303256 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
3257 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003258 {"RX2 MIX1 INP2", "RX6", "SLIM RX6"},
3259 {"RX2 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003260 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003261 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
3262 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303263 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
3264 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003265 {"RX3 MIX1 INP1", "RX6", "SLIM RX6"},
3266 {"RX3 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003267 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003268 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
3269 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303270 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
3271 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003272 {"RX3 MIX1 INP2", "RX6", "SLIM RX6"},
3273 {"RX3 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003274 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003275 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
3276 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303277 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
3278 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003279 {"RX4 MIX1 INP1", "RX6", "SLIM RX6"},
3280 {"RX4 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003281 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003282 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
3283 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303284 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
3285 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003286 {"RX4 MIX1 INP2", "RX6", "SLIM RX6"},
3287 {"RX4 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003288 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003289 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
3290 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303291 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
3292 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003293 {"RX5 MIX1 INP1", "RX6", "SLIM RX6"},
3294 {"RX5 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003295 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003296 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
3297 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303298 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
3299 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003300 {"RX5 MIX1 INP2", "RX6", "SLIM RX6"},
3301 {"RX5 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003302 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003303 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
3304 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303305 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
3306 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003307 {"RX6 MIX1 INP1", "RX6", "SLIM RX6"},
3308 {"RX6 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003309 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003310 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
3311 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303312 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
3313 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003314 {"RX6 MIX1 INP2", "RX6", "SLIM RX6"},
3315 {"RX6 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003316 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003317 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
3318 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303319 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
3320 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003321 {"RX7 MIX1 INP1", "RX6", "SLIM RX6"},
3322 {"RX7 MIX1 INP1", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003323 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07003324 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
3325 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05303326 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
3327 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Neema Shettyd3a89262012-02-16 10:23:50 -08003328 {"RX7 MIX1 INP2", "RX6", "SLIM RX6"},
3329 {"RX7 MIX1 INP2", "RX7", "SLIM RX7"},
Patrick Lai16261e82011-09-30 13:25:52 -07003330 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003331 {"RX1 MIX2 INP1", "IIR1", "IIR1"},
3332 {"RX1 MIX2 INP2", "IIR1", "IIR1"},
3333 {"RX2 MIX2 INP1", "IIR1", "IIR1"},
3334 {"RX2 MIX2 INP2", "IIR1", "IIR1"},
3335 {"RX3 MIX2 INP1", "IIR1", "IIR1"},
3336 {"RX3 MIX2 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003337
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003338 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003339 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003340 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003341 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003342 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003343 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003344 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003345 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003346 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003347 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003348 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003349 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003350 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003351 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003352 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003353 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07003354 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003355 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003356 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003357 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003358 {"DEC7 MUX", "DMIC6", "DMIC6"},
3359 {"DEC7 MUX", "ADC1", "ADC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07003360 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003361 {"DEC7 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003362 {"DEC8 MUX", "DMIC2", "DMIC2"},
3363 {"DEC8 MUX", "DMIC5", "DMIC5"},
3364 {"DEC8 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003365 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003366 {"DEC8 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003367 {"DEC9 MUX", "DMIC4", "DMIC4"},
3368 {"DEC9 MUX", "DMIC5", "DMIC5"},
3369 {"DEC9 MUX", "ADC2", "ADC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003370 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003371 {"DEC9 MUX", NULL, "CDC_CONN"},
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003372 {"DEC10 MUX", "DMIC3", "DMIC3"},
3373 {"DEC10 MUX", "DMIC6", "DMIC6"},
3374 {"DEC10 MUX", "ADC1", "ADC1"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003375 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07003376 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003377
3378 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003379 {"ADC1", NULL, "AMIC1"},
3380 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07003381 {"ADC3", NULL, "AMIC3"},
3382 {"ADC4", NULL, "AMIC4"},
3383 {"ADC5", NULL, "AMIC5"},
3384 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003385
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08003386 /* AUX PGA Connections */
3387 {"HPHL_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3388 {"HPHL_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3389 {"HPHL_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3390 {"HPHL_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3391 {"HPHR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3392 {"HPHR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3393 {"HPHR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3394 {"HPHR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3395 {"LINEOUT1_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3396 {"LINEOUT1_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3397 {"LINEOUT1_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3398 {"LINEOUT1_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3399 {"LINEOUT2_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3400 {"LINEOUT2_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3401 {"LINEOUT2_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3402 {"LINEOUT2_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3403 {"LINEOUT3_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3404 {"LINEOUT3_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3405 {"LINEOUT3_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3406 {"LINEOUT3_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3407 {"LINEOUT4_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3408 {"LINEOUT4_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3409 {"LINEOUT4_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3410 {"LINEOUT4_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3411 {"LINEOUT5_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3412 {"LINEOUT5_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3413 {"LINEOUT5_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3414 {"LINEOUT5_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3415 {"EAR_PA_MIXER", "AUX_PGA_L Switch", "AUX_PGA_Left"},
3416 {"EAR_PA_MIXER", "AUX_PGA_R Switch", "AUX_PGA_Right"},
3417 {"EAR_PA_MIXER", "AUX_PGA_L_INV Switch", "AUX_PGA_Left"},
3418 {"EAR_PA_MIXER", "AUX_PGA_R_INV Switch", "AUX_PGA_Right"},
3419 {"AUX_PGA_Left", NULL, "AMIC5"},
3420 {"AUX_PGA_Right", NULL, "AMIC6"},
3421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003422 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003423 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
3424 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
3425 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
3426 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
3427 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003428 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07003429 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
3430 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
3431 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
3432 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07003433
3434 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
3435 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
3436 {"MIC BIAS1 External", NULL, "LDO_H"},
3437 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
3438 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
3439 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
3440 {"MIC BIAS2 External", NULL, "LDO_H"},
3441 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
3442 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
3443 {"MIC BIAS3 External", NULL, "LDO_H"},
3444 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003445};
3446
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003447static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
3448
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003449 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003450 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3451
3452 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
3453
3454 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003455 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX2"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07003456 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
3457
3458 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3459 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3460
3461 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3462 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
3463 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
3464};
3465
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003466
3467static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
3468
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08003469 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX2"},
Kiran Kandi7a9fd902011-11-14 13:51:45 -08003470 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
3471
3472 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
3473
3474 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
3475
3476 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
3477 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
3478
3479 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
3480};
3481
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003482static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
3483{
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003484 int i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303485 struct wcd9xxx *tabla_core = dev_get_drvdata(ssc->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08003486
3487 if (TABLA_IS_1_X(tabla_core->version)) {
3488 for (i = 0; i < ARRAY_SIZE(tabla_1_reg_readable); i++) {
3489 if (tabla_1_reg_readable[i] == reg)
3490 return 1;
3491 }
3492 } else {
3493 for (i = 0; i < ARRAY_SIZE(tabla_2_reg_readable); i++) {
3494 if (tabla_2_reg_readable[i] == reg)
3495 return 1;
3496 }
3497 }
3498
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003499 return tabla_reg_readable[reg];
3500}
Kuirong Wange9c8a222012-03-28 16:24:09 -07003501static bool tabla_is_digital_gain_register(unsigned int reg)
3502{
3503 bool rtn = false;
3504 switch (reg) {
3505 case TABLA_A_CDC_RX1_VOL_CTL_B2_CTL:
3506 case TABLA_A_CDC_RX2_VOL_CTL_B2_CTL:
3507 case TABLA_A_CDC_RX3_VOL_CTL_B2_CTL:
3508 case TABLA_A_CDC_RX4_VOL_CTL_B2_CTL:
3509 case TABLA_A_CDC_RX5_VOL_CTL_B2_CTL:
3510 case TABLA_A_CDC_RX6_VOL_CTL_B2_CTL:
3511 case TABLA_A_CDC_RX7_VOL_CTL_B2_CTL:
3512 case TABLA_A_CDC_TX1_VOL_CTL_GAIN:
3513 case TABLA_A_CDC_TX2_VOL_CTL_GAIN:
3514 case TABLA_A_CDC_TX3_VOL_CTL_GAIN:
3515 case TABLA_A_CDC_TX4_VOL_CTL_GAIN:
3516 case TABLA_A_CDC_TX5_VOL_CTL_GAIN:
3517 case TABLA_A_CDC_TX6_VOL_CTL_GAIN:
3518 case TABLA_A_CDC_TX7_VOL_CTL_GAIN:
3519 case TABLA_A_CDC_TX8_VOL_CTL_GAIN:
3520 case TABLA_A_CDC_TX9_VOL_CTL_GAIN:
3521 case TABLA_A_CDC_TX10_VOL_CTL_GAIN:
3522 rtn = true;
3523 break;
3524 default:
3525 break;
3526 }
3527 return rtn;
3528}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003529static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
3530{
3531 /* Registers lower than 0x100 are top level registers which can be
3532 * written by the Tabla core driver.
3533 */
3534
3535 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
3536 return 1;
3537
Ben Romberger1f045a72011-11-04 10:14:57 -07003538 /* IIR Coeff registers are not cacheable */
3539 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
3540 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
3541 return 1;
3542
Kuirong Wange9c8a222012-03-28 16:24:09 -07003543 /* Digital gain register is not cacheable so we have to write
3544 * the setting even it is the same
3545 */
3546 if (tabla_is_digital_gain_register(reg))
3547 return 1;
3548
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003549 return 0;
3550}
3551
3552#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
3553static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
3554 unsigned int value)
3555{
3556 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003557 BUG_ON(reg > TABLA_MAX_REGISTER);
3558
3559 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003560 ret = snd_soc_cache_write(codec, reg, value);
3561 if (ret != 0)
3562 dev_err(codec->dev, "Cache write to %x failed: %d\n",
3563 reg, ret);
3564 }
3565
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303566 return wcd9xxx_reg_write(codec->control_data, reg, value);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003567}
3568static unsigned int tabla_read(struct snd_soc_codec *codec,
3569 unsigned int reg)
3570{
3571 unsigned int val;
3572 int ret;
3573
3574 BUG_ON(reg > TABLA_MAX_REGISTER);
3575
3576 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
3577 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003578 ret = snd_soc_cache_read(codec, reg, &val);
3579 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003580 return val;
3581 } else
3582 dev_err(codec->dev, "Cache read from %x failed: %d\n",
3583 reg, ret);
3584 }
3585
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303586 val = wcd9xxx_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003587 return val;
3588}
3589
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003590static s16 tabla_get_current_v_ins(struct tabla_priv *tabla, bool hu)
3591{
3592 s16 v_ins;
3593 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3594 tabla->mbhc_micbias_switched)
3595 v_ins = hu ? (s16)tabla->mbhc_data.adj_v_ins_hu :
3596 (s16)tabla->mbhc_data.adj_v_ins_h;
3597 else
3598 v_ins = hu ? (s16)tabla->mbhc_data.v_ins_hu :
3599 (s16)tabla->mbhc_data.v_ins_h;
3600 return v_ins;
3601}
3602
3603static s16 tabla_get_current_v_hs_max(struct tabla_priv *tabla)
3604{
3605 s16 v_hs_max;
3606 struct tabla_mbhc_plug_type_cfg *plug_type;
3607
3608 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
3609 if ((tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) &&
3610 tabla->mbhc_micbias_switched)
3611 v_hs_max = tabla->mbhc_data.adj_v_hs_max;
3612 else
3613 v_hs_max = plug_type->v_hs_max;
3614 return v_hs_max;
3615}
3616
Bradley Rubincb1e2732011-06-23 16:49:20 -07003617static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
3618{
Joonwoo Parkc0672392012-01-11 11:03:14 -08003619 u8 *n_ready, *n_cic;
Joonwoo Park0976d012011-12-22 11:48:18 -08003620 struct tabla_mbhc_btn_detect_cfg *btn_det;
3621 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003622 const s16 v_ins_hu = tabla_get_current_v_ins(tabla, true);
3623
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003624 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003625
Joonwoo Park0976d012011-12-22 11:48:18 -08003626 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003627 v_ins_hu & 0xFF);
Joonwoo Park0976d012011-12-22 11:48:18 -08003628 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003629 (v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003630
Joonwoo Park0976d012011-12-22 11:48:18 -08003631 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
3632 tabla->mbhc_data.v_b1_hu & 0xFF);
3633 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
3634 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
3635
3636 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
3637 tabla->mbhc_data.v_b1_h & 0xFF);
3638 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
3639 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
3640
3641 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
3642 tabla->mbhc_data.v_brh & 0xFF);
3643 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
3644 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
3645
3646 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
3647 tabla->mbhc_data.v_brl & 0xFF);
3648 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
3649 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
3650
Joonwoo Parkc0672392012-01-11 11:03:14 -08003651 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Park0976d012011-12-22 11:48:18 -08003652 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
Joonwoo Parkc0672392012-01-11 11:03:14 -08003653 n_ready[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08003654 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
3655 tabla->mbhc_data.npoll);
3656 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
3657 tabla->mbhc_data.nbounce_wait);
Joonwoo Park0976d012011-12-22 11:48:18 -08003658 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08003659 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL,
3660 n_cic[tabla_codec_mclk_index(tabla)]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003661}
3662
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003663static int tabla_startup(struct snd_pcm_substream *substream,
3664 struct snd_soc_dai *dai)
3665{
Kuirong Wanga545e722012-02-06 19:12:54 -08003666 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003667 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3668 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003669 if ((tabla_core != NULL) &&
3670 (tabla_core->dev != NULL) &&
3671 (tabla_core->dev->parent != NULL))
3672 pm_runtime_get_sync(tabla_core->dev->parent);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003673
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003674 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003675}
3676
3677static void tabla_shutdown(struct snd_pcm_substream *substream,
3678 struct snd_soc_dai *dai)
3679{
Kuirong Wanga545e722012-02-06 19:12:54 -08003680 struct wcd9xxx *tabla_core = dev_get_drvdata(dai->codec->dev->parent);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003681 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
3682 substream->name, substream->stream);
Kuirong Wanga545e722012-02-06 19:12:54 -08003683 if ((tabla_core != NULL) &&
3684 (tabla_core->dev != NULL) &&
3685 (tabla_core->dev->parent != NULL)) {
3686 pm_runtime_mark_last_busy(tabla_core->dev->parent);
3687 pm_runtime_put(tabla_core->dev->parent);
3688 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003689}
3690
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003691int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003692{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003693 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
3694
Joonwoo Parkcf473b42012-03-29 19:48:16 -07003695 pr_debug("%s: mclk_enable = %u, dapm = %d\n", __func__, mclk_enable,
3696 dapm);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003697 if (dapm)
3698 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003699 if (mclk_enable) {
3700 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003701
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003702 if (tabla->mbhc_polling_active) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07003703 tabla_codec_pause_hs_polling(codec);
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003704 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003705 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003706 TABLA_BANDGAP_AUDIO_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003707 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003708 tabla_codec_calibrate_hs_polling(codec);
3709 tabla_codec_start_hs_polling(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303710 } else {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003711 tabla_codec_disable_clock_block(codec);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303712 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003713 TABLA_BANDGAP_AUDIO_MODE);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303714 tabla_codec_enable_clock_block(codec, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003715 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003716 } else {
3717
3718 if (!tabla->mclk_enabled) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003719 if (dapm)
3720 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003721 pr_err("Error, MCLK already diabled\n");
3722 return -EINVAL;
3723 }
3724 tabla->mclk_enabled = false;
3725
3726 if (tabla->mbhc_polling_active) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003727 tabla_codec_pause_hs_polling(codec);
3728 tabla_codec_disable_clock_block(codec);
3729 tabla_codec_enable_bandgap(codec,
3730 TABLA_BANDGAP_MBHC_MODE);
3731 tabla_enable_rx_bias(codec, 1);
3732 tabla_codec_enable_clock_block(codec, 1);
3733 tabla_codec_calibrate_hs_polling(codec);
3734 tabla_codec_start_hs_polling(codec);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003735 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
3736 0x05, 0x01);
Asish Bhattacharya486745a2012-01-20 06:41:53 +05303737 } else {
3738 tabla_codec_disable_clock_block(codec);
3739 tabla_codec_enable_bandgap(codec,
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07003740 TABLA_BANDGAP_OFF);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003741 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003742 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07003743 if (dapm)
3744 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003745 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003746}
3747
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003748static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
3749 int clk_id, unsigned int freq, int dir)
3750{
3751 pr_debug("%s\n", __func__);
3752 return 0;
3753}
3754
3755static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3756{
Santosh Mardie15e2302011-11-15 10:39:23 +05303757 u8 val = 0;
3758 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3759
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003760 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05303761 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3762 case SND_SOC_DAIFMT_CBS_CFS:
3763 /* CPU is master */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303764 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003765 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303766 snd_soc_update_bits(dai->codec,
3767 TABLA_A_CDC_CLK_TX_I2S_CTL,
3768 TABLA_I2S_MASTER_MODE_MASK, 0);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003769 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303770 snd_soc_update_bits(dai->codec,
3771 TABLA_A_CDC_CLK_RX_I2S_CTL,
3772 TABLA_I2S_MASTER_MODE_MASK, 0);
3773 }
3774 break;
3775 case SND_SOC_DAIFMT_CBM_CFM:
3776 /* CPU is slave */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303777 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303778 val = TABLA_I2S_MASTER_MODE_MASK;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003779 if (dai->id == AIF1_CAP)
Santosh Mardie15e2302011-11-15 10:39:23 +05303780 snd_soc_update_bits(dai->codec,
3781 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003782 else if (dai->id == AIF1_PB)
Santosh Mardie15e2302011-11-15 10:39:23 +05303783 snd_soc_update_bits(dai->codec,
3784 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
3785 }
3786 break;
3787 default:
3788 return -EINVAL;
3789 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003790 return 0;
3791}
3792
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003793static int tabla_set_channel_map(struct snd_soc_dai *dai,
3794 unsigned int tx_num, unsigned int *tx_slot,
3795 unsigned int rx_num, unsigned int *rx_slot)
3796
3797{
3798 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
3799 u32 i = 0;
3800 if (!tx_slot && !rx_slot) {
3801 pr_err("%s: Invalid\n", __func__);
3802 return -EINVAL;
3803 }
3804 pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
3805
Neema Shettyd3a89262012-02-16 10:23:50 -08003806 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003807 for (i = 0; i < rx_num; i++) {
3808 tabla->dai[dai->id - 1].ch_num[i] = rx_slot[i];
3809 tabla->dai[dai->id - 1].ch_act = 0;
3810 tabla->dai[dai->id - 1].ch_tot = rx_num;
3811 }
Neema Shetty3fb1b802012-04-27 13:53:24 -07003812 } else if (dai->id == AIF1_CAP || dai->id == AIF2_CAP ||
3813 dai->id == AIF3_CAP) {
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003814 for (i = 0; i < tx_num; i++) {
3815 tabla->dai[dai->id - 1].ch_num[i] = tx_slot[i];
3816 tabla->dai[dai->id - 1].ch_act = 0;
3817 tabla->dai[dai->id - 1].ch_tot = tx_num;
3818 }
3819 }
3820 return 0;
3821}
3822
3823static int tabla_get_channel_map(struct snd_soc_dai *dai,
3824 unsigned int *tx_num, unsigned int *tx_slot,
3825 unsigned int *rx_num, unsigned int *rx_slot)
3826
3827{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303828 struct wcd9xxx *tabla = dev_get_drvdata(dai->codec->control_data);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003829
3830 u32 cnt = 0;
3831 u32 tx_ch[SLIM_MAX_TX_PORTS];
3832 u32 rx_ch[SLIM_MAX_RX_PORTS];
3833
3834 if (!rx_slot && !tx_slot) {
3835 pr_err("%s: Invalid\n", __func__);
3836 return -EINVAL;
3837 }
3838 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
3839 /* for virtual port, codec driver needs to do
3840 * housekeeping, for now should be ok
3841 */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303842 wcd9xxx_get_channel(tabla, rx_ch, tx_ch);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003843 if (dai->id == AIF1_PB) {
3844 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3845 while (cnt < *rx_num) {
3846 rx_slot[cnt] = rx_ch[cnt];
3847 cnt++;
3848 }
3849 } else if (dai->id == AIF1_CAP) {
3850 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3851 while (cnt < *tx_num) {
3852 tx_slot[cnt] = tx_ch[6 + cnt];
3853 cnt++;
3854 }
Neema Shettyd3a89262012-02-16 10:23:50 -08003855 } else if (dai->id == AIF2_PB) {
3856 *rx_num = tabla_dai[dai->id - 1].playback.channels_max;
3857 while (cnt < *rx_num) {
3858 rx_slot[cnt] = rx_ch[5 + cnt];
3859 cnt++;
3860 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003861 } else if (dai->id == AIF2_CAP) {
3862 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3863 tx_slot[0] = tx_ch[cnt];
3864 tx_slot[1] = tx_ch[1 + cnt];
Kiran Kandi323d7102012-04-18 19:56:14 -07003865 tx_slot[2] = tx_ch[5 + cnt];
Kiran Kandie408b842012-05-17 19:48:04 -07003866 tx_slot[3] = tx_ch[3 + cnt];
Neema Shetty3fb1b802012-04-27 13:53:24 -07003867 } else if (dai->id == AIF3_CAP) {
3868 *tx_num = tabla_dai[dai->id - 1].capture.channels_max;
3869 tx_slot[cnt] = tx_ch[2 + cnt];
3870 tx_slot[cnt + 1] = tx_ch[4 + cnt];
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003871 }
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003872
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003873 return 0;
3874}
3875
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003876static int tabla_hw_params(struct snd_pcm_substream *substream,
3877 struct snd_pcm_hw_params *params,
3878 struct snd_soc_dai *dai)
3879{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003880 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05303881 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07003882 u8 path, shift;
3883 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003884 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003885 u32 compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003886
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003887 pr_debug("%s: DAI-ID %x rate %d\n", __func__, dai->id,
3888 params_rate(params));
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003889
3890 switch (params_rate(params)) {
3891 case 8000:
3892 tx_fs_rate = 0x00;
3893 rx_fs_rate = 0x00;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003894 compander_fs = COMPANDER_FS_8KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003895 break;
3896 case 16000:
3897 tx_fs_rate = 0x01;
3898 rx_fs_rate = 0x20;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003899 compander_fs = COMPANDER_FS_16KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003900 break;
3901 case 32000:
3902 tx_fs_rate = 0x02;
3903 rx_fs_rate = 0x40;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003904 compander_fs = COMPANDER_FS_32KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003905 break;
3906 case 48000:
3907 tx_fs_rate = 0x03;
3908 rx_fs_rate = 0x60;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003909 compander_fs = COMPANDER_FS_48KHZ;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003910 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003911 case 96000:
3912 tx_fs_rate = 0x04;
3913 rx_fs_rate = 0x80;
3914 compander_fs = COMPANDER_FS_96KHZ;
3915 break;
3916 case 192000:
3917 tx_fs_rate = 0x05;
3918 rx_fs_rate = 0xA0;
3919 compander_fs = COMPANDER_FS_192KHZ;
3920 break;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003921 default:
3922 pr_err("%s: Invalid sampling rate %d\n", __func__,
3923 params_rate(params));
3924 return -EINVAL;
3925 }
3926
3927
3928 /**
3929 * If current dai is a tx dai, set sample rate to
3930 * all the txfe paths that are currently not active
3931 */
Neema Shetty3fb1b802012-04-27 13:53:24 -07003932 if ((dai->id == AIF1_CAP) || (dai->id == AIF2_CAP) ||
3933 (dai->id == AIF3_CAP)) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003934
3935 tx_state = snd_soc_read(codec,
3936 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
3937
3938 for (path = 1, shift = 0;
3939 path <= NUM_DECIMATORS; path++, shift++) {
3940
3941 if (path == BITS_PER_REG + 1) {
3942 shift = 0;
3943 tx_state = snd_soc_read(codec,
3944 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
3945 }
3946
3947 if (!(tx_state & (1 << shift))) {
3948 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
3949 + (BITS_PER_REG*(path-1));
3950 snd_soc_update_bits(codec, tx_fs_reg,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003951 0x07, tx_fs_rate);
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003952 }
3953 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05303954 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05303955 switch (params_format(params)) {
3956 case SNDRV_PCM_FORMAT_S16_LE:
3957 snd_soc_update_bits(codec,
3958 TABLA_A_CDC_CLK_TX_I2S_CTL,
3959 0x20, 0x20);
3960 break;
3961 case SNDRV_PCM_FORMAT_S32_LE:
3962 snd_soc_update_bits(codec,
3963 TABLA_A_CDC_CLK_TX_I2S_CTL,
3964 0x20, 0x00);
3965 break;
3966 default:
3967 pr_err("invalid format\n");
3968 break;
3969 }
3970 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07003971 0x07, tx_fs_rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08003972 } else {
3973 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05303974 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003975 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003976 /**
3977 * TODO: Need to handle case where same RX chain takes 2 or more inputs
3978 * with varying sample rates
3979 */
3980
3981 /**
3982 * If current dai is a rx dai, set sample rate to
3983 * all the rx paths that are currently not active
3984 */
Neema Shettyd3a89262012-02-16 10:23:50 -08003985 if (dai->id == AIF1_PB || dai->id == AIF2_PB) {
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003986
3987 rx_state = snd_soc_read(codec,
3988 TABLA_A_CDC_CLK_RX_B1_CTL);
3989
3990 for (path = 1, shift = 0;
3991 path <= NUM_INTERPOLATORS; path++, shift++) {
3992
3993 if (!(rx_state & (1 << shift))) {
3994 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
3995 + (BITS_PER_REG*(path-1));
3996 snd_soc_update_bits(codec, rx_fs_reg,
3997 0xE0, rx_fs_rate);
Kuirong Wang0f8ade32012-02-27 16:29:45 -08003998 if (comp_rx_path[shift] < COMPANDER_MAX)
3999 tabla->comp_fs[comp_rx_path[shift]]
4000 = compander_fs;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004001 }
4002 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304003 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05304004 switch (params_format(params)) {
4005 case SNDRV_PCM_FORMAT_S16_LE:
4006 snd_soc_update_bits(codec,
4007 TABLA_A_CDC_CLK_RX_I2S_CTL,
4008 0x20, 0x20);
4009 break;
4010 case SNDRV_PCM_FORMAT_S32_LE:
4011 snd_soc_update_bits(codec,
4012 TABLA_A_CDC_CLK_RX_I2S_CTL,
4013 0x20, 0x00);
4014 break;
4015 default:
4016 pr_err("invalid format\n");
4017 break;
4018 }
4019 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
4020 0x03, (rx_fs_rate >> 0x05));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004021 } else {
4022 tabla->dai[dai->id - 1].rate = params_rate(params);
Santosh Mardie15e2302011-11-15 10:39:23 +05304023 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004024 }
4025
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004026 return 0;
4027}
4028
4029static struct snd_soc_dai_ops tabla_dai_ops = {
4030 .startup = tabla_startup,
4031 .shutdown = tabla_shutdown,
4032 .hw_params = tabla_hw_params,
4033 .set_sysclk = tabla_set_dai_sysclk,
4034 .set_fmt = tabla_set_dai_fmt,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004035 .set_channel_map = tabla_set_channel_map,
4036 .get_channel_map = tabla_get_channel_map,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037};
4038
4039static struct snd_soc_dai_driver tabla_dai[] = {
4040 {
4041 .name = "tabla_rx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004042 .id = AIF1_PB,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004043 .playback = {
4044 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004045 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004046 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004047 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004048 .rate_min = 8000,
4049 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004050 .channels_max = 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004051 },
4052 .ops = &tabla_dai_ops,
4053 },
4054 {
4055 .name = "tabla_tx1",
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004056 .id = AIF1_CAP,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004057 .capture = {
4058 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07004059 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004060 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004061 .rate_max = 192000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004062 .rate_min = 8000,
4063 .channels_min = 1,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004064 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004065 },
4066 .ops = &tabla_dai_ops,
4067 },
Neema Shettyd3a89262012-02-16 10:23:50 -08004068 {
4069 .name = "tabla_rx2",
4070 .id = AIF2_PB,
4071 .playback = {
4072 .stream_name = "AIF2 Playback",
4073 .rates = WCD9310_RATES,
4074 .formats = TABLA_FORMATS,
4075 .rate_min = 8000,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004076 .rate_max = 192000,
Neema Shettyd3a89262012-02-16 10:23:50 -08004077 .channels_min = 1,
4078 .channels_max = 2,
4079 },
4080 .ops = &tabla_dai_ops,
4081 },
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004082 {
4083 .name = "tabla_tx2",
4084 .id = AIF2_CAP,
4085 .capture = {
4086 .stream_name = "AIF2 Capture",
4087 .rates = WCD9310_RATES,
4088 .formats = TABLA_FORMATS,
4089 .rate_max = 192000,
4090 .rate_min = 8000,
4091 .channels_min = 1,
4092 .channels_max = 4,
4093 },
4094 .ops = &tabla_dai_ops,
4095 },
Neema Shetty3fb1b802012-04-27 13:53:24 -07004096 {
4097 .name = "tabla_tx3",
4098 .id = AIF3_CAP,
4099 .capture = {
4100 .stream_name = "AIF3 Capture",
4101 .rates = WCD9310_RATES,
4102 .formats = TABLA_FORMATS,
4103 .rate_max = 48000,
4104 .rate_min = 8000,
4105 .channels_min = 1,
4106 .channels_max = 2,
4107 },
4108 .ops = &tabla_dai_ops,
4109 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004110};
Santosh Mardie15e2302011-11-15 10:39:23 +05304111
4112static struct snd_soc_dai_driver tabla_i2s_dai[] = {
4113 {
4114 .name = "tabla_i2s_rx1",
4115 .id = 1,
4116 .playback = {
4117 .stream_name = "AIF1 Playback",
4118 .rates = WCD9310_RATES,
4119 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004120 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304121 .rate_min = 8000,
4122 .channels_min = 1,
4123 .channels_max = 4,
4124 },
4125 .ops = &tabla_dai_ops,
4126 },
4127 {
4128 .name = "tabla_i2s_tx1",
4129 .id = 2,
4130 .capture = {
4131 .stream_name = "AIF1 Capture",
4132 .rates = WCD9310_RATES,
4133 .formats = TABLA_FORMATS,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004134 .rate_max = 192000,
Santosh Mardie15e2302011-11-15 10:39:23 +05304135 .rate_min = 8000,
4136 .channels_min = 1,
4137 .channels_max = 4,
4138 },
4139 .ops = &tabla_dai_ops,
4140 },
4141};
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004142
4143static int tabla_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
4144 struct snd_kcontrol *kcontrol, int event)
4145{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304146 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004147 struct snd_soc_codec *codec = w->codec;
4148 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4149 u32 j = 0;
4150 u32 ret = 0;
4151 codec->control_data = dev_get_drvdata(codec->dev->parent);
4152 tabla = codec->control_data;
4153 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304154 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004155 return 0;
4156 switch (event) {
4157 case SND_SOC_DAPM_POST_PMU:
4158 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004159 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004160 (tabla_dai[j].id == AIF2_CAP) ||
4161 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004162 continue;
4163 if (!strncmp(w->sname,
4164 tabla_dai[j].playback.stream_name, 13)) {
4165 ++tabla_p->dai[j].ch_act;
4166 break;
4167 }
4168 }
4169 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304170 ret = wcd9xxx_cfg_slim_sch_rx(tabla,
4171 tabla_p->dai[j].ch_num,
4172 tabla_p->dai[j].ch_tot,
4173 tabla_p->dai[j].rate);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004174 break;
4175 case SND_SOC_DAPM_POST_PMD:
4176 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004177 if ((tabla_dai[j].id == AIF1_CAP) ||
Neema Shetty3fb1b802012-04-27 13:53:24 -07004178 (tabla_dai[j].id == AIF2_CAP) ||
4179 (tabla_dai[j].id == AIF3_CAP))
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004180 continue;
4181 if (!strncmp(w->sname,
4182 tabla_dai[j].playback.stream_name, 13)) {
4183 --tabla_p->dai[j].ch_act;
4184 break;
4185 }
4186 }
4187 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304188 ret = wcd9xxx_close_slim_sch_rx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004189 tabla_p->dai[j].ch_num,
4190 tabla_p->dai[j].ch_tot);
Bharath Ramachandramurthyda6fa7a2012-03-30 14:35:32 -07004191 usleep_range(5000, 5000);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004192 tabla_p->dai[j].rate = 0;
4193 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304194 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004195 tabla_p->dai[j].ch_tot = 0;
4196 }
4197 }
4198 return ret;
4199}
4200
4201static int tabla_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
4202 struct snd_kcontrol *kcontrol, int event)
4203{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304204 struct wcd9xxx *tabla;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004205 struct snd_soc_codec *codec = w->codec;
4206 struct tabla_priv *tabla_p = snd_soc_codec_get_drvdata(codec);
4207 /* index to the DAI ID, for now hardcoding */
4208 u32 j = 0;
4209 u32 ret = 0;
4210
4211 codec->control_data = dev_get_drvdata(codec->dev->parent);
4212 tabla = codec->control_data;
4213
4214 /* Execute the callback only if interface type is slimbus */
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304215 if (tabla_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004216 return 0;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004217
4218 pr_debug("%s(): %s %d\n", __func__, w->name, event);
4219
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004220 switch (event) {
4221 case SND_SOC_DAPM_POST_PMU:
4222 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004223 if (tabla_dai[j].id == AIF1_PB ||
4224 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004225 continue;
4226 if (!strncmp(w->sname,
4227 tabla_dai[j].capture.stream_name, 13)) {
4228 ++tabla_p->dai[j].ch_act;
4229 break;
4230 }
4231 }
4232 if (tabla_p->dai[j].ch_act == tabla_p->dai[j].ch_tot)
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304233 ret = wcd9xxx_cfg_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004234 tabla_p->dai[j].ch_num,
4235 tabla_p->dai[j].ch_tot,
4236 tabla_p->dai[j].rate);
4237 break;
4238 case SND_SOC_DAPM_POST_PMD:
4239 for (j = 0; j < ARRAY_SIZE(tabla_dai); j++) {
Neema Shettyd3a89262012-02-16 10:23:50 -08004240 if (tabla_dai[j].id == AIF1_PB ||
4241 tabla_dai[j].id == AIF2_PB)
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004242 continue;
4243 if (!strncmp(w->sname,
4244 tabla_dai[j].capture.stream_name, 13)) {
4245 --tabla_p->dai[j].ch_act;
4246 break;
4247 }
4248 }
4249 if (!tabla_p->dai[j].ch_act) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304250 ret = wcd9xxx_close_slim_sch_tx(tabla,
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004251 tabla_p->dai[j].ch_num,
4252 tabla_p->dai[j].ch_tot);
4253 tabla_p->dai[j].rate = 0;
4254 memset(tabla_p->dai[j].ch_num, 0, (sizeof(u32)*
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05304255 tabla_p->dai[j].ch_tot));
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004256 tabla_p->dai[j].ch_tot = 0;
4257 }
4258 }
4259 return ret;
4260}
4261
4262/* Todo: Have seperate dapm widgets for I2S and Slimbus.
4263 * Might Need to have callbacks registered only for slimbus
4264 */
4265static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
4266 /*RX stuff */
4267 SND_SOC_DAPM_OUTPUT("EAR"),
4268
4269 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
4270
4271 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
4272 ARRAY_SIZE(dac1_switch)),
4273
4274 SND_SOC_DAPM_AIF_IN_E("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
4275 0, tabla_codec_enable_slimrx,
4276 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4277 SND_SOC_DAPM_AIF_IN_E("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0,
4278 0, tabla_codec_enable_slimrx,
4279 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4280
4281 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
4282 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
4283
Neema Shettyd3a89262012-02-16 10:23:50 -08004284 SND_SOC_DAPM_AIF_IN_E("SLIM RX6", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
4285 0, tabla_codec_enable_slimrx,
4286 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4287 SND_SOC_DAPM_AIF_IN_E("SLIM RX7", "AIF2 Playback", 0, SND_SOC_NOPM, 0,
4288 0, tabla_codec_enable_slimrx,
4289 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4290
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004291 /* Headphone */
4292 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
4293 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
4294 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4295 SND_SOC_DAPM_POST_PMD),
4296 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
4297 hphl_switch, ARRAY_SIZE(hphl_switch)),
4298
4299 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
4300 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
4301 SND_SOC_DAPM_POST_PMD),
4302
4303 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
4304 tabla_hphr_dac_event,
4305 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4306
4307 /* Speaker */
4308 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
4309 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
4310 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
4311 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
4312 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
4313
4314 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
4315 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4316 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4317 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
4318 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4319 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4320 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
4321 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4322 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4323 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
4324 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4325 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4326 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
4327 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
4328 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4329
4330 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
4331 , tabla_lineout_dac_event,
4332 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4333 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
4334 , tabla_lineout_dac_event,
4335 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4336 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
4337 , tabla_lineout_dac_event,
4338 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4339 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
4340 &lineout3_ground_switch),
4341 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
4342 , tabla_lineout_dac_event,
4343 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4344 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
4345 &lineout4_ground_switch),
4346 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
4347 , tabla_lineout_dac_event,
4348 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
4349
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004350 SND_SOC_DAPM_MIXER_E("RX1 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004351 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4352 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004353 SND_SOC_DAPM_MIXER_E("RX2 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004354 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4355 SND_SOC_DAPM_POST_PMU),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004356 SND_SOC_DAPM_MIXER_E("RX3 MIX2", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004357 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4358 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004359 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004360 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4361 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004362 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004363 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4364 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004365 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004366 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4367 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004368 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
Kuirong Wange9c8a222012-03-28 16:24:09 -07004369 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU |
4370 SND_SOC_DAPM_POST_PMU),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004371
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004372 SND_SOC_DAPM_MIXER("RX1 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4373 SND_SOC_DAPM_MIXER("RX2 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4374 SND_SOC_DAPM_MIXER("RX3 MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
4375
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004376 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
4377 &rx4_dsm_mux, tabla_codec_reset_interpolator,
4378 SND_SOC_DAPM_PRE_PMU),
4379
4380 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
4381 &rx6_dsm_mux, tabla_codec_reset_interpolator,
4382 SND_SOC_DAPM_PRE_PMU),
4383
4384 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
4385 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
4386
4387 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4388 &rx_mix1_inp1_mux),
4389 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4390 &rx_mix1_inp2_mux),
4391 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4392 &rx2_mix1_inp1_mux),
4393 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4394 &rx2_mix1_inp2_mux),
4395 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4396 &rx3_mix1_inp1_mux),
4397 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4398 &rx3_mix1_inp2_mux),
4399 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4400 &rx4_mix1_inp1_mux),
4401 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4402 &rx4_mix1_inp2_mux),
4403 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4404 &rx5_mix1_inp1_mux),
4405 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4406 &rx5_mix1_inp2_mux),
4407 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4408 &rx6_mix1_inp1_mux),
4409 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4410 &rx6_mix1_inp2_mux),
4411 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
4412 &rx7_mix1_inp1_mux),
4413 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
4414 &rx7_mix1_inp2_mux),
Kuirong Wangbfdd6ca2012-02-29 13:06:38 -08004415 SND_SOC_DAPM_MUX("RX1 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4416 &rx1_mix2_inp1_mux),
4417 SND_SOC_DAPM_MUX("RX1 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4418 &rx1_mix2_inp2_mux),
4419 SND_SOC_DAPM_MUX("RX2 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4420 &rx2_mix2_inp1_mux),
4421 SND_SOC_DAPM_MUX("RX2 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4422 &rx2_mix2_inp2_mux),
4423 SND_SOC_DAPM_MUX("RX3 MIX2 INP1", SND_SOC_NOPM, 0, 0,
4424 &rx3_mix2_inp1_mux),
4425 SND_SOC_DAPM_MUX("RX3 MIX2 INP2", SND_SOC_NOPM, 0, 0,
4426 &rx3_mix2_inp2_mux),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004427
4428 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
4429 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
4430 SND_SOC_DAPM_PRE_PMD),
4431
4432 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
4433 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
4434 SND_SOC_DAPM_POST_PMD),
4435
4436 /* TX */
4437
4438 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
4439 0),
4440
4441 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
4442 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
4443
Kuirong Wang0f8ade32012-02-27 16:29:45 -08004444 SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, 0, 0,
4445 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4446 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4447 SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, 1, 0,
4448 tabla_config_compander, SND_SOC_DAPM_PRE_PMU |
4449 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
4450
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004451 SND_SOC_DAPM_INPUT("AMIC1"),
4452 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
4453 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4454 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4455 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
4456 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4457 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4458 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
4459 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4460 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4461 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
4462 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4463 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4464
4465 SND_SOC_DAPM_INPUT("AMIC3"),
4466 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
4467 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4468 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4469
4470 SND_SOC_DAPM_INPUT("AMIC4"),
4471 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
4472 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4473 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4474
4475 SND_SOC_DAPM_INPUT("AMIC5"),
4476 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
4477 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4478
4479 SND_SOC_DAPM_INPUT("AMIC6"),
4480 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
4481 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
4482
4483 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004484 &dec1_mux, tabla_codec_enable_dec,
4485 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4486 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004487
4488 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004489 &dec2_mux, tabla_codec_enable_dec,
4490 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4491 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004492
4493 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004494 &dec3_mux, tabla_codec_enable_dec,
4495 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4496 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004497
4498 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004499 &dec4_mux, tabla_codec_enable_dec,
4500 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4501 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004502
4503 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004504 &dec5_mux, tabla_codec_enable_dec,
4505 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4506 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004507
4508 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004509 &dec6_mux, tabla_codec_enable_dec,
4510 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4511 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004512
4513 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004514 &dec7_mux, tabla_codec_enable_dec,
4515 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4516 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004517
4518 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004519 &dec8_mux, tabla_codec_enable_dec,
4520 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4521 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004522
4523 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004524 &dec9_mux, tabla_codec_enable_dec,
4525 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4526 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004527
4528 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Kiran Kandid8cf5212012-03-02 15:34:53 -08004529 &dec10_mux, tabla_codec_enable_dec,
4530 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
4531 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004532
4533 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
4534 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
4535
4536 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
4537 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
4538 SND_SOC_DAPM_POST_PMD),
4539
4540 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
4541
4542 SND_SOC_DAPM_INPUT("AMIC2"),
4543 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
4544 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4545 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4546 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
4547 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4548 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4549 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
4550 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4551 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4552 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
4553 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4554 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4555 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
4556 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4557 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4558 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
4559 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4560 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4561 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
4562 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
4563 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4564 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
4565 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
4566 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4567
4568 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004569 SND_SOC_DAPM_AIF_OUT_E("SLIM TX1", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4570 0, tabla_codec_enable_slimtx,
4571 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4572
4573 SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, 0, 0, &sb_tx2_mux),
4574 SND_SOC_DAPM_AIF_OUT_E("SLIM TX2", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4575 0, tabla_codec_enable_slimtx,
4576 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4577
4578 SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, 0, 0, &sb_tx3_mux),
Neema Shetty3fb1b802012-04-27 13:53:24 -07004579 SND_SOC_DAPM_AIF_OUT_E("SLIM TX3", "AIF3 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004580 0, tabla_codec_enable_slimtx,
4581 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4582
4583 SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, 0, 0, &sb_tx4_mux),
Kiran Kandie408b842012-05-17 19:48:04 -07004584 SND_SOC_DAPM_AIF_OUT_E("SLIM TX4", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004585 0, tabla_codec_enable_slimtx,
4586 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004587
4588 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
Neema Shetty3fb1b802012-04-27 13:53:24 -07004589 SND_SOC_DAPM_AIF_OUT_E("SLIM TX5", "AIF3 Capture", 0, SND_SOC_NOPM, 0,
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004590 0, tabla_codec_enable_slimtx,
4591 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004592
4593 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
Kiran Kandi1e6371d2012-03-29 11:48:57 -07004594 SND_SOC_DAPM_AIF_OUT_E("SLIM TX6", "AIF2 Capture", 0, SND_SOC_NOPM, 0,
4595 0, tabla_codec_enable_slimtx,
4596 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004597
4598 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
4599 SND_SOC_DAPM_AIF_OUT_E("SLIM TX7", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
4600 0, tabla_codec_enable_slimtx,
4601 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4602
4603 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
4604 SND_SOC_DAPM_AIF_OUT_E("SLIM TX8", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
4605 0, tabla_codec_enable_slimtx,
4606 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4607
4608 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
4609 SND_SOC_DAPM_AIF_OUT_E("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
4610 0, 0, tabla_codec_enable_slimtx,
4611 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4612
4613 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
4614 SND_SOC_DAPM_AIF_OUT_E("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
4615 0, 0, tabla_codec_enable_slimtx,
4616 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
4617
4618 /* Digital Mic Inputs */
4619 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
4620 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4621 SND_SOC_DAPM_POST_PMD),
4622
4623 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
4624 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4625 SND_SOC_DAPM_POST_PMD),
4626
4627 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
4628 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4629 SND_SOC_DAPM_POST_PMD),
4630
4631 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
4632 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4633 SND_SOC_DAPM_POST_PMD),
4634
4635 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
4636 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4637 SND_SOC_DAPM_POST_PMD),
4638 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
4639 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
4640 SND_SOC_DAPM_POST_PMD),
4641
4642 /* Sidetone */
4643 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
4644 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08004645
4646 /* AUX PGA */
4647 SND_SOC_DAPM_ADC_E("AUX_PGA_Left", NULL, TABLA_A_AUX_L_EN, 7, 0,
4648 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4649 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4650 SND_SOC_DAPM_POST_PMD),
4651
4652 SND_SOC_DAPM_ADC_E("AUX_PGA_Right", NULL, TABLA_A_AUX_R_EN, 7, 0,
4653 tabla_codec_enable_aux_pga, SND_SOC_DAPM_PRE_PMU |
4654 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD |
4655 SND_SOC_DAPM_POST_PMD),
4656
4657 /* Lineout, ear and HPH PA Mixers */
4658 SND_SOC_DAPM_MIXER("HPHL_PA_MIXER", SND_SOC_NOPM, 0, 0,
4659 hphl_pa_mix, ARRAY_SIZE(hphl_pa_mix)),
4660
4661 SND_SOC_DAPM_MIXER("HPHR_PA_MIXER", SND_SOC_NOPM, 0, 0,
4662 hphr_pa_mix, ARRAY_SIZE(hphr_pa_mix)),
4663
4664 SND_SOC_DAPM_MIXER("LINEOUT1_PA_MIXER", SND_SOC_NOPM, 0, 0,
4665 lineout1_pa_mix, ARRAY_SIZE(lineout1_pa_mix)),
4666
4667 SND_SOC_DAPM_MIXER("LINEOUT2_PA_MIXER", SND_SOC_NOPM, 0, 0,
4668 lineout2_pa_mix, ARRAY_SIZE(lineout2_pa_mix)),
4669
4670 SND_SOC_DAPM_MIXER("LINEOUT3_PA_MIXER", SND_SOC_NOPM, 0, 0,
4671 lineout3_pa_mix, ARRAY_SIZE(lineout3_pa_mix)),
4672
4673 SND_SOC_DAPM_MIXER("LINEOUT4_PA_MIXER", SND_SOC_NOPM, 0, 0,
4674 lineout4_pa_mix, ARRAY_SIZE(lineout4_pa_mix)),
4675
4676 SND_SOC_DAPM_MIXER("LINEOUT5_PA_MIXER", SND_SOC_NOPM, 0, 0,
4677 lineout5_pa_mix, ARRAY_SIZE(lineout5_pa_mix)),
4678
4679 SND_SOC_DAPM_MIXER("EAR_PA_MIXER", SND_SOC_NOPM, 0, 0,
4680 ear_pa_mix, ARRAY_SIZE(ear_pa_mix)),
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08004681};
4682
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004683static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07004684{
4685 u8 bias_msb, bias_lsb;
4686 short bias_value;
4687
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004688 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
4689 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
4690 bias_value = (bias_msb << 8) | bias_lsb;
4691 return bias_value;
4692}
4693
4694static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
4695{
4696 u8 bias_msb, bias_lsb;
4697 short bias_value;
4698
4699 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
4700 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
4701 bias_value = (bias_msb << 8) | bias_lsb;
4702 return bias_value;
4703}
4704
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004705static void tabla_turn_onoff_rel_detection(struct snd_soc_codec *codec, bool on)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004706{
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004707 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
4708}
4709
4710static short __tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
4711 bool override_bypass, bool noreldetection)
4712{
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004713 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004714 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4715
4716 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4717 if (noreldetection)
4718 tabla_turn_onoff_rel_detection(codec, false);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004719
Joonwoo Park925914c2012-01-05 13:35:18 -08004720 /* Turn on the override */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004721 if (!override_bypass)
4722 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004723 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004724 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4725 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
4726 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08004727 usleep_range(tabla->mbhc_data.t_sta_dce,
4728 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004729 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08004730 usleep_range(tabla->mbhc_data.t_dce,
4731 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004732 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004733 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004734 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004735 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
4736 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08004737 usleep_range(tabla->mbhc_data.t_sta_dce,
4738 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08004739 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
4740 usleep_range(tabla->mbhc_data.t_sta,
4741 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004742 bias_value = tabla_codec_read_sta_result(codec);
4743 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4744 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004745 }
Joonwoo Park925914c2012-01-05 13:35:18 -08004746 /* Turn off the override after measuring mic voltage */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004747 if (!override_bypass)
4748 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
4749
4750 if (noreldetection)
4751 tabla_turn_onoff_rel_detection(codec, true);
4752 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004753
Bradley Rubincb1e2732011-06-23 16:49:20 -07004754 return bias_value;
4755}
4756
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004757static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce,
4758 bool norel)
4759{
4760 return __tabla_codec_sta_dce(codec, dce, false, norel);
4761}
4762
4763/* called only from interrupt which is under codec_resource_lock acquisition */
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004764static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004765{
4766 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004767 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004768 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004769
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004770 pr_debug("%s: enter, mclk_enabled %d\n", __func__, tabla->mclk_enabled);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004771 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004772 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07004773 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004774 }
4775
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004776 if (!tabla->mclk_enabled) {
Joonwoo Park8a6bccc2012-05-03 15:13:13 -07004777 tabla_codec_disable_clock_block(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004778 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004779 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004780 tabla_codec_enable_clock_block(codec, 1);
4781 }
4782
4783 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
4784
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08004785 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004786 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
4787 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07004788
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004789 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004790
4791 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004792 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004793
4794 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
4795 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
4796 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
4797
4798 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004799 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4800 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004801
Joonwoo Park925914c2012-01-05 13:35:18 -08004802 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004803 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
4804
Bradley Rubincb1e2732011-06-23 16:49:20 -07004805 tabla_codec_calibrate_hs_polling(codec);
4806
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004807 /* don't flip override */
4808 bias_value = __tabla_codec_sta_dce(codec, 1, true, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08004809 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
4810 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004811 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004812
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004813 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004814}
4815
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004816static int tabla_cancel_btn_work(struct tabla_priv *tabla)
4817{
4818 int r = 0;
4819 struct wcd9xxx *core = dev_get_drvdata(tabla->codec->dev->parent);
4820
4821 if (cancel_delayed_work_sync(&tabla->mbhc_btn_dwork)) {
4822 /* if scheduled mbhc_btn_dwork is canceled from here,
4823 * we have to unlock from here instead btn_work */
4824 wcd9xxx_unlock_sleep(core);
4825 r = 1;
4826 }
4827 return r;
4828}
4829
4830/* called under codec_resource_lock acquisition */
4831void tabla_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
Joonwoo Park03324832012-03-19 19:36:16 -07004832{
4833 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004834 u8 wg_time;
4835
4836 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
4837 wg_time += 1;
Joonwoo Park03324832012-03-19 19:36:16 -07004838
4839 /* If headphone PA is on, check if userspace receives
4840 * removal event to sync-up PA's state */
4841 if (tabla_is_hph_pa_on(codec)) {
4842 pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
4843 set_bit(TABLA_HPHL_PA_OFF_ACK, &tabla->hph_pa_dac_state);
4844 set_bit(TABLA_HPHR_PA_OFF_ACK, &tabla->hph_pa_dac_state);
4845 } else {
4846 pr_debug("%s PA is off\n", __func__);
4847 }
4848
4849 if (tabla_is_hph_dac_on(codec, 1))
4850 set_bit(TABLA_HPHL_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
4851 if (tabla_is_hph_dac_on(codec, 0))
4852 set_bit(TABLA_HPHR_DAC_OFF_ACK, &tabla->hph_pa_dac_state);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004853
4854 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
4855 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
4856 0xC0, 0x00);
4857 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
4858 0xC0, 0x00);
4859 usleep_range(wg_time * 1000, wg_time * 1000);
4860}
4861
4862static void tabla_clr_and_turnon_hph_padac(struct tabla_priv *tabla)
4863{
4864 bool pa_turned_on = false;
4865 struct snd_soc_codec *codec = tabla->codec;
4866 u8 wg_time;
4867
4868 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
4869 wg_time += 1;
4870
4871 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
4872 &tabla->hph_pa_dac_state)) {
4873 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
4874 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
4875 0xC0, 0xC0);
4876 }
4877 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
4878 &tabla->hph_pa_dac_state)) {
4879 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
4880 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
4881 0xC0, 0xC0);
4882 }
4883
4884 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
4885 &tabla->hph_pa_dac_state)) {
4886 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
4887 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
4888 1 << 4);
4889 pa_turned_on = true;
4890 }
4891 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
4892 &tabla->hph_pa_dac_state)) {
4893 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
4894 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
4895 1 << 5);
4896 pa_turned_on = true;
4897 }
4898
4899 if (pa_turned_on) {
4900 pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
4901 __func__);
4902 usleep_range(wg_time * 1000, wg_time * 1000);
4903 }
4904}
4905
4906/* called under codec_resource_lock acquisition */
4907static void tabla_codec_report_plug(struct snd_soc_codec *codec, int insertion,
4908 enum snd_jack_types jack_type)
4909{
4910 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4911
4912 if (!insertion) {
4913 /* Report removal */
4914 tabla->hph_status &= ~jack_type;
4915 if (tabla->mbhc_cfg.headset_jack) {
4916 /* cancel possibly scheduled btn work and
4917 * report release if we reported button press */
4918 if (tabla_cancel_btn_work(tabla)) {
4919 pr_debug("%s: button press is canceled\n",
4920 __func__);
4921 } else if (tabla->buttons_pressed) {
4922 pr_debug("%s: Reporting release for reported "
4923 "button press %d\n", __func__,
4924 jack_type);
4925 tabla_snd_soc_jack_report(tabla,
4926 tabla->mbhc_cfg.button_jack, 0,
4927 tabla->buttons_pressed);
4928 tabla->buttons_pressed &=
4929 ~TABLA_JACK_BUTTON_MASK;
4930 }
4931 pr_debug("%s: Reporting removal %d\n", __func__,
4932 jack_type);
4933 tabla_snd_soc_jack_report(tabla,
4934 tabla->mbhc_cfg.headset_jack,
4935 tabla->hph_status,
4936 TABLA_JACK_MASK);
4937 }
4938 tabla_set_and_turnoff_hph_padac(codec);
4939 hphocp_off_report(tabla, SND_JACK_OC_HPHR,
4940 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4941 hphocp_off_report(tabla, SND_JACK_OC_HPHL,
4942 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4943 tabla->current_plug = PLUG_TYPE_NONE;
4944 tabla->mbhc_polling_active = false;
4945 } else {
4946 /* Report insertion */
4947 tabla->hph_status |= jack_type;
4948
4949 if (jack_type == SND_JACK_HEADPHONE)
4950 tabla->current_plug = PLUG_TYPE_HEADPHONE;
4951 else if (jack_type == SND_JACK_HEADSET) {
4952 tabla->mbhc_polling_active = true;
4953 tabla->current_plug = PLUG_TYPE_HEADSET;
4954 }
4955 if (tabla->mbhc_cfg.headset_jack) {
4956 pr_debug("%s: Reporting insertion %d\n", __func__,
4957 jack_type);
4958 tabla_snd_soc_jack_report(tabla,
4959 tabla->mbhc_cfg.headset_jack,
4960 tabla->hph_status,
4961 TABLA_JACK_MASK);
4962 }
4963 tabla_clr_and_turnon_hph_padac(tabla);
4964 }
Joonwoo Park03324832012-03-19 19:36:16 -07004965}
4966
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004967static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park03324832012-03-19 19:36:16 -07004968 int insertion, int trigger,
4969 bool padac_off)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004970{
4971 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004972 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08004973 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004974 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08004975 const struct tabla_mbhc_plug_detect_cfg *plug_det =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004976 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004977
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004978 if (!tabla->mbhc_cfg.calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004979 pr_err("Error, no tabla calibration\n");
4980 return -EINVAL;
4981 }
4982
4983 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
4984
Joonwoo Park03324832012-03-19 19:36:16 -07004985 /* Make sure mic bias and Mic line schmitt trigger
4986 * are turned OFF
4987 */
4988 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x01);
4989 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
4990
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004991 if (insertion) {
Joonwoo Park03324832012-03-19 19:36:16 -07004992 tabla_codec_switch_micbias(codec, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004993
Joonwoo Park03324832012-03-19 19:36:16 -07004994 /* DAPM can manipulate PA/DAC bits concurrently */
4995 if (padac_off == true) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07004996 tabla_set_and_turnoff_hph_padac(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07004997 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004998
Joonwoo Parkcf473b42012-03-29 19:48:16 -07004999 if (trigger & MBHC_USE_HPHL_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005000 /* Enable HPH Schmitt Trigger */
5001 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11,
5002 0x11);
5003 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
5004 plug_det->hph_current << 2);
5005 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02,
5006 0x02);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005007 }
5008 if (trigger & MBHC_USE_MB_TRIGGER) {
Joonwoo Park03324832012-03-19 19:36:16 -07005009 /* enable the mic line schmitt trigger */
5010 snd_soc_update_bits(codec,
5011 tabla->mbhc_bias_regs.mbhc_reg,
5012 0x60, plug_det->mic_current << 5);
5013 snd_soc_update_bits(codec,
5014 tabla->mbhc_bias_regs.mbhc_reg,
5015 0x80, 0x80);
5016 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
5017 snd_soc_update_bits(codec,
5018 tabla->mbhc_bias_regs.ctl_reg, 0x01,
5019 0x00);
5020 snd_soc_update_bits(codec,
5021 tabla->mbhc_bias_regs.mbhc_reg,
5022 0x10, 0x10);
5023 }
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005024
5025 /* setup for insetion detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005026 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005027 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005028 pr_debug("setup for removal detection\n");
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005029 /* Make sure the HPH schmitt trigger is OFF */
5030 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
5031
5032 /* enable the mic line schmitt trigger */
Joonwoo Park03324832012-03-19 19:36:16 -07005033 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
5034 0x01, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005035 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08005036 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005037 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5038 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005039 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005040 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
5041 0x10, 0x10);
5042
5043 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005044 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07005045 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005046
5047 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005048 /* called called by interrupt */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005049 if (!(tabla->clock_active)) {
5050 tabla_codec_enable_config_mode(codec, 1);
5051 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005052 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005053 usleep_range(generic->t_shutdown_plug_rem,
5054 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005055 tabla_codec_enable_config_mode(codec, 0);
5056 } else
5057 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07005058 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005059 }
5060
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07005061 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005062
5063 /* If central bandgap disabled */
5064 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
5065 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005066 usleep_range(generic->t_bg_fast_settle,
5067 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005068 central_bias_enabled = 1;
5069 }
5070
5071 /* If LDO_H disabled */
5072 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
5073 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
5074 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08005075 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005076 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
5077
5078 if (central_bias_enabled)
5079 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
5080 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005081
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005082 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x3,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005083 tabla->mbhc_cfg.micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005084
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305085 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005086 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
5087 return 0;
5088}
5089
Joonwoo Park0976d012011-12-22 11:48:18 -08005090static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
5091 s16 vin_mv)
5092{
Joonwoo Park0976d012011-12-22 11:48:18 -08005093 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005094 s16 diff, zero;
Joonwoo Park0976d012011-12-22 11:48:18 -08005095 u32 mb_mv, in;
Joonwoo Park03324832012-03-19 19:36:16 -07005096 u16 value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005097
5098 tabla = snd_soc_codec_get_drvdata(codec);
5099 mb_mv = tabla->mbhc_data.micb_mv;
5100
5101 if (mb_mv == 0) {
5102 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
5103 return -EINVAL;
5104 }
5105
5106 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005107 diff = (tabla->mbhc_data.dce_mb) - (tabla->mbhc_data.dce_z);
5108 zero = (tabla->mbhc_data.dce_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005109 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005110 diff = (tabla->mbhc_data.sta_mb) - (tabla->mbhc_data.sta_z);
5111 zero = (tabla->mbhc_data.sta_z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005112 }
5113 in = (u32) diff * vin_mv;
5114
Joonwoo Park03324832012-03-19 19:36:16 -07005115 value = (u16) (in / mb_mv) + zero;
5116 return value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005117}
5118
5119static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
5120 u16 bias_value)
5121{
5122 struct tabla_priv *tabla;
Joonwoo Park03324832012-03-19 19:36:16 -07005123 s16 value, z, mb;
Joonwoo Park0976d012011-12-22 11:48:18 -08005124 s32 mv;
5125
5126 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07005127 value = bias_value;
Joonwoo Park0976d012011-12-22 11:48:18 -08005128 if (dce) {
Joonwoo Park03324832012-03-19 19:36:16 -07005129 z = (tabla->mbhc_data.dce_z);
5130 mb = (tabla->mbhc_data.dce_mb);
5131 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005132 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005133 z = (tabla->mbhc_data.sta_z);
5134 mb = (tabla->mbhc_data.sta_mb);
5135 mv = (value - z) * (s32)tabla->mbhc_data.micb_mv / (mb - z);
Joonwoo Park0976d012011-12-22 11:48:18 -08005136 }
5137
5138 return mv;
5139}
5140
Joonwoo Park03324832012-03-19 19:36:16 -07005141static void btn_lpress_fn(struct work_struct *work)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005142{
5143 struct delayed_work *delayed_work;
5144 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08005145 short bias_value;
5146 int dce_mv, sta_mv;
Joonwoo Park03324832012-03-19 19:36:16 -07005147 struct wcd9xxx *core;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005148
5149 pr_debug("%s:\n", __func__);
5150
5151 delayed_work = to_delayed_work(work);
Joonwoo Park03324832012-03-19 19:36:16 -07005152 tabla = container_of(delayed_work, struct tabla_priv, mbhc_btn_dwork);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005153 core = dev_get_drvdata(tabla->codec->dev->parent);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005154
5155 if (tabla) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005156 if (tabla->mbhc_cfg.button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005157 bias_value = tabla_codec_read_sta_result(tabla->codec);
5158 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305159 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005160 bias_value = tabla_codec_read_dce_result(tabla->codec);
5161 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305162 bias_value);
Joonwoo Park0976d012011-12-22 11:48:18 -08005163 pr_debug("%s: Reporting long button press event"
5164 " STA: %d, DCE: %d\n", __func__,
5165 sta_mv, dce_mv);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005166 tabla_snd_soc_jack_report(tabla,
5167 tabla->mbhc_cfg.button_jack,
Joonwoo Park03324832012-03-19 19:36:16 -07005168 tabla->buttons_pressed,
5169 tabla->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005170 }
5171 } else {
5172 pr_err("%s: Bad tabla private data\n", __func__);
5173 }
5174
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005175 pr_debug("%s: leave\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005176 wcd9xxx_unlock_sleep(core);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005177}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07005178
Joonwoo Park0976d012011-12-22 11:48:18 -08005179void tabla_mbhc_cal(struct snd_soc_codec *codec)
5180{
5181 struct tabla_priv *tabla;
5182 struct tabla_mbhc_btn_detect_cfg *btn_det;
5183 u8 cfilt_mode, bg_mode;
5184 u8 ncic, nmeas, navg;
5185 u32 mclk_rate;
5186 u32 dce_wait, sta_wait;
5187 u8 *n_cic;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005188 void *calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08005189
5190 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005191 calibration = tabla->mbhc_cfg.calibration;
5192
5193 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5194 tabla_turn_onoff_rel_detection(codec, false);
Joonwoo Park0976d012011-12-22 11:48:18 -08005195
5196 /* First compute the DCE / STA wait times
5197 * depending on tunable parameters.
5198 * The value is computed in microseconds
5199 */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005200 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005201 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
Joonwoo Park107edf02012-01-11 11:42:24 -08005202 ncic = n_cic[tabla_codec_mclk_index(tabla)];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005203 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
5204 navg = TABLA_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
5205 mclk_rate = tabla->mbhc_cfg.mclk_rate;
Joonwoo Park433149a2012-01-11 09:53:54 -08005206 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
5207 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08005208
5209 tabla->mbhc_data.t_dce = dce_wait;
5210 tabla->mbhc_data.t_sta = sta_wait;
5211
5212 /* LDOH and CFILT are already configured during pdata handling.
5213 * Only need to make sure CFILT and bandgap are in Fast mode.
5214 * Need to restore defaults once calculation is done.
5215 */
5216 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
5217 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
5218 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
5219 0x02);
5220
5221 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
5222 * to perform ADC calibration
5223 */
5224 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005225 tabla->mbhc_cfg.micbias << 5);
Joonwoo Park0976d012011-12-22 11:48:18 -08005226 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
5227 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
5228 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
5229 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
5230
5231 /* DCE measurement for 0 volts */
5232 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5233 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5234 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005235 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5236 usleep_range(100, 100);
5237 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5238 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5239 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
5240
5241 /* DCE measurment for MB voltage */
5242 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5243 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
5244 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5245 usleep_range(100, 100);
5246 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
5247 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
5248 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
5249
5250 /* Sta measuremnt for 0 volts */
5251 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
5252 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5253 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
Joonwoo Park0976d012011-12-22 11:48:18 -08005254 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
5255 usleep_range(100, 100);
5256 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5257 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5258 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
5259
5260 /* STA Measurement for MB Voltage */
5261 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
5262 usleep_range(100, 100);
5263 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
5264 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
5265 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
5266
5267 /* Restore default settings. */
5268 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
5269 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
5270 cfilt_mode);
5271 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
5272
5273 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
5274 usleep_range(100, 100);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005275
5276 wcd9xxx_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
5277 tabla_turn_onoff_rel_detection(codec, true);
Joonwoo Park0976d012011-12-22 11:48:18 -08005278}
5279
5280void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
5281 const enum tabla_mbhc_btn_det_mem mem)
5282{
5283 void *ret = &btn_det->_v_btn_low;
5284
5285 switch (mem) {
5286 case TABLA_BTN_DET_GAIN:
5287 ret += sizeof(btn_det->_n_cic);
5288 case TABLA_BTN_DET_N_CIC:
5289 ret += sizeof(btn_det->_n_ready);
Joonwoo Parkc0672392012-01-11 11:03:14 -08005290 case TABLA_BTN_DET_N_READY:
Joonwoo Park0976d012011-12-22 11:48:18 -08005291 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
5292 case TABLA_BTN_DET_V_BTN_HIGH:
5293 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
5294 case TABLA_BTN_DET_V_BTN_LOW:
5295 /* do nothing */
5296 break;
5297 default:
5298 ret = NULL;
5299 }
5300
5301 return ret;
5302}
5303
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005304static s16 tabla_scale_v_micb_vddio(struct tabla_priv *tabla, int v,
5305 bool tovddio)
5306{
5307 int r;
5308 int vddio_k, mb_k;
5309 vddio_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5310 VDDIO_MICBIAS_MV);
5311 mb_k = tabla_find_k_value(tabla->pdata->micbias.ldoh_v,
5312 tabla->mbhc_data.micb_mv);
5313 if (tovddio)
5314 r = v * vddio_k / mb_k;
5315 else
5316 r = v * mb_k / vddio_k;
5317 return r;
5318}
5319
Joonwoo Park0976d012011-12-22 11:48:18 -08005320static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
5321{
5322 struct tabla_priv *tabla;
5323 s16 btn_mv = 0, btn_delta_mv;
5324 struct tabla_mbhc_btn_detect_cfg *btn_det;
5325 struct tabla_mbhc_plug_type_cfg *plug_type;
5326 u16 *btn_high;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005327 u8 *n_ready;
Joonwoo Park0976d012011-12-22 11:48:18 -08005328 int i;
5329
5330 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005331 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
5332 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005333
Joonwoo Parkc0672392012-01-11 11:03:14 -08005334 n_ready = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_READY);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005335 if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_12288KHZ) {
Joonwoo Park03324832012-03-19 19:36:16 -07005336 tabla->mbhc_data.npoll = 4;
Joonwoo Park0976d012011-12-22 11:48:18 -08005337 tabla->mbhc_data.nbounce_wait = 30;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005338 } else if (tabla->mbhc_cfg.mclk_rate == TABLA_MCLK_RATE_9600KHZ) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005339 tabla->mbhc_data.npoll = 7;
5340 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Parkc0672392012-01-11 11:03:14 -08005341 }
Joonwoo Park0976d012011-12-22 11:48:18 -08005342
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005343 tabla->mbhc_data.t_sta_dce = ((1000 * 256) /
5344 (tabla->mbhc_cfg.mclk_rate / 1000) *
Joonwoo Parkc0672392012-01-11 11:03:14 -08005345 n_ready[tabla_codec_mclk_index(tabla)]) +
5346 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08005347 tabla->mbhc_data.v_ins_hu =
5348 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
5349 tabla->mbhc_data.v_ins_h =
5350 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
5351
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005352 tabla->mbhc_data.v_inval_ins_low = TABLA_MBHC_FAKE_INSERT_LOW;
5353 if (tabla->mbhc_cfg.gpio)
5354 tabla->mbhc_data.v_inval_ins_high =
5355 TABLA_MBHC_FAKE_INSERT_HIGH;
5356 else
5357 tabla->mbhc_data.v_inval_ins_high =
5358 TABLA_MBHC_FAKE_INS_HIGH_NO_GPIO;
5359
5360 if (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV) {
5361 tabla->mbhc_data.adj_v_hs_max =
5362 tabla_scale_v_micb_vddio(tabla, plug_type->v_hs_max, true);
5363 tabla->mbhc_data.adj_v_ins_hu =
5364 tabla_codec_v_sta_dce(codec, STA,
5365 tabla->mbhc_data.adj_v_hs_max);
5366 tabla->mbhc_data.adj_v_ins_h =
5367 tabla_codec_v_sta_dce(codec, DCE,
5368 tabla->mbhc_data.adj_v_hs_max);
5369 tabla->mbhc_data.v_inval_ins_low =
5370 tabla_scale_v_micb_vddio(tabla,
5371 tabla->mbhc_data.v_inval_ins_low,
5372 false);
5373 tabla->mbhc_data.v_inval_ins_high =
5374 tabla_scale_v_micb_vddio(tabla,
5375 tabla->mbhc_data.v_inval_ins_high,
5376 false);
5377 }
5378
Joonwoo Park0976d012011-12-22 11:48:18 -08005379 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
5380 for (i = 0; i < btn_det->num_btn; i++)
5381 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
5382
5383 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
5384 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
Joonwoo Park0976d012011-12-22 11:48:18 -08005385 tabla->mbhc_data.v_b1_hu =
5386 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
5387
5388 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
5389
5390 tabla->mbhc_data.v_b1_huc =
5391 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
5392
5393 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
Joonwoo Park03324832012-03-19 19:36:16 -07005394 tabla->mbhc_data.v_brl = TABLA_MBHC_BUTTON_MIN;
Joonwoo Park0976d012011-12-22 11:48:18 -08005395
5396 tabla->mbhc_data.v_no_mic =
5397 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
5398}
5399
5400void tabla_mbhc_init(struct snd_soc_codec *codec)
5401{
5402 struct tabla_priv *tabla;
5403 struct tabla_mbhc_general_cfg *generic;
5404 struct tabla_mbhc_btn_detect_cfg *btn_det;
5405 int n;
Joonwoo Park0976d012011-12-22 11:48:18 -08005406 u8 *n_cic, *gain;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305407 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Joonwoo Park0976d012011-12-22 11:48:18 -08005408
5409 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005410 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
5411 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park0976d012011-12-22 11:48:18 -08005412
Joonwoo Park0976d012011-12-22 11:48:18 -08005413 for (n = 0; n < 8; n++) {
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08005414 if ((!TABLA_IS_1_X(tabla_core->version)) || n != 7) {
Joonwoo Park0976d012011-12-22 11:48:18 -08005415 snd_soc_update_bits(codec,
5416 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
5417 0x07, n);
5418 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
5419 btn_det->c[n]);
5420 }
5421 }
5422 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
5423 btn_det->nc);
5424
5425 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
5426 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
Joonwoo Park107edf02012-01-11 11:42:24 -08005427 n_cic[tabla_codec_mclk_index(tabla)]);
Joonwoo Park0976d012011-12-22 11:48:18 -08005428
5429 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
Joonwoo Park107edf02012-01-11 11:42:24 -08005430 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78,
5431 gain[tabla_codec_mclk_index(tabla)] << 3);
Joonwoo Park0976d012011-12-22 11:48:18 -08005432
5433 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
5434 generic->mbhc_nsa << 4);
5435
5436 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
5437 btn_det->n_meas);
5438
5439 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
5440
5441 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
5442
5443 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
5444 btn_det->mbhc_nsc << 3);
5445
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08005446 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_mbhc, 0x03,
5447 TABLA_MICBIAS2);
Joonwoo Park0976d012011-12-22 11:48:18 -08005448
5449 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
Joonwoo Park03324832012-03-19 19:36:16 -07005450
5451 snd_soc_update_bits(codec, TABLA_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
Joonwoo Park0976d012011-12-22 11:48:18 -08005452}
5453
Patrick Lai64b43262011-12-06 17:29:15 -08005454static bool tabla_mbhc_fw_validate(const struct firmware *fw)
5455{
5456 u32 cfg_offset;
5457 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
5458 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
5459
5460 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
5461 return false;
5462
5463 /* previous check guarantees that there is enough fw data up
5464 * to num_btn
5465 */
5466 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
5467 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
5468 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
5469 return false;
5470
5471 /* previous check guarantees that there is enough fw data up
5472 * to start of impedance detection configuration
5473 */
5474 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
5475 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
5476
5477 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
5478 return false;
5479
5480 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
5481 return false;
5482
5483 return true;
5484}
Joonwoo Park03324832012-03-19 19:36:16 -07005485
Joonwoo Parkfee17432012-04-16 16:33:55 -07005486/* called under codec_resource_lock acquisition */
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005487static int tabla_determine_button(const struct tabla_priv *priv,
Joonwoo Parkfee17432012-04-16 16:33:55 -07005488 const s32 micmv)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005489{
5490 s16 *v_btn_low, *v_btn_high;
5491 struct tabla_mbhc_btn_detect_cfg *btn_det;
5492 int i, btn = -1;
5493
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005494 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005495 v_btn_low = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_LOW);
5496 v_btn_high = tabla_mbhc_cal_btn_det_mp(btn_det,
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305497 TABLA_BTN_DET_V_BTN_HIGH);
Joonwoo Parkfee17432012-04-16 16:33:55 -07005498
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005499 for (i = 0; i < btn_det->num_btn; i++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07005500 if ((v_btn_low[i] <= micmv) && (v_btn_high[i] >= micmv)) {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005501 btn = i;
5502 break;
5503 }
5504 }
5505
5506 if (btn == -1)
5507 pr_debug("%s: couldn't find button number for mic mv %d\n",
Joonwoo Parkfee17432012-04-16 16:33:55 -07005508 __func__, micmv);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005509
5510 return btn;
5511}
5512
5513static int tabla_get_button_mask(const int btn)
5514{
5515 int mask = 0;
5516 switch (btn) {
5517 case 0:
5518 mask = SND_JACK_BTN_0;
5519 break;
5520 case 1:
5521 mask = SND_JACK_BTN_1;
5522 break;
5523 case 2:
5524 mask = SND_JACK_BTN_2;
5525 break;
5526 case 3:
5527 mask = SND_JACK_BTN_3;
5528 break;
5529 case 4:
5530 mask = SND_JACK_BTN_4;
5531 break;
5532 case 5:
5533 mask = SND_JACK_BTN_5;
5534 break;
5535 case 6:
5536 mask = SND_JACK_BTN_6;
5537 break;
5538 case 7:
5539 mask = SND_JACK_BTN_7;
5540 break;
5541 }
5542 return mask;
5543}
5544
Bradley Rubincb1e2732011-06-23 16:49:20 -07005545static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005546{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005547 int i, mask;
Joonwoo Parkfee17432012-04-16 16:33:55 -07005548 short dce, sta;
5549 s32 mv, mv_s, stamv_s;
5550 bool vddio;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005551 int btn = -1, meas = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005552 struct tabla_priv *priv = data;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005553 const struct tabla_mbhc_btn_detect_cfg *d =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005554 TABLA_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005555 short btnmeas[d->n_btn_meas + 1];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005556 struct snd_soc_codec *codec = priv->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305557 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park03324832012-03-19 19:36:16 -07005558 int n_btn_meas = d->n_btn_meas;
5559 u8 mbhc_status = snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_STATUS) & 0x3E;
Bradley Rubincb1e2732011-06-23 16:49:20 -07005560
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005561 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005562
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005563 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
5564 if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
5565 pr_debug("%s: mbhc is being recovered, skip button press\n",
5566 __func__);
5567 goto done;
5568 }
5569
5570 priv->mbhc_state = MBHC_STATE_POTENTIAL;
5571
5572 if (!priv->mbhc_polling_active) {
5573 pr_warn("%s: mbhc polling is not active, skip button press\n",
5574 __func__);
5575 goto done;
5576 }
Joonwoo Park03324832012-03-19 19:36:16 -07005577
5578 dce = tabla_codec_read_dce_result(codec);
5579 mv = tabla_codec_sta_dce_v(codec, 1, dce);
5580
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005581 /* If GPIO interrupt already kicked in, ignore button press */
5582 if (priv->in_gpio_handler) {
5583 pr_debug("%s: GPIO State Changed, ignore button press\n",
5584 __func__);
5585 btn = -1;
5586 goto done;
5587 }
5588
Joonwoo Parkfee17432012-04-16 16:33:55 -07005589 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
5590 priv->mbhc_micbias_switched);
5591 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
5592
Joonwoo Park03324832012-03-19 19:36:16 -07005593 if (mbhc_status != TABLA_MBHC_STATUS_REL_DETECTION) {
5594 if (priv->mbhc_last_resume &&
5595 !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
5596 pr_debug("%s: Button is already released shortly after "
5597 "resume\n", __func__);
5598 n_btn_meas = 0;
5599 } else {
5600 pr_debug("%s: Button is already released without "
5601 "resume", __func__);
5602 sta = tabla_codec_read_sta_result(codec);
Joonwoo Parkfee17432012-04-16 16:33:55 -07005603 stamv_s = tabla_codec_sta_dce_v(codec, 0, sta);
5604 if (vddio)
5605 stamv_s = tabla_scale_v_micb_vddio(priv,
5606 stamv_s,
5607 false);
5608 btn = tabla_determine_button(priv, mv_s);
5609 if (btn != tabla_determine_button(priv, stamv_s))
Joonwoo Park03324832012-03-19 19:36:16 -07005610 btn = -1;
5611 goto done;
5612 }
5613 }
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07005614
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005615 /* determine pressed button */
Joonwoo Parkfee17432012-04-16 16:33:55 -07005616 btnmeas[meas++] = tabla_determine_button(priv, mv_s);
5617 pr_debug("%s: meas %d - DCE %d,%d,%d button %d\n", __func__,
5618 meas - 1, dce, mv, mv_s, btnmeas[meas - 1]);
Joonwoo Park03324832012-03-19 19:36:16 -07005619 if (n_btn_meas == 0)
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005620 btn = btnmeas[0];
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005621 for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
Joonwoo Parkfee17432012-04-16 16:33:55 -07005622 dce = tabla_codec_sta_dce(codec, 1, false);
5623 mv = tabla_codec_sta_dce_v(codec, 1, dce);
5624 mv_s = vddio ? tabla_scale_v_micb_vddio(priv, mv, false) : mv;
5625
5626 btnmeas[meas] = tabla_determine_button(priv, mv_s);
5627 pr_debug("%s: meas %d - DCE %d,%d,%d button %d\n",
5628 __func__, meas, dce, mv, mv_s, btnmeas[meas]);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005629 /* if large enough measurements are collected,
5630 * start to check if last all n_btn_con measurements were
5631 * in same button low/high range */
5632 if (meas + 1 >= d->n_btn_con) {
5633 for (i = 0; i < d->n_btn_con; i++)
5634 if ((btnmeas[meas] < 0) ||
5635 (btnmeas[meas] != btnmeas[meas - i]))
5636 break;
5637 if (i == d->n_btn_con) {
5638 /* button pressed */
5639 btn = btnmeas[meas];
5640 break;
Joonwoo Park03324832012-03-19 19:36:16 -07005641 } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
5642 /* if left measurements are less than n_btn_con,
5643 * it's impossible to find button number */
5644 break;
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005645 }
5646 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005647 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005648
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005649 if (btn >= 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005650 if (priv->in_gpio_handler) {
5651 pr_debug("%s: GPIO already triggered, ignore button "
5652 "press\n", __func__);
5653 goto done;
5654 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005655 mask = tabla_get_button_mask(btn);
5656 priv->buttons_pressed |= mask;
Joonwoo Park03324832012-03-19 19:36:16 -07005657 wcd9xxx_lock_sleep(core);
5658 if (schedule_delayed_work(&priv->mbhc_btn_dwork,
5659 msecs_to_jiffies(400)) == 0) {
5660 WARN(1, "Button pressed twice without release"
5661 "event\n");
5662 wcd9xxx_unlock_sleep(core);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005663 }
Joonwoo Park816b8e62012-01-23 16:03:21 -08005664 } else {
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005665 pr_debug("%s: bogus button press, too short press?\n",
5666 __func__);
Joonwoo Park816b8e62012-01-23 16:03:21 -08005667 }
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005668
Joonwoo Park03324832012-03-19 19:36:16 -07005669 done:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005670 pr_debug("%s: leave\n", __func__);
5671 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005672 return IRQ_HANDLED;
5673}
5674
Joonwoo Park03324832012-03-19 19:36:16 -07005675static int tabla_is_fake_press(struct tabla_priv *priv)
5676{
5677 int i;
5678 int r = 0;
5679 struct snd_soc_codec *codec = priv->codec;
5680 const int dces = MBHC_NUM_DCE_PLUG_DETECT;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005681 s16 mb_v, v_ins_hu, v_ins_h;
5682
5683 v_ins_hu = tabla_get_current_v_ins(priv, true);
5684 v_ins_h = tabla_get_current_v_ins(priv, false);
Joonwoo Park03324832012-03-19 19:36:16 -07005685
5686 for (i = 0; i < dces; i++) {
5687 usleep_range(10000, 10000);
5688 if (i == 0) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005689 mb_v = tabla_codec_sta_dce(codec, 0, true);
Joonwoo Park03324832012-03-19 19:36:16 -07005690 pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
5691 tabla_codec_sta_dce_v(codec, 0, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005692 if (mb_v < (s16)priv->mbhc_data.v_b1_hu ||
5693 mb_v > v_ins_hu) {
Joonwoo Park03324832012-03-19 19:36:16 -07005694 r = 1;
5695 break;
5696 }
5697 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005698 mb_v = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park03324832012-03-19 19:36:16 -07005699 pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
5700 tabla_codec_sta_dce_v(codec, 1, mb_v));
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005701 if (mb_v < (s16)priv->mbhc_data.v_b1_h ||
5702 mb_v > v_ins_h) {
Joonwoo Park03324832012-03-19 19:36:16 -07005703 r = 1;
5704 break;
5705 }
5706 }
5707 }
5708
5709 return r;
5710}
5711
Bradley Rubincb1e2732011-06-23 16:49:20 -07005712static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005713{
Joonwoo Parke5d3aa92012-01-11 14:47:15 -08005714 int ret;
Joonwoo Park816b8e62012-01-23 16:03:21 -08005715 struct tabla_priv *priv = data;
5716 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005717
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005718 pr_debug("%s: enter\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07005719
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005720 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
5721 priv->mbhc_state = MBHC_STATE_RELEASE;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005722
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005723 tabla_codec_drive_v_to_micbias(codec, 10000);
5724
Joonwoo Park03324832012-03-19 19:36:16 -07005725 if (priv->buttons_pressed & TABLA_JACK_BUTTON_MASK) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005726 ret = tabla_cancel_btn_work(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005727 if (ret == 0) {
Joonwoo Park03324832012-03-19 19:36:16 -07005728 pr_debug("%s: Reporting long button release event\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005729 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005730 if (priv->mbhc_cfg.button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08005731 tabla_snd_soc_jack_report(priv,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005732 priv->mbhc_cfg.button_jack, 0,
5733 priv->buttons_pressed);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005734 } else {
Joonwoo Park03324832012-03-19 19:36:16 -07005735 if (tabla_is_fake_press(priv)) {
5736 pr_debug("%s: Fake button press interrupt\n",
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005737 __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005738 } else if (priv->mbhc_cfg.button_jack) {
5739 if (priv->in_gpio_handler) {
5740 pr_debug("%s: GPIO kicked in, ignore\n",
5741 __func__);
5742 } else {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005743 pr_debug("%s: Reporting short button "
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005744 "press and release\n",
5745 __func__);
5746 tabla_snd_soc_jack_report(priv,
5747 priv->mbhc_cfg.button_jack,
5748 priv->buttons_pressed,
5749 priv->buttons_pressed);
5750 tabla_snd_soc_jack_report(priv,
5751 priv->mbhc_cfg.button_jack, 0,
5752 priv->buttons_pressed);
5753 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07005754 }
5755 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005756
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08005757 priv->buttons_pressed &= ~TABLA_JACK_BUTTON_MASK;
5758 }
5759
Joonwoo Park03324832012-03-19 19:36:16 -07005760 tabla_codec_calibrate_hs_polling(codec);
5761
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005762 if (priv->mbhc_cfg.gpio)
5763 msleep(TABLA_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
Joonwoo Park03324832012-03-19 19:36:16 -07005764
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005765 tabla_codec_start_hs_polling(codec);
5766
5767 pr_debug("%s: leave\n", __func__);
5768 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005769 return IRQ_HANDLED;
5770}
5771
Bradley Rubincb1e2732011-06-23 16:49:20 -07005772static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
5773{
5774 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08005775 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005776 TABLA_MBHC_CAL_GENERAL_PTR(tabla->mbhc_cfg.calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005777
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005778 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005779 tabla_codec_enable_config_mode(codec, 1);
5780
5781 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
5782 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005783
Joonwoo Park0976d012011-12-22 11:48:18 -08005784 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
5785
5786 usleep_range(generic->t_shutdown_plug_rem,
5787 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005788
5789 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005790 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07005791 tabla_codec_enable_config_mode(codec, 0);
5792
5793 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
5794}
5795
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005796static void tabla_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005797{
5798 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07005799
5800 tabla_codec_shutdown_hs_removal_detect(codec);
5801
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07005802 if (!tabla->mclk_enabled) {
Asish Bhattacharya486745a2012-01-20 06:41:53 +05305803 tabla_codec_disable_clock_block(codec);
5804 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005805 }
5806
5807 tabla->mbhc_polling_active = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005808 tabla->mbhc_state = MBHC_STATE_NONE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005809}
5810
Patrick Lai49efeac2011-11-03 11:01:12 -07005811static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
5812{
5813 struct tabla_priv *tabla = data;
5814 struct snd_soc_codec *codec;
5815
5816 pr_info("%s: received HPHL OCP irq\n", __func__);
5817
5818 if (tabla) {
5819 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08005820 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
5821 pr_info("%s: retry\n", __func__);
5822 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5823 0x00);
5824 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5825 0x10);
5826 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305827 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08005828 TABLA_IRQ_HPH_PA_OCPL_FAULT);
5829 tabla->hphlocp_cnt = 0;
5830 tabla->hph_status |= SND_JACK_OC_HPHL;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005831 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08005832 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005833 tabla->mbhc_cfg.headset_jack,
5834 tabla->hph_status,
5835 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07005836 }
5837 } else {
5838 pr_err("%s: Bad tabla private data\n", __func__);
5839 }
5840
5841 return IRQ_HANDLED;
5842}
5843
5844static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
5845{
5846 struct tabla_priv *tabla = data;
5847 struct snd_soc_codec *codec;
5848
5849 pr_info("%s: received HPHR OCP irq\n", __func__);
5850
5851 if (tabla) {
5852 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08005853 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
5854 pr_info("%s: retry\n", __func__);
5855 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5856 0x00);
5857 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
5858 0x10);
5859 } else {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05305860 wcd9xxx_disable_irq(codec->control_data,
Patrick Laic7cae882011-11-18 11:52:49 -08005861 TABLA_IRQ_HPH_PA_OCPR_FAULT);
5862 tabla->hphrocp_cnt = 0;
5863 tabla->hph_status |= SND_JACK_OC_HPHR;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005864 if (tabla->mbhc_cfg.headset_jack)
Patrick Laic7cae882011-11-18 11:52:49 -08005865 tabla_snd_soc_jack_report(tabla,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005866 tabla->mbhc_cfg.headset_jack,
5867 tabla->hph_status,
5868 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07005869 }
5870 } else {
5871 pr_err("%s: Bad tabla private data\n", __func__);
5872 }
5873
5874 return IRQ_HANDLED;
5875}
5876
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005877static bool tabla_is_invalid_insertion_range(struct snd_soc_codec *codec,
Joonwoo Park41956722012-04-18 13:13:07 -07005878 s32 mic_volt, bool highhph)
Joonwoo Park03324832012-03-19 19:36:16 -07005879{
5880 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005881 bool invalid = false;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005882 s16 v_hs_max;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005883
5884 /* Perform this check only when the high voltage headphone
5885 * needs to be considered as invalid
5886 */
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005887 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Park41956722012-04-18 13:13:07 -07005888 if (!highhph && (mic_volt > v_hs_max))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005889 invalid = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005890 else if (mic_volt < tabla->mbhc_data.v_inval_ins_high &&
5891 (mic_volt > tabla->mbhc_data.v_inval_ins_low))
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005892 invalid = true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005893
5894 return invalid;
5895}
5896
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005897static bool tabla_is_inval_insert_delta(struct snd_soc_codec *codec,
5898 int mic_volt, int mic_volt_prev,
5899 int threshold)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005900{
5901 int delta = abs(mic_volt - mic_volt_prev);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005902 if (delta > threshold) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005903 pr_debug("%s: volt delta %dmv\n", __func__, delta);
Joonwoo Park03324832012-03-19 19:36:16 -07005904 return true;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005905 }
Joonwoo Park03324832012-03-19 19:36:16 -07005906 return false;
5907}
5908
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005909/* called under codec_resource_lock acquisition */
5910void tabla_find_plug_and_report(struct snd_soc_codec *codec,
5911 enum tabla_mbhc_plug_type plug_type)
Joonwoo Park03324832012-03-19 19:36:16 -07005912{
5913 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005914
5915 if (plug_type == PLUG_TYPE_HEADPHONE
5916 && tabla->current_plug == PLUG_TYPE_NONE) {
5917 /* Nothing was reported previously
5918 * reporte a headphone
5919 */
5920 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
5921 tabla_codec_cleanup_hs_polling(codec);
5922 } else if (plug_type == PLUG_TYPE_HEADSET) {
5923 /* If Headphone was reported previously, this will
5924 * only report the mic line
5925 */
5926 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
5927 msleep(100);
5928 tabla_codec_start_hs_polling(codec);
5929 } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
5930 if (tabla->current_plug == PLUG_TYPE_NONE)
5931 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
5932 tabla_codec_cleanup_hs_polling(codec);
5933 pr_debug("setup mic trigger for further detection\n");
5934 tabla->lpi_enabled = true;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07005935 tabla_codec_enable_hs_detect(codec, 1,
5936 MBHC_USE_MB_TRIGGER |
5937 MBHC_USE_HPHL_TRIGGER,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005938 false);
5939 }
5940}
5941
5942/* should be called under interrupt context that hold suspend */
5943static void tabla_schedule_hs_detect_plug(struct tabla_priv *tabla)
5944{
5945 pr_debug("%s: scheduling tabla_hs_correct_gpio_plug\n", __func__);
5946 tabla->hs_detect_work_stop = false;
5947 wcd9xxx_lock_sleep(tabla->codec->control_data);
5948 schedule_work(&tabla->hs_correct_plug_work);
5949}
5950
5951/* called under codec_resource_lock acquisition */
5952static void tabla_cancel_hs_detect_plug(struct tabla_priv *tabla)
5953{
5954 pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
5955 tabla->hs_detect_work_stop = true;
5956 wmb();
5957 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
5958 if (cancel_work_sync(&tabla->hs_correct_plug_work)) {
5959 pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
5960 wcd9xxx_unlock_sleep(tabla->codec->control_data);
5961 }
5962 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
5963}
5964
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07005965static bool tabla_hs_gpio_level_remove(struct tabla_priv *tabla)
5966{
5967 return (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) !=
5968 tabla->mbhc_cfg.gpio_level_insert);
5969}
5970
Joonwoo Park41956722012-04-18 13:13:07 -07005971/* called under codec_resource_lock acquisition */
5972static void tabla_codec_hphr_gnd_switch(struct snd_soc_codec *codec, bool on)
5973{
5974 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, on);
5975 if (on)
5976 usleep_range(5000, 5000);
5977}
5978
5979/* called under codec_resource_lock acquisition and mbhc override = 1 */
5980static enum tabla_mbhc_plug_type
5981tabla_codec_get_plug_type(struct snd_soc_codec *codec, bool highhph)
5982{
5983 int i;
5984 bool gndswitch, vddioswitch;
5985 int scaled;
5986 struct tabla_mbhc_plug_type_cfg *plug_type_ptr;
5987 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
5988 const bool vddio = (tabla->mbhc_data.micb_mv != VDDIO_MICBIAS_MV);
5989 int num_det = (MBHC_NUM_DCE_PLUG_DETECT + vddio);
5990 enum tabla_mbhc_plug_type plug_type[num_det];
5991 s16 mb_v[num_det];
5992 s32 mic_mv[num_det];
5993 bool inval = false;
5994
5995 /* make sure override is on */
5996 WARN_ON(!(snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x04));
5997
5998 /* performs DCEs for N times
5999 * 1st: check if voltage is in invalid range
6000 * 2nd - N-2nd: check voltage range and delta
6001 * N-1st: check voltage range, delta with HPHR GND switch
6002 * Nth: check voltage range with VDDIO switch if micbias V != vddio V*/
6003 for (i = 0; i < num_det && !inval; i++) {
6004 gndswitch = (i == (num_det - 1 - vddio));
6005 vddioswitch = (vddio && (i == num_det - 1));
6006 if (i == 0) {
6007 mb_v[i] = tabla_codec_setup_hs_polling(codec);
6008 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6009 inval = tabla_is_invalid_insertion_range(codec,
6010 mic_mv[i],
6011 highhph);
6012 scaled = mic_mv[i];
6013 } else if (vddioswitch) {
6014 __tabla_codec_switch_micbias(tabla->codec, 1, false,
6015 false);
6016 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
6017 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6018 scaled = tabla_scale_v_micb_vddio(tabla, mic_mv[i],
6019 false);
6020 inval = (tabla_is_invalid_insertion_range(codec,
6021 mic_mv[i],
6022 highhph) ||
6023 tabla_is_inval_insert_delta(codec, scaled,
6024 mic_mv[i - 1],
6025 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV));
6026 __tabla_codec_switch_micbias(tabla->codec, 0, false,
6027 false);
6028 } else {
6029 if (gndswitch)
6030 tabla_codec_hphr_gnd_switch(codec, true);
6031 mb_v[i] = __tabla_codec_sta_dce(codec, 1, true, true);
6032 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6033 inval = (tabla_is_invalid_insertion_range(codec,
6034 mic_mv[i],
6035 highhph) ||
6036 tabla_is_inval_insert_delta(codec, mic_mv[i],
6037 mic_mv[i - 1],
6038 TABLA_MBHC_FAKE_INS_DELTA_SCALED_MV));
6039 if (gndswitch)
6040 tabla_codec_hphr_gnd_switch(codec, false);
6041 scaled = mic_mv[i];
6042 }
6043 pr_debug("%s: DCE #%d, %04x, V %d, scaled V %d, GND %d, "
6044 "invalid %d\n", __func__,
6045 i + 1, mb_v[i] & 0xffff, mic_mv[i], scaled, gndswitch,
6046 inval);
6047 }
6048
6049 plug_type_ptr =
6050 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6051 plug_type[0] = PLUG_TYPE_INVALID;
6052 for (i = 0; !inval && i < num_det; i++) {
6053 /*
6054 * If we are here, means none of the all
6055 * measurements are fake, continue plug type detection.
6056 * If all three measurements do not produce same
6057 * plug type, restart insertion detection
6058 */
6059 if (mic_mv[i] < plug_type_ptr->v_no_mic) {
6060 plug_type[i] = PLUG_TYPE_HEADPHONE;
6061 pr_debug("%s: Detect attempt %d, detected Headphone\n",
6062 __func__, i);
6063 } else if (highhph && (mic_mv[i] > plug_type_ptr->v_hs_max)) {
6064 plug_type[i] = PLUG_TYPE_HIGH_HPH;
6065 pr_debug("%s: Detect attempt %d, detected High "
6066 "Headphone\n", __func__, i);
6067 } else {
6068 plug_type[i] = PLUG_TYPE_HEADSET;
6069 pr_debug("%s: Detect attempt %d, detected Headset\n",
6070 __func__, i);
6071 }
6072
6073 if (i > 0 && (plug_type[i - 1] != plug_type[i])) {
6074 pr_err("%s: Detect attempt %d and %d are not same",
6075 __func__, i - 1, i);
6076 plug_type[0] = PLUG_TYPE_INVALID;
6077 inval = true;
6078 break;
6079 }
6080 }
6081
6082 return plug_type[0];
6083}
6084
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006085static void tabla_hs_correct_gpio_plug(struct work_struct *work)
6086{
6087 struct tabla_priv *tabla;
6088 struct snd_soc_codec *codec;
Joonwoo Park41956722012-04-18 13:13:07 -07006089 int retry = 0;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006090 bool correction = false;
Joonwoo Park41956722012-04-18 13:13:07 -07006091 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006092 unsigned long timeout;
6093
6094 tabla = container_of(work, struct tabla_priv, hs_correct_plug_work);
6095 codec = tabla->codec;
6096
6097 pr_debug("%s: enter\n", __func__);
6098 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6099
6100 /* Keep override on during entire plug type correction work.
6101 *
6102 * This is okay under the assumption that any GPIO irqs which use
6103 * MBHC block cancel and sync this work so override is off again
6104 * prior to GPIO interrupt handler's MBHC block usage.
6105 * Also while this correction work is running, we can guarantee
6106 * DAPM doesn't use any MBHC block as this work only runs with
6107 * headphone detection.
6108 */
6109 tabla_turn_onoff_override(codec, true);
6110
6111 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6112 while (!time_after(jiffies, timeout)) {
6113 ++retry;
6114 rmb();
6115 if (tabla->hs_detect_work_stop) {
6116 pr_debug("%s: stop requested\n", __func__);
6117 break;
6118 }
6119
6120 msleep(TABLA_HS_DETECT_PLUG_INERVAL_MS);
6121 if (tabla_hs_gpio_level_remove(tabla)) {
6122 pr_debug("%s: GPIO value is low\n", __func__);
6123 break;
6124 }
6125
6126 /* can race with removal interrupt */
6127 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Joonwoo Park41956722012-04-18 13:13:07 -07006128 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006129 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6130
Joonwoo Park41956722012-04-18 13:13:07 -07006131 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006132 pr_debug("Invalid plug in attempt # %d\n", retry);
6133 if (retry == NUM_ATTEMPTS_TO_REPORT &&
6134 tabla->current_plug == PLUG_TYPE_NONE) {
6135 tabla_codec_report_plug(codec, 1,
6136 SND_JACK_HEADPHONE);
6137 }
Joonwoo Park41956722012-04-18 13:13:07 -07006138 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006139 pr_debug("Good headphone detected, continue polling mic\n");
6140 if (tabla->current_plug == PLUG_TYPE_NONE) {
6141 tabla_codec_report_plug(codec, 1,
6142 SND_JACK_HEADPHONE);
6143 }
6144 } else {
6145 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6146 /* Turn off override */
6147 tabla_turn_onoff_override(codec, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006148 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006149 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6150 pr_debug("Attempt %d found correct plug %d\n", retry,
Joonwoo Park41956722012-04-18 13:13:07 -07006151 plug_type);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006152 correction = true;
6153 break;
6154 }
6155 }
6156
6157 /* Turn off override */
6158 if (!correction)
6159 tabla_turn_onoff_override(codec, false);
6160
6161 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
6162 pr_debug("%s: leave\n", __func__);
6163 /* unlock sleep */
6164 wcd9xxx_unlock_sleep(tabla->codec->control_data);
6165}
6166
6167/* called under codec_resource_lock acquisition */
6168static void tabla_codec_decide_gpio_plug(struct snd_soc_codec *codec)
6169{
6170 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park41956722012-04-18 13:13:07 -07006171 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006172
6173 pr_debug("%s: enter\n", __func__);
6174
6175 tabla_turn_onoff_override(codec, true);
Joonwoo Park41956722012-04-18 13:13:07 -07006176 plug_type = tabla_codec_get_plug_type(codec, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006177 tabla_turn_onoff_override(codec, false);
6178
6179 if (tabla_hs_gpio_level_remove(tabla)) {
6180 pr_debug("%s: GPIO value is low when determining plug\n",
6181 __func__);
6182 return;
6183 }
6184
Joonwoo Park41956722012-04-18 13:13:07 -07006185 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006186 tabla_schedule_hs_detect_plug(tabla);
Joonwoo Park41956722012-04-18 13:13:07 -07006187 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006188 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6189
6190 tabla_schedule_hs_detect_plug(tabla);
6191 } else {
Joonwoo Park41956722012-04-18 13:13:07 -07006192 pr_debug("%s: Valid plug found, determine plug type %d\n",
6193 __func__, plug_type);
6194 tabla_find_plug_and_report(codec, plug_type);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006195 }
6196}
6197
6198/* called under codec_resource_lock acquisition */
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006199static void tabla_codec_detect_plug_type(struct snd_soc_codec *codec)
6200{
Joonwoo Park41956722012-04-18 13:13:07 -07006201 enum tabla_mbhc_plug_type plug_type;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006202 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6203 const struct tabla_mbhc_plug_detect_cfg *plug_det =
6204 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->mbhc_cfg.calibration);
Joonwoo Park03324832012-03-19 19:36:16 -07006205
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006206 /* Turn on the override,
6207 * tabla_codec_setup_hs_polling requires override on */
6208 tabla_turn_onoff_override(codec, true);
Joonwoo Park03324832012-03-19 19:36:16 -07006209
6210 if (plug_det->t_ins_complete > 20)
6211 msleep(plug_det->t_ins_complete);
6212 else
6213 usleep_range(plug_det->t_ins_complete * 1000,
6214 plug_det->t_ins_complete * 1000);
6215
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006216 if (tabla->mbhc_cfg.gpio) {
6217 /* Turn off the override */
6218 tabla_turn_onoff_override(codec, false);
6219 if (tabla_hs_gpio_level_remove(tabla))
6220 pr_debug("%s: GPIO value is low when determining "
6221 "plug\n", __func__);
6222 else
6223 tabla_codec_decide_gpio_plug(codec);
6224 return;
6225 }
6226
Joonwoo Park41956722012-04-18 13:13:07 -07006227 plug_type = tabla_codec_get_plug_type(codec, tabla->mbhc_cfg.gpio ?
6228 true : false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006229 tabla_turn_onoff_override(codec, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006230
Joonwoo Park41956722012-04-18 13:13:07 -07006231 if (plug_type == PLUG_TYPE_INVALID) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006232 pr_debug("%s: Invalid plug type detected\n", __func__);
6233 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
6234 0x02, 0x02);
6235 tabla_codec_cleanup_hs_polling(codec);
6236 tabla_codec_enable_hs_detect(codec, 1,
6237 MBHC_USE_MB_TRIGGER |
6238 MBHC_USE_HPHL_TRIGGER, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006239 } else if (plug_type == PLUG_TYPE_HEADPHONE) {
Joonwoo Park03324832012-03-19 19:36:16 -07006240 pr_debug("%s: Headphone Detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006241 tabla_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
6242 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006243 tabla_codec_enable_hs_detect(codec, 0, 0, false);
Joonwoo Park41956722012-04-18 13:13:07 -07006244 } else if (plug_type == PLUG_TYPE_HEADSET) {
Joonwoo Park03324832012-03-19 19:36:16 -07006245 pr_debug("%s: Headset detected\n", __func__);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006246 tabla_codec_report_plug(codec, 1, SND_JACK_HEADSET);
6247
Joonwoo Park03324832012-03-19 19:36:16 -07006248 /* avoid false button press detect */
6249 msleep(50);
Joonwoo Park03324832012-03-19 19:36:16 -07006250 tabla_codec_start_hs_polling(codec);
Joonwoo Park03324832012-03-19 19:36:16 -07006251 }
6252}
6253
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006254/* called only from interrupt which is under codec_resource_lock acquisition */
6255static void tabla_hs_insert_irq_gpio(struct tabla_priv *priv, bool is_removal)
Bradley Rubincb1e2732011-06-23 16:49:20 -07006256{
Bradley Rubincb1e2732011-06-23 16:49:20 -07006257 struct snd_soc_codec *codec = priv->codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006258
6259 if (!is_removal) {
6260 pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
6261
6262 rmb();
6263 if (priv->lpi_enabled)
6264 msleep(100);
6265
6266 rmb();
6267 if (!priv->lpi_enabled) {
6268 pr_debug("%s: lpi is disabled\n", __func__);
6269 } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
6270 priv->mbhc_cfg.gpio_level_insert) {
6271 pr_debug("%s: Valid insertion, "
6272 "detect plug type\n", __func__);
6273 tabla_codec_decide_gpio_plug(codec);
6274 } else {
6275 pr_debug("%s: Invalid insertion, "
6276 "stop plug detection\n", __func__);
6277 }
6278 } else {
6279 pr_err("%s: GPIO used, invalid MBHC Removal\n", __func__);
6280 }
6281}
6282
6283/* called only from interrupt which is under codec_resource_lock acquisition */
6284static void tabla_hs_insert_irq_nogpio(struct tabla_priv *priv, bool is_removal,
6285 bool is_mb_trigger)
6286{
Joonwoo Park03324832012-03-19 19:36:16 -07006287 int ret;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006288 struct snd_soc_codec *codec = priv->codec;
6289 struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07006290
6291 if (is_removal) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006292 /* cancel possiblely running hs detect work */
6293 tabla_cancel_hs_detect_plug(priv);
6294
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006295 /*
6296 * If headphone is removed while playback is in progress,
6297 * it is possible that micbias will be switched to VDDIO.
6298 */
Joonwoo Park03324832012-03-19 19:36:16 -07006299 tabla_codec_switch_micbias(codec, 0);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006300 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006301 tabla_codec_shutdown_hs_removal_detect(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006302 tabla_codec_enable_hs_detect(codec, 1,
6303 MBHC_USE_MB_TRIGGER |
6304 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006305 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006306 } else if (is_mb_trigger && !is_removal) {
Joonwoo Park03324832012-03-19 19:36:16 -07006307 pr_debug("%s: Waiting for Headphone left trigger\n",
6308 __func__);
6309 wcd9xxx_lock_sleep(core);
6310 if (schedule_delayed_work(&priv->mbhc_insert_dwork,
6311 usecs_to_jiffies(1000000)) == 0) {
6312 pr_err("%s: mbhc_insert_dwork is already scheduled\n",
6313 __func__);
6314 wcd9xxx_unlock_sleep(core);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08006315 }
Joonwoo Park03324832012-03-19 19:36:16 -07006316 tabla_codec_enable_hs_detect(codec, 1, MBHC_USE_HPHL_TRIGGER,
6317 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006318 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006319 ret = cancel_delayed_work(&priv->mbhc_insert_dwork);
6320 if (ret != 0) {
6321 pr_debug("%s: Complete plug insertion, Detecting plug "
6322 "type\n", __func__);
6323 tabla_codec_detect_plug_type(codec);
6324 wcd9xxx_unlock_sleep(core);
6325 } else {
6326 wcd9xxx_enable_irq(codec->control_data,
6327 TABLA_IRQ_MBHC_INSERTION);
6328 pr_err("%s: Error detecting plug insertion\n",
6329 __func__);
6330 }
Joonwoo Park03324832012-03-19 19:36:16 -07006331 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006332}
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08006333
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006334static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
6335{
6336 bool is_mb_trigger, is_removal;
6337 struct tabla_priv *priv = data;
6338 struct snd_soc_codec *codec = priv->codec;
Bradley Rubincb1e2732011-06-23 16:49:20 -07006339
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006340 pr_debug("%s: enter\n", __func__);
6341 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
6342 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
6343
6344 is_mb_trigger = !!(snd_soc_read(codec, priv->mbhc_bias_regs.mbhc_reg) &
6345 0x10);
6346 is_removal = !!(snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02);
6347 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
6348
6349 /* Turn off both HPH and MIC line schmitt triggers */
6350 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6351 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
6352 snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6353
6354 if (priv->mbhc_cfg.gpio)
6355 tabla_hs_insert_irq_gpio(priv, is_removal);
6356 else
6357 tabla_hs_insert_irq_nogpio(priv, is_removal, is_mb_trigger);
6358
6359 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Bradley Rubincb1e2732011-06-23 16:49:20 -07006360 return IRQ_HANDLED;
6361}
6362
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006363static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
6364{
6365 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006366 const struct tabla_mbhc_plug_type_cfg *plug_type =
6367 TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->mbhc_cfg.calibration);
6368 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006369
6370 return (!(mic_mv > 10 && mic_mv < 80) && (mic_mv > plug_type->v_no_mic)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006371 && (mic_mv < v_hs_max)) ? true : false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006372}
6373
6374/* called under codec_resource_lock acquisition
6375 * returns true if mic voltage range is back to normal insertion
6376 * returns false either if timedout or removed */
6377static bool tabla_hs_remove_settle(struct snd_soc_codec *codec)
6378{
6379 int i;
6380 bool timedout, settled = false;
6381 s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
6382 short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
6383 unsigned long retry = 0, timeout;
6384 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006385 const s16 v_hs_max = tabla_get_current_v_hs_max(tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006386
6387 timeout = jiffies + msecs_to_jiffies(TABLA_HS_DETECT_PLUG_TIME_MS);
6388 while (!(timedout = time_after(jiffies, timeout))) {
6389 retry++;
6390 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6391 pr_debug("%s: GPIO indicates removal\n", __func__);
6392 break;
6393 }
6394
6395 if (tabla->mbhc_cfg.gpio) {
6396 if (retry > 1)
6397 msleep(250);
6398 else
6399 msleep(50);
6400 }
6401
6402 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6403 pr_debug("%s: GPIO indicates removal\n", __func__);
6404 break;
6405 }
6406
6407 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
6408 mb_v[i] = tabla_codec_sta_dce(codec, 1, true);
6409 mic_mv[i] = tabla_codec_sta_dce_v(codec, 1 , mb_v[i]);
6410 pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
6411 __func__, retry, mic_mv[i], mb_v[i]);
6412 }
6413
6414 if (tabla->mbhc_cfg.gpio && tabla_hs_gpio_level_remove(tabla)) {
6415 pr_debug("%s: GPIO indicates removal\n", __func__);
6416 break;
6417 }
6418
6419 if (tabla->current_plug == PLUG_TYPE_NONE) {
6420 pr_debug("%s : headset/headphone is removed\n",
6421 __func__);
6422 break;
6423 }
6424
6425 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
6426 if (!is_valid_mic_voltage(codec, mic_mv[i]))
6427 break;
6428
6429 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6430 pr_debug("%s: MIC voltage settled\n", __func__);
6431 settled = true;
6432 msleep(200);
6433 break;
6434 }
6435
6436 /* only for non-GPIO remove irq */
6437 if (!tabla->mbhc_cfg.gpio) {
6438 for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006439 if (mic_mv[i] < v_hs_max)
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006440 break;
6441 if (i == MBHC_NUM_DCE_PLUG_DETECT) {
6442 pr_debug("%s: Headset is removed\n", __func__);
6443 break;
6444 }
6445 }
6446 }
6447
6448 if (timedout)
6449 pr_debug("%s: Microphone did not settle in %d seconds\n",
6450 __func__, TABLA_HS_DETECT_PLUG_TIME_MS);
6451 return settled;
6452}
6453
6454/* called only from interrupt which is under codec_resource_lock acquisition */
6455static void tabla_hs_remove_irq_gpio(struct tabla_priv *priv)
6456{
6457 struct snd_soc_codec *codec = priv->codec;
6458
6459 if (tabla_hs_remove_settle(codec))
6460 tabla_codec_start_hs_polling(codec);
6461 pr_debug("%s: remove settle done\n", __func__);
6462}
6463
6464/* called only from interrupt which is under codec_resource_lock acquisition */
6465static void tabla_hs_remove_irq_nogpio(struct tabla_priv *priv)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006466{
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006467 short bias_value;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006468 bool removed = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006469 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08006470 const struct tabla_mbhc_general_cfg *generic =
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006471 TABLA_MBHC_CAL_GENERAL_PTR(priv->mbhc_cfg.calibration);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006472 int min_us = TABLA_FAKE_REMOVAL_MIN_PERIOD_MS * 1000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006473
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006474 if (priv->current_plug != PLUG_TYPE_HEADSET) {
6475 pr_debug("%s(): Headset is not inserted, ignore removal\n",
6476 __func__);
6477 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6478 0x08, 0x08);
6479 return;
6480 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006481
Joonwoo Park0976d012011-12-22 11:48:18 -08006482 usleep_range(generic->t_shutdown_plug_rem,
6483 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006484
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006485 do {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006486 bias_value = tabla_codec_sta_dce(codec, 1, true);
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006487 pr_debug("%s: DCE %d,%d, %d us left\n", __func__, bias_value,
6488 tabla_codec_sta_dce_v(codec, 1, bias_value), min_us);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006489 if (bias_value < tabla_get_current_v_ins(priv, false)) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006490 pr_debug("%s: checking false removal\n", __func__);
6491 msleep(500);
6492 removed = !tabla_hs_remove_settle(codec);
6493 pr_debug("%s: headset %sactually removed\n", __func__,
6494 removed ? "" : "not ");
Joonwoo Park6b9b03f2012-01-23 18:48:54 -08006495 break;
6496 }
6497 min_us -= priv->mbhc_data.t_dce;
6498 } while (min_us > 0);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07006499
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006500 if (removed) {
6501 /* cancel possiblely running hs detect work */
6502 tabla_cancel_hs_detect_plug(priv);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07006503 /*
6504 * If this removal is not false, first check the micbias
6505 * switch status and switch it to LDOH if it is already
6506 * switched to VDDIO.
6507 */
Joonwoo Park03324832012-03-19 19:36:16 -07006508 tabla_codec_switch_micbias(codec, 0);
Joonwoo Park03324832012-03-19 19:36:16 -07006509
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006510 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6511 tabla_codec_cleanup_hs_polling(codec);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006512 tabla_codec_enable_hs_detect(codec, 1,
6513 MBHC_USE_MB_TRIGGER |
6514 MBHC_USE_HPHL_TRIGGER,
Joonwoo Park03324832012-03-19 19:36:16 -07006515 true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006516 } else {
6517 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006518 }
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006519}
Joonwoo Park8b1f0982011-12-08 17:12:45 -08006520
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006521static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
6522{
6523 struct tabla_priv *priv = data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006524 bool vddio;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006525 pr_debug("%s: enter, removal interrupt\n", __func__);
6526
6527 TABLA_ACQUIRE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006528 vddio = (priv->mbhc_data.micb_mv != VDDIO_MICBIAS_MV &&
6529 priv->mbhc_micbias_switched);
6530 if (vddio)
6531 __tabla_codec_switch_micbias(priv->codec, 0, false, true);
6532
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006533 if (priv->mbhc_cfg.gpio)
6534 tabla_hs_remove_irq_gpio(priv);
6535 else
6536 tabla_hs_remove_irq_nogpio(priv);
6537
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006538 /* if driver turned off vddio switch and headset is not removed,
6539 * turn on the vddio switch back, if headset is removed then vddio
6540 * switch is off by time now and shouldn't be turn on again from here */
6541 if (vddio && priv->current_plug == PLUG_TYPE_HEADSET)
6542 __tabla_codec_switch_micbias(priv->codec, 1, true, true);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006543 TABLA_RELEASE_LOCK(priv->codec_resource_lock);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006544
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006545 return IRQ_HANDLED;
6546}
6547
Joonwoo Park03324832012-03-19 19:36:16 -07006548void mbhc_insert_work(struct work_struct *work)
6549{
6550 struct delayed_work *dwork;
6551 struct tabla_priv *tabla;
6552 struct snd_soc_codec *codec;
6553 struct wcd9xxx *tabla_core;
6554
6555 dwork = to_delayed_work(work);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006556 tabla = container_of(dwork, struct tabla_priv, mbhc_insert_dwork);
Joonwoo Park03324832012-03-19 19:36:16 -07006557 codec = tabla->codec;
6558 tabla_core = dev_get_drvdata(codec->dev->parent);
6559
6560 pr_debug("%s:\n", __func__);
6561
6562 /* Turn off both HPH and MIC line schmitt triggers */
6563 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
6564 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
6565 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
6566 wcd9xxx_disable_irq_sync(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
6567 tabla_codec_detect_plug_type(codec);
6568 wcd9xxx_unlock_sleep(tabla_core);
6569}
6570
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006571static void tabla_hs_gpio_handler(struct snd_soc_codec *codec)
6572{
6573 bool insert;
6574 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
6575 bool is_removed = false;
6576
6577 pr_debug("%s: enter\n", __func__);
6578
6579 tabla->in_gpio_handler = true;
6580 /* Wait here for debounce time */
6581 usleep_range(TABLA_GPIO_IRQ_DEBOUNCE_TIME_US,
6582 TABLA_GPIO_IRQ_DEBOUNCE_TIME_US);
6583
6584 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
6585
6586 /* cancel pending button press */
6587 if (tabla_cancel_btn_work(tabla))
6588 pr_debug("%s: button press is canceled\n", __func__);
6589
6590 insert = (gpio_get_value_cansleep(tabla->mbhc_cfg.gpio) ==
6591 tabla->mbhc_cfg.gpio_level_insert);
6592 if ((tabla->current_plug == PLUG_TYPE_NONE) && insert) {
6593 tabla->lpi_enabled = false;
6594 wmb();
6595
6596 /* cancel detect plug */
6597 tabla_cancel_hs_detect_plug(tabla);
6598
6599 /* Disable Mic Bias pull down and HPH Switch to GND */
6600 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01,
6601 0x00);
6602 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01, 0x00);
6603 tabla_codec_detect_plug_type(codec);
6604 } else if ((tabla->current_plug != PLUG_TYPE_NONE) && !insert) {
6605 tabla->lpi_enabled = false;
6606 wmb();
6607
6608 /* cancel detect plug */
6609 tabla_cancel_hs_detect_plug(tabla);
6610
6611 if (tabla->current_plug == PLUG_TYPE_HEADPHONE) {
6612 tabla_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
6613 is_removed = true;
6614 } else if (tabla->current_plug == PLUG_TYPE_HEADSET) {
6615 tabla_codec_pause_hs_polling(codec);
6616 tabla_codec_cleanup_hs_polling(codec);
6617 tabla_codec_report_plug(codec, 0, SND_JACK_HEADSET);
6618 is_removed = true;
6619 }
6620
6621 if (is_removed) {
6622 /* Enable Mic Bias pull down and HPH Switch to GND */
6623 snd_soc_update_bits(codec,
6624 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6625 0x01);
6626 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
6627 0x01);
6628 /* Make sure mic trigger is turned off */
6629 snd_soc_update_bits(codec,
6630 tabla->mbhc_bias_regs.ctl_reg,
6631 0x01, 0x01);
6632 snd_soc_update_bits(codec,
6633 tabla->mbhc_bias_regs.mbhc_reg,
6634 0x90, 0x00);
6635 /* Reset MBHC State Machine */
6636 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6637 0x08, 0x08);
6638 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL,
6639 0x08, 0x00);
6640 /* Turn off override */
6641 tabla_turn_onoff_override(codec, false);
6642 }
6643 }
6644
6645 tabla->in_gpio_handler = false;
6646 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
6647 pr_debug("%s: leave\n", __func__);
6648}
6649
6650static irqreturn_t tabla_mechanical_plug_detect_irq(int irq, void *data)
6651{
6652 int r = IRQ_HANDLED;
6653 struct snd_soc_codec *codec = data;
6654
6655 if (unlikely(wcd9xxx_lock_sleep(codec->control_data) == false)) {
6656 pr_warn("%s: failed to hold suspend\n", __func__);
6657 r = IRQ_NONE;
6658 } else {
6659 tabla_hs_gpio_handler(codec);
6660 wcd9xxx_unlock_sleep(codec->control_data);
6661 }
6662
6663 return r;
6664}
6665
6666static void mbhc_fw_read(struct work_struct *work)
6667{
6668 struct delayed_work *dwork;
6669 struct tabla_priv *tabla;
6670 struct snd_soc_codec *codec;
6671 const struct firmware *fw;
6672 int ret = -1, retry = 0, rc;
6673
6674 dwork = to_delayed_work(work);
6675 tabla = container_of(dwork, struct tabla_priv,
6676 mbhc_firmware_dwork);
6677 codec = tabla->codec;
6678
6679 while (retry < MBHC_FW_READ_ATTEMPTS) {
6680 retry++;
6681 pr_info("%s:Attempt %d to request MBHC firmware\n",
6682 __func__, retry);
6683 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
6684 codec->dev);
6685
6686 if (ret != 0) {
6687 usleep_range(MBHC_FW_READ_TIMEOUT,
6688 MBHC_FW_READ_TIMEOUT);
6689 } else {
6690 pr_info("%s: MBHC Firmware read succesful\n", __func__);
6691 break;
6692 }
6693 }
6694
6695 if (ret != 0) {
6696 pr_err("%s: Cannot load MBHC firmware use default cal\n",
6697 __func__);
6698 } else if (tabla_mbhc_fw_validate(fw) == false) {
6699 pr_err("%s: Invalid MBHC cal data size use default cal\n",
6700 __func__);
6701 release_firmware(fw);
6702 } else {
6703 tabla->mbhc_cfg.calibration = (void *)fw->data;
6704 tabla->mbhc_fw = fw;
6705 }
6706
6707 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
6708 tabla_mbhc_init(codec);
6709 tabla_mbhc_cal(codec);
6710 tabla_mbhc_calc_thres(codec);
6711 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
6712 tabla_codec_calibrate_hs_polling(codec);
6713 if (!tabla->mbhc_cfg.gpio) {
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006714 rc = tabla_codec_enable_hs_detect(codec, 1,
6715 MBHC_USE_MB_TRIGGER |
6716 MBHC_USE_HPHL_TRIGGER,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006717 false);
6718
6719 if (IS_ERR_VALUE(rc))
6720 pr_err("%s: Failed to setup MBHC detection\n",
6721 __func__);
6722 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006723 /* Enable Mic Bias pull down and HPH Switch to GND */
6724 snd_soc_update_bits(codec,
6725 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6726 0x01);
6727 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
6728 0x01);
6729 INIT_WORK(&tabla->hs_correct_plug_work,
6730 tabla_hs_correct_gpio_plug);
6731 }
6732
6733}
6734
Joonwoo Park03324832012-03-19 19:36:16 -07006735int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006736 const struct tabla_mbhc_config *cfg)
Joonwoo Park03324832012-03-19 19:36:16 -07006737{
6738 struct tabla_priv *tabla;
6739 int rc = 0;
6740
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006741 if (!codec || !cfg->calibration) {
Joonwoo Park03324832012-03-19 19:36:16 -07006742 pr_err("Error: no codec or calibration\n");
6743 return -EINVAL;
6744 }
6745
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006746 if (cfg->mclk_rate != TABLA_MCLK_RATE_12288KHZ) {
6747 if (cfg->mclk_rate == TABLA_MCLK_RATE_9600KHZ)
Joonwoo Park03324832012-03-19 19:36:16 -07006748 pr_err("Error: clock rate %dHz is not yet supported\n",
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006749 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07006750 else
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006751 pr_err("Error: unsupported clock rate %d\n",
6752 cfg->mclk_rate);
Joonwoo Park03324832012-03-19 19:36:16 -07006753 return -EINVAL;
6754 }
6755
6756 tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006757 tabla->mbhc_cfg = *cfg;
6758 tabla->in_gpio_handler = false;
6759 tabla->current_plug = PLUG_TYPE_NONE;
6760 tabla->lpi_enabled = false;
Joonwoo Park03324832012-03-19 19:36:16 -07006761 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
6762
6763 /* Put CFILT in fast mode by default */
6764 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
6765 0x40, TABLA_CFILT_FAST_MODE);
6766 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
6767 INIT_DELAYED_WORK(&tabla->mbhc_btn_dwork, btn_lpress_fn);
6768 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
6769 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
6770 INIT_DELAYED_WORK(&tabla->mbhc_insert_dwork, mbhc_insert_work);
6771
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006772 if (!tabla->mbhc_cfg.read_fw_bin) {
6773 tabla->mbhc_cfg.mclk_cb_fn(codec, 1, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006774 tabla_mbhc_init(codec);
6775 tabla_mbhc_cal(codec);
6776 tabla_mbhc_calc_thres(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006777 tabla->mbhc_cfg.mclk_cb_fn(codec, 0, false);
Joonwoo Park03324832012-03-19 19:36:16 -07006778 tabla_codec_calibrate_hs_polling(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006779 if (!tabla->mbhc_cfg.gpio) {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006780 rc = tabla_codec_enable_hs_detect(codec, 1,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07006781 MBHC_USE_MB_TRIGGER |
6782 MBHC_USE_HPHL_TRIGGER,
6783 false);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006784 } else {
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006785 /* Enable Mic Bias pull down and HPH Switch to GND */
6786 snd_soc_update_bits(codec,
6787 tabla->mbhc_bias_regs.ctl_reg, 0x01,
6788 0x01);
6789 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x01,
6790 0x01);
6791 INIT_WORK(&tabla->hs_correct_plug_work,
6792 tabla_hs_correct_gpio_plug);
6793 }
Joonwoo Park03324832012-03-19 19:36:16 -07006794 } else {
6795 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
6796 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
6797 }
6798
6799 if (!IS_ERR_VALUE(rc)) {
6800 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
6801 wcd9xxx_enable_irq(codec->control_data,
6802 TABLA_IRQ_HPH_PA_OCPL_FAULT);
6803 wcd9xxx_enable_irq(codec->control_data,
6804 TABLA_IRQ_HPH_PA_OCPR_FAULT);
6805 }
6806
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07006807 if (!IS_ERR_VALUE(rc) && tabla->mbhc_cfg.gpio) {
6808 rc = request_threaded_irq(tabla->mbhc_cfg.gpio_irq, NULL,
6809 tabla_mechanical_plug_detect_irq,
6810 (IRQF_TRIGGER_RISING |
6811 IRQF_TRIGGER_FALLING),
6812 "tabla-gpio", codec);
6813 if (!IS_ERR_VALUE(rc)) {
6814 rc = enable_irq_wake(tabla->mbhc_cfg.gpio_irq);
6815 /* Bootup time detection */
6816 tabla_hs_gpio_handler(codec);
6817 }
6818 }
6819
Joonwoo Park03324832012-03-19 19:36:16 -07006820 return rc;
6821}
6822EXPORT_SYMBOL_GPL(tabla_hs_detect);
6823
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006824static unsigned long slimbus_value;
6825
6826static irqreturn_t tabla_slimbus_irq(int irq, void *data)
6827{
6828 struct tabla_priv *priv = data;
6829 struct snd_soc_codec *codec = priv->codec;
6830 int i, j;
6831 u8 val;
6832
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306833 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
6834 slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006835 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
6836 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306837 val = wcd9xxx_interface_reg_read(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006838 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
6839 if (val & 0x1)
6840 pr_err_ratelimited("overflow error on port %x,"
6841 " value %x\n", i*8 + j, val);
6842 if (val & 0x2)
6843 pr_err_ratelimited("underflow error on port %x,"
6844 " value %x\n", i*8 + j, val);
6845 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306846 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006847 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
6848 }
6849
6850 return IRQ_HANDLED;
6851}
6852
Patrick Lai3043fba2011-08-01 14:15:57 -07006853
6854static int tabla_handle_pdata(struct tabla_priv *tabla)
6855{
6856 struct snd_soc_codec *codec = tabla->codec;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05306857 struct wcd9xxx_pdata *pdata = tabla->pdata;
Patrick Lai3043fba2011-08-01 14:15:57 -07006858 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05306859 u8 leg_mode = pdata->amic_settings.legacy_mode;
6860 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
6861 u8 txfe_buff = pdata->amic_settings.txfe_buff;
6862 u8 flag = pdata->amic_settings.use_pdata;
6863 u8 i = 0, j = 0;
6864 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07006865
6866 if (!pdata) {
6867 rc = -ENODEV;
6868 goto done;
6869 }
6870
6871 /* Make sure settings are correct */
6872 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
6873 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
6874 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
6875 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
6876 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
6877 rc = -EINVAL;
6878 goto done;
6879 }
6880
6881 /* figure out k value */
6882 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
6883 pdata->micbias.cfilt1_mv);
6884 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
6885 pdata->micbias.cfilt2_mv);
6886 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
6887 pdata->micbias.cfilt3_mv);
6888
6889 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
6890 rc = -EINVAL;
6891 goto done;
6892 }
6893
6894 /* Set voltage level and always use LDO */
6895 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
6896 (pdata->micbias.ldoh_v << 2));
6897
6898 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
6899 (k1 << 2));
6900 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
6901 (k2 << 2));
6902 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
6903 (k3 << 2));
6904
6905 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
6906 (pdata->micbias.bias1_cfilt_sel << 5));
6907 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
6908 (pdata->micbias.bias2_cfilt_sel << 5));
6909 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
6910 (pdata->micbias.bias3_cfilt_sel << 5));
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08006911 snd_soc_update_bits(codec, tabla->reg_addr.micb_4_ctl, 0x60,
6912 (pdata->micbias.bias4_cfilt_sel << 5));
Patrick Lai3043fba2011-08-01 14:15:57 -07006913
Santosh Mardi22920282011-10-26 02:38:40 +05306914 for (i = 0; i < 6; j++, i += 2) {
6915 if (flag & (0x01 << i)) {
6916 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
6917 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
6918 val_txfe = val_txfe |
6919 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
6920 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
6921 0x10, value);
6922 snd_soc_update_bits(codec,
6923 TABLA_A_TX_1_2_TEST_EN + j * 10,
6924 0x30, val_txfe);
6925 }
6926 if (flag & (0x01 << (i + 1))) {
6927 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
6928 val_txfe = (txfe_bypass &
6929 (0x01 << (i + 1))) ? 0x02 : 0x00;
6930 val_txfe |= (txfe_buff &
6931 (0x01 << (i + 1))) ? 0x01 : 0x00;
6932 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
6933 0x01, value);
6934 snd_soc_update_bits(codec,
6935 TABLA_A_TX_1_2_TEST_EN + j * 10,
6936 0x03, val_txfe);
6937 }
6938 }
6939 if (flag & 0x40) {
6940 value = (leg_mode & 0x40) ? 0x10 : 0x00;
6941 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
6942 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
6943 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
6944 0x13, value);
6945 }
Patrick Lai49efeac2011-11-03 11:01:12 -07006946
6947 if (pdata->ocp.use_pdata) {
6948 /* not defined in CODEC specification */
6949 if (pdata->ocp.hph_ocp_limit == 1 ||
6950 pdata->ocp.hph_ocp_limit == 5) {
6951 rc = -EINVAL;
6952 goto done;
6953 }
6954 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
6955 0x0F, pdata->ocp.num_attempts);
6956 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
6957 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
6958 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
6959 0xE0, (pdata->ocp.hph_ocp_limit << 5));
6960 }
Joonwoo Park03324832012-03-19 19:36:16 -07006961
6962 for (i = 0; i < ARRAY_SIZE(pdata->regulator); i++) {
6963 if (!strncmp(pdata->regulator[i].name, "CDC_VDDA_RX", 11)) {
6964 if (pdata->regulator[i].min_uV == 1800000 &&
6965 pdata->regulator[i].max_uV == 1800000) {
6966 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
6967 0x1C);
6968 } else if (pdata->regulator[i].min_uV == 2200000 &&
6969 pdata->regulator[i].max_uV == 2200000) {
6970 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL,
6971 0x1E);
6972 } else {
6973 pr_err("%s: unsupported CDC_VDDA_RX voltage "
6974 "min %d, max %d\n", __func__,
6975 pdata->regulator[i].min_uV,
6976 pdata->regulator[i].max_uV);
6977 rc = -EINVAL;
6978 }
6979 break;
6980 }
6981 }
Patrick Lai3043fba2011-08-01 14:15:57 -07006982done:
6983 return rc;
6984}
6985
Kiran Kandi1f6fd722011-08-11 10:36:11 -07006986static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
6987
6988 /* Tabla 1.1 MICBIAS changes */
6989 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
6990 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
6991 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
Kiran Kandi1f6fd722011-08-11 10:36:11 -07006992
6993 /* Tabla 1.1 HPH changes */
6994 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
6995 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
6996
6997 /* Tabla 1.1 EAR PA changes */
6998 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
6999 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
7000 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
7001
7002 /* Tabla 1.1 Lineout_5 Changes */
7003 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
7004
7005 /* Tabla 1.1 RX Changes */
7006 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
7007 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
7008 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
7009 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
7010 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
7011 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
7012 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
7013
7014 /* Tabla 1.1 RX1 and RX2 Changes */
7015 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
7016 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
7017
7018 /* Tabla 1.1 RX3 to RX7 Changes */
7019 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
7020 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
7021 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
7022 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
7023 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
7024
7025 /* Tabla 1.1 CLASSG Changes */
7026 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
7027};
7028
7029static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007030 /* Tabla 2.0 MICBIAS changes */
7031 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
7032};
7033
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007034static const struct tabla_reg_mask_val tabla_1_x_only_reg_2_0_defaults[] = {
7035 TABLA_REG_VAL(TABLA_1_A_MICB_4_INT_RBIAS, 0x24),
7036};
7037
7038static const struct tabla_reg_mask_val tabla_2_only_reg_2_0_defaults[] = {
7039 TABLA_REG_VAL(TABLA_2_A_MICB_4_INT_RBIAS, 0x24),
7040};
7041
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007042static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
7043{
7044 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307045 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007046
7047 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
7048 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
7049 tabla_1_1_reg_defaults[i].val);
7050
7051 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
7052 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
7053 tabla_2_0_reg_defaults[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007054
7055 if (TABLA_IS_1_X(tabla_core->version)) {
7056 for (i = 0; i < ARRAY_SIZE(tabla_1_x_only_reg_2_0_defaults);
7057 i++)
7058 snd_soc_write(codec,
7059 tabla_1_x_only_reg_2_0_defaults[i].reg,
7060 tabla_1_x_only_reg_2_0_defaults[i].val);
7061 } else {
7062 for (i = 0; i < ARRAY_SIZE(tabla_2_only_reg_2_0_defaults); i++)
7063 snd_soc_write(codec,
7064 tabla_2_only_reg_2_0_defaults[i].reg,
7065 tabla_2_only_reg_2_0_defaults[i].val);
7066 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007067}
7068
7069static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08007070 /* Initialize current threshold to 350MA
7071 * number of wait and run cycles to 4096
7072 */
Patrick Lai49efeac2011-11-03 11:01:12 -07007073 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08007074 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007075
Santosh Mardi32171012011-10-28 23:32:06 +05307076 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
7077
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007078 /* Initialize gain registers to use register gain */
7079 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
7080 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
7081 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
7082 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
7083 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
7084 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
7085
7086 /* Initialize mic biases to differential mode */
7087 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
7088 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
7089 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007090
7091 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
7092
7093 /* Use 16 bit sample size for TX1 to TX6 */
7094 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
7095 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
7096 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
7097 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
7098 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
7099 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
7100
7101 /* Use 16 bit sample size for TX7 to TX10 */
7102 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
7103 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
7104 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
7105 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
7106
7107 /* Use 16 bit sample size for RX */
7108 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
7109 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
7110
7111 /*enable HPF filter for TX paths */
7112 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
7113 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
7114 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
7115 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
7116 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
7117 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
7118 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
7119 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
7120 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
7121 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
7122};
7123
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007124static const struct tabla_reg_mask_val tabla_1_x_codec_reg_init_val[] = {
7125 /* Initialize mic biases to differential mode */
7126 {TABLA_1_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7127};
7128
7129static const struct tabla_reg_mask_val tabla_2_higher_codec_reg_init_val[] = {
7130 /* Initialize mic biases to differential mode */
7131 {TABLA_2_A_MICB_4_INT_RBIAS, 0x24, 0x24},
7132};
7133
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007134static void tabla_codec_init_reg(struct snd_soc_codec *codec)
7135{
7136 u32 i;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307137 struct wcd9xxx *tabla_core = dev_get_drvdata(codec->dev->parent);
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007138
7139 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
7140 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
7141 tabla_codec_reg_init_val[i].mask,
7142 tabla_codec_reg_init_val[i].val);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007143 if (TABLA_IS_1_X(tabla_core->version)) {
7144 for (i = 0; i < ARRAY_SIZE(tabla_1_x_codec_reg_init_val); i++)
7145 snd_soc_update_bits(codec,
7146 tabla_1_x_codec_reg_init_val[i].reg,
7147 tabla_1_x_codec_reg_init_val[i].mask,
7148 tabla_1_x_codec_reg_init_val[i].val);
7149 } else {
7150 for (i = 0; i < ARRAY_SIZE(tabla_2_higher_codec_reg_init_val);
7151 i++)
7152 snd_soc_update_bits(codec,
7153 tabla_2_higher_codec_reg_init_val[i].reg,
7154 tabla_2_higher_codec_reg_init_val[i].mask,
7155 tabla_2_higher_codec_reg_init_val[i].val);
7156 }
7157}
7158
7159static void tabla_update_reg_address(struct tabla_priv *priv)
7160{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307161 struct wcd9xxx *tabla_core = dev_get_drvdata(priv->codec->dev->parent);
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007162 struct tabla_reg_address *reg_addr = &priv->reg_addr;
7163
7164 if (TABLA_IS_1_X(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007165 reg_addr->micb_4_mbhc = TABLA_1_A_MICB_4_MBHC;
7166 reg_addr->micb_4_int_rbias = TABLA_1_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007167 reg_addr->micb_4_ctl = TABLA_1_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007168 } else if (TABLA_IS_2_0(tabla_core->version)) {
Joonwoo Parkcb7c8922012-02-16 23:12:59 -08007169 reg_addr->micb_4_mbhc = TABLA_2_A_MICB_4_MBHC;
7170 reg_addr->micb_4_int_rbias = TABLA_2_A_MICB_4_INT_RBIAS;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007171 reg_addr->micb_4_ctl = TABLA_2_A_MICB_4_CTL;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007172 }
Kiran Kandi1f6fd722011-08-11 10:36:11 -07007173}
7174
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007175#ifdef CONFIG_DEBUG_FS
7176static int codec_debug_open(struct inode *inode, struct file *file)
7177{
7178 file->private_data = inode->i_private;
7179 return 0;
7180}
7181
7182static ssize_t codec_debug_write(struct file *filp,
7183 const char __user *ubuf, size_t cnt, loff_t *ppos)
7184{
7185 char lbuf[32];
7186 char *buf;
7187 int rc;
7188 struct tabla_priv *tabla = filp->private_data;
7189
7190 if (cnt > sizeof(lbuf) - 1)
7191 return -EINVAL;
7192
7193 rc = copy_from_user(lbuf, ubuf, cnt);
7194 if (rc)
7195 return -EFAULT;
7196
7197 lbuf[cnt] = '\0';
7198 buf = (char *)lbuf;
7199 tabla->no_mic_headset_override = (*strsep(&buf, " ") == '0') ?
7200 false : true;
7201 return rc;
7202}
7203
7204static ssize_t codec_mbhc_debug_read(struct file *file, char __user *buf,
7205 size_t count, loff_t *pos)
7206{
7207 const int size = 768;
7208 char buffer[size];
7209 int n = 0;
7210 struct tabla_priv *tabla = file->private_data;
7211 struct snd_soc_codec *codec = tabla->codec;
7212 const struct mbhc_internal_cal_data *p = &tabla->mbhc_data;
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007213 const s16 v_ins_hu_cur = tabla_get_current_v_ins(tabla, true);
7214 const s16 v_ins_h_cur = tabla_get_current_v_ins(tabla, false);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007215
7216 n = scnprintf(buffer, size - n, "dce_z = %x(%dmv)\n", p->dce_z,
7217 tabla_codec_sta_dce_v(codec, 1, p->dce_z));
7218 n += scnprintf(buffer + n, size - n, "dce_mb = %x(%dmv)\n",
7219 p->dce_mb, tabla_codec_sta_dce_v(codec, 1, p->dce_mb));
7220 n += scnprintf(buffer + n, size - n, "sta_z = %x(%dmv)\n",
7221 p->sta_z, tabla_codec_sta_dce_v(codec, 0, p->sta_z));
7222 n += scnprintf(buffer + n, size - n, "sta_mb = %x(%dmv)\n",
7223 p->sta_mb, tabla_codec_sta_dce_v(codec, 0, p->sta_mb));
7224 n += scnprintf(buffer + n, size - n, "t_dce = %x\n", p->t_dce);
7225 n += scnprintf(buffer + n, size - n, "t_sta = %x\n", p->t_sta);
7226 n += scnprintf(buffer + n, size - n, "micb_mv = %dmv\n",
7227 p->micb_mv);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007228 n += scnprintf(buffer + n, size - n, "v_ins_hu = %x(%dmv)%s\n",
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007229 p->v_ins_hu,
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007230 tabla_codec_sta_dce_v(codec, 0, p->v_ins_hu),
7231 p->v_ins_hu == v_ins_hu_cur ? "*" : "");
7232 n += scnprintf(buffer + n, size - n, "v_ins_h = %x(%dmv)%s\n",
7233 p->v_ins_h, tabla_codec_sta_dce_v(codec, 1, p->v_ins_h),
7234 p->v_ins_h == v_ins_h_cur ? "*" : "");
7235 n += scnprintf(buffer + n, size - n, "adj_v_ins_hu = %x(%dmv)%s\n",
7236 p->adj_v_ins_hu,
7237 tabla_codec_sta_dce_v(codec, 0, p->adj_v_ins_hu),
7238 p->adj_v_ins_hu == v_ins_hu_cur ? "*" : "");
7239 n += scnprintf(buffer + n, size - n, "adj_v_ins_h = %x(%dmv)%s\n",
7240 p->adj_v_ins_h,
7241 tabla_codec_sta_dce_v(codec, 1, p->adj_v_ins_h),
7242 p->adj_v_ins_h == v_ins_h_cur ? "*" : "");
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007243 n += scnprintf(buffer + n, size - n, "v_b1_hu = %x(%dmv)\n",
7244 p->v_b1_hu, tabla_codec_sta_dce_v(codec, 0, p->v_b1_hu));
7245 n += scnprintf(buffer + n, size - n, "v_b1_h = %x(%dmv)\n",
7246 p->v_b1_h, tabla_codec_sta_dce_v(codec, 1, p->v_b1_h));
7247 n += scnprintf(buffer + n, size - n, "v_b1_huc = %x(%dmv)\n",
7248 p->v_b1_huc,
7249 tabla_codec_sta_dce_v(codec, 1, p->v_b1_huc));
7250 n += scnprintf(buffer + n, size - n, "v_brh = %x(%dmv)\n",
7251 p->v_brh, tabla_codec_sta_dce_v(codec, 1, p->v_brh));
7252 n += scnprintf(buffer + n, size - n, "v_brl = %x(%dmv)\n", p->v_brl,
7253 tabla_codec_sta_dce_v(codec, 0, p->v_brl));
7254 n += scnprintf(buffer + n, size - n, "v_no_mic = %x(%dmv)\n",
7255 p->v_no_mic,
7256 tabla_codec_sta_dce_v(codec, 0, p->v_no_mic));
7257 n += scnprintf(buffer + n, size - n, "npoll = %d\n", p->npoll);
7258 n += scnprintf(buffer + n, size - n, "nbounce_wait = %d\n",
7259 p->nbounce_wait);
Joonwoo Parkcf473b42012-03-29 19:48:16 -07007260 n += scnprintf(buffer + n, size - n, "v_inval_ins_low = %d\n",
7261 p->v_inval_ins_low);
7262 n += scnprintf(buffer + n, size - n, "v_inval_ins_high = %d\n",
7263 p->v_inval_ins_high);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007264 buffer[n] = 0;
7265
7266 return simple_read_from_buffer(buf, count, pos, buffer, n);
7267}
7268
7269static const struct file_operations codec_debug_ops = {
7270 .open = codec_debug_open,
7271 .write = codec_debug_write,
7272};
7273
7274static const struct file_operations codec_mbhc_debug_ops = {
7275 .open = codec_debug_open,
7276 .read = codec_mbhc_debug_read,
7277};
7278#endif
7279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007280static int tabla_codec_probe(struct snd_soc_codec *codec)
7281{
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307282 struct wcd9xxx *control;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007283 struct tabla_priv *tabla;
7284 struct snd_soc_dapm_context *dapm = &codec->dapm;
7285 int ret = 0;
7286 int i;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007287 int ch_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007288
7289 codec->control_data = dev_get_drvdata(codec->dev->parent);
7290 control = codec->control_data;
7291
7292 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
7293 if (!tabla) {
7294 dev_err(codec->dev, "Failed to allocate private data\n");
7295 return -ENOMEM;
7296 }
Kiran Kandid8cf5212012-03-02 15:34:53 -08007297 for (i = 0 ; i < NUM_DECIMATORS; i++) {
7298 tx_hpf_work[i].tabla = tabla;
7299 tx_hpf_work[i].decimator = i + 1;
7300 INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
7301 tx_hpf_corner_freq_callback);
7302 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007303
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007304 /* Make sure mbhc micbias register addresses are zeroed out */
7305 memset(&tabla->mbhc_bias_regs, 0,
7306 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07007307 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07007308
Joonwoo Park0976d012011-12-22 11:48:18 -08007309 /* Make sure mbhc intenal calibration data is zeroed out */
7310 memset(&tabla->mbhc_data, 0,
7311 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08007312 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08007313 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
7314 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007315 snd_soc_codec_set_drvdata(codec, tabla);
7316
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07007317 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007318 tabla->bandgap_type = TABLA_BANDGAP_OFF;
7319 tabla->clock_active = false;
7320 tabla->config_mode_active = false;
7321 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08007322 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07007323 tabla->no_mic_headset_override = false;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007324 tabla->hs_polling_irq_prepared = false;
7325 mutex_init(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007326 tabla->codec = codec;
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007327 tabla->mbhc_state = MBHC_STATE_NONE;
Joonwoo Park03324832012-03-19 19:36:16 -07007328 tabla->mbhc_last_resume = 0;
Kuirong Wang0f8ade32012-02-27 16:29:45 -08007329 for (i = 0; i < COMPANDER_MAX; i++) {
7330 tabla->comp_enabled[i] = 0;
7331 tabla->comp_fs[i] = COMPANDER_FS_48KHZ;
7332 }
Patrick Lai3043fba2011-08-01 14:15:57 -07007333 tabla->pdata = dev_get_platdata(codec->dev->parent);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307334 tabla->intf_type = wcd9xxx_get_intf_type();
Bhalchandra Gajareb0f15132012-02-07 15:00:21 -08007335 tabla->aux_pga_cnt = 0;
7336 tabla->aux_l_gain = 0x1F;
7337 tabla->aux_r_gain = 0x1F;
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007338 tabla_update_reg_address(tabla);
Santosh Mardi22920282011-10-26 02:38:40 +05307339 tabla_update_reg_defaults(codec);
7340 tabla_codec_init_reg(codec);
Santosh Mardi22920282011-10-26 02:38:40 +05307341 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07007342 if (IS_ERR_VALUE(ret)) {
7343 pr_err("%s: bad pdata\n", __func__);
7344 goto err_pdata;
7345 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007346
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007347 snd_soc_add_controls(codec, tabla_snd_controls,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007348 ARRAY_SIZE(tabla_snd_controls));
7349 if (TABLA_IS_1_X(control->version))
7350 snd_soc_add_controls(codec, tabla_1_x_snd_controls,
7351 ARRAY_SIZE(tabla_1_x_snd_controls));
7352 else
7353 snd_soc_add_controls(codec, tabla_2_higher_snd_controls,
7354 ARRAY_SIZE(tabla_2_higher_snd_controls));
7355
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007356 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007357 ARRAY_SIZE(tabla_dapm_widgets));
7358 if (TABLA_IS_1_X(control->version))
7359 snd_soc_dapm_new_controls(dapm, tabla_1_x_dapm_widgets,
7360 ARRAY_SIZE(tabla_1_x_dapm_widgets));
7361 else
7362 snd_soc_dapm_new_controls(dapm, tabla_2_higher_dapm_widgets,
7363 ARRAY_SIZE(tabla_2_higher_dapm_widgets));
7364
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307365 if (tabla->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
Santosh Mardie15e2302011-11-15 10:39:23 +05307366 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
7367 ARRAY_SIZE(tabla_dapm_i2s_widgets));
7368 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
7369 ARRAY_SIZE(audio_i2s_map));
7370 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007371 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07007372
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007373 if (TABLA_IS_1_X(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007374 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007375 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
7376 } else if (TABLA_IS_2_0(control->version)) {
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007377 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
Joonwoo Park6c1ebb62012-01-16 19:08:43 -08007378 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007379 } else {
7380 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307381 __func__, control->version);
Kiran Kandi7a9fd902011-11-14 13:51:45 -08007382 goto err_pdata;
7383 }
7384
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007385 snd_soc_dapm_sync(dapm);
7386
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307387 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007388 tabla_hs_insert_irq, "Headset insert detect", tabla);
7389 if (ret) {
7390 pr_err("%s: Failed to request irq %d\n", __func__,
7391 TABLA_IRQ_MBHC_INSERTION);
7392 goto err_insert_irq;
7393 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307394 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007395
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307396 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007397 tabla_hs_remove_irq, "Headset remove detect", tabla);
7398 if (ret) {
7399 pr_err("%s: Failed to request irq %d\n", __func__,
7400 TABLA_IRQ_MBHC_REMOVAL);
7401 goto err_remove_irq;
7402 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007403
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307404 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07007405 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007406 if (ret) {
7407 pr_err("%s: Failed to request irq %d\n", __func__,
7408 TABLA_IRQ_MBHC_POTENTIAL);
7409 goto err_potential_irq;
7410 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007411
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307412 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
Bradley Rubincb1e2732011-06-23 16:49:20 -07007413 tabla_release_handler, "Button Release detect", tabla);
7414 if (ret) {
7415 pr_err("%s: Failed to request irq %d\n", __func__,
7416 TABLA_IRQ_MBHC_RELEASE);
7417 goto err_release_irq;
7418 }
7419
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307420 ret = wcd9xxx_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007421 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
7422 if (ret) {
7423 pr_err("%s: Failed to request irq %d\n", __func__,
7424 TABLA_IRQ_SLIMBUS);
7425 goto err_slimbus_irq;
7426 }
7427
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307428 for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
7429 wcd9xxx_interface_reg_write(codec->control_data,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007430 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
7431
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307432 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07007433 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
7434 "HPH_L OCP detect", tabla);
7435 if (ret) {
7436 pr_err("%s: Failed to request irq %d\n", __func__,
7437 TABLA_IRQ_HPH_PA_OCPL_FAULT);
7438 goto err_hphl_ocp_irq;
7439 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307440 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07007441
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307442 ret = wcd9xxx_request_irq(codec->control_data,
Patrick Lai49efeac2011-11-03 11:01:12 -07007443 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
7444 "HPH_R OCP detect", tabla);
7445 if (ret) {
7446 pr_err("%s: Failed to request irq %d\n", __func__,
7447 TABLA_IRQ_HPH_PA_OCPR_FAULT);
7448 goto err_hphr_ocp_irq;
7449 }
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307450 wcd9xxx_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007451 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++) {
7452 switch (tabla_dai[i].id) {
7453 case AIF1_PB:
7454 ch_cnt = tabla_dai[i].playback.channels_max;
7455 break;
7456 case AIF1_CAP:
7457 ch_cnt = tabla_dai[i].capture.channels_max;
7458 break;
Neema Shettyd3a89262012-02-16 10:23:50 -08007459 case AIF2_PB:
7460 ch_cnt = tabla_dai[i].playback.channels_max;
7461 break;
Kiran Kandi1e6371d2012-03-29 11:48:57 -07007462 case AIF2_CAP:
7463 ch_cnt = tabla_dai[i].capture.channels_max;
7464 break;
Neema Shetty3fb1b802012-04-27 13:53:24 -07007465 case AIF3_CAP:
7466 ch_cnt = tabla_dai[i].capture.channels_max;
7467 break;
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007468 default:
7469 continue;
7470 }
7471 tabla->dai[i].ch_num = kzalloc((sizeof(unsigned int)*
7472 ch_cnt), GFP_KERNEL);
7473 }
Patrick Lai49efeac2011-11-03 11:01:12 -07007474
Bradley Rubincb3950a2011-08-18 13:07:26 -07007475#ifdef CONFIG_DEBUG_FS
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007476 if (ret == 0) {
7477 tabla->debugfs_poke =
7478 debugfs_create_file("TRRS", S_IFREG | S_IRUGO, NULL, tabla,
7479 &codec_debug_ops);
7480 tabla->debugfs_mbhc =
7481 debugfs_create_file("tabla_mbhc", S_IFREG | S_IRUGO,
7482 NULL, tabla, &codec_mbhc_debug_ops);
7483 }
Bradley Rubincb3950a2011-08-18 13:07:26 -07007484#endif
7485
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007486 return ret;
7487
Patrick Lai49efeac2011-11-03 11:01:12 -07007488err_hphr_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307489 wcd9xxx_free_irq(codec->control_data,
7490 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
Patrick Lai49efeac2011-11-03 11:01:12 -07007491err_hphl_ocp_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307492 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007493err_slimbus_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307494 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07007495err_release_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307496 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007497err_potential_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307498 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007499err_remove_irq:
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307500 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007501err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07007502err_pdata:
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007503 mutex_destroy(&tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007504 kfree(tabla);
7505 return ret;
7506}
7507static int tabla_codec_remove(struct snd_soc_codec *codec)
7508{
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007509 int i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007510 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307511 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
7512 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
7513 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
7514 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
7515 wcd9xxx_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007516 TABLA_ACQUIRE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007517 tabla_codec_disable_clock_block(codec);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007518 TABLA_RELEASE_LOCK(tabla->codec_resource_lock);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007519 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08007520 if (tabla->mbhc_fw)
7521 release_firmware(tabla->mbhc_fw);
Bharath Ramachandramurthy9c79f132011-11-28 11:18:57 -08007522 for (i = 0; i < ARRAY_SIZE(tabla_dai); i++)
7523 kfree(tabla->dai[i].ch_num);
Joonwoo Parkd7cf2e92012-03-19 19:38:23 -07007524 mutex_destroy(&tabla->codec_resource_lock);
Joonwoo Park179b9ec2012-03-26 10:56:20 -07007525#ifdef CONFIG_DEBUG_FS
7526 debugfs_remove(tabla->debugfs_poke);
7527 debugfs_remove(tabla->debugfs_mbhc);
7528#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007529 kfree(tabla);
7530 return 0;
7531}
7532static struct snd_soc_codec_driver soc_codec_dev_tabla = {
7533 .probe = tabla_codec_probe,
7534 .remove = tabla_codec_remove,
7535 .read = tabla_read,
7536 .write = tabla_write,
7537
7538 .readable_register = tabla_readable,
7539 .volatile_register = tabla_volatile,
7540
7541 .reg_cache_size = TABLA_CACHE_SIZE,
7542 .reg_cache_default = tabla_reg_defaults,
7543 .reg_word_size = 1,
7544};
Bradley Rubincb3950a2011-08-18 13:07:26 -07007545
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007546#ifdef CONFIG_PM
7547static int tabla_suspend(struct device *dev)
7548{
Joonwoo Park816b8e62012-01-23 16:03:21 -08007549 dev_dbg(dev, "%s: system suspend\n", __func__);
7550 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007551}
7552
7553static int tabla_resume(struct device *dev)
7554{
Joonwoo Park03324832012-03-19 19:36:16 -07007555 struct platform_device *pdev = to_platform_device(dev);
7556 struct tabla_priv *tabla = platform_get_drvdata(pdev);
Joonwoo Park816b8e62012-01-23 16:03:21 -08007557 dev_dbg(dev, "%s: system resume\n", __func__);
Joonwoo Park03324832012-03-19 19:36:16 -07007558 tabla->mbhc_last_resume = jiffies;
Joonwoo Park816b8e62012-01-23 16:03:21 -08007559 return 0;
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007560}
7561
7562static const struct dev_pm_ops tabla_pm_ops = {
7563 .suspend = tabla_suspend,
7564 .resume = tabla_resume,
7565};
7566#endif
7567
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007568static int __devinit tabla_probe(struct platform_device *pdev)
7569{
Santosh Mardie15e2302011-11-15 10:39:23 +05307570 int ret = 0;
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307571 if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
Santosh Mardie15e2302011-11-15 10:39:23 +05307572 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
7573 tabla_dai, ARRAY_SIZE(tabla_dai));
Asish Bhattacharyab1aeae22012-02-15 08:29:28 +05307574 else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
Santosh Mardie15e2302011-11-15 10:39:23 +05307575 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
7576 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
7577 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007578}
7579static int __devexit tabla_remove(struct platform_device *pdev)
7580{
7581 snd_soc_unregister_codec(&pdev->dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007582 return 0;
7583}
7584static struct platform_driver tabla_codec_driver = {
7585 .probe = tabla_probe,
7586 .remove = tabla_remove,
7587 .driver = {
7588 .name = "tabla_codec",
7589 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08007590#ifdef CONFIG_PM
7591 .pm = &tabla_pm_ops,
7592#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007593 },
7594};
7595
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007596static struct platform_driver tabla1x_codec_driver = {
7597 .probe = tabla_probe,
7598 .remove = tabla_remove,
7599 .driver = {
7600 .name = "tabla1x_codec",
7601 .owner = THIS_MODULE,
7602#ifdef CONFIG_PM
7603 .pm = &tabla_pm_ops,
7604#endif
7605 },
7606};
7607
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007608static int __init tabla_codec_init(void)
7609{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007610 int rtn = platform_driver_register(&tabla_codec_driver);
7611 if (rtn == 0) {
7612 rtn = platform_driver_register(&tabla1x_codec_driver);
7613 if (rtn != 0)
7614 platform_driver_unregister(&tabla_codec_driver);
7615 }
7616 return rtn;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007617}
7618
7619static void __exit tabla_codec_exit(void)
7620{
Kuirong Wangcd4b6da2012-01-16 22:54:45 -08007621 platform_driver_unregister(&tabla1x_codec_driver);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007622 platform_driver_unregister(&tabla_codec_driver);
7623}
7624
7625module_init(tabla_codec_init);
7626module_exit(tabla_codec_exit);
7627
7628MODULE_DESCRIPTION("Tabla codec driver");
7629MODULE_VERSION("1.0");
7630MODULE_LICENSE("GPL v2");