Alexandre Bounine | 07590ff | 2010-05-26 14:43:57 -0700 | [diff] [blame] | 1 | /* |
| 2 | * RapidIO Tsi568 switch support |
| 3 | * |
| 4 | * Copyright 2009-2010 Integrated Device Technology, Inc. |
| 5 | * Copyright 2005 MontaVista Software, Inc. |
| 6 | * Matt Porter <mporter@kernel.crashing.org> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/rio.h> |
| 15 | #include <linux/rio_drv.h> |
| 16 | #include <linux/rio_ids.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include "../rio.h" |
| 19 | |
| 20 | /* Global (broadcast) route registers */ |
| 21 | #define SPBC_ROUTE_CFG_DESTID 0x10070 |
| 22 | #define SPBC_ROUTE_CFG_PORT 0x10074 |
| 23 | |
| 24 | /* Per port route registers */ |
| 25 | #define SPP_ROUTE_CFG_DESTID(n) (0x11070 + 0x100*n) |
| 26 | #define SPP_ROUTE_CFG_PORT(n) (0x11074 + 0x100*n) |
| 27 | |
Alexandre Bounine | e5cabeb | 2010-05-26 14:43:59 -0700 | [diff] [blame^] | 28 | #define TSI568_SP_MODE_BC 0x10004 |
| 29 | #define TSI568_SP_MODE_PW_DIS 0x08000000 |
| 30 | |
Alexandre Bounine | 07590ff | 2010-05-26 14:43:57 -0700 | [diff] [blame] | 31 | static int |
| 32 | tsi568_route_add_entry(struct rio_mport *mport, u16 destid, u8 hopcount, |
| 33 | u16 table, u16 route_destid, u8 route_port) |
| 34 | { |
| 35 | if (table == RIO_GLOBAL_TABLE) { |
| 36 | rio_mport_write_config_32(mport, destid, hopcount, |
| 37 | SPBC_ROUTE_CFG_DESTID, route_destid); |
| 38 | rio_mport_write_config_32(mport, destid, hopcount, |
| 39 | SPBC_ROUTE_CFG_PORT, route_port); |
| 40 | } else { |
| 41 | rio_mport_write_config_32(mport, destid, hopcount, |
| 42 | SPP_ROUTE_CFG_DESTID(table), |
| 43 | route_destid); |
| 44 | rio_mport_write_config_32(mport, destid, hopcount, |
| 45 | SPP_ROUTE_CFG_PORT(table), route_port); |
| 46 | } |
| 47 | |
| 48 | udelay(10); |
| 49 | |
| 50 | return 0; |
| 51 | } |
| 52 | |
| 53 | static int |
| 54 | tsi568_route_get_entry(struct rio_mport *mport, u16 destid, u8 hopcount, |
| 55 | u16 table, u16 route_destid, u8 *route_port) |
| 56 | { |
| 57 | int ret = 0; |
| 58 | u32 result; |
| 59 | |
| 60 | if (table == RIO_GLOBAL_TABLE) { |
| 61 | rio_mport_write_config_32(mport, destid, hopcount, |
| 62 | SPBC_ROUTE_CFG_DESTID, route_destid); |
| 63 | rio_mport_read_config_32(mport, destid, hopcount, |
| 64 | SPBC_ROUTE_CFG_PORT, &result); |
| 65 | } else { |
| 66 | rio_mport_write_config_32(mport, destid, hopcount, |
| 67 | SPP_ROUTE_CFG_DESTID(table), |
| 68 | route_destid); |
| 69 | rio_mport_read_config_32(mport, destid, hopcount, |
| 70 | SPP_ROUTE_CFG_PORT(table), &result); |
| 71 | } |
| 72 | |
| 73 | *route_port = result; |
| 74 | if (*route_port > 15) |
| 75 | ret = -1; |
| 76 | |
| 77 | return ret; |
| 78 | } |
| 79 | |
| 80 | static int |
| 81 | tsi568_route_clr_table(struct rio_mport *mport, u16 destid, u8 hopcount, |
| 82 | u16 table) |
| 83 | { |
| 84 | u32 route_idx; |
| 85 | u32 lut_size; |
| 86 | |
| 87 | lut_size = (mport->sys_size) ? 0x1ff : 0xff; |
| 88 | |
| 89 | if (table == RIO_GLOBAL_TABLE) { |
| 90 | rio_mport_write_config_32(mport, destid, hopcount, |
| 91 | SPBC_ROUTE_CFG_DESTID, 0x80000000); |
| 92 | for (route_idx = 0; route_idx <= lut_size; route_idx++) |
| 93 | rio_mport_write_config_32(mport, destid, hopcount, |
| 94 | SPBC_ROUTE_CFG_PORT, |
| 95 | RIO_INVALID_ROUTE); |
| 96 | } else { |
| 97 | rio_mport_write_config_32(mport, destid, hopcount, |
| 98 | SPP_ROUTE_CFG_DESTID(table), |
| 99 | 0x80000000); |
| 100 | for (route_idx = 0; route_idx <= lut_size; route_idx++) |
| 101 | rio_mport_write_config_32(mport, destid, hopcount, |
| 102 | SPP_ROUTE_CFG_PORT(table), |
| 103 | RIO_INVALID_ROUTE); |
| 104 | } |
| 105 | |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | DECLARE_RIO_ROUTE_OPS(RIO_VID_TUNDRA, RIO_DID_TSI568, tsi568_route_add_entry, tsi568_route_get_entry, tsi568_route_clr_table); |
Alexandre Bounine | e5cabeb | 2010-05-26 14:43:59 -0700 | [diff] [blame^] | 110 | |
| 111 | static int |
| 112 | tsi568_em_init(struct rio_dev *rdev) |
| 113 | { |
| 114 | struct rio_mport *mport = rdev->net->hport; |
| 115 | u16 destid = rdev->rswitch->destid; |
| 116 | u8 hopcount = rdev->rswitch->hopcount; |
| 117 | u32 regval; |
| 118 | |
| 119 | pr_debug("TSI568 %s [%d:%d]\n", __func__, destid, hopcount); |
| 120 | |
| 121 | /* Make sure that Port-Writes are disabled (for all ports) */ |
| 122 | rio_mport_read_config_32(mport, destid, hopcount, |
| 123 | TSI568_SP_MODE_BC, ®val); |
| 124 | rio_mport_write_config_32(mport, destid, hopcount, |
| 125 | TSI568_SP_MODE_BC, regval | TSI568_SP_MODE_PW_DIS); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | DECLARE_RIO_EM_OPS(RIO_VID_TUNDRA, RIO_DID_TSI568, tsi568_em_init, NULL); |