blob: d50dbc3d7082fdcad55a1b88a0d808cb0adb4ae6 [file] [log] [blame]
Duy Truonge833aca2013-02-12 13:35:08 -08001/* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#define pr_fmt(fmt) "%s: " fmt, __func__
14
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/input.h>
20#include <linux/platform_device.h>
21#include <linux/gpio.h>
22#include <linux/switch.h>
23#include <linux/pm.h>
24#include <linux/slab.h>
25#include <linux/pm_runtime.h>
26#include <linux/hrtimer.h>
27#include <linux/delay.h>
28#include <linux/regulator/consumer.h>
29
Anirudh Ghayalc2019332011-11-12 06:29:10 +053030#include <linux/mfd/pm8xxx/core.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070031#include <linux/pmic8058-othc.h>
32#include <linux/msm_adc.h>
33
34#define PM8058_OTHC_LOW_CURR_MASK 0xF0
35#define PM8058_OTHC_HIGH_CURR_MASK 0x0F
36#define PM8058_OTHC_EN_SIG_MASK 0x3F
37#define PM8058_OTHC_HYST_PREDIV_MASK 0xC7
38#define PM8058_OTHC_CLK_PREDIV_MASK 0xF8
39#define PM8058_OTHC_HYST_CLK_MASK 0x0F
40#define PM8058_OTHC_PERIOD_CLK_MASK 0xF0
41
42#define PM8058_OTHC_LOW_CURR_SHIFT 0x4
43#define PM8058_OTHC_EN_SIG_SHIFT 0x6
44#define PM8058_OTHC_HYST_PREDIV_SHIFT 0x3
45#define PM8058_OTHC_HYST_CLK_SHIFT 0x4
46
47#define OTHC_GPIO_MAX_LEN 25
48
49struct pm8058_othc {
50 bool othc_sw_state;
51 bool switch_reject;
52 bool othc_support_n_switch;
53 bool accessory_support;
54 bool accessories_adc_support;
55 int othc_base;
56 int othc_irq_sw;
57 int othc_irq_ir;
58 int othc_ir_state;
59 int num_accessories;
60 int curr_accessory_code;
61 int curr_accessory;
62 int video_out_gpio;
63 u32 sw_key_code;
64 u32 accessories_adc_channel;
65 int ir_gpio;
66 unsigned long switch_debounce_ms;
67 unsigned long detection_delay_ms;
68 void *adc_handle;
69 void *accessory_adc_handle;
70 spinlock_t lock;
Anirudh Ghayalc2019332011-11-12 06:29:10 +053071 struct device *dev;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070072 struct regulator *othc_vreg;
73 struct input_dev *othc_ipd;
74 struct switch_dev othc_sdev;
75 struct pmic8058_othc_config_pdata *othc_pdata;
76 struct othc_accessory_info *accessory_info;
77 struct hrtimer timer;
78 struct othc_n_switch_config *switch_config;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070079 struct work_struct switch_work;
80 struct delayed_work detect_work;
81 struct delayed_work hs_work;
82};
83
84static struct pm8058_othc *config[OTHC_MICBIAS_MAX];
85
86static void hs_worker(struct work_struct *work)
87{
88 int rc;
89 struct pm8058_othc *dd =
90 container_of(work, struct pm8058_othc, hs_work.work);
91
92 rc = gpio_get_value_cansleep(dd->ir_gpio);
93 if (rc < 0) {
94 pr_err("Unable to read IR GPIO\n");
95 enable_irq(dd->othc_irq_ir);
96 return;
97 }
98
99 dd->othc_ir_state = !rc;
100 schedule_delayed_work(&dd->detect_work,
101 msecs_to_jiffies(dd->detection_delay_ms));
102}
103
104static irqreturn_t ir_gpio_irq(int irq, void *dev_id)
105{
106 unsigned long flags;
107 struct pm8058_othc *dd = dev_id;
108
109 spin_lock_irqsave(&dd->lock, flags);
110 /* Enable the switch reject flag */
111 dd->switch_reject = true;
112 spin_unlock_irqrestore(&dd->lock, flags);
113
114 /* Start the HR timer if one is not active */
115 if (hrtimer_active(&dd->timer))
116 hrtimer_cancel(&dd->timer);
117
118 hrtimer_start(&dd->timer,
119 ktime_set((dd->switch_debounce_ms / 1000),
120 (dd->switch_debounce_ms % 1000) * 1000000), HRTIMER_MODE_REL);
121
122 /* disable irq, this gets enabled in the workqueue */
123 disable_irq_nosync(dd->othc_irq_ir);
124 schedule_delayed_work(&dd->hs_work, 0);
125
126 return IRQ_HANDLED;
127}
128/*
129 * The API pm8058_micbias_enable() allows to configure
130 * the MIC_BIAS. Only the lines which are not used for
131 * headset detection can be configured using this API.
132 * The API returns an error code if it fails to configure
133 * the specified MIC_BIAS line, else it returns 0.
134 */
135int pm8058_micbias_enable(enum othc_micbias micbias,
136 enum othc_micbias_enable enable)
137{
138 int rc;
139 u8 reg;
140 struct pm8058_othc *dd = config[micbias];
141
142 if (dd == NULL) {
143 pr_err("MIC_BIAS not registered, cannot enable\n");
144 return -ENODEV;
145 }
146
147 if (dd->othc_pdata->micbias_capability != OTHC_MICBIAS) {
148 pr_err("MIC_BIAS enable capability not supported\n");
149 return -EINVAL;
150 }
151
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530152 rc = pm8xxx_readb(dd->dev->parent, dd->othc_base + 1, &reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153 if (rc < 0) {
154 pr_err("PM8058 read failed\n");
155 return rc;
156 }
157
158 reg &= PM8058_OTHC_EN_SIG_MASK;
159 reg |= (enable << PM8058_OTHC_EN_SIG_SHIFT);
160
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530161 rc = pm8xxx_writeb(dd->dev->parent, dd->othc_base + 1, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700162 if (rc < 0) {
163 pr_err("PM8058 write failed\n");
164 return rc;
165 }
166
167 return rc;
168}
169EXPORT_SYMBOL(pm8058_micbias_enable);
170
171int pm8058_othc_svideo_enable(enum othc_micbias micbias, bool enable)
172{
173 struct pm8058_othc *dd = config[micbias];
174
175 if (dd == NULL) {
176 pr_err("MIC_BIAS not registered, cannot enable\n");
177 return -ENODEV;
178 }
179
180 if (dd->othc_pdata->micbias_capability != OTHC_MICBIAS_HSED) {
181 pr_err("MIC_BIAS enable capability not supported\n");
182 return -EINVAL;
183 }
184
185 if (dd->accessories_adc_support) {
186 /* GPIO state for MIC_IN = 0, SVIDEO = 1 */
187 gpio_set_value_cansleep(dd->video_out_gpio, !!enable);
188 if (enable) {
189 pr_debug("Enable the video path\n");
190 switch_set_state(&dd->othc_sdev, dd->curr_accessory);
191 input_report_switch(dd->othc_ipd,
192 dd->curr_accessory_code, 1);
193 input_sync(dd->othc_ipd);
194 } else {
195 pr_debug("Disable the video path\n");
196 switch_set_state(&dd->othc_sdev, 0);
197 input_report_switch(dd->othc_ipd,
198 dd->curr_accessory_code, 0);
199 input_sync(dd->othc_ipd);
200 }
201 }
202
203 return 0;
204}
205EXPORT_SYMBOL(pm8058_othc_svideo_enable);
206
207#ifdef CONFIG_PM
208static int pm8058_othc_suspend(struct device *dev)
209{
210 int rc = 0;
211 struct pm8058_othc *dd = dev_get_drvdata(dev);
212
213 if (dd->othc_pdata->micbias_capability == OTHC_MICBIAS_HSED) {
214 if (device_may_wakeup(dev)) {
215 enable_irq_wake(dd->othc_irq_sw);
216 enable_irq_wake(dd->othc_irq_ir);
217 }
218 }
219
220 if (!device_may_wakeup(dev)) {
221 rc = regulator_disable(dd->othc_vreg);
222 if (rc)
223 pr_err("othc micbais power off failed\n");
224 }
225
226 return rc;
227}
228
229static int pm8058_othc_resume(struct device *dev)
230{
231 int rc = 0;
232 struct pm8058_othc *dd = dev_get_drvdata(dev);
233
234 if (dd->othc_pdata->micbias_capability == OTHC_MICBIAS_HSED) {
235 if (device_may_wakeup(dev)) {
236 disable_irq_wake(dd->othc_irq_sw);
237 disable_irq_wake(dd->othc_irq_ir);
238 }
239 }
240
241 if (!device_may_wakeup(dev)) {
242 rc = regulator_enable(dd->othc_vreg);
243 if (rc)
244 pr_err("othc micbais power on failed\n");
245 }
246
247 return rc;
248}
249
250static struct dev_pm_ops pm8058_othc_pm_ops = {
251 .suspend = pm8058_othc_suspend,
252 .resume = pm8058_othc_resume,
253};
254#endif
255
256static int __devexit pm8058_othc_remove(struct platform_device *pd)
257{
258 struct pm8058_othc *dd = platform_get_drvdata(pd);
259
260 pm_runtime_set_suspended(&pd->dev);
261 pm_runtime_disable(&pd->dev);
262
263 if (dd->othc_pdata->micbias_capability == OTHC_MICBIAS_HSED) {
264 device_init_wakeup(&pd->dev, 0);
265 if (dd->othc_support_n_switch == true) {
266 adc_channel_close(dd->adc_handle);
267 cancel_work_sync(&dd->switch_work);
268 }
269
270 if (dd->accessory_support == true) {
271 int i;
272 for (i = 0; i < dd->num_accessories; i++) {
273 if (dd->accessory_info[i].detect_flags &
274 OTHC_GPIO_DETECT)
275 gpio_free(dd->accessory_info[i].gpio);
276 }
277 }
278 cancel_delayed_work_sync(&dd->detect_work);
279 cancel_delayed_work_sync(&dd->hs_work);
280 free_irq(dd->othc_irq_sw, dd);
281 free_irq(dd->othc_irq_ir, dd);
282 if (dd->ir_gpio != -1)
283 gpio_free(dd->ir_gpio);
284 input_unregister_device(dd->othc_ipd);
285 }
286 regulator_disable(dd->othc_vreg);
287 regulator_put(dd->othc_vreg);
288
289 kfree(dd);
290
291 return 0;
292}
293
294static enum hrtimer_restart pm8058_othc_timer(struct hrtimer *timer)
295{
296 unsigned long flags;
297 struct pm8058_othc *dd = container_of(timer,
298 struct pm8058_othc, timer);
299
300 spin_lock_irqsave(&dd->lock, flags);
301 dd->switch_reject = false;
302 spin_unlock_irqrestore(&dd->lock, flags);
303
304 return HRTIMER_NORESTART;
305}
306
307static void othc_report_switch(struct pm8058_othc *dd, u32 res)
308{
309 u8 i;
310 struct othc_switch_info *sw_info = dd->switch_config->switch_info;
311
312 for (i = 0; i < dd->switch_config->num_keys; i++) {
313 if (res >= sw_info[i].min_adc_threshold &&
314 res <= sw_info[i].max_adc_threshold) {
315 dd->othc_sw_state = true;
316 dd->sw_key_code = sw_info[i].key_code;
317 input_report_key(dd->othc_ipd, sw_info[i].key_code, 1);
318 input_sync(dd->othc_ipd);
319 return;
320 }
321 }
322
323 /*
324 * If the switch is not present in a specified ADC range
325 * report a default switch press.
326 */
327 if (dd->switch_config->default_sw_en) {
328 dd->othc_sw_state = true;
329 dd->sw_key_code =
330 sw_info[dd->switch_config->default_sw_idx].key_code;
331 input_report_key(dd->othc_ipd, dd->sw_key_code, 1);
332 input_sync(dd->othc_ipd);
333 }
334}
335
336static void switch_work_f(struct work_struct *work)
337{
338 int rc, i;
339 u32 res = 0;
340 struct adc_chan_result adc_result;
341 struct pm8058_othc *dd =
342 container_of(work, struct pm8058_othc, switch_work);
343 DECLARE_COMPLETION_ONSTACK(adc_wait);
344 u8 num_adc_samples = dd->switch_config->num_adc_samples;
345
346 /* sleep for settling time */
347 msleep(dd->switch_config->voltage_settling_time_ms);
348
349 for (i = 0; i < num_adc_samples; i++) {
350 rc = adc_channel_request_conv(dd->adc_handle, &adc_wait);
351 if (rc) {
352 pr_err("adc_channel_request_conv failed\n");
353 goto bail_out;
354 }
355 rc = wait_for_completion_interruptible(&adc_wait);
356 if (rc) {
357 pr_err("wait_for_completion_interruptible failed\n");
358 goto bail_out;
359 }
360 rc = adc_channel_read_result(dd->adc_handle, &adc_result);
361 if (rc) {
362 pr_err("adc_channel_read_result failed\n");
363 goto bail_out;
364 }
365 res += adc_result.physical;
366 }
367bail_out:
368 if (i == num_adc_samples && num_adc_samples != 0) {
369 res /= num_adc_samples;
370 othc_report_switch(dd, res);
371 } else
372 pr_err("Insufficient ADC samples\n");
373
374 enable_irq(dd->othc_irq_sw);
375}
376
377static int accessory_adc_detect(struct pm8058_othc *dd, int accessory)
378{
379 int rc;
380 u32 res;
381 struct adc_chan_result accessory_adc_result;
382 DECLARE_COMPLETION_ONSTACK(accessory_adc_wait);
383
384 rc = adc_channel_request_conv(dd->accessory_adc_handle,
385 &accessory_adc_wait);
386 if (rc) {
387 pr_err("adc_channel_request_conv failed\n");
388 goto adc_failed;
389 }
390 rc = wait_for_completion_interruptible(&accessory_adc_wait);
391 if (rc) {
392 pr_err("wait_for_completion_interruptible failed\n");
393 goto adc_failed;
394 }
395 rc = adc_channel_read_result(dd->accessory_adc_handle,
396 &accessory_adc_result);
397 if (rc) {
398 pr_err("adc_channel_read_result failed\n");
399 goto adc_failed;
400 }
401
402 res = accessory_adc_result.physical;
403
404 if (res >= dd->accessory_info[accessory].adc_thres.min_threshold &&
405 res <= dd->accessory_info[accessory].adc_thres.max_threshold) {
406 pr_debug("Accessory on ADC detected!, ADC Value = %u\n", res);
407 return 1;
408 }
409
410adc_failed:
411 return 0;
412}
413
414
415static int pm8058_accessory_report(struct pm8058_othc *dd, int status)
416{
417 int i, rc, detected = 0;
418 u8 micbias_status, switch_status;
419
420 if (dd->accessory_support == false) {
421 /* Report default headset */
422 switch_set_state(&dd->othc_sdev, !!status);
423 input_report_switch(dd->othc_ipd, SW_HEADPHONE_INSERT,
424 !!status);
425 input_sync(dd->othc_ipd);
426 return 0;
427 }
428
429 /* For accessory */
430 if (dd->accessory_support == true && status == 0) {
431 /* Report removal of the accessory. */
432
433 /*
434 * If the current accessory is video cable, reject the removal
435 * interrupt.
436 */
437 pr_info("Accessory [%d] removed\n", dd->curr_accessory);
438 if (dd->curr_accessory == OTHC_SVIDEO_OUT)
439 return 0;
440
441 switch_set_state(&dd->othc_sdev, 0);
442 input_report_switch(dd->othc_ipd, dd->curr_accessory_code, 0);
443 input_sync(dd->othc_ipd);
444 return 0;
445 }
446
447 if (dd->ir_gpio < 0) {
448 /* Check the MIC_BIAS status */
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530449 rc = pm8xxx_read_irq_stat(dd->dev->parent, dd->othc_irq_ir);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700450 if (rc < 0) {
451 pr_err("Unable to read IR status from PMIC\n");
452 goto fail_ir_accessory;
453 }
454 micbias_status = !!rc;
455 } else {
456 rc = gpio_get_value_cansleep(dd->ir_gpio);
457 if (rc < 0) {
458 pr_err("Unable to read IR status from GPIO\n");
459 goto fail_ir_accessory;
460 }
461 micbias_status = !rc;
462 }
463
464 /* Check the switch status */
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530465 rc = pm8xxx_read_irq_stat(dd->dev->parent, dd->othc_irq_sw);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700466 if (rc < 0) {
467 pr_err("Unable to read SWITCH status\n");
468 goto fail_ir_accessory;
469 }
470 switch_status = !!rc;
471
472 /* Loop through to check which accessory is connected */
473 for (i = 0; i < dd->num_accessories; i++) {
474 detected = 0;
475 if (dd->accessory_info[i].enabled == false)
476 continue;
477
478 if (dd->accessory_info[i].detect_flags & OTHC_MICBIAS_DETECT) {
479 if (micbias_status)
480 detected = 1;
481 else
482 continue;
483 }
484 if (dd->accessory_info[i].detect_flags & OTHC_SWITCH_DETECT) {
485 if (switch_status)
486 detected = 1;
487 else
488 continue;
489 }
490 if (dd->accessory_info[i].detect_flags & OTHC_GPIO_DETECT) {
491 rc = gpio_get_value_cansleep(
492 dd->accessory_info[i].gpio);
493 if (rc < 0)
494 continue;
495
496 if (rc ^ dd->accessory_info[i].active_low)
497 detected = 1;
498 else
499 continue;
500 }
501 if (dd->accessory_info[i].detect_flags & OTHC_ADC_DETECT)
502 detected = accessory_adc_detect(dd, i);
503
504 if (detected)
505 break;
506 }
507
508 if (detected) {
509 dd->curr_accessory = dd->accessory_info[i].accessory;
510 dd->curr_accessory_code = dd->accessory_info[i].key_code;
511
512 /* if Video out cable detected enable the video path*/
513 if (dd->curr_accessory == OTHC_SVIDEO_OUT) {
514 pm8058_othc_svideo_enable(
515 dd->othc_pdata->micbias_select, true);
516
517 } else {
518 switch_set_state(&dd->othc_sdev, dd->curr_accessory);
519 input_report_switch(dd->othc_ipd,
520 dd->curr_accessory_code, 1);
521 input_sync(dd->othc_ipd);
522 }
523 pr_info("Accessory [%d] inserted\n", dd->curr_accessory);
524 } else
525 pr_info("Unable to detect accessory. False interrupt!\n");
526
527 return 0;
528
529fail_ir_accessory:
530 return rc;
531}
532
533static void detect_work_f(struct work_struct *work)
534{
535 int rc;
536 struct pm8058_othc *dd =
537 container_of(work, struct pm8058_othc, detect_work.work);
538
Anirudh Ghayal27c5a8d2011-12-08 11:36:56 +0530539 /* Accessory has been inserted */
540 rc = pm8058_accessory_report(dd, 1);
541 if (rc)
542 pr_err("Accessory insertion could not be detected\n");
543
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700544 enable_irq(dd->othc_irq_ir);
545}
546
547/*
548 * The pm8058_no_sw detects the switch press and release operation.
549 * The odd number call is press and even number call is release.
550 * The current state of the button is maintained in othc_sw_state variable.
551 * This isr gets called only for NO type headsets.
552 */
553static irqreturn_t pm8058_no_sw(int irq, void *dev_id)
554{
555 int level;
556 struct pm8058_othc *dd = dev_id;
557 unsigned long flags;
558
559 /* Check if headset has been inserted, else return */
560 if (!dd->othc_ir_state)
561 return IRQ_HANDLED;
562
563 spin_lock_irqsave(&dd->lock, flags);
564 if (dd->switch_reject == true) {
565 pr_debug("Rejected switch interrupt\n");
566 spin_unlock_irqrestore(&dd->lock, flags);
567 return IRQ_HANDLED;
568 }
569 spin_unlock_irqrestore(&dd->lock, flags);
570
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530571 level = pm8xxx_read_irq_stat(dd->dev->parent, dd->othc_irq_sw);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700572 if (level < 0) {
573 pr_err("Unable to read IRQ status register\n");
574 return IRQ_HANDLED;
575 }
576
577 if (dd->othc_support_n_switch == true) {
578 if (level == 0) {
579 dd->othc_sw_state = false;
580 input_report_key(dd->othc_ipd, dd->sw_key_code, 0);
581 input_sync(dd->othc_ipd);
582 } else {
583 disable_irq_nosync(dd->othc_irq_sw);
584 schedule_work(&dd->switch_work);
585 }
586 return IRQ_HANDLED;
587 }
588 /*
589 * It is necessary to check the software state and the hardware state
590 * to make sure that the residual interrupt after the debounce time does
591 * not disturb the software state machine.
592 */
593 if (level == 1 && dd->othc_sw_state == false) {
594 /* Switch has been pressed */
595 dd->othc_sw_state = true;
596 input_report_key(dd->othc_ipd, KEY_MEDIA, 1);
597 } else if (level == 0 && dd->othc_sw_state == true) {
598 /* Switch has been released */
599 dd->othc_sw_state = false;
600 input_report_key(dd->othc_ipd, KEY_MEDIA, 0);
601 }
602 input_sync(dd->othc_ipd);
603
604 return IRQ_HANDLED;
605}
606
607/*
608 * The pm8058_nc_ir detects insert / remove of the headset (for NO),
609 * The current state of the headset is maintained in othc_ir_state variable.
610 * Due to a hardware bug, false switch interrupts are seen during headset
611 * insert. This is handled in the software by rejecting the switch interrupts
612 * for a small period of time after the headset has been inserted.
613 */
614static irqreturn_t pm8058_nc_ir(int irq, void *dev_id)
615{
616 unsigned long flags, rc;
617 struct pm8058_othc *dd = dev_id;
618
619 spin_lock_irqsave(&dd->lock, flags);
620 /* Enable the switch reject flag */
621 dd->switch_reject = true;
622 spin_unlock_irqrestore(&dd->lock, flags);
623
624 /* Start the HR timer if one is not active */
625 if (hrtimer_active(&dd->timer))
626 hrtimer_cancel(&dd->timer);
627
628 hrtimer_start(&dd->timer,
629 ktime_set((dd->switch_debounce_ms / 1000),
630 (dd->switch_debounce_ms % 1000) * 1000000), HRTIMER_MODE_REL);
631
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700632
633 /* Check the MIC_BIAS status, to check if inserted or removed */
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530634 rc = pm8xxx_read_irq_stat(dd->dev->parent, dd->othc_irq_ir);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700635 if (rc < 0) {
636 pr_err("Unable to read IR status\n");
637 goto fail_ir;
638 }
639
640 dd->othc_ir_state = rc;
Anirudh Ghayal27c5a8d2011-12-08 11:36:56 +0530641 if (dd->othc_ir_state) {
642 /* disable irq, this gets enabled in the workqueue */
643 disable_irq_nosync(dd->othc_irq_ir);
644 /* Accessory has been inserted, report with detection delay */
645 schedule_delayed_work(&dd->detect_work,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700646 msecs_to_jiffies(dd->detection_delay_ms));
Anirudh Ghayal27c5a8d2011-12-08 11:36:56 +0530647 } else {
648 /* Accessory has been removed, report removal immediately */
649 rc = pm8058_accessory_report(dd, 0);
650 if (rc)
651 pr_err("Accessory removal could not be detected\n");
652 /* Clear existing switch state */
653 dd->othc_sw_state = false;
654 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700655
656fail_ir:
657 return IRQ_HANDLED;
658}
659
660static int pm8058_configure_micbias(struct pm8058_othc *dd)
661{
662 int rc;
663 u8 reg, value;
664 u32 value1;
665 u16 base_addr = dd->othc_base;
666 struct hsed_bias_config *hsed_config =
667 dd->othc_pdata->hsed_config->hsed_bias_config;
668
669 /* Intialize the OTHC module */
670 /* Control Register 1*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530671 rc = pm8xxx_readb(dd->dev->parent, base_addr, &reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700672 if (rc < 0) {
673 pr_err("PM8058 read failed\n");
674 return rc;
675 }
676
677 /* set iDAC high current threshold */
678 value = (hsed_config->othc_highcurr_thresh_uA / 100) - 2;
679 reg = (reg & PM8058_OTHC_HIGH_CURR_MASK) | value;
680
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530681 rc = pm8xxx_writeb(dd->dev->parent, base_addr, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700682 if (rc < 0) {
683 pr_err("PM8058 read failed\n");
684 return rc;
685 }
686
687 /* Control register 2*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530688 rc = pm8xxx_readb(dd->dev->parent, base_addr + 1, &reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689 if (rc < 0) {
690 pr_err("PM8058 read failed\n");
691 return rc;
692 }
693
694 value = dd->othc_pdata->micbias_enable;
695 reg &= PM8058_OTHC_EN_SIG_MASK;
696 reg |= (value << PM8058_OTHC_EN_SIG_SHIFT);
697
698 value = 0;
699 value1 = (hsed_config->othc_hyst_prediv_us << 10) / USEC_PER_SEC;
700 while (value1 != 0) {
701 value1 = value1 >> 1;
702 value++;
703 }
704 if (value > 7) {
705 pr_err("Invalid input argument - othc_hyst_prediv_us\n");
706 return -EINVAL;
707 }
708 reg &= PM8058_OTHC_HYST_PREDIV_MASK;
709 reg |= (value << PM8058_OTHC_HYST_PREDIV_SHIFT);
710
711 value = 0;
712 value1 = (hsed_config->othc_period_clkdiv_us << 10) / USEC_PER_SEC;
713 while (value1 != 1) {
714 value1 = value1 >> 1;
715 value++;
716 }
717 if (value > 8) {
718 pr_err("Invalid input argument - othc_period_clkdiv_us\n");
719 return -EINVAL;
720 }
721 reg = (reg & PM8058_OTHC_CLK_PREDIV_MASK) | (value - 1);
722
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530723 rc = pm8xxx_writeb(dd->dev->parent, base_addr + 1, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700724 if (rc < 0) {
725 pr_err("PM8058 read failed\n");
726 return rc;
727 }
728
729 /* Control register 3 */
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530730 rc = pm8xxx_readb(dd->dev->parent, base_addr + 2 , &reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700731 if (rc < 0) {
732 pr_err("PM8058 read failed\n");
733 return rc;
734 }
735
736 value = hsed_config->othc_hyst_clk_us /
737 hsed_config->othc_hyst_prediv_us;
738 if (value > 15) {
739 pr_err("Invalid input argument - othc_hyst_prediv_us\n");
740 return -EINVAL;
741 }
742 reg &= PM8058_OTHC_HYST_CLK_MASK;
743 reg |= value << PM8058_OTHC_HYST_CLK_SHIFT;
744
745 value = hsed_config->othc_period_clk_us /
746 hsed_config->othc_period_clkdiv_us;
747 if (value > 15) {
748 pr_err("Invalid input argument - othc_hyst_prediv_us\n");
749 return -EINVAL;
750 }
751 reg = (reg & PM8058_OTHC_PERIOD_CLK_MASK) | value;
752
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530753 rc = pm8xxx_writeb(dd->dev->parent, base_addr + 2, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700754 if (rc < 0) {
755 pr_err("PM8058 read failed\n");
756 return rc;
757 }
758
759 return 0;
760}
761
762static ssize_t othc_headset_print_name(struct switch_dev *sdev, char *buf)
763{
764 switch (switch_get_state(sdev)) {
765 case OTHC_NO_DEVICE:
766 return sprintf(buf, "No Device\n");
767 case OTHC_HEADSET:
768 case OTHC_HEADPHONE:
769 case OTHC_MICROPHONE:
770 case OTHC_ANC_HEADSET:
771 case OTHC_ANC_HEADPHONE:
772 case OTHC_ANC_MICROPHONE:
773 return sprintf(buf, "Headset\n");
774 }
775 return -EINVAL;
776}
777
778static int pm8058_configure_switch(struct pm8058_othc *dd)
779{
780 int rc, i;
781
782 if (dd->othc_support_n_switch == true) {
783 /* n-switch support */
784 rc = adc_channel_open(dd->switch_config->adc_channel,
785 &dd->adc_handle);
786 if (rc) {
787 pr_err("Unable to open ADC channel\n");
788 return -ENODEV;
789 }
790
791 for (i = 0; i < dd->switch_config->num_keys; i++) {
792 input_set_capability(dd->othc_ipd, EV_KEY,
793 dd->switch_config->switch_info[i].key_code);
794 }
795 } else /* Only single switch supported */
796 input_set_capability(dd->othc_ipd, EV_KEY, KEY_MEDIA);
797
798 return 0;
799}
800
801static int
802pm8058_configure_accessory(struct pm8058_othc *dd)
803{
804 int i, rc;
805 char name[OTHC_GPIO_MAX_LEN];
806
807 /*
808 * Not bailing out if the gpio_* configure calls fail. This is required
809 * as multiple accessories are detected by the same gpio.
810 */
811 for (i = 0; i < dd->num_accessories; i++) {
812 if (dd->accessory_info[i].enabled == false)
813 continue;
814 if (dd->accessory_info[i].detect_flags & OTHC_GPIO_DETECT) {
815 snprintf(name, OTHC_GPIO_MAX_LEN, "%s%d",
816 "othc_acc_gpio_", i);
817 rc = gpio_request(dd->accessory_info[i].gpio, name);
818 if (rc) {
819 pr_debug("Unable to request GPIO [%d]\n",
820 dd->accessory_info[i].gpio);
821 continue;
822 }
823 rc = gpio_direction_input(dd->accessory_info[i].gpio);
824 if (rc) {
825 pr_debug("Unable to set-direction GPIO [%d]\n",
826 dd->accessory_info[i].gpio);
827 gpio_free(dd->accessory_info[i].gpio);
828 continue;
829 }
830 }
831 input_set_capability(dd->othc_ipd, EV_SW,
832 dd->accessory_info[i].key_code);
833 }
834
835 if (dd->accessories_adc_support) {
836 /*
837 * Check if 3 switch is supported. If both are using the same
838 * ADC channel, the same handle can be used.
839 */
840 if (dd->othc_support_n_switch) {
841 if (dd->adc_handle != NULL &&
842 (dd->accessories_adc_channel ==
843 dd->switch_config->adc_channel))
844 dd->accessory_adc_handle = dd->adc_handle;
845 } else {
846 rc = adc_channel_open(dd->accessories_adc_channel,
847 &dd->accessory_adc_handle);
848 if (rc) {
849 pr_err("Unable to open ADC channel\n");
850 rc = -ENODEV;
851 goto accessory_adc_fail;
852 }
853 }
854 if (dd->video_out_gpio != 0) {
855 rc = gpio_request(dd->video_out_gpio, "vout_enable");
856 if (rc < 0) {
857 pr_err("request VOUT gpio failed (%d)\n", rc);
858 goto accessory_adc_fail;
859 }
860 rc = gpio_direction_output(dd->video_out_gpio, 0);
861 if (rc < 0) {
862 pr_err("direction_out failed (%d)\n", rc);
863 goto accessory_adc_fail;
864 }
865 }
866
867 }
868
869 return 0;
870
871accessory_adc_fail:
872 for (i = 0; i < dd->num_accessories; i++) {
873 if (dd->accessory_info[i].enabled == false)
874 continue;
875 gpio_free(dd->accessory_info[i].gpio);
876 }
877 return rc;
878}
879
880static int
881othc_configure_hsed(struct pm8058_othc *dd, struct platform_device *pd)
882{
883 int rc;
884 struct input_dev *ipd;
885 struct pmic8058_othc_config_pdata *pdata = pd->dev.platform_data;
886 struct othc_hsed_config *hsed_config = pdata->hsed_config;
887
888 dd->othc_sdev.name = "h2w";
889 dd->othc_sdev.print_name = othc_headset_print_name;
890
891 rc = switch_dev_register(&dd->othc_sdev);
892 if (rc) {
893 pr_err("Unable to register switch device\n");
894 return rc;
895 }
896
897 ipd = input_allocate_device();
898 if (ipd == NULL) {
899 pr_err("Unable to allocate memory\n");
900 rc = -ENOMEM;
901 goto fail_input_alloc;
902 }
903
904 /* Get the IRQ for Headset Insert-remove and Switch-press */
905 dd->othc_irq_sw = platform_get_irq(pd, 0);
906 dd->othc_irq_ir = platform_get_irq(pd, 1);
907 if (dd->othc_irq_ir < 0 || dd->othc_irq_sw < 0) {
908 pr_err("othc resource:IRQs absent\n");
909 rc = -ENXIO;
910 goto fail_micbias_config;
911 }
912
913 if (pdata->hsed_name != NULL)
914 ipd->name = pdata->hsed_name;
915 else
916 ipd->name = "pmic8058_othc";
917
918 ipd->phys = "pmic8058_othc/input0";
919 ipd->dev.parent = &pd->dev;
920
921 dd->othc_ipd = ipd;
922 dd->ir_gpio = hsed_config->ir_gpio;
923 dd->othc_sw_state = false;
924 dd->switch_debounce_ms = hsed_config->switch_debounce_ms;
925 dd->othc_support_n_switch = hsed_config->othc_support_n_switch;
926 dd->accessory_support = pdata->hsed_config->accessories_support;
927 dd->detection_delay_ms = pdata->hsed_config->detection_delay_ms;
928
929 if (dd->othc_support_n_switch == true)
930 dd->switch_config = hsed_config->switch_config;
931
932 if (dd->accessory_support == true) {
933 dd->accessory_info = pdata->hsed_config->accessories;
934 dd->num_accessories = pdata->hsed_config->othc_num_accessories;
935 dd->accessories_adc_support =
936 pdata->hsed_config->accessories_adc_support;
937 dd->accessories_adc_channel =
938 pdata->hsed_config->accessories_adc_channel;
939 dd->video_out_gpio = pdata->hsed_config->video_out_gpio;
940 }
941
942 /* Configure the MIC_BIAS line for headset detection */
943 rc = pm8058_configure_micbias(dd);
944 if (rc < 0)
945 goto fail_micbias_config;
946
947 /* Configure for the switch events */
948 rc = pm8058_configure_switch(dd);
949 if (rc < 0)
950 goto fail_micbias_config;
951
952 /* Configure the accessory */
953 if (dd->accessory_support == true) {
954 rc = pm8058_configure_accessory(dd);
955 if (rc < 0)
956 goto fail_micbias_config;
957 }
958
959 input_set_drvdata(ipd, dd);
960 spin_lock_init(&dd->lock);
961
962 rc = input_register_device(ipd);
963 if (rc) {
964 pr_err("Unable to register OTHC device\n");
965 goto fail_micbias_config;
966 }
967
968 hrtimer_init(&dd->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
969 dd->timer.function = pm8058_othc_timer;
970
971 /* Request the HEADSET IR interrupt */
972 if (dd->ir_gpio < 0) {
973 rc = request_threaded_irq(dd->othc_irq_ir, NULL, pm8058_nc_ir,
974 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_DISABLED,
975 "pm8058_othc_ir", dd);
976 if (rc < 0) {
977 pr_err("Unable to request pm8058_othc_ir IRQ\n");
978 goto fail_ir_irq;
979 }
980 } else {
981 rc = gpio_request(dd->ir_gpio, "othc_ir_gpio");
982 if (rc) {
983 pr_err("Unable to request IR GPIO\n");
984 goto fail_ir_gpio_req;
985 }
986 rc = gpio_direction_input(dd->ir_gpio);
987 if (rc) {
988 pr_err("GPIO %d set_direction failed\n", dd->ir_gpio);
989 goto fail_ir_irq;
990 }
991 dd->othc_irq_ir = gpio_to_irq(dd->ir_gpio);
992 rc = request_any_context_irq(dd->othc_irq_ir, ir_gpio_irq,
993 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
994 "othc_gpio_ir_irq", dd);
995 if (rc < 0) {
996 pr_err("could not request hs irq err=%d\n", rc);
997 goto fail_ir_irq;
998 }
999 }
1000 /* Request the SWITCH press/release interrupt */
1001 rc = request_threaded_irq(dd->othc_irq_sw, NULL, pm8058_no_sw,
1002 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_DISABLED,
1003 "pm8058_othc_sw", dd);
1004 if (rc < 0) {
1005 pr_err("Unable to request pm8058_othc_sw IRQ\n");
1006 goto fail_sw_irq;
1007 }
1008
1009 /* Check if the accessory is already inserted during boot up */
1010 if (dd->ir_gpio < 0) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301011 rc = pm8xxx_read_irq_stat(dd->dev->parent, dd->othc_irq_ir);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001012 if (rc < 0) {
1013 pr_err("Unable to get accessory status at boot\n");
1014 goto fail_ir_status;
1015 }
1016 } else {
1017 rc = gpio_get_value_cansleep(dd->ir_gpio);
1018 if (rc < 0) {
1019 pr_err("Unable to get accessory status at boot\n");
1020 goto fail_ir_status;
1021 }
1022 rc = !rc;
1023 }
1024 if (rc) {
1025 pr_debug("Accessory inserted during boot up\n");
1026 /* process the data and report the inserted accessory */
1027 rc = pm8058_accessory_report(dd, 1);
1028 if (rc)
1029 pr_debug("Unabele to detect accessory at boot up\n");
1030 }
1031
1032 device_init_wakeup(&pd->dev,
1033 hsed_config->hsed_bias_config->othc_wakeup);
1034
1035 INIT_DELAYED_WORK(&dd->detect_work, detect_work_f);
1036
1037 INIT_DELAYED_WORK(&dd->hs_work, hs_worker);
1038
1039 if (dd->othc_support_n_switch == true)
1040 INIT_WORK(&dd->switch_work, switch_work_f);
1041
1042
1043 return 0;
1044
1045fail_ir_status:
1046 free_irq(dd->othc_irq_sw, dd);
1047fail_sw_irq:
1048 free_irq(dd->othc_irq_ir, dd);
1049fail_ir_irq:
1050 if (dd->ir_gpio != -1)
1051 gpio_free(dd->ir_gpio);
1052fail_ir_gpio_req:
1053 input_unregister_device(ipd);
1054 dd->othc_ipd = NULL;
1055fail_micbias_config:
1056 input_free_device(ipd);
1057fail_input_alloc:
1058 switch_dev_unregister(&dd->othc_sdev);
1059 return rc;
1060}
1061
1062static int __devinit pm8058_othc_probe(struct platform_device *pd)
1063{
1064 int rc;
1065 struct pm8058_othc *dd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001066 struct resource *res;
1067 struct pmic8058_othc_config_pdata *pdata = pd->dev.platform_data;
1068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069 if (pdata == NULL) {
1070 pr_err("Platform data not present\n");
1071 return -EINVAL;
1072 }
1073
1074 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
1075 if (dd == NULL) {
1076 pr_err("Unable to allocate memory\n");
1077 return -ENOMEM;
1078 }
1079
1080 /* Enable runtime PM ops, start in ACTIVE mode */
1081 rc = pm_runtime_set_active(&pd->dev);
1082 if (rc < 0)
1083 dev_dbg(&pd->dev, "unable to set runtime pm state\n");
1084 pm_runtime_enable(&pd->dev);
1085
1086 res = platform_get_resource_byname(pd, IORESOURCE_IO, "othc_base");
1087 if (res == NULL) {
1088 pr_err("othc resource:Base address absent\n");
1089 rc = -ENXIO;
1090 goto fail_get_res;
1091 }
1092
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301093 dd->dev = &pd->dev;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001094 dd->othc_pdata = pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001095 dd->othc_base = res->start;
1096 if (pdata->micbias_regulator == NULL) {
1097 pr_err("OTHC regulator not specified\n");
1098 goto fail_get_res;
1099 }
1100
1101 dd->othc_vreg = regulator_get(NULL,
1102 pdata->micbias_regulator->regulator);
1103 if (IS_ERR(dd->othc_vreg)) {
1104 pr_err("regulator get failed\n");
1105 rc = PTR_ERR(dd->othc_vreg);
1106 goto fail_get_res;
1107 }
1108
1109 rc = regulator_set_voltage(dd->othc_vreg,
1110 pdata->micbias_regulator->min_uV,
1111 pdata->micbias_regulator->max_uV);
1112 if (rc) {
1113 pr_err("othc regulator set voltage failed\n");
1114 goto fail_reg_enable;
1115 }
1116
1117 rc = regulator_enable(dd->othc_vreg);
1118 if (rc) {
1119 pr_err("othc regulator enable failed\n");
1120 goto fail_reg_enable;
1121 }
1122
1123 platform_set_drvdata(pd, dd);
1124
1125 if (pdata->micbias_capability == OTHC_MICBIAS_HSED) {
1126 /* HSED to be supported on this MICBIAS line */
1127 if (pdata->hsed_config != NULL) {
1128 rc = othc_configure_hsed(dd, pd);
1129 if (rc < 0)
1130 goto fail_othc_hsed;
1131 } else {
1132 pr_err("HSED config data not present\n");
1133 rc = -EINVAL;
1134 goto fail_othc_hsed;
1135 }
1136 }
1137
1138 /* Store the local driver data structure */
1139 if (dd->othc_pdata->micbias_select < OTHC_MICBIAS_MAX)
1140 config[dd->othc_pdata->micbias_select] = dd;
1141
1142 pr_debug("Device %s:%d successfully registered\n",
1143 pd->name, pd->id);
1144 return 0;
1145
1146fail_othc_hsed:
1147 regulator_disable(dd->othc_vreg);
1148fail_reg_enable:
1149 regulator_put(dd->othc_vreg);
1150fail_get_res:
1151 pm_runtime_set_suspended(&pd->dev);
1152 pm_runtime_disable(&pd->dev);
1153
1154 kfree(dd);
1155 return rc;
1156}
1157
1158static struct platform_driver pm8058_othc_driver = {
1159 .driver = {
1160 .name = "pm8058-othc",
1161 .owner = THIS_MODULE,
1162#ifdef CONFIG_PM
1163 .pm = &pm8058_othc_pm_ops,
1164#endif
1165 },
1166 .probe = pm8058_othc_probe,
1167 .remove = __devexit_p(pm8058_othc_remove),
1168};
1169
1170static int __init pm8058_othc_init(void)
1171{
1172 return platform_driver_register(&pm8058_othc_driver);
1173}
1174
1175static void __exit pm8058_othc_exit(void)
1176{
1177 platform_driver_unregister(&pm8058_othc_driver);
1178}
1179/*
1180 * Move to late_initcall, to make sure that the ADC driver registration is
1181 * completed before we open a ADC channel.
1182 */
1183late_initcall(pm8058_othc_init);
1184module_exit(pm8058_othc_exit);
1185
1186MODULE_ALIAS("platform:pmic8058_othc");
1187MODULE_DESCRIPTION("PMIC 8058 OTHC");
1188MODULE_LICENSE("GPL v2");