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Duy Truonge833aca2013-02-12 13:35:08 -08001/* Copyright (c) 2010-2012, The Linux Foundation. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __EXTERNAL_COMMON_H__
14#define __EXTERNAL_COMMON_H__
Saurabh Shah79d05a62012-01-09 15:18:33 -080015#include <linux/switch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016
17#ifdef DEBUG
18#ifndef DEV_DBG_PREFIX
19#define DEV_DBG_PREFIX "EXT_INTERFACE: "
20#endif
21#define DEV_DBG(args...) pr_debug(DEV_DBG_PREFIX args)
22#else
23#define DEV_DBG(args...) (void)0
24#endif /* DEBUG */
25#define DEV_INFO(args...) dev_info(external_common_state->dev, args)
26#define DEV_WARN(args...) dev_warn(external_common_state->dev, args)
27#define DEV_ERR(args...) dev_err(external_common_state->dev, args)
28
29#ifdef CONFIG_FB_MSM_TVOUT
30#define TVOUT_VFRMT_NTSC_M_720x480i 0
31#define TVOUT_VFRMT_NTSC_J_720x480i 1
32#define TVOUT_VFRMT_PAL_BDGHIN_720x576i 2
33#define TVOUT_VFRMT_PAL_M_720x480i 3
34#define TVOUT_VFRMT_PAL_N_720x480i 4
35#elif defined(CONFIG_FB_MSM_HDMI_COMMON)
36/* all video formats defined by EIA CEA 861D */
37#define HDMI_VFRMT_640x480p60_4_3 0
38#define HDMI_VFRMT_720x480p60_4_3 1
39#define HDMI_VFRMT_720x480p60_16_9 2
40#define HDMI_VFRMT_1280x720p60_16_9 3
41#define HDMI_VFRMT_1920x1080i60_16_9 4
42#define HDMI_VFRMT_720x480i60_4_3 5
43#define HDMI_VFRMT_1440x480i60_4_3 HDMI_VFRMT_720x480i60_4_3
44#define HDMI_VFRMT_720x480i60_16_9 6
45#define HDMI_VFRMT_1440x480i60_16_9 HDMI_VFRMT_720x480i60_16_9
46#define HDMI_VFRMT_720x240p60_4_3 7
47#define HDMI_VFRMT_1440x240p60_4_3 HDMI_VFRMT_720x240p60_4_3
48#define HDMI_VFRMT_720x240p60_16_9 8
49#define HDMI_VFRMT_1440x240p60_16_9 HDMI_VFRMT_720x240p60_16_9
50#define HDMI_VFRMT_2880x480i60_4_3 9
51#define HDMI_VFRMT_2880x480i60_16_9 10
52#define HDMI_VFRMT_2880x240p60_4_3 11
53#define HDMI_VFRMT_2880x240p60_16_9 12
54#define HDMI_VFRMT_1440x480p60_4_3 13
55#define HDMI_VFRMT_1440x480p60_16_9 14
56#define HDMI_VFRMT_1920x1080p60_16_9 15
57#define HDMI_VFRMT_720x576p50_4_3 16
58#define HDMI_VFRMT_720x576p50_16_9 17
59#define HDMI_VFRMT_1280x720p50_16_9 18
60#define HDMI_VFRMT_1920x1080i50_16_9 19
61#define HDMI_VFRMT_720x576i50_4_3 20
62#define HDMI_VFRMT_1440x576i50_4_3 HDMI_VFRMT_720x576i50_4_3
63#define HDMI_VFRMT_720x576i50_16_9 21
64#define HDMI_VFRMT_1440x576i50_16_9 HDMI_VFRMT_720x576i50_16_9
65#define HDMI_VFRMT_720x288p50_4_3 22
66#define HDMI_VFRMT_1440x288p50_4_3 HDMI_VFRMT_720x288p50_4_3
67#define HDMI_VFRMT_720x288p50_16_9 23
68#define HDMI_VFRMT_1440x288p50_16_9 HDMI_VFRMT_720x288p50_16_9
69#define HDMI_VFRMT_2880x576i50_4_3 24
70#define HDMI_VFRMT_2880x576i50_16_9 25
71#define HDMI_VFRMT_2880x288p50_4_3 26
72#define HDMI_VFRMT_2880x288p50_16_9 27
73#define HDMI_VFRMT_1440x576p50_4_3 28
74#define HDMI_VFRMT_1440x576p50_16_9 29
75#define HDMI_VFRMT_1920x1080p50_16_9 30
76#define HDMI_VFRMT_1920x1080p24_16_9 31
77#define HDMI_VFRMT_1920x1080p25_16_9 32
78#define HDMI_VFRMT_1920x1080p30_16_9 33
79#define HDMI_VFRMT_2880x480p60_4_3 34
80#define HDMI_VFRMT_2880x480p60_16_9 35
81#define HDMI_VFRMT_2880x576p50_4_3 36
82#define HDMI_VFRMT_2880x576p50_16_9 37
83#define HDMI_VFRMT_1920x1250i50_16_9 38
84#define HDMI_VFRMT_1920x1080i100_16_9 39
85#define HDMI_VFRMT_1280x720p100_16_9 40
86#define HDMI_VFRMT_720x576p100_4_3 41
87#define HDMI_VFRMT_720x576p100_16_9 42
88#define HDMI_VFRMT_720x576i100_4_3 43
89#define HDMI_VFRMT_1440x576i100_4_3 HDMI_VFRMT_720x576i100_4_3
90#define HDMI_VFRMT_720x576i100_16_9 44
91#define HDMI_VFRMT_1440x576i100_16_9 HDMI_VFRMT_720x576i100_16_9
92#define HDMI_VFRMT_1920x1080i120_16_9 45
93#define HDMI_VFRMT_1280x720p120_16_9 46
94#define HDMI_VFRMT_720x480p120_4_3 47
95#define HDMI_VFRMT_720x480p120_16_9 48
96#define HDMI_VFRMT_720x480i120_4_3 49
97#define HDMI_VFRMT_1440x480i120_4_3 HDMI_VFRMT_720x480i120_4_3
98#define HDMI_VFRMT_720x480i120_16_9 50
99#define HDMI_VFRMT_1440x480i120_16_9 HDMI_VFRMT_720x480i120_16_9
100#define HDMI_VFRMT_720x576p200_4_3 51
101#define HDMI_VFRMT_720x576p200_16_9 52
102#define HDMI_VFRMT_720x576i200_4_3 53
103#define HDMI_VFRMT_1440x576i200_4_3 HDMI_VFRMT_720x576i200_4_3
104#define HDMI_VFRMT_720x576i200_16_9 54
105#define HDMI_VFRMT_1440x576i200_16_9 HDMI_VFRMT_720x576i200_16_9
106#define HDMI_VFRMT_720x480p240_4_3 55
107#define HDMI_VFRMT_720x480p240_16_9 56
108#define HDMI_VFRMT_720x480i240_4_3 57
109#define HDMI_VFRMT_1440x480i240_4_3 HDMI_VFRMT_720x480i240_4_3
110#define HDMI_VFRMT_720x480i240_16_9 58
111#define HDMI_VFRMT_1440x480i240_16_9 HDMI_VFRMT_720x480i240_16_9
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define HDMI_VFRMT_FORCE_32BIT 0x7FFFFFFF
113
Ajay Singh Parmare67749b2013-01-23 18:47:04 +0530114/* Video Identification Codes from 65-127 are reserved for the future */
115#define HDMI_VFRMT_END 127
116
117/* VESA DMT TIMINGS */
118/* DMT ID: 23h, STD code: (81h, 80h), also a part of Established Timing III */
119#define HDMI_VFRMT_1280x1024p60_5_4 (HDMI_VFRMT_END + 1)
120#define DMT_VFRMT_END HDMI_VFRMT_1280x1024p60_5_4
121
122#define HDMI_VFRMT_MAX (DMT_VFRMT_END + 1)
123
124
Ajay Singh Parmar6b82d2b2012-07-19 17:23:26 +0530125extern int ext_resolution;
126
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127struct hdmi_disp_mode_timing_type {
128 uint32 video_format;
129 uint32 active_h;
130 uint32 front_porch_h;
131 uint32 pulse_width_h;
132 uint32 back_porch_h;
133 boolean active_low_h;
134 uint32 active_v;
135 uint32 front_porch_v;
136 uint32 pulse_width_v;
137 uint32 back_porch_v;
138 boolean active_low_v;
139 /* Must divide by 1000 to get the actual frequency in MHZ */
140 uint32 pixel_freq;
141 /* Must divide by 1000 to get the actual frequency in HZ */
142 uint32 refresh_rate;
143 boolean interlaced;
144 boolean supported;
145};
146
147#define HDMI_SETTINGS_640x480p60_4_3 \
148 {HDMI_VFRMT_640x480p60_4_3, 640, 16, 96, 48, TRUE, \
149 480, 10, 2, 33, TRUE, 25200, 60000, FALSE, TRUE}
150#define HDMI_SETTINGS_720x480p60_4_3 \
151 {HDMI_VFRMT_720x480p60_4_3, 720, 16, 62, 60, TRUE, \
Aravind Venkateswaranca82bd62012-01-10 15:57:53 -0800152 480, 9, 6, 30, TRUE, 27030, 60000, FALSE, TRUE}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153#define HDMI_SETTINGS_720x480p60_16_9 \
154 {HDMI_VFRMT_720x480p60_16_9, 720, 16, 62, 60, TRUE, \
Aravind Venkateswaranca82bd62012-01-10 15:57:53 -0800155 480, 9, 6, 30, TRUE, 27030, 60000, FALSE, TRUE}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700156#define HDMI_SETTINGS_1280x720p60_16_9 \
157 {HDMI_VFRMT_1280x720p60_16_9, 1280, 110, 40, 220, FALSE, \
158 720, 5, 5, 20, FALSE, 74250, 60000, FALSE, TRUE}
159#define HDMI_SETTINGS_1920x1080i60_16_9 \
160 {HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, FALSE, \
161 540, 2, 5, 5, FALSE, 74250, 60000, FALSE, TRUE}
162#define HDMI_SETTINGS_1440x480i60_4_3 \
163 {HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, TRUE, \
164 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE}
165#define HDMI_SETTINGS_1440x480i60_16_9 \
166 {HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, TRUE, \
167 240, 4, 3, 15, TRUE, 27000, 60000, TRUE, TRUE}
168#define HDMI_SETTINGS_1920x1080p60_16_9 \
169 {HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, FALSE, \
170 1080, 4, 5, 36, FALSE, 148500, 60000, FALSE, TRUE}
171#define HDMI_SETTINGS_720x576p50_4_3 \
172 {HDMI_VFRMT_720x576p50_4_3, 720, 12, 64, 68, TRUE, \
173 576, 5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE}
174#define HDMI_SETTINGS_720x576p50_16_9 \
175 {HDMI_VFRMT_720x576p50_16_9, 720, 12, 64, 68, TRUE, \
176 576, 5, 5, 39, TRUE, 27000, 50000, FALSE, TRUE}
177#define HDMI_SETTINGS_1280x720p50_16_9 \
178 {HDMI_VFRMT_1280x720p50_16_9, 1280, 440, 40, 220, FALSE, \
179 720, 5, 5, 20, FALSE, 74250, 50000, FALSE, TRUE}
180#define HDMI_SETTINGS_1440x576i50_4_3 \
181 {HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, TRUE, \
182 288, 2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE}
183#define HDMI_SETTINGS_1440x576i50_16_9 \
184 {HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, TRUE, \
185 288, 2, 3, 19, TRUE, 27000, 50000, TRUE, TRUE}
186#define HDMI_SETTINGS_1920x1080p50_16_9 \
187 {HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, FALSE, \
188 1080, 4, 5, 36, FALSE, 148500, 50000, FALSE, TRUE}
189#define HDMI_SETTINGS_1920x1080p24_16_9 \
190 {HDMI_VFRMT_1920x1080p24_16_9, 1920, 638, 44, 148, FALSE, \
191 1080, 4, 5, 36, FALSE, 74250, 24000, FALSE, TRUE}
192#define HDMI_SETTINGS_1920x1080p25_16_9 \
193 {HDMI_VFRMT_1920x1080p25_16_9, 1920, 528, 44, 148, FALSE, \
194 1080, 4, 5, 36, FALSE, 74250, 25000, FALSE, TRUE}
195#define HDMI_SETTINGS_1920x1080p30_16_9 \
196 {HDMI_VFRMT_1920x1080p30_16_9, 1920, 88, 44, 148, FALSE, \
197 1080, 4, 5, 36, FALSE, 74250, 30000, FALSE, TRUE}
Ajay Singh Parmare67749b2013-01-23 18:47:04 +0530198#define HDMI_SETTINGS_1280x1024p60_5_4 \
199 {HDMI_VFRMT_1280x1024p60_5_4, 1280, 48, 112, 248, FALSE, \
200 1024, 1, 3, 38, FALSE, 108000, 60000, FALSE, TRUE}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700201
202/* A lookup table for all the supported display modes by the HDMI
203 * hardware and driver. Use HDMI_SETUP_LUT in the module init to
204 * setup the LUT with the supported modes. */
205extern struct hdmi_disp_mode_timing_type
206 hdmi_common_supported_video_mode_lut[HDMI_VFRMT_MAX];
207
208/* Structure that encapsulates all the supported display modes by the HDMI sink
209 * device */
210struct hdmi_disp_mode_list_type {
211 uint32 disp_mode_list[HDMI_VFRMT_MAX];
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -0700212#define TOP_AND_BOTTOM 0x10
213#define FRAME_PACKING 0x20
214#define SIDE_BY_SIDE_HALF 0x40
215 uint32 disp_3d_mode_list[HDMI_VFRMT_MAX];
216 uint32 disp_multi_3d_mode_list[16];
217 uint32 disp_multi_3d_mode_list_cnt;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700218 uint32 num_of_elements;
219};
220#endif
221
Naseer Ahmed5cd6b862012-09-26 23:56:24 -0400222/*
223 * As per the CEA-861E spec, there can be a total of 10 short audio
224 * descriptors with each SAD being 3 bytes long.
225 * Thus, the maximum length of the audio data block would be 30 bytes
226 */
227#define MAX_AUDIO_DATA_BLOCK_SIZE 30
228#define MAX_SPKR_ALLOC_DATA_BLOCK_SIZE 3
229
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700230struct external_common_state_type {
231 boolean hpd_state;
232 struct kobject *uevent_kobj;
233 uint32 video_resolution;
Aravind Venkateswarand6556672012-11-02 15:34:44 -0700234 boolean default_res_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700235 struct device *dev;
Saurabh Shah79d05a62012-01-09 15:18:33 -0800236 struct switch_dev sdev;
Aravind Venkateswarancf44e5f2012-10-26 18:11:23 -0700237 struct switch_dev audio_sdev;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700238#ifdef CONFIG_FB_MSM_HDMI_3D
239 boolean format_3d;
240 void (*switch_3d)(boolean on);
241#endif
242#ifdef CONFIG_FB_MSM_HDMI_COMMON
243 boolean hdcp_active;
244 boolean hpd_feature_on;
245 boolean hdmi_sink;
246 struct hdmi_disp_mode_list_type disp_mode_list;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700247 uint16 video_latency, audio_latency;
Aravind Venkateswaran226b4292012-03-16 15:35:31 -0700248 uint16 physical_address;
Aravind Venkateswaran5066a5f2012-03-16 15:29:32 -0700249 uint32 preferred_video_format;
250 uint8 pt_scan_info;
251 uint8 it_scan_info;
252 uint8 ce_scan_info;
Aravind Venkateswaranfff7a7d2012-03-16 15:27:19 -0700253 uint8 spd_vendor_name[8];
254 uint8 spd_product_description[16];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700255 boolean present_3d;
256 boolean present_hdcp;
Naseer Ahmed5cd6b862012-09-26 23:56:24 -0400257 uint8 audio_data_block[MAX_AUDIO_DATA_BLOCK_SIZE];
258 int adb_size;
259 uint8 spkr_alloc_data_block[MAX_SPKR_ALLOC_DATA_BLOCK_SIZE];
260 int sadb_size;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700261 int (*read_edid_block)(int block, uint8 *edid_buf);
262 int (*hpd_feature)(int on);
263#endif
264};
265
266/* The external interface driver needs to initialize the common state. */
267extern struct external_common_state_type *external_common_state;
268extern struct mutex external_common_state_hpd_mutex;
Manoj Raoa2c27672011-08-30 17:19:39 -0700269extern struct mutex hdmi_msm_state_mutex;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700270
271#ifdef CONFIG_FB_MSM_HDMI_COMMON
272#define VFRMT_NOT_SUPPORTED(VFRMT) \
273 {VFRMT, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FALSE}
274#define HDMI_SETUP_LUT(MODE) do { \
275 struct hdmi_disp_mode_timing_type mode \
276 = HDMI_SETTINGS_ ## MODE; \
277 hdmi_common_supported_video_mode_lut[mode.video_format] \
278 = mode; \
279 } while (0)
280
281int hdmi_common_read_edid(void);
282const char *video_format_2string(uint32 format);
283bool hdmi_common_get_video_format_from_drv_data(struct msm_fb_data_type *mfd);
284const struct hdmi_disp_mode_timing_type *hdmi_common_get_mode(uint32 mode);
285const struct hdmi_disp_mode_timing_type *hdmi_common_get_supported_mode(
286 uint32 mode);
Eugene Yasmand0de5f92011-12-20 13:57:28 +0200287const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_mode(uint32 mode);
288const struct hdmi_disp_mode_timing_type *hdmi_mhl_get_supported_mode(
289 uint32 mode);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700290void hdmi_common_init_panel_info(struct msm_panel_info *pinfo);
Aravind Venkateswaran5479cc12012-03-16 15:40:40 -0700291
292ssize_t video_3d_format_2string(uint32 format, char *buf);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700293#endif
294
295int external_common_state_create(struct platform_device *pdev);
296void external_common_state_remove(void);
297
298#endif /* __EXTERNAL_COMMON_H__ */