blob: d66c825b1cc412b1a1a4189350af251c74127012 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/gpio_event.h>
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/board.h>
18#include <mach/msm_iomap.h>
19#include <mach/msm_hsusb.h>
20#include <mach/rpc_hsusb.h>
21#include <mach/rpc_pmapp.h>
22#include <mach/usbdiag.h>
23#include <mach/msm_memtypes.h>
24#include <mach/msm_serial_hs.h>
25#include <linux/usb/android.h>
26#include <linux/platform_device.h>
27#include <linux/io.h>
28#include <linux/gpio.h>
29#include <mach/vreg.h>
30#include <mach/pmic.h>
31#include <mach/socinfo.h>
32#include <linux/mtd/nand.h>
33#include <linux/mtd/partitions.h>
34#include <asm/mach/mmc.h>
35#include <linux/i2c.h>
36#include <linux/i2c/sx150x.h>
37#include <linux/gpio.h>
38#include <linux/android_pmem.h>
39#include <linux/bootmem.h>
40#include <linux/mfd/marimba.h>
41#include <mach/vreg.h>
42#include <linux/power_supply.h>
43#include <mach/rpc_pmapp.h>
44
45#include <mach/msm_battery.h>
46#include <linux/smsc911x.h>
47#include <linux/atmel_maxtouch.h>
48#include "devices.h"
49#include "timer.h"
50#include "devices-msm7x2xa.h"
51#include "pm.h"
52#include <mach/rpc_server_handset.h>
53#include <mach/socinfo.h>
54
55#define PMEM_KERNEL_EBI1_SIZE 0x3A000
56#define MSM_PMEM_AUDIO_SIZE 0x5B000
57#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
58#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
Rahul Kashyap181d5552011-07-07 10:39:23 +053059#define BAHAMA_SLAVE_ID_FM_REG 0x02
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#define FM_GPIO 83
61
62enum {
63 GPIO_EXPANDER_IRQ_BASE = NR_MSM_IRQS + NR_GPIO_IRQS,
64 GPIO_EXPANDER_GPIO_BASE = NR_MSM_GPIOS,
65 /* SURF expander */
66 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
67 GPIO_BT_SYS_REST_EN = GPIO_CORE_EXPANDER_BASE,
68 GPIO_WLAN_EXT_POR_N,
69 GPIO_DISPLAY_PWR_EN,
70 GPIO_BACKLIGHT_EN,
71 GPIO_PRESSURE_XCLR,
72 GPIO_VREG_S3_EXP,
73 GPIO_UBM2M_PWRDWN,
74 GPIO_ETM_MODE_CS_N,
75 GPIO_HOST_VBUS_EN,
76 GPIO_SPI_MOSI,
77 GPIO_SPI_MISO,
78 GPIO_SPI_CLK,
79 GPIO_SPI_CS0_N,
80 GPIO_CORE_EXPANDER_IO13,
81 GPIO_CORE_EXPANDER_IO14,
82 GPIO_CORE_EXPANDER_IO15,
83 /* Camera expander */
84 GPIO_CAM_EXPANDER_BASE = GPIO_CORE_EXPANDER_BASE + 16,
85 GPIO_CAM_GP_STROBE_READY = GPIO_CAM_EXPANDER_BASE,
86 GPIO_CAM_GP_AFBUSY,
87 GPIO_CAM_GP_CAM_PWDN,
88 GPIO_CAM_GP_CAM1MP_XCLR,
89 GPIO_CAM_GP_CAMIF_RESET_N,
90 GPIO_CAM_GP_STROBE_CE,
91 GPIO_CAM_GP_LED_EN1,
92 GPIO_CAM_GP_LED_EN2,
93};
94
95#if defined(CONFIG_GPIO_SX150X)
96enum {
97 SX150X_CORE,
98 SX150X_CAM,
99};
100
101static struct sx150x_platform_data sx150x_data[] __initdata = {
102 [SX150X_CORE] = {
103 .gpio_base = GPIO_CORE_EXPANDER_BASE,
104 .oscio_is_gpo = false,
105 .io_pullup_ena = 0,
106 .io_pulldn_ena = 0,
107 .io_open_drain_ena = 0xfef8,
108 .irq_summary = -1,
109 },
110 [SX150X_CAM] = {
111 .gpio_base = GPIO_CAM_EXPANDER_BASE,
112 .oscio_is_gpo = false,
113 .io_pullup_ena = 0,
114 .io_pulldn_ena = 0,
115 .io_open_drain_ena = 0x23,
116 .irq_summary = -1,
117 },
118};
119#endif
120
121#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
122
123 /* FM Platform power and shutdown routines */
124#define FPGA_MSM_CNTRL_REG2 0x90008010
125static void config_pcm_i2s_mode(int mode)
126{
127 void __iomem *cfg_ptr;
128 u8 reg2;
129
130 cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char));
131
132 if (!cfg_ptr)
133 return;
134 if (mode) {
135 /*enable the pcm mode in FPGA*/
136 reg2 = readb_relaxed(cfg_ptr);
137 if (reg2 == 0) {
138 reg2 = 1;
139 writeb_relaxed(reg2, cfg_ptr);
140 }
141 } else {
142 /*enable i2s mode in FPGA*/
143 reg2 = readb_relaxed(cfg_ptr);
144 if (reg2 == 1) {
145 reg2 = 0;
146 writeb_relaxed(reg2, cfg_ptr);
147 }
148 }
149 iounmap(cfg_ptr);
150}
151
152static unsigned fm_i2s_config_power_on[] = {
153 /*FM_I2S_SD*/
154 GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
155 /*FM_I2S_WS*/
156 GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
157 /*FM_I2S_SCK*/
158 GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
159};
160
161static unsigned fm_i2s_config_power_off[] = {
162 /*FM_I2S_SD*/
163 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
164 /*FM_I2S_WS*/
165 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
166 /*FM_I2S_SCK*/
167 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
168};
169
170static unsigned bt_config_power_on[] = {
171 /*RFR*/
172 GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
173 /*CTS*/
174 GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
175 /*RX*/
176 GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
177 /*TX*/
178 GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
179};
180static unsigned bt_config_pcm_on[] = {
181 /*PCM_DOUT*/
182 GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
183 /*PCM_DIN*/
184 GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
185 /*PCM_SYNC*/
186 GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
187 /*PCM_CLK*/
188 GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
189};
190static unsigned bt_config_power_off[] = {
191 /*RFR*/
192 GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
193 /*CTS*/
194 GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
195 /*RX*/
196 GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
197 /*TX*/
198 GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
199};
200static unsigned bt_config_pcm_off[] = {
201 /*PCM_DOUT*/
202 GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
203 /*PCM_DIN*/
204 GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
205 /*PCM_SYNC*/
206 GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
207 /*PCM_CLK*/
208 GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
209};
210
211static int config_i2s(int mode)
212{
213 int pin, rc = 0;
214
215 if (mode == FM_I2S_ON) {
216 if (machine_is_msm7x27a_surf())
217 config_pcm_i2s_mode(0);
218 pr_err("%s mode = FM_I2S_ON", __func__);
219 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on);
220 pin++) {
221 rc = gpio_tlmm_config(
222 fm_i2s_config_power_on[pin],
223 GPIO_CFG_ENABLE
224 );
225 if (rc < 0)
226 return rc;
227 }
228 } else if (mode == FM_I2S_OFF) {
229 pr_err("%s mode = FM_I2S_OFF", __func__);
230 for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off);
231 pin++) {
232 rc = gpio_tlmm_config(
233 fm_i2s_config_power_off[pin],
234 GPIO_CFG_ENABLE
235 );
236 if (rc < 0)
237 return rc;
238 }
239 }
240 return rc;
241}
242static int config_pcm(int mode)
243{
244 int pin, rc = 0;
245
246 if (mode == BT_PCM_ON) {
247 if (machine_is_msm7x27a_surf())
248 config_pcm_i2s_mode(1);
249 pr_err("%s mode =BT_PCM_ON", __func__);
250 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on);
251 pin++) {
252 rc = gpio_tlmm_config(bt_config_pcm_on[pin],
253 GPIO_CFG_ENABLE);
254 if (rc < 0)
255 return rc;
256 }
257 } else if (mode == BT_PCM_OFF) {
258 pr_err("%s mode =BT_PCM_OFF", __func__);
259 for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off);
260 pin++) {
261 rc = gpio_tlmm_config(bt_config_pcm_off[pin],
262 GPIO_CFG_ENABLE);
263 if (rc < 0)
264 return rc;
265 }
266
267 }
268
269 return rc;
270}
271
272static int msm_bahama_setup_pcm_i2s(int mode)
273{
274 int fm_state = 0, bt_state = 0;
275 int rc = 0;
276 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
277
278 fm_state = marimba_get_fm_status(&config);
279 bt_state = marimba_get_bt_status(&config);
280
281 switch (mode) {
282 case BT_PCM_ON:
283 case BT_PCM_OFF:
284 if (!fm_state)
285 rc = config_pcm(mode);
286 break;
287 case FM_I2S_ON:
288 rc = config_i2s(mode);
289 break;
290 case FM_I2S_OFF:
291 if (bt_state)
292 rc = config_pcm(BT_PCM_ON);
293 else
294 rc = config_i2s(mode);
295 break;
296 default:
297 rc = -EIO;
298 pr_err("%s:Unsupported mode", __func__);
299 }
300 return rc;
301}
302
Rahul Kashyap181d5552011-07-07 10:39:23 +0530303static int bt_set_gpio(int on)
304{
305 int rc = 0;
306 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
307
308 if (on) {
309 rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1);
310 msleep(100);
311 } else {
312 if (!marimba_get_fm_status(&config) &&
313 !marimba_get_bt_status(&config)) {
314 gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0);
315 rc = gpio_direction_input(GPIO_BT_SYS_REST_EN);
316 msleep(100);
317 }
318 }
319 if (rc)
320 pr_err("%s: BT sys_reset_en GPIO : Error", __func__);
321
322 return rc;
323}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700324static struct vreg *fm_regulator;
325static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
326{
327 int rc = 0;
328 const char *id = "FMPW";
329 uint32_t irqcfg;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530330 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
331 u8 value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700332
333 /* Voting for 1.8V Regulator */
334 fm_regulator = vreg_get(NULL , "msme1");
335 if (IS_ERR(fm_regulator)) {
336 pr_err("%s: vreg get failed with : (%ld)\n",
337 __func__, PTR_ERR(fm_regulator));
338 return -EINVAL;
339 }
340
341 /* Set the voltage level to 1.8V */
342 rc = vreg_set_level(fm_regulator, 1800);
343 if (rc < 0) {
344 pr_err("%s: set regulator level failed with :(%d)\n",
345 __func__, rc);
346 goto fm_vreg_fail;
347 }
348
349 /* Enabling the 1.8V regulator */
350 rc = vreg_enable(fm_regulator);
351 if (rc) {
352 pr_err("%s: enable regulator failed with :(%d)\n",
353 __func__, rc);
354 goto fm_vreg_fail;
355 }
356
357 /* Voting for 19.2MHz clock */
358 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
359 PMAPP_CLOCK_VOTE_ON);
360 if (rc < 0) {
361 pr_err("%s: clock vote failed with :(%d)\n",
362 __func__, rc);
363 goto fm_clock_vote_fail;
364 }
365
Rahul Kashyap181d5552011-07-07 10:39:23 +0530366 rc = bt_set_gpio(1);
367 if (rc) {
368 pr_err("%s: bt_set_gpio = %d", __func__, rc);
369 goto fm_gpio_config_fail;
370 }
371 /*re-write FM Slave Id, after reset*/
372 value = BAHAMA_SLAVE_ID_FM_ADDR;
373 rc = marimba_write_bit_mask(&config,
374 BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF);
375 if (rc < 0) {
376 pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc);
377 goto fm_gpio_config_fail;
378 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700379 /* Configuring the FM GPIO */
380 irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
381 GPIO_CFG_2MA);
382
383 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
384 if (rc) {
385 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
386 __func__, irqcfg, rc);
387 goto fm_gpio_config_fail;
388 }
389
390 return 0;
391
392fm_gpio_config_fail:
393 pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
394 PMAPP_CLOCK_VOTE_OFF);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530395 bt_set_gpio(0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700396fm_clock_vote_fail:
397 vreg_disable(fm_regulator);
398
399fm_vreg_fail:
400 vreg_put(fm_regulator);
401
402 return rc;
403};
404
405static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
406{
407 int rc;
408 const char *id = "FMPW";
409
410 /* Releasing the GPIO line used by FM */
411 uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
412 GPIO_CFG_2MA);
413
414 rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE);
415 if (rc)
416 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
417 __func__, irqcfg, rc);
418
419 /* Releasing the 1.8V Regulator */
420 if (fm_regulator != NULL) {
421 rc = vreg_disable(fm_regulator);
422
423 if (rc)
424 pr_err("%s: disable regulator failed:(%d)\n",
425 __func__, rc);
426 fm_regulator = NULL;
427 }
428
429 /* Voting off the clock */
430 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
431 PMAPP_CLOCK_VOTE_OFF);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700432 if (rc < 0)
433 pr_err("%s: voting off failed with :(%d)\n",
434 __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530435 rc = bt_set_gpio(0);
436 if (rc)
437 pr_err("%s: bt_set_gpio = %d", __func__, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438}
439
440static struct marimba_fm_platform_data marimba_fm_pdata = {
441 .fm_setup = fm_radio_setup,
442 .fm_shutdown = fm_radio_shutdown,
443 .irq = MSM_GPIO_TO_INT(FM_GPIO),
444 .vreg_s2 = NULL,
445 .vreg_xo_out = NULL,
446 /* Configuring the FM SoC as I2S Master */
447 .is_fm_soc_i2s_master = true,
448 .config_i2s_gpio = msm_bahama_setup_pcm_i2s,
449};
450
451static struct platform_device msm_bt_power_device = {
452 .name = "bt_power",
453};
454 struct bahama_config_register {
455 u8 reg;
456 u8 value;
457 u8 mask;
458 };
459static const char * const vregs_bahama_name[] = {
460 "msme1",
461 "bt",
462};
463static struct vreg *vregs_bahama[ARRAY_SIZE(vregs_bahama_name)];
464
465static int bahama_bt(int on)
466{
467
468 int rc = 0;
469 int i;
470
471 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
472
473 struct bahama_variant_register {
474 const size_t size;
475 const struct bahama_config_register *set;
476 };
477
478 const struct bahama_config_register *p;
479
480 u8 version;
481
482 const struct bahama_config_register v10_bt_on[] = {
483 { 0xE9, 0x00, 0xFF },
484 { 0xF4, 0x80, 0xFF },
485 { 0xE4, 0x00, 0xFF },
486 { 0xE5, 0x00, 0x0F },
487#ifdef CONFIG_WLAN
488 { 0xE6, 0x38, 0x7F },
489 { 0xE7, 0x06, 0xFF },
490#endif
491 { 0xE9, 0x21, 0xFF },
492 { 0x01, 0x0C, 0x1F },
493 { 0x01, 0x08, 0x1F },
494 };
495
496 const struct bahama_config_register v20_bt_on_fm_off[] = {
497 { 0x11, 0x0C, 0xFF },
498 { 0x13, 0x01, 0xFF },
499 { 0xF4, 0x80, 0xFF },
500 { 0xF0, 0x00, 0xFF },
501 { 0xE9, 0x00, 0xFF },
502#ifdef CONFIG_WLAN
503 { 0x81, 0x00, 0x7F },
504 { 0x82, 0x00, 0xFF },
505 { 0xE6, 0x38, 0x7F },
506 { 0xE7, 0x06, 0xFF },
507#endif
508 { 0x8E, 0x15, 0xFF },
509 { 0x8F, 0x15, 0xFF },
510 { 0x90, 0x15, 0xFF },
511
512 { 0xE9, 0x21, 0xFF },
513 };
514
515 const struct bahama_config_register v20_bt_on_fm_on[] = {
516 { 0x11, 0x0C, 0xFF },
517 { 0x13, 0x01, 0xFF },
518 { 0xF4, 0x86, 0xFF },
519 { 0xF0, 0x06, 0xFF },
520 { 0xE9, 0x00, 0xFF },
521#ifdef CONFIG_WLAN
522 { 0x81, 0x00, 0x7F },
523 { 0x82, 0x00, 0xFF },
524 { 0xE6, 0x38, 0x7F },
525 { 0xE7, 0x06, 0xFF },
526#endif
527 { 0xE9, 0x21, 0xFF },
528 };
529
530 const struct bahama_config_register v10_bt_off[] = {
531 { 0xE9, 0x00, 0xFF },
532 };
533
534 const struct bahama_config_register v20_bt_off_fm_off[] = {
535 { 0xF4, 0x84, 0xFF },
536 { 0xF0, 0x04, 0xFF },
537 { 0xE9, 0x00, 0xFF }
538 };
539
540 const struct bahama_config_register v20_bt_off_fm_on[] = {
541 { 0xF4, 0x86, 0xFF },
542 { 0xF0, 0x06, 0xFF },
543 { 0xE9, 0x00, 0xFF }
544 };
545 const struct bahama_variant_register bt_bahama[2][3] = {
546 {
547 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
548 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
549 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
550 },
551 {
552 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
553 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
554 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
555 }
556 };
557
558 u8 offset = 0; /* index into bahama configs */
559 on = on ? 1 : 0;
560 version = marimba_read_bahama_ver(&config);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530561 if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) {
562 dev_err(&msm_bt_power_device.dev, "%s: Bahama \
563 version read Error, version = %d \n",
564 __func__, version);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700565 return -EIO;
566 }
567
568 if (version == BAHAMA_VER_2_0) {
569 if (marimba_get_fm_status(&config))
570 offset = 0x01;
571 }
572
573 p = bt_bahama[on][version + offset].set;
574
575 dev_info(&msm_bt_power_device.dev,
576 "%s: found version %d\n", __func__, version);
577
578 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
579 u8 value = (p+i)->value;
580 rc = marimba_write_bit_mask(&config,
581 (p+i)->reg,
582 &value,
583 sizeof((p+i)->value),
584 (p+i)->mask);
585 if (rc < 0) {
586 dev_err(&msm_bt_power_device.dev,
587 "%s: reg %x write failed: %d\n",
588 __func__, (p+i)->reg, rc);
589 return rc;
590 }
Rahul Kashyap92497af2011-07-07 12:13:52 +0530591 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700592 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
593 __func__, (p+i)->reg,
594 value, (p+i)->mask);
595 value = 0;
596 rc = marimba_read_bit_mask(&config,
597 (p+i)->reg, &value,
598 sizeof((p+i)->value), (p+i)->mask);
599 if (rc < 0)
600 dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error",
601 __func__);
Rahul Kashyap92497af2011-07-07 12:13:52 +0530602 dev_dbg(&msm_bt_power_device.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603 "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n",
604 __func__, (p+i)->reg,
605 value, (p+i)->mask);
606 }
607 /* Update BT Status */
608 if (on)
609 marimba_set_bt_status(&config, true);
610 else
611 marimba_set_bt_status(&config, false);
612 return rc;
613}
614static int bluetooth_switch_regulators(int on)
615{
616 int i, rc = 0;
617
618 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
619 if (!vregs_bahama[i]) {
620 pr_err("%s: vreg_get %s failed(%d)\n",
621 __func__, vregs_bahama_name[i], rc);
622 goto vreg_fail;
623 }
624 rc = on ? vreg_set_level(vregs_bahama[i], i ? 2900 :
625 1800) : 0;
626
627 if (rc < 0) {
628 pr_err("%s: vreg set level failed (%d)\n",
629 __func__, rc);
630 goto vreg_set_level_fail;
631 }
632
633 rc = on ? vreg_enable(vregs_bahama[i]) :
634 vreg_disable(vregs_bahama[i]);
635
636 if (rc < 0) {
637 pr_err("%s: vreg %s %s failed(%d)\n",
638 __func__, vregs_bahama_name[i],
639 on ? "enable" : "disable", rc);
640 goto vreg_fail;
641 }
642 }
643 return rc;
644
645vreg_fail:
646 while (i) {
647 if (on)
648 vreg_disable(vregs_bahama[--i]);
649 }
650vreg_set_level_fail:
651 vreg_put(vregs_bahama[0]);
652 vreg_put(vregs_bahama[1]);
653 return rc;
654}
655
656static unsigned int msm_bahama_setup_power(void)
657{
658 int rc = 0;
659 struct vreg *vreg_s3 = NULL;
660
661 vreg_s3 = vreg_get(NULL, "msme1");
662 if (IS_ERR(vreg_s3)) {
663 pr_err("%s: vreg get failed (%ld)\n",
664 __func__, PTR_ERR(vreg_s3));
665 return PTR_ERR(vreg_s3);
666 }
667 rc = vreg_set_level(vreg_s3, 1800);
668 if (rc < 0) {
669 pr_err("%s: vreg set level failed (%d)\n",
670 __func__, rc);
671 goto vreg_fail;
672 }
673 rc = vreg_enable(vreg_s3);
674 if (rc < 0) {
675 pr_err("%s: vreg enable failed (%d)\n",
676 __func__, rc);
677 goto vreg_fail;
678 }
679
680 /*setup Bahama_sys_reset_n*/
681 rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n");
682 if (rc < 0) {
683 pr_err("%s: gpio_request %d = %d\n", __func__,
684 GPIO_BT_SYS_REST_EN, rc);
685 goto vreg_fail;
686 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530687 rc = bt_set_gpio(1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700688 if (rc < 0) {
Rahul Kashyap181d5552011-07-07 10:39:23 +0530689 pr_err("%s: bt_set_gpio %d = %d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690 GPIO_BT_SYS_REST_EN, rc);
691 goto gpio_fail;
692 }
693 return rc;
694
695gpio_fail:
696 gpio_free(GPIO_BT_SYS_REST_EN);
697vreg_fail:
698 vreg_put(vreg_s3);
699 return rc;
700}
701
702static unsigned int msm_bahama_shutdown_power(int value)
703{
704 int rc = 0;
705 struct vreg *vreg_s3 = NULL;
706
707 vreg_s3 = vreg_get(NULL, "msme1");
708 if (IS_ERR(vreg_s3)) {
709 pr_err("%s: vreg get failed (%ld)\n",
710 __func__, PTR_ERR(vreg_s3));
711 return PTR_ERR(vreg_s3);
712 }
713 rc = vreg_disable(vreg_s3);
714 if (rc) {
715 pr_err("%s: vreg disable failed (%d)\n",
716 __func__, rc);
717 vreg_put(vreg_s3);
718 return rc;
719 }
Rahul Kashyape8698c62011-07-20 20:43:05 +0530720 if (value == BAHAMA_ID) {
721 rc = bt_set_gpio(0);
722 if (rc) {
723 pr_err("%s: bt_set_gpio = %d\n",
724 __func__, rc);
725 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530726 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700727 return rc;
728}
729
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700730static unsigned int msm_bahama_core_config(int type)
731{
732 int rc = 0;
733
734 if (type == BAHAMA_ID) {
735 int i;
Rahul Kashyap181d5552011-07-07 10:39:23 +0530736 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700737 const struct bahama_config_register v20_init[] = {
738 /* reg, value, mask */
739 { 0xF4, 0x84, 0xFF }, /* AREG */
740 { 0xF0, 0x04, 0xFF } /* DREG */
741 };
742 if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) {
743 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
744 u8 value = v20_init[i].value;
745 rc = marimba_write_bit_mask(&config,
746 v20_init[i].reg,
747 &value,
748 sizeof(v20_init[i].value),
749 v20_init[i].mask);
750 if (rc < 0) {
751 pr_err("%s: reg %d write failed: %d\n",
752 __func__, v20_init[i].reg, rc);
753 return rc;
754 }
755 pr_debug("%s: reg 0x%02x value 0x%02x"
756 " mask 0x%02x\n",
757 __func__, v20_init[i].reg,
758 v20_init[i].value, v20_init[i].mask);
759 }
760 }
761 }
Rahul Kashyap181d5552011-07-07 10:39:23 +0530762 rc = bt_set_gpio(0);
763 if (rc) {
764 pr_err("%s: bt_set_gpio = %d\n",
765 __func__, rc);
766 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700767 pr_debug("core type: %d\n", type);
768 return rc;
769}
770
771static int bluetooth_power(int on)
772{
773 int pin, rc = 0;
774 const char *id = "BTPW";
775 int cid = 0;
776
777 cid = adie_get_detected_connectivity_type();
778 if (cid != BAHAMA_ID) {
779 pr_err("%s: unexpected adie connectivity type: %d\n",
780 __func__, cid);
781 return -ENODEV;
782 }
783 if (on) {
784 /*setup power for BT SOC*/
Rahul Kashyap181d5552011-07-07 10:39:23 +0530785 rc = bt_set_gpio(on);
786 if (rc) {
787 pr_err("%s: bt_set_gpio = %d\n",
788 __func__, rc);
789 goto exit;
790 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700791 rc = bluetooth_switch_regulators(on);
792 if (rc < 0) {
793 pr_err("%s: bluetooth_switch_regulators rc = %d",
794 __func__, rc);
795 goto exit;
796 }
797 /*setup BT GPIO lines*/
798 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on);
799 pin++) {
800 rc = gpio_tlmm_config(bt_config_power_on[pin],
801 GPIO_CFG_ENABLE);
802 if (rc < 0) {
803 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
804 __func__,
805 bt_config_power_on[pin],
806 rc);
807 goto fail_power;
808 }
809 }
810 /*Setup BT clocks*/
811 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
812 PMAPP_CLOCK_VOTE_ON);
813 if (rc < 0) {
814 pr_err("Failed to vote for TCXO_D1 ON\n");
815 goto fail_clock;
816 }
817 msleep(20);
818
819 /*I2C config for Bahama*/
820 rc = bahama_bt(1);
821 if (rc < 0) {
822 pr_err("%s: bahama_bt rc = %d", __func__, rc);
823 goto fail_i2c;
824 }
825 msleep(20);
826
827 /*setup BT PCM lines*/
828 rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON);
829 if (rc < 0) {
830 pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n",
831 __func__, rc);
832 goto fail_power;
833 }
834 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
835 PMAPP_CLOCK_VOTE_PIN_CTRL);
836 if (rc < 0)
837 pr_err("%s:Pin Control Failed, rc = %d",
838 __func__, rc);
839
840 } else {
841 rc = bahama_bt(0);
842 if (rc < 0)
843 pr_err("%s: bahama_bt rc = %d", __func__, rc);
Rahul Kashyap181d5552011-07-07 10:39:23 +0530844
845 rc = bt_set_gpio(on);
846 if (rc) {
847 pr_err("%s: bt_set_gpio = %d\n",
848 __func__, rc);
849 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700850fail_i2c:
851 rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1,
852 PMAPP_CLOCK_VOTE_OFF);
853 if (rc < 0)
854 pr_err("%s: Failed to vote Off D1\n", __func__);
855fail_clock:
856 for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off);
857 pin++) {
858 rc = gpio_tlmm_config(bt_config_power_off[pin],
859 GPIO_CFG_ENABLE);
860 if (rc < 0) {
861 pr_err("%s: gpio_tlmm_config(%#x)=%d\n",
862 __func__, bt_config_power_off[pin], rc);
863 }
864 }
865 rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF);
866 if (rc < 0) {
867 pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n",
868 __func__, rc);
869 }
870fail_power:
871 rc = bluetooth_switch_regulators(0);
872 if (rc < 0) {
873 pr_err("%s: switch_regulators : rc = %d",\
874 __func__, rc);
875 goto exit;
876 }
877 }
878 return rc;
879exit:
880 pr_err("%s: failed with rc = %d", __func__, rc);
881 return rc;
882}
883
884static int __init bt_power_init(void)
885{
886 int i, rc = 0;
887 for (i = 0; i < ARRAY_SIZE(vregs_bahama_name); i++) {
888 vregs_bahama[i] = vreg_get(NULL,
889 vregs_bahama_name[i]);
890 if (IS_ERR(vregs_bahama[i])) {
891 pr_err("%s: vreg get %s failed (%ld)\n",
892 __func__, vregs_bahama_name[i],
893 PTR_ERR(vregs_bahama[i]));
894 rc = PTR_ERR(vregs_bahama[i]);
895 goto vreg_get_fail;
896 }
897 }
898
899 msm_bt_power_device.dev.platform_data = &bluetooth_power;
900
901 return rc;
902
903vreg_get_fail:
904 while (i)
905 vreg_put(vregs_bahama[--i]);
906 return rc;
907}
908
909static struct marimba_platform_data marimba_pdata = {
910 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
911 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
912 .bahama_setup = msm_bahama_setup_power,
913 .bahama_shutdown = msm_bahama_shutdown_power,
914 .bahama_core_config = msm_bahama_core_config,
915 .fm = &marimba_fm_pdata,
916};
917
918#endif
919
920#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
921static struct i2c_board_info core_exp_i2c_info[] __initdata = {
922 {
923 I2C_BOARD_INFO("sx1509q", 0x3e),
924 },
925};
926static struct i2c_board_info cam_exp_i2c_info[] __initdata = {
927 {
928 I2C_BOARD_INFO("sx1508q", 0x22),
929 .platform_data = &sx150x_data[SX150X_CAM],
930 },
931};
932#endif
933#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
934static struct i2c_board_info bahama_devices[] = {
935{
936 I2C_BOARD_INFO("marimba", 0xc),
937 .platform_data = &marimba_pdata,
938},
939};
940#endif
941
942#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
943static void __init register_i2c_devices(void)
944{
945
946 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
947 cam_exp_i2c_info,
948 ARRAY_SIZE(cam_exp_i2c_info));
949
950 if (machine_is_msm7x27a_surf())
951 sx150x_data[SX150X_CORE].io_open_drain_ena = 0xe0f0;
952
953 core_exp_i2c_info[0].platform_data =
954 &sx150x_data[SX150X_CORE];
955
956 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
957 core_exp_i2c_info,
958 ARRAY_SIZE(core_exp_i2c_info));
959#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
960 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
961 bahama_devices,
962 ARRAY_SIZE(bahama_devices));
963#endif
964}
965#endif
966
967static struct msm_gpio qup_i2c_gpios_io[] = {
968 { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
969 "qup_scl" },
970 { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
971 "qup_sda" },
972 { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
973 "qup_scl" },
974 { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
975 "qup_sda" },
976};
977
978static struct msm_gpio qup_i2c_gpios_hw[] = {
979 { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
980 "qup_scl" },
981 { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
982 "qup_sda" },
983 { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
984 "qup_scl" },
985 { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
986 "qup_sda" },
987};
988
989static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
990{
991 int rc;
992
993 if (adap_id < 0 || adap_id > 1)
994 return;
995
996 /* Each adapter gets 2 lines from the table */
997 if (config_type)
998 rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2);
999 else
1000 rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2);
1001 if (rc < 0)
1002 pr_err("QUP GPIO request/enable failed: %d\n", rc);
1003}
1004
1005static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = {
1006 .clk_freq = 100000,
1007 .clk = "gsbi_qup_clk",
1008 .pclk = "gsbi_qup_pclk",
1009 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1010};
1011
1012static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = {
1013 .clk_freq = 100000,
1014 .clk = "gsbi_qup_clk",
1015 .pclk = "gsbi_qup_pclk",
1016 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
1017};
1018
1019#ifdef CONFIG_ARCH_MSM7X27A
1020#define MSM_PMEM_MDP_SIZE 0x1DD1000
1021#define MSM_PMEM_ADSP_SIZE 0x1000000
1022
1023#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
1024#define MSM_FB_SIZE 0x260000
1025#else
1026#define MSM_FB_SIZE 0x195000
1027#endif
1028
1029#endif
1030
1031static struct android_usb_platform_data android_usb_pdata = {
1032 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1033};
1034
1035static struct platform_device android_usb_device = {
1036 .name = "android_usb",
1037 .id = -1,
1038 .dev = {
1039 .platform_data = &android_usb_pdata,
1040 },
1041};
1042
1043#ifdef CONFIG_USB_EHCI_MSM_72K
1044static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1045{
1046 int rc = 0;
1047 unsigned gpio;
1048
1049 gpio = GPIO_HOST_VBUS_EN;
1050
1051 rc = gpio_request(gpio, "i2c_host_vbus_en");
1052 if (rc < 0) {
1053 pr_err("failed to request %d GPIO\n", gpio);
1054 return;
1055 }
1056 gpio_direction_output(gpio, !!on);
1057 gpio_set_value_cansleep(gpio, !!on);
1058 gpio_free(gpio);
1059}
1060
1061static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1062 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1063};
1064
1065static void __init msm7x2x_init_host(void)
1066{
1067 msm_add_host(0, &msm_usb_host_pdata);
1068}
1069#endif
1070
1071#ifdef CONFIG_USB_MSM_OTG_72K
1072static int hsusb_rpc_connect(int connect)
1073{
1074 if (connect)
1075 return msm_hsusb_rpc_connect();
1076 else
1077 return msm_hsusb_rpc_close();
1078}
1079
1080static struct vreg *vreg_3p3;
1081static int msm_hsusb_ldo_init(int init)
1082{
1083 if (init) {
1084 vreg_3p3 = vreg_get(NULL, "usb");
1085 if (IS_ERR(vreg_3p3))
1086 return PTR_ERR(vreg_3p3);
1087 } else
1088 vreg_put(vreg_3p3);
1089
1090 return 0;
1091}
1092
1093static int msm_hsusb_ldo_enable(int enable)
1094{
1095 static int ldo_status;
1096
1097 if (!vreg_3p3 || IS_ERR(vreg_3p3))
1098 return -ENODEV;
1099
1100 if (ldo_status == enable)
1101 return 0;
1102
1103 ldo_status = enable;
1104
1105 if (enable)
1106 return vreg_enable(vreg_3p3);
1107
1108 return vreg_disable(vreg_3p3);
1109}
1110
1111#ifndef CONFIG_USB_EHCI_MSM_72K
1112static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init)
1113{
1114 int ret = 0;
1115
1116 if (init)
1117 ret = msm_pm_app_rpc_init(callback);
1118 else
1119 msm_pm_app_rpc_deinit(callback);
1120
1121 return ret;
1122}
1123#endif
1124
1125static struct msm_otg_platform_data msm_otg_pdata = {
1126#ifndef CONFIG_USB_EHCI_MSM_72K
1127 .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init,
1128#else
1129 .vbus_power = msm_hsusb_vbus_power,
1130#endif
1131 .rpc_connect = hsusb_rpc_connect,
1132 .core_clk = 1,
1133 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1134 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1135 .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT,
1136 .se1_gating = SE1_GATING_DISABLE,
1137 .ldo_init = msm_hsusb_ldo_init,
1138 .ldo_enable = msm_hsusb_ldo_enable,
1139 .chg_init = hsusb_chg_init,
1140 .chg_connected = hsusb_chg_connected,
1141 .chg_vbus_draw = hsusb_chg_vbus_draw,
1142};
1143#endif
1144
1145static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1146 .is_phy_status_timer_on = 1,
1147};
1148
1149static struct resource smc91x_resources[] = {
1150 [0] = {
1151 .start = 0x90000300,
1152 .end = 0x900003ff,
1153 .flags = IORESOURCE_MEM,
1154 },
1155 [1] = {
1156 .start = MSM_GPIO_TO_INT(4),
1157 .end = MSM_GPIO_TO_INT(4),
1158 .flags = IORESOURCE_IRQ,
1159 },
1160};
1161
1162static struct platform_device smc91x_device = {
1163 .name = "smc91x",
1164 .id = 0,
1165 .num_resources = ARRAY_SIZE(smc91x_resources),
1166 .resource = smc91x_resources,
1167};
1168
1169#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
1170 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
1171 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
1172 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT))
1173
1174static unsigned long vreg_sts, gpio_sts;
1175static struct vreg *vreg_mmc;
1176static struct vreg *vreg_emmc;
1177
1178struct sdcc_vreg {
1179 struct vreg *vreg_data;
1180 unsigned level;
1181};
1182
1183static struct sdcc_vreg sdcc_vreg_data[4];
1184
1185struct sdcc_gpio {
1186 struct msm_gpio *cfg_data;
1187 uint32_t size;
1188 struct msm_gpio *sleep_cfg_data;
1189};
1190
1191static struct msm_gpio sdc1_cfg_data[] = {
1192 {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1193 "sdc1_dat_3"},
1194 {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1195 "sdc1_dat_2"},
1196 {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1197 "sdc1_dat_1"},
1198 {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1199 "sdc1_dat_0"},
1200 {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1201 "sdc1_cmd"},
1202 {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1203 "sdc1_clk"},
1204};
1205
1206static struct msm_gpio sdc2_cfg_data[] = {
1207 {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1208 "sdc2_clk"},
1209 {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1210 "sdc2_cmd"},
1211 {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1212 "sdc2_dat_3"},
1213 {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1214 "sdc2_dat_2"},
1215 {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1216 "sdc2_dat_1"},
1217 {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1218 "sdc2_dat_0"},
1219};
1220
1221static struct msm_gpio sdc2_sleep_cfg_data[] = {
1222 {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1223 "sdc2_clk"},
1224 {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1225 "sdc2_cmd"},
1226 {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1227 "sdc2_dat_3"},
1228 {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1229 "sdc2_dat_2"},
1230 {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1231 "sdc2_dat_1"},
1232 {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
1233 "sdc2_dat_0"},
1234};
1235static struct msm_gpio sdc3_cfg_data[] = {
1236 {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1237 "sdc3_clk"},
1238 {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1239 "sdc3_cmd"},
1240 {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1241 "sdc3_dat_3"},
1242 {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1243 "sdc3_dat_2"},
1244 {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1245 "sdc3_dat_1"},
1246 {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1247 "sdc3_dat_0"},
1248#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1249 {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1250 "sdc3_dat_7"},
1251 {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1252 "sdc3_dat_6"},
1253 {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1254 "sdc3_dat_5"},
1255 {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1256 "sdc3_dat_4"},
1257#endif
1258};
1259
1260static struct msm_gpio sdc4_cfg_data[] = {
1261 {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1262 "sdc4_dat_3"},
1263 {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1264 "sdc4_dat_2"},
1265 {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1266 "sdc4_dat_1"},
1267 {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1268 "sdc4_cmd"},
1269 {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_8MA),
1270 "sdc4_dat_0"},
1271 {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA),
1272 "sdc4_clk"},
1273};
1274
1275static struct sdcc_gpio sdcc_cfg_data[] = {
1276 {
1277 .cfg_data = sdc1_cfg_data,
1278 .size = ARRAY_SIZE(sdc1_cfg_data),
1279 },
1280 {
1281 .cfg_data = sdc2_cfg_data,
1282 .size = ARRAY_SIZE(sdc2_cfg_data),
1283 .sleep_cfg_data = sdc2_sleep_cfg_data,
1284 },
1285 {
1286 .cfg_data = sdc3_cfg_data,
1287 .size = ARRAY_SIZE(sdc3_cfg_data),
1288 },
1289 {
1290 .cfg_data = sdc4_cfg_data,
1291 .size = ARRAY_SIZE(sdc4_cfg_data),
1292 },
1293};
1294
1295static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
1296{
1297 int rc = 0;
1298 struct sdcc_gpio *curr;
1299
1300 curr = &sdcc_cfg_data[dev_id - 1];
1301 if (!(test_bit(dev_id, &gpio_sts)^enable))
1302 return rc;
1303
1304 if (enable) {
1305 set_bit(dev_id, &gpio_sts);
1306 rc = msm_gpios_request_enable(curr->cfg_data, curr->size);
1307 if (rc)
1308 pr_err("%s: Failed to turn on GPIOs for slot %d\n",
1309 __func__, dev_id);
1310 } else {
1311 clear_bit(dev_id, &gpio_sts);
1312 if (curr->sleep_cfg_data) {
1313 rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size);
1314 msm_gpios_free(curr->sleep_cfg_data, curr->size);
1315 return rc;
1316 }
1317 msm_gpios_disable_free(curr->cfg_data, curr->size);
1318 }
1319 return rc;
1320}
1321
1322static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable)
1323{
1324 int rc = 0;
1325 struct sdcc_vreg *curr;
1326
1327 curr = &sdcc_vreg_data[dev_id - 1];
1328
1329 if (!(test_bit(dev_id, &vreg_sts)^enable))
1330 return rc;
1331
1332 if (enable) {
1333 set_bit(dev_id, &vreg_sts);
1334 rc = vreg_set_level(curr->vreg_data, curr->level);
1335 if (rc)
1336 pr_err("%s: vreg_set_level() = %d\n", __func__, rc);
1337
1338 rc = vreg_enable(curr->vreg_data);
1339 if (rc)
1340 pr_err("%s: vreg_enable() = %d\n", __func__, rc);
1341 } else {
1342 clear_bit(dev_id, &vreg_sts);
1343 rc = vreg_disable(curr->vreg_data);
1344 if (rc)
1345 pr_err("%s: vreg_disable() = %d\n", __func__, rc);
1346 }
1347 return rc;
1348}
1349
1350static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
1351{
1352 int rc = 0;
1353 struct platform_device *pdev;
1354
1355 pdev = container_of(dv, struct platform_device, dev);
1356
1357 rc = msm_sdcc_setup_gpio(pdev->id, !!vdd);
1358 if (rc)
1359 goto out;
1360
1361 rc = msm_sdcc_setup_vreg(pdev->id, !!vdd);
1362out:
1363 return rc;
1364}
1365
1366#define GPIO_SDC1_HW_DET 85
1367
1368#if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \
1369 && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION)
1370static unsigned int msm7x2xa_sdcc_slot_status(struct device *dev)
1371{
1372 int status;
1373
1374 status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT,
1375 GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE);
1376 if (status)
1377 pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__,
1378 GPIO_SDC1_HW_DET);
1379
1380 status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect");
1381 if (status) {
1382 pr_err("%s:Failed to request GPIO %d\n", __func__,
1383 GPIO_SDC1_HW_DET);
1384 } else {
1385 status = gpio_direction_input(GPIO_SDC1_HW_DET);
1386 if (!status)
1387 status = gpio_get_value(GPIO_SDC1_HW_DET);
1388 gpio_free(GPIO_SDC1_HW_DET);
1389 }
1390 return status;
1391}
1392#endif
1393
1394#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1395static struct mmc_platform_data sdc1_plat_data = {
1396 .ocr_mask = MMC_VDD_28_29,
1397 .translate_vdd = msm_sdcc_setup_power,
1398 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1399 .msmsdcc_fmin = 144000,
1400 .msmsdcc_fmid = 24576000,
1401 .msmsdcc_fmax = 49152000,
1402#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
1403 .status = msm7x2xa_sdcc_slot_status,
1404 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
1405 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1406#endif
1407};
1408#endif
1409
1410#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1411static struct mmc_platform_data sdc2_plat_data = {
1412 /*
1413 * SDC2 supports only 1.8V, claim for 2.85V range is just
1414 * for allowing buggy cards who advertise 2.8V even though
1415 * they can operate at 1.8V supply.
1416 */
1417 .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195,
1418 .translate_vdd = msm_sdcc_setup_power,
1419 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1420#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
1421 .sdiowakeup_irq = MSM_GPIO_TO_INT(66),
1422#endif
1423 .msmsdcc_fmin = 144000,
1424 .msmsdcc_fmid = 24576000,
1425 .msmsdcc_fmax = 49152000,
1426#ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED
1427 .dummy52_required = 1,
1428#endif
1429};
1430#endif
1431
1432#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1433static struct mmc_platform_data sdc3_plat_data = {
1434 .ocr_mask = MMC_VDD_28_29,
1435 .translate_vdd = msm_sdcc_setup_power,
1436#ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT
1437 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
1438#else
1439 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1440#endif
1441 .msmsdcc_fmin = 144000,
1442 .msmsdcc_fmid = 24576000,
1443 .msmsdcc_fmax = 49152000,
1444 .nonremovable = 1,
1445};
1446#endif
1447
1448#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1449 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1450static struct mmc_platform_data sdc4_plat_data = {
1451 .ocr_mask = MMC_VDD_28_29,
1452 .translate_vdd = msm_sdcc_setup_power,
1453 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
1454 .msmsdcc_fmin = 144000,
1455 .msmsdcc_fmid = 24576000,
1456 .msmsdcc_fmax = 49152000,
1457};
1458#endif
1459#endif
1460
1461#ifdef CONFIG_SERIAL_MSM_HS
1462static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
1463 .inject_rx_on_wakeup = 1,
1464 .rx_to_inject = 0xFD,
1465};
1466#endif
1467static struct msm_pm_platform_data msm7x27a_pm_data[MSM_PM_SLEEP_MODE_NR] = {
1468 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = {
1469 .idle_supported = 1,
1470 .suspend_supported = 1,
1471 .idle_enabled = 1,
1472 .suspend_enabled = 1,
1473 .latency = 16000,
1474 .residency = 20000,
1475 },
1476 [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = {
1477 .idle_supported = 1,
1478 .suspend_supported = 1,
1479 .idle_enabled = 1,
1480 .suspend_enabled = 1,
1481 .latency = 12000,
1482 .residency = 20000,
1483 },
1484 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = {
1485 .idle_supported = 1,
1486 .suspend_supported = 1,
1487 .idle_enabled = 0,
1488 .suspend_enabled = 1,
1489 .latency = 2000,
1490 .residency = 0,
1491 },
1492 [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = {
1493 .idle_supported = 1,
1494 .suspend_supported = 1,
1495 .idle_enabled = 1,
1496 .suspend_enabled = 1,
1497 .latency = 2,
1498 .residency = 0,
1499 },
1500};
1501
1502static struct android_pmem_platform_data android_pmem_adsp_pdata = {
1503 .name = "pmem_adsp",
1504 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
1505 .cached = 0,
1506 .memory_type = MEMTYPE_EBI1,
1507};
1508
1509static struct platform_device android_pmem_adsp_device = {
1510 .name = "android_pmem",
1511 .id = 1,
1512 .dev = { .platform_data = &android_pmem_adsp_pdata },
1513};
1514
1515static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE;
1516static int __init pmem_mdp_size_setup(char *p)
1517{
1518 pmem_mdp_size = memparse(p, NULL);
1519 return 0;
1520}
1521
1522early_param("pmem_mdp_size", pmem_mdp_size_setup);
1523
1524static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
1525static int __init pmem_adsp_size_setup(char *p)
1526{
1527 pmem_adsp_size = memparse(p, NULL);
1528 return 0;
1529}
1530
1531early_param("pmem_adsp_size", pmem_adsp_size_setup);
1532
1533static unsigned fb_size = MSM_FB_SIZE;
1534static int __init fb_size_setup(char *p)
1535{
1536 fb_size = memparse(p, NULL);
1537 return 0;
1538}
1539
1540early_param("fb_size", fb_size_setup);
1541
1542
1543#define LCDC_CONFIG_PROC 21
1544#define LCDC_UN_CONFIG_PROC 22
1545#define LCDC_API_PROG 0x30000066
1546#define LCDC_API_VERS 0x00010001
1547
1548static struct msm_rpc_endpoint *lcdc_ep;
1549
1550static int msm_fb_lcdc_config(int on)
1551{
1552 int rc = 0;
1553 struct rpc_request_hdr hdr;
1554
1555 if (on)
1556 pr_info("lcdc config\n");
1557 else
1558 pr_info("lcdc un-config\n");
1559
1560 lcdc_ep = msm_rpc_connect_compatible(LCDC_API_PROG, LCDC_API_VERS, 0);
1561
1562 if (IS_ERR(lcdc_ep)) {
1563 printk(KERN_ERR "%s: msm_rpc_connect failed! rc = %ld\n",
1564 __func__, PTR_ERR(lcdc_ep));
1565 return -EINVAL;
1566 }
1567
1568 rc = msm_rpc_call(lcdc_ep,
1569 (on) ? LCDC_CONFIG_PROC : LCDC_UN_CONFIG_PROC,
1570 &hdr, sizeof(hdr), 5 * HZ);
1571
1572 if (rc)
1573 printk(KERN_ERR
1574 "%s: msm_rpc_call failed! rc = %d\n", __func__, rc);
1575
1576 msm_rpc_close(lcdc_ep);
1577 return rc;
1578}
1579
1580static const char * const msm_fb_lcdc_vreg[] = {
1581 "gp2",
1582 "msme1",
1583};
1584
1585static const int msm_fb_lcdc_vreg_mV[] = {
1586 2850,
1587 1800,
1588};
1589
1590struct vreg *lcdc_vreg[ARRAY_SIZE(msm_fb_lcdc_vreg)];
1591
1592static uint32_t lcdc_gpio_initialized;
1593
1594static void lcdc_toshiba_gpio_init(void)
1595{
1596 int i, rc = 0;
1597 if (!lcdc_gpio_initialized) {
1598 if (gpio_request(GPIO_SPI_CLK, "spi_clk")) {
1599 pr_err("failed to request gpio spi_clk\n");
1600 return;
1601 }
1602 if (gpio_request(GPIO_SPI_CS0_N, "spi_cs")) {
1603 pr_err("failed to request gpio spi_cs0_N\n");
1604 goto fail_gpio6;
1605 }
1606 if (gpio_request(GPIO_SPI_MOSI, "spi_mosi")) {
1607 pr_err("failed to request gpio spi_mosi\n");
1608 goto fail_gpio5;
1609 }
1610 if (gpio_request(GPIO_SPI_MISO, "spi_miso")) {
1611 pr_err("failed to request gpio spi_miso\n");
1612 goto fail_gpio4;
1613 }
1614 if (gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr")) {
1615 pr_err("failed to request gpio_disp_pwr\n");
1616 goto fail_gpio3;
1617 }
1618 if (gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en")) {
1619 pr_err("failed to request gpio_bkl_en\n");
1620 goto fail_gpio2;
1621 }
1622 pmapp_disp_backlight_init();
1623
1624 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1625 lcdc_vreg[i] = vreg_get(0, msm_fb_lcdc_vreg[i]);
1626
1627 rc = vreg_set_level(lcdc_vreg[i],
1628 msm_fb_lcdc_vreg_mV[i]);
1629
1630 if (rc < 0) {
1631 pr_err("%s: set regulator level failed "
1632 "with :(%d)\n", __func__, rc);
1633 goto fail_gpio1;
1634 }
1635 }
1636 lcdc_gpio_initialized = 1;
1637 }
1638 return;
1639
1640fail_gpio1:
1641 for (; i > 0; i--)
1642 vreg_put(lcdc_vreg[i - 1]);
1643
1644 gpio_free(GPIO_BACKLIGHT_EN);
1645fail_gpio2:
1646 gpio_free(GPIO_DISPLAY_PWR_EN);
1647fail_gpio3:
1648 gpio_free(GPIO_SPI_MISO);
1649fail_gpio4:
1650 gpio_free(GPIO_SPI_MOSI);
1651fail_gpio5:
1652 gpio_free(GPIO_SPI_CS0_N);
1653fail_gpio6:
1654 gpio_free(GPIO_SPI_CLK);
1655 lcdc_gpio_initialized = 0;
1656}
1657
1658static uint32_t lcdc_gpio_table[] = {
1659 GPIO_SPI_CLK,
1660 GPIO_SPI_CS0_N,
1661 GPIO_SPI_MOSI,
1662 GPIO_DISPLAY_PWR_EN,
1663 GPIO_BACKLIGHT_EN,
1664 GPIO_SPI_MISO,
1665};
1666
1667static void config_lcdc_gpio_table(uint32_t *table, int len, unsigned enable)
1668{
1669 int n;
1670
1671 if (lcdc_gpio_initialized) {
1672 /* All are IO Expander GPIOs */
1673 for (n = 0; n < (len - 1); n++)
1674 gpio_direction_output(table[n], 1);
1675 }
1676}
1677
1678static void lcdc_toshiba_config_gpios(int enable)
1679{
1680 config_lcdc_gpio_table(lcdc_gpio_table,
1681 ARRAY_SIZE(lcdc_gpio_table), enable);
1682}
1683
1684static int msm_fb_lcdc_power_save(int on)
1685{
1686 int i, rc = 0;
1687 /* Doing the init of the LCDC GPIOs very late as they are from
1688 an I2C-controlled IO Expander */
1689 lcdc_toshiba_gpio_init();
1690
1691 if (lcdc_gpio_initialized) {
1692 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
1693 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
1694
1695 for (i = 0; i < ARRAY_SIZE(msm_fb_lcdc_vreg); i++) {
1696 if (on) {
1697 rc = vreg_enable(lcdc_vreg[i]);
1698
1699 if (rc) {
1700 printk(KERN_ERR "vreg_enable: %s vreg"
1701 "operation failed\n",
1702 msm_fb_lcdc_vreg[i]);
1703 goto lcdc_vreg_fail;
1704 }
1705 } else {
1706 rc = vreg_disable(lcdc_vreg[i]);
1707
1708 if (rc) {
1709 printk(KERN_ERR "vreg_disable: %s vreg "
1710 "operation failed\n",
1711 msm_fb_lcdc_vreg[i]);
1712 goto lcdc_vreg_fail;
1713 }
1714 }
1715 }
1716 }
1717
1718 return rc;
1719
1720lcdc_vreg_fail:
1721 if (on) {
1722 for (; i > 0; i--)
1723 vreg_disable(lcdc_vreg[i - 1]);
1724 } else {
1725 for (; i > 0; i--)
1726 vreg_enable(lcdc_vreg[i - 1]);
1727 }
1728
1729return rc;
1730
1731}
1732
1733
1734static int lcdc_toshiba_set_bl(int level)
1735{
1736 int ret;
1737
1738 ret = pmapp_disp_backlight_set_brightness(level);
1739 if (ret)
1740 pr_err("%s: can't set lcd backlight!\n", __func__);
1741
1742 return ret;
1743}
1744
1745
1746static struct lcdc_platform_data lcdc_pdata = {
1747 .lcdc_gpio_config = msm_fb_lcdc_config,
1748 .lcdc_power_save = msm_fb_lcdc_power_save,
1749};
1750
1751static int lcd_panel_spi_gpio_num[] = {
1752 GPIO_SPI_MOSI, /* spi_sdi */
1753 GPIO_SPI_MISO, /* spi_sdoi */
1754 GPIO_SPI_CLK, /* spi_clk */
1755 GPIO_SPI_CS0_N, /* spi_cs */
1756};
1757
1758static struct msm_panel_common_pdata lcdc_toshiba_panel_data = {
1759 .panel_config_gpio = lcdc_toshiba_config_gpios,
1760 .pmic_backlight = lcdc_toshiba_set_bl,
1761 .gpio_num = lcd_panel_spi_gpio_num,
1762};
1763
1764static struct platform_device lcdc_toshiba_panel_device = {
1765 .name = "lcdc_toshiba_fwvga_pt",
1766 .id = 0,
1767 .dev = {
1768 .platform_data = &lcdc_toshiba_panel_data,
1769 }
1770};
1771
1772static struct resource msm_fb_resources[] = {
1773 {
1774 .flags = IORESOURCE_DMA,
1775 }
1776};
1777
1778static int msm_fb_detect_panel(const char *name)
1779{
1780 int ret = -EPERM;
1781
1782 if (machine_is_msm7x27a_surf()) {
1783 if (!strncmp(name, "lcdc_toshiba_fwvga_pt", 21))
1784 ret = 0;
1785 } else {
1786 ret = -ENODEV;
1787 }
1788
1789 return ret;
1790}
1791
1792static struct msm_fb_platform_data msm_fb_pdata = {
1793 .detect_client = msm_fb_detect_panel,
1794};
1795
1796static struct platform_device msm_fb_device = {
1797 .name = "msm_fb",
1798 .id = 0,
1799 .num_resources = ARRAY_SIZE(msm_fb_resources),
1800 .resource = msm_fb_resources,
1801 .dev = {
1802 .platform_data = &msm_fb_pdata,
1803 }
1804};
1805
1806#ifdef CONFIG_FB_MSM_MIPI_DSI
1807static int mipi_renesas_set_bl(int level)
1808{
1809 int ret;
1810
1811 ret = pmapp_disp_backlight_set_brightness(level);
1812
1813 if (ret)
1814 pr_err("%s: can't set lcd backlight!\n", __func__);
1815
1816 return ret;
1817}
1818
1819static struct msm_panel_common_pdata mipi_renesas_pdata = {
1820 .pmic_backlight = mipi_renesas_set_bl,
1821};
1822
1823
1824static struct platform_device mipi_dsi_renesas_panel_device = {
1825 .name = "mipi_renesas",
1826 .id = 0,
1827 .dev = {
1828 .platform_data = &mipi_renesas_pdata,
1829 }
1830};
1831#endif
1832
1833static void __init msm7x27a_init_mmc(void)
1834{
1835 vreg_emmc = vreg_get(NULL, "emmc");
1836 if (IS_ERR(vreg_emmc)) {
1837 pr_err("%s: vreg get failed (%ld)\n",
1838 __func__, PTR_ERR(vreg_emmc));
1839 return;
1840 }
1841
1842 vreg_mmc = vreg_get(NULL, "mmc");
1843 if (IS_ERR(vreg_mmc)) {
1844 pr_err("%s: vreg get failed (%ld)\n",
1845 __func__, PTR_ERR(vreg_mmc));
1846 return;
1847 }
1848
1849 /* eMMC slot */
1850#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
1851 sdcc_vreg_data[2].vreg_data = vreg_emmc;
1852 sdcc_vreg_data[2].level = 3000;
1853 msm_add_sdcc(3, &sdc3_plat_data);
1854#endif
1855 /* Micro-SD slot */
1856#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
1857 sdcc_vreg_data[0].vreg_data = vreg_mmc;
1858 sdcc_vreg_data[0].level = 2850;
1859 msm_add_sdcc(1, &sdc1_plat_data);
1860#endif
1861 /* SDIO WLAN slot */
1862#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
1863 sdcc_vreg_data[1].vreg_data = vreg_mmc;
1864 sdcc_vreg_data[1].level = 2850;
1865 msm_add_sdcc(2, &sdc2_plat_data);
1866#endif
1867 /* Not Used */
1868#if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
1869 && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT))
1870 sdcc_vreg_data[3].vreg_data = vreg_mmc;
1871 sdcc_vreg_data[3].level = 2850;
1872 msm_add_sdcc(4, &sdc4_plat_data);
1873#endif
1874}
1875#define SND(desc, num) { .name = #desc, .id = num }
1876static struct snd_endpoint snd_endpoints_list[] = {
1877 SND(HANDSET, 0),
1878 SND(MONO_HEADSET, 2),
1879 SND(HEADSET, 3),
1880 SND(SPEAKER, 6),
1881 SND(TTY_HEADSET, 8),
1882 SND(TTY_VCO, 9),
1883 SND(TTY_HCO, 10),
1884 SND(BT, 12),
1885 SND(IN_S_SADC_OUT_HANDSET, 16),
1886 SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25),
1887 SND(FM_DIGITAL_STEREO_HEADSET, 26),
1888 SND(FM_DIGITAL_SPEAKER_PHONE, 27),
1889 SND(FM_DIGITAL_BT_A2DP_HEADSET, 28),
1890 SND(CURRENT, 34),
1891 SND(FM_ANALOG_STEREO_HEADSET, 35),
1892 SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36),
1893};
1894#undef SND
1895
1896static struct msm_snd_endpoints msm_device_snd_endpoints = {
1897 .endpoints = snd_endpoints_list,
1898 .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint)
1899};
1900
1901static struct platform_device msm_device_snd = {
1902 .name = "msm_snd",
1903 .id = -1,
1904 .dev = {
1905 .platform_data = &msm_device_snd_endpoints
1906 },
1907};
1908
1909#define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1910 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1911 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1912 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1913 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1914 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1915#define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1916 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1917 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1918 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1919 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1920 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1921#define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1922 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1923 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1924 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1925 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1926 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1927#define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \
1928 (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \
1929 (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \
1930 (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \
1931 (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \
1932 (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP))
1933#define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI)
1934
1935static unsigned int dec_concurrency_table[] = {
1936 /* Audio LP */
1937 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0,
1938 0, 0, 0,
1939
1940 /* Concurrency 1 */
1941 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1942 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1943 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1944 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1945 (DEC4_FORMAT),
1946
1947 /* Concurrency 2 */
1948 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1949 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1950 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1951 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1952 (DEC4_FORMAT),
1953
1954 /* Concurrency 3 */
1955 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1956 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1957 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1958 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1959 (DEC4_FORMAT),
1960
1961 /* Concurrency 4 */
1962 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1963 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1964 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1965 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1966 (DEC4_FORMAT),
1967
1968 /* Concurrency 5 */
1969 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)),
1970 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1971 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1972 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1973 (DEC4_FORMAT),
1974
1975 /* Concurrency 6 */
1976 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1977 0, 0, 0, 0,
1978
1979 /* Concurrency 7 */
1980 (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1981 (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1982 (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1983 (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)),
1984 (DEC4_FORMAT),
1985};
1986
1987#define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \
1988 .module_queueid = queueid, .module_decid = decid, \
1989 .nr_codec_support = nr_codec}
1990
1991static struct msm_adspdec_info dec_info_list[] = {
1992 DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */
1993 DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */
1994 DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */
1995 DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */
1996 DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */
1997};
1998
1999static struct msm_adspdec_database msm_device_adspdec_database = {
2000 .num_dec = ARRAY_SIZE(dec_info_list),
2001 .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \
2002 ARRAY_SIZE(dec_info_list)),
2003 .dec_concurrency_table = dec_concurrency_table,
2004 .dec_info_list = dec_info_list,
2005};
2006
2007static struct platform_device msm_device_adspdec = {
2008 .name = "msm_adspdec",
2009 .id = -1,
2010 .dev = {
2011 .platform_data = &msm_device_adspdec_database
2012 },
2013};
2014
2015static struct android_pmem_platform_data android_pmem_audio_pdata = {
2016 .name = "pmem_audio",
2017 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2018 .cached = 0,
2019 .memory_type = MEMTYPE_EBI1,
2020};
2021
2022static struct platform_device android_pmem_audio_device = {
2023 .name = "android_pmem",
2024 .id = 2,
2025 .dev = { .platform_data = &android_pmem_audio_pdata },
2026};
2027
2028static struct android_pmem_platform_data android_pmem_pdata = {
2029 .name = "pmem",
2030 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2031 .cached = 1,
2032 .memory_type = MEMTYPE_EBI1,
2033};
2034static struct platform_device android_pmem_device = {
2035 .name = "android_pmem",
2036 .id = 0,
2037 .dev = { .platform_data = &android_pmem_pdata },
2038};
2039
2040static u32 msm_calculate_batt_capacity(u32 current_voltage);
2041
2042static struct msm_psy_batt_pdata msm_psy_batt_data = {
2043 .voltage_min_design = 2800,
2044 .voltage_max_design = 4300,
2045 .avail_chg_sources = AC_CHG | USB_CHG ,
2046 .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION,
2047 .calculate_capacity = &msm_calculate_batt_capacity,
2048};
2049
2050static u32 msm_calculate_batt_capacity(u32 current_voltage)
2051{
2052 u32 low_voltage = msm_psy_batt_data.voltage_min_design;
2053 u32 high_voltage = msm_psy_batt_data.voltage_max_design;
2054
2055 return (current_voltage - low_voltage) * 100
2056 / (high_voltage - low_voltage);
2057}
2058
2059static struct platform_device msm_batt_device = {
2060 .name = "msm-battery",
2061 .id = -1,
2062 .dev.platform_data = &msm_psy_batt_data,
2063};
2064
2065static struct smsc911x_platform_config smsc911x_config = {
2066 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
2067 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
2068 .flags = SMSC911X_USE_16BIT,
2069};
2070
2071static struct resource smsc911x_resources[] = {
2072 [0] = {
2073 .start = 0x90000000,
2074 .end = 0x90007fff,
2075 .flags = IORESOURCE_MEM,
2076 },
2077 [1] = {
2078 .start = MSM_GPIO_TO_INT(48),
2079 .end = MSM_GPIO_TO_INT(48),
2080 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
2081 },
2082};
2083
2084static struct platform_device smsc911x_device = {
2085 .name = "smsc911x",
2086 .id = 0,
2087 .num_resources = ARRAY_SIZE(smsc911x_resources),
2088 .resource = smsc911x_resources,
2089 .dev = {
2090 .platform_data = &smsc911x_config,
2091 },
2092};
2093
2094static struct msm_gpio smsc911x_gpios[] = {
2095 { GPIO_CFG(48, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2096 "smsc911x_irq" },
2097 { GPIO_CFG(49, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_6MA),
2098 "eth_fifo_sel" },
2099};
2100
2101#define ETH_FIFO_SEL_GPIO 49
2102static void msm7x27a_cfg_smsc911x(void)
2103{
2104 int res;
2105
2106 res = msm_gpios_request_enable(smsc911x_gpios,
2107 ARRAY_SIZE(smsc911x_gpios));
2108 if (res) {
2109 pr_err("%s: unable to enable gpios for SMSC911x\n", __func__);
2110 return;
2111 }
2112
2113 /* ETH_FIFO_SEL */
2114 res = gpio_direction_output(ETH_FIFO_SEL_GPIO, 0);
2115 if (res) {
2116 pr_err("%s: unable to get direction for gpio %d\n", __func__,
2117 ETH_FIFO_SEL_GPIO);
2118 msm_gpios_disable_free(smsc911x_gpios,
2119 ARRAY_SIZE(smsc911x_gpios));
2120 return;
2121 }
2122 gpio_set_value(ETH_FIFO_SEL_GPIO, 0);
2123}
2124
2125#ifdef CONFIG_MSM_CAMERA
2126static uint32_t camera_off_gpio_table[] = {
2127 GPIO_CFG(15, 0, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2128};
2129
2130static uint32_t camera_on_gpio_table[] = {
2131 GPIO_CFG(15, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
2132};
2133
2134#ifdef CONFIG_MSM_CAMERA_FLASH
2135static struct msm_camera_sensor_flash_src msm_flash_src = {
2136 .flash_sr_type = MSM_CAMERA_FLASH_SRC_CURRENT_DRIVER,
2137 ._fsrc.current_driver_src.led1 = GPIO_CAM_GP_LED_EN1,
2138 ._fsrc.current_driver_src.led2 = GPIO_CAM_GP_LED_EN2,
2139};
2140#endif
2141
2142static struct vreg *vreg_gp1;
2143static struct vreg *vreg_gp2;
2144static struct vreg *vreg_gp3;
2145static void msm_camera_vreg_config(int vreg_en)
2146{
2147 int rc;
2148
2149 if (vreg_gp1 == NULL) {
2150 vreg_gp1 = vreg_get(NULL, "msme1");
2151 if (IS_ERR(vreg_gp1)) {
2152 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2153 __func__, "msme1", PTR_ERR(vreg_gp1));
2154 return;
2155 }
2156
2157 rc = vreg_set_level(vreg_gp1, 1800);
2158 if (rc) {
2159 pr_err("%s: GP1 set_level failed (%d)\n",
2160 __func__, rc);
2161 return;
2162 }
2163 }
2164
2165 if (vreg_gp2 == NULL) {
2166 vreg_gp2 = vreg_get(NULL, "gp2");
2167 if (IS_ERR(vreg_gp2)) {
2168 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2169 __func__, "gp2", PTR_ERR(vreg_gp2));
2170 return;
2171 }
2172
2173 rc = vreg_set_level(vreg_gp2, 2850);
2174 if (rc) {
2175 pr_err("%s: GP2 set_level failed (%d)\n",
2176 __func__, rc);
2177 }
2178 }
2179
2180 if (vreg_gp3 == NULL) {
2181 vreg_gp3 = vreg_get(NULL, "usb2");
2182 if (IS_ERR(vreg_gp3)) {
2183 pr_err("%s: vreg_get(%s) failed (%ld)\n",
2184 __func__, "gp3", PTR_ERR(vreg_gp3));
2185 return;
2186 }
2187
2188 rc = vreg_set_level(vreg_gp3, 1800);
2189 if (rc) {
2190 pr_err("%s: GP3 set level failed (%d)\n",
2191 __func__, rc);
2192 }
2193 }
2194
2195 if (vreg_en) {
2196 rc = vreg_enable(vreg_gp1);
2197 if (rc) {
2198 pr_err("%s: GP1 enable failed (%d)\n",
2199 __func__, rc);
2200 return;
2201 }
2202
2203 rc = vreg_enable(vreg_gp2);
2204 if (rc) {
2205 pr_err("%s: GP2 enable failed (%d)\n",
2206 __func__, rc);
2207 }
2208
2209 rc = vreg_enable(vreg_gp3);
2210 if (rc) {
2211 pr_err("%s: GP3 enable failed (%d)\n",
2212 __func__, rc);
2213 }
2214 } else {
2215 rc = vreg_disable(vreg_gp1);
2216 if (rc)
2217 pr_err("%s: GP1 disable failed (%d)\n",
2218 __func__, rc);
2219
2220 rc = vreg_disable(vreg_gp2);
2221 if (rc) {
2222 pr_err("%s: GP2 disable failed (%d)\n",
2223 __func__, rc);
2224 }
2225
2226 rc = vreg_disable(vreg_gp3);
2227 if (rc) {
2228 pr_err("%s: GP3 disable failed (%d)\n",
2229 __func__, rc);
2230 }
2231 }
2232}
2233
2234static int config_gpio_table(uint32_t *table, int len)
2235{
2236 int rc = 0, i = 0;
2237
2238 for (i = 0; i < len; i++) {
2239 rc = gpio_tlmm_config(table[i], GPIO_CFG_ENABLE);
2240 if (rc) {
2241 pr_err("%s not able to get gpio\n", __func__);
2242 for (i--; i >= 0; i--)
2243 gpio_tlmm_config(camera_off_gpio_table[i],
2244 GPIO_CFG_ENABLE);
2245 break;
2246 }
2247 }
2248 return rc;
2249}
2250
2251static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data;
2252static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data;
2253static int config_camera_on_gpios_rear(void)
2254{
2255 int rc = 0;
2256
2257 if (machine_is_msm7x27a_ffa())
2258 msm_camera_vreg_config(1);
2259
2260 rc = config_gpio_table(camera_on_gpio_table,
2261 ARRAY_SIZE(camera_on_gpio_table));
2262 if (rc < 0) {
2263 pr_err("%s: CAMSENSOR gpio table request"
2264 "failed\n", __func__);
2265 return rc;
2266 }
2267
2268 return rc;
2269}
2270
2271static void config_camera_off_gpios_rear(void)
2272{
2273 if (machine_is_msm7x27a_ffa())
2274 msm_camera_vreg_config(0);
2275
2276 config_gpio_table(camera_off_gpio_table,
2277 ARRAY_SIZE(camera_off_gpio_table));
2278}
2279
2280static int config_camera_on_gpios_front(void)
2281{
2282 int rc = 0;
2283
2284 if (machine_is_msm7x27a_ffa())
2285 msm_camera_vreg_config(1);
2286
2287 rc = config_gpio_table(camera_on_gpio_table,
2288 ARRAY_SIZE(camera_on_gpio_table));
2289 if (rc < 0) {
2290 pr_err("%s: CAMSENSOR gpio table request"
2291 "failed\n", __func__);
2292 return rc;
2293 }
2294
2295 return rc;
2296}
2297
2298static void config_camera_off_gpios_front(void)
2299{
2300 if (machine_is_msm7x27a_ffa())
2301 msm_camera_vreg_config(0);
2302
2303 config_gpio_table(camera_off_gpio_table,
2304 ARRAY_SIZE(camera_off_gpio_table));
2305}
2306
2307struct msm_camera_device_platform_data msm_camera_device_data_rear = {
2308 .camera_gpio_on = config_camera_on_gpios_rear,
2309 .camera_gpio_off = config_camera_off_gpios_rear,
2310 .ioext.csiphy = 0xA1000000,
2311 .ioext.csisz = 0x00100000,
2312 .ioext.csiirq = INT_CSI_IRQ_1,
2313 .ioclk.mclk_clk_rate = 24000000,
2314 .ioclk.vfe_clk_rate = 192000000,
2315 .ioext.appphy = MSM_CLK_CTL_PHYS,
2316 .ioext.appsz = MSM_CLK_CTL_SIZE,
2317};
2318
2319struct msm_camera_device_platform_data msm_camera_device_data_front = {
2320 .camera_gpio_on = config_camera_on_gpios_front,
2321 .camera_gpio_off = config_camera_off_gpios_front,
2322 .ioext.csiphy = 0xA0F00000,
2323 .ioext.csisz = 0x00100000,
2324 .ioext.csiirq = INT_CSI_IRQ_0,
2325 .ioclk.mclk_clk_rate = 24000000,
2326 .ioclk.vfe_clk_rate = 192000000,
2327 .ioext.appphy = MSM_CLK_CTL_PHYS,
2328 .ioext.appsz = MSM_CLK_CTL_SIZE,
2329};
2330
2331#ifdef CONFIG_S5K4E1
2332static struct msm_camera_sensor_platform_info s5k4e1_sensor_7627a_info = {
2333 .mount_angle = 90
2334};
2335
2336static struct msm_camera_sensor_flash_data flash_s5k4e1 = {
2337 .flash_type = MSM_CAMERA_FLASH_LED,
2338 .flash_src = &msm_flash_src
2339};
2340
2341static struct msm_camera_sensor_info msm_camera_sensor_s5k4e1_data = {
2342 .sensor_name = "s5k4e1",
2343 .sensor_reset_enable = 1,
2344 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N,
2345 .sensor_pwd = 85,
2346 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2347 .vcm_enable = 1,
2348 .pdata = &msm_camera_device_data_rear,
2349 .flash_data = &flash_s5k4e1,
2350 .sensor_platform_info = &s5k4e1_sensor_7627a_info,
2351 .csi_if = 1
2352};
2353
2354static struct platform_device msm_camera_sensor_s5k4e1 = {
2355 .name = "msm_camera_s5k4e1",
2356 .dev = {
2357 .platform_data = &msm_camera_sensor_s5k4e1_data,
2358 },
2359};
2360#endif
2361
2362#ifdef CONFIG_IMX072
2363static struct msm_camera_sensor_platform_info imx072_sensor_7627a_info = {
2364 .mount_angle = 90
2365};
2366
2367static struct msm_camera_sensor_flash_data flash_imx072 = {
2368 .flash_type = MSM_CAMERA_FLASH_LED,
2369 .flash_src = &msm_flash_src
2370};
2371
2372static struct msm_camera_sensor_info msm_camera_sensor_imx072_data = {
2373 .sensor_name = "imx072",
2374 .sensor_reset_enable = 1,
2375 .sensor_reset = GPIO_CAM_GP_CAMIF_RESET_N, /* TODO 106,*/
2376 .sensor_pwd = 85,
2377 .vcm_pwd = GPIO_CAM_GP_CAM_PWDN,
2378 .vcm_enable = 1,
2379 .pdata = &msm_camera_device_data_rear,
2380 .flash_data = &flash_imx072,
2381 .sensor_platform_info = &imx072_sensor_7627a_info,
2382 .csi_if = 1
2383};
2384
2385static struct platform_device msm_camera_sensor_imx072 = {
2386 .name = "msm_camera_imx072",
2387 .dev = {
2388 .platform_data = &msm_camera_sensor_imx072_data,
2389 },
2390};
2391#endif
2392
2393#ifdef CONFIG_WEBCAM_OV9726
2394static struct msm_camera_sensor_platform_info ov9726_sensor_7627a_info = {
2395 .mount_angle = 90
2396};
2397
2398static struct msm_camera_sensor_flash_data flash_ov9726 = {
2399 .flash_type = MSM_CAMERA_FLASH_NONE,
2400 .flash_src = &msm_flash_src
2401};
2402
2403static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2404 .sensor_name = "ov9726",
2405 .sensor_reset_enable = 0,
2406 .sensor_reset = GPIO_CAM_GP_CAM1MP_XCLR,
2407 .sensor_pwd = 85,
2408 .vcm_pwd = 1,
2409 .vcm_enable = 0,
2410 .pdata = &msm_camera_device_data_front,
2411 .flash_data = &flash_ov9726,
2412 .sensor_platform_info = &ov9726_sensor_7627a_info,
2413 .csi_if = 1
2414};
2415
2416static struct platform_device msm_camera_sensor_ov9726 = {
2417 .name = "msm_camera_ov9726",
2418 .dev = {
2419 .platform_data = &msm_camera_sensor_ov9726_data,
2420 },
2421};
2422#endif
2423
2424#ifdef CONFIG_MT9E013
2425static struct msm_camera_sensor_platform_info mt9e013_sensor_7627a_info = {
2426 .mount_angle = 90
2427};
2428
2429static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2430 .flash_type = MSM_CAMERA_FLASH_LED,
2431 .flash_src = &msm_flash_src
2432};
2433
2434static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2435 .sensor_name = "mt9e013",
2436 .sensor_reset = 0,
2437 .sensor_reset_enable = 1,
2438 .sensor_pwd = 85,
2439 .vcm_pwd = 1,
2440 .vcm_enable = 0,
2441 .pdata = &msm_camera_device_data_rear,
2442 .flash_data = &flash_mt9e013,
2443 .sensor_platform_info = &mt9e013_sensor_7627a_info,
2444 .csi_if = 1
2445};
2446
2447static struct platform_device msm_camera_sensor_mt9e013 = {
2448 .name = "msm_camera_mt9e013",
2449 .dev = {
2450 .platform_data = &msm_camera_sensor_mt9e013_data,
2451 },
2452};
2453#endif
2454
2455static struct i2c_board_info i2c_camera_devices[] = {
2456 #ifdef CONFIG_S5K4E1
2457 {
2458 I2C_BOARD_INFO("s5k4e1", 0x36),
2459 },
2460 {
2461 I2C_BOARD_INFO("s5k4e1_af", 0x8c >> 1),
2462 },
2463 #endif
2464 #ifdef CONFIG_WEBCAM_OV9726
2465 {
2466 I2C_BOARD_INFO("ov9726", 0x10),
2467 },
2468 #endif
2469 #ifdef CONFIG_IMX072
2470 {
2471 I2C_BOARD_INFO("imx072", 0x34),
2472 },
2473 #endif
2474 #ifdef CONFIG_MT9E013
2475 {
2476 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2477 },
2478 #endif
2479 {
2480 I2C_BOARD_INFO("sc628a", 0x37),
2481 },
2482};
2483#endif
2484#if defined(CONFIG_SERIAL_MSM_HSL_CONSOLE) \
2485 && defined(CONFIG_MSM_SHARED_GPIO_FOR_UART2DM)
2486static struct msm_gpio uart2dm_gpios[] = {
2487 {GPIO_CFG(19, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2488 "uart2dm_rfr_n" },
2489 {GPIO_CFG(20, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2490 "uart2dm_cts_n" },
2491 {GPIO_CFG(21, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2492 "uart2dm_rx" },
2493 {GPIO_CFG(108, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2494 "uart2dm_tx" },
2495};
2496
2497static void msm7x27a_cfg_uart2dm_serial(void)
2498{
2499 int ret;
2500 ret = msm_gpios_request_enable(uart2dm_gpios,
2501 ARRAY_SIZE(uart2dm_gpios));
2502 if (ret)
2503 pr_err("%s: unable to enable gpios for uart2dm\n", __func__);
2504}
2505#else
2506static void msm7x27a_cfg_uart2dm_serial(void) { }
2507#endif
2508
2509static struct platform_device *rumi_sim_devices[] __initdata = {
2510 &msm_device_dmov,
2511 &msm_device_smd,
2512 &smc91x_device,
2513 &msm_device_uart1,
2514 &msm_device_nand,
2515 &msm_device_uart_dm1,
2516 &msm_gsbi0_qup_i2c_device,
2517 &msm_gsbi1_qup_i2c_device,
2518};
2519
2520static struct platform_device *surf_ffa_devices[] __initdata = {
2521 &msm_device_dmov,
2522 &msm_device_smd,
2523 &msm_device_uart1,
2524 &msm_device_uart_dm1,
2525 &msm_device_uart_dm2,
2526 &msm_device_nand,
2527 &msm_gsbi0_qup_i2c_device,
2528 &msm_gsbi1_qup_i2c_device,
2529 &msm_device_otg,
2530 &msm_device_gadget_peripheral,
2531 &android_usb_device,
2532 &android_pmem_device,
2533 &android_pmem_adsp_device,
2534 &android_pmem_audio_device,
2535 &msm_device_snd,
2536 &msm_device_adspdec,
2537 &msm_fb_device,
2538 &lcdc_toshiba_panel_device,
2539 &msm_batt_device,
2540 &smsc911x_device,
2541#ifdef CONFIG_S5K4E1
2542 &msm_camera_sensor_s5k4e1,
2543#endif
2544#ifdef CONFIG_IMX072
2545 &msm_camera_sensor_imx072,
2546#endif
2547#ifdef CONFIG_WEBCAM_OV9726
2548 &msm_camera_sensor_ov9726,
2549#endif
2550#ifdef CONFIG_MT9E013
2551 &msm_camera_sensor_mt9e013,
2552#endif
2553#ifdef CONFIG_FB_MSM_MIPI_DSI
2554 &mipi_dsi_renesas_panel_device,
2555#endif
2556 &msm_kgsl_3d0,
2557#ifdef CONFIG_BT
2558 &msm_bt_power_device,
2559#endif
2560};
2561
2562static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE;
2563static int __init pmem_kernel_ebi1_size_setup(char *p)
2564{
2565 pmem_kernel_ebi1_size = memparse(p, NULL);
2566 return 0;
2567}
2568early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2569
2570static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2571static int __init pmem_audio_size_setup(char *p)
2572{
2573 pmem_audio_size = memparse(p, NULL);
2574 return 0;
2575}
2576early_param("pmem_audio_size", pmem_audio_size_setup);
2577
2578static void __init msm_msm7x2x_allocate_memory_regions(void)
2579{
2580 void *addr;
2581 unsigned long size;
2582
2583 size = fb_size ? : MSM_FB_SIZE;
2584 addr = alloc_bootmem_align(size, 0x1000);
2585 msm_fb_resources[0].start = __pa(addr);
2586 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
2587 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
2588 size, addr, __pa(addr));
2589}
2590
2591static struct memtype_reserve msm7x27a_reserve_table[] __initdata = {
2592 [MEMTYPE_SMI] = {
2593 },
2594 [MEMTYPE_EBI0] = {
2595 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2596 },
2597 [MEMTYPE_EBI1] = {
2598 .flags = MEMTYPE_FLAGS_1M_ALIGN,
2599 },
2600};
2601
2602static void __init size_pmem_devices(void)
2603{
2604#ifdef CONFIG_ANDROID_PMEM
2605 android_pmem_adsp_pdata.size = pmem_adsp_size;
2606 android_pmem_pdata.size = pmem_mdp_size;
2607 android_pmem_audio_pdata.size = pmem_audio_size;
2608#endif
2609}
2610
2611static void __init reserve_memory_for(struct android_pmem_platform_data *p)
2612{
2613 msm7x27a_reserve_table[p->memory_type].size += p->size;
2614}
2615
2616static void __init reserve_pmem_memory(void)
2617{
2618#ifdef CONFIG_ANDROID_PMEM
2619 reserve_memory_for(&android_pmem_adsp_pdata);
2620 reserve_memory_for(&android_pmem_pdata);
2621 reserve_memory_for(&android_pmem_audio_pdata);
2622 msm7x27a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
2623#endif
2624}
2625
2626static void __init msm7x27a_calculate_reserve_sizes(void)
2627{
2628 size_pmem_devices();
2629 reserve_pmem_memory();
2630}
2631
2632static int msm7x27a_paddr_to_memtype(unsigned int paddr)
2633{
2634 return MEMTYPE_EBI1;
2635}
2636
2637static struct reserve_info msm7x27a_reserve_info __initdata = {
2638 .memtype_reserve_table = msm7x27a_reserve_table,
2639 .calculate_reserve_sizes = msm7x27a_calculate_reserve_sizes,
2640 .paddr_to_memtype = msm7x27a_paddr_to_memtype,
2641};
2642
2643static void __init msm7x27a_reserve(void)
2644{
2645 reserve_info = &msm7x27a_reserve_info;
2646 msm_reserve();
2647}
2648
2649static void __init msm_device_i2c_init(void)
2650{
2651 msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata;
2652 msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata;
2653}
2654
2655static struct msm_panel_common_pdata mdp_pdata = {
2656 .gpio = 97,
2657 .mdp_rev = MDP_REV_303,
2658};
2659
2660#define GPIO_LCDC_BRDG_PD 128
2661#define GPIO_LCDC_BRDG_RESET_N 129
2662
2663#define LCDC_RESET_PHYS 0x90008014
2664static void __iomem *lcdc_reset_ptr;
2665
2666static unsigned mipi_dsi_gpio[] = {
2667 GPIO_CFG(GPIO_LCDC_BRDG_RESET_N, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2668 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2669 GPIO_CFG(GPIO_LCDC_BRDG_PD, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
2670 GPIO_CFG_2MA), /* LCDC_BRDG_RESET_N */
2671};
2672
2673enum {
2674 DSI_SINGLE_LANE = 1,
2675 DSI_TWO_LANES,
2676};
2677
2678static int msm_fb_get_lane_config(void)
2679{
2680 int rc = DSI_TWO_LANES;
2681
2682 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
2683 rc = DSI_SINGLE_LANE;
2684 pr_info("DSI Single Lane\n");
2685 } else {
2686 pr_info("DSI Two Lanes\n");
2687 }
2688 return rc;
2689}
2690
2691static int msm_fb_dsi_client_reset(void)
2692{
2693 int rc = 0;
2694
2695 rc = gpio_request(GPIO_LCDC_BRDG_RESET_N, "lcdc_brdg_reset_n");
2696 if (rc < 0) {
2697 pr_err("failed to request lcd brdg reset_n\n");
2698 return rc;
2699 }
2700
2701 rc = gpio_request(GPIO_LCDC_BRDG_PD, "lcdc_brdg_pd");
2702 if (rc < 0) {
2703 pr_err("failed to request lcd brdg pd\n");
2704 return rc;
2705 }
2706
2707 rc = gpio_tlmm_config(mipi_dsi_gpio[0], GPIO_CFG_ENABLE);
2708 if (rc) {
2709 pr_err("Failed to enable LCDC Bridge reset enable\n");
2710 goto gpio_error;
2711 }
2712
2713 rc = gpio_tlmm_config(mipi_dsi_gpio[1], GPIO_CFG_ENABLE);
2714 if (rc) {
2715 pr_err("Failed to enable LCDC Bridge pd enable\n");
2716 goto gpio_error2;
2717 }
2718
2719 rc = gpio_direction_output(GPIO_LCDC_BRDG_RESET_N, 1);
2720 rc |= gpio_direction_output(GPIO_LCDC_BRDG_PD, 1);
2721 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2722
2723 if (!rc) {
2724 if (machine_is_msm7x27a_surf()) {
2725 lcdc_reset_ptr = ioremap_nocache(LCDC_RESET_PHYS,
2726 sizeof(uint32_t));
2727
2728 if (!lcdc_reset_ptr)
2729 return 0;
2730 }
2731 return rc;
2732 } else {
2733 goto gpio_error;
2734 }
2735
2736gpio_error2:
2737 pr_err("Failed GPIO bridge pd\n");
2738 gpio_free(GPIO_LCDC_BRDG_PD);
2739
2740gpio_error:
2741 pr_err("Failed GPIO bridge reset\n");
2742 gpio_free(GPIO_LCDC_BRDG_RESET_N);
2743 return rc;
2744}
2745
2746static const char * const msm_fb_dsi_vreg[] = {
2747 "gp2",
2748 "msme1",
2749};
2750
2751static const int msm_fb_dsi_vreg_mV[] = {
2752 2850,
2753 1800,
2754};
2755
2756static struct vreg *dsi_vreg[ARRAY_SIZE(msm_fb_dsi_vreg)];
2757static int dsi_gpio_initialized;
2758
2759static int mipi_dsi_panel_power(int on)
2760{
2761 int i, rc = 0;
2762 uint32_t lcdc_reset_cfg;
2763
2764 /* I2C-controlled GPIO Expander -init of the GPIOs very late */
2765 if (!dsi_gpio_initialized) {
2766 pmapp_disp_backlight_init();
2767
2768 rc = gpio_request(GPIO_DISPLAY_PWR_EN, "gpio_disp_pwr");
2769 if (rc < 0) {
2770 pr_err("failed to request gpio_disp_pwr\n");
2771 return rc;
2772 }
2773
2774 if (machine_is_msm7x27a_surf()) {
2775 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN, 1);
2776 if (rc < 0) {
2777 pr_err("failed to enable display pwr\n");
2778 goto fail_gpio1;
2779 }
2780
2781 rc = gpio_request(GPIO_BACKLIGHT_EN, "gpio_bkl_en");
2782 if (rc < 0) {
2783 pr_err("failed to request gpio_bkl_en\n");
2784 goto fail_gpio1;
2785 }
2786
2787 rc = gpio_direction_output(GPIO_BACKLIGHT_EN, 1);
2788 if (rc < 0) {
2789 pr_err("failed to enable backlight\n");
2790 goto fail_gpio2;
2791 }
2792 }
2793
2794 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2795 dsi_vreg[i] = vreg_get(0, msm_fb_dsi_vreg[i]);
2796
2797 if (IS_ERR(dsi_vreg[i])) {
2798 pr_err("%s: vreg get failed with : (%ld)\n",
2799 __func__, PTR_ERR(dsi_vreg[i]));
2800 goto fail_gpio2;
2801 }
2802
2803 rc = vreg_set_level(dsi_vreg[i],
2804 msm_fb_dsi_vreg_mV[i]);
2805
2806 if (rc < 0) {
2807 pr_err("%s: set regulator level failed "
2808 "with :(%d)\n", __func__, rc);
2809 goto vreg_fail1;
2810 }
2811 }
2812 dsi_gpio_initialized = 1;
2813 }
2814
2815 if (machine_is_msm7x27a_surf()) {
2816 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN, on);
2817 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, on);
2818 } else if (machine_is_msm7x27a_ffa()) {
2819 if (on) {
2820 /* This line drives an active low pin on FFA */
2821 rc = gpio_direction_output(GPIO_DISPLAY_PWR_EN,
2822 !on);
2823 if (rc < 0)
2824 pr_err("failed to set direction for "
2825 "display pwr\n");
2826 } else {
2827 gpio_set_value_cansleep(GPIO_DISPLAY_PWR_EN,
2828 !on);
2829 rc = gpio_direction_input(GPIO_DISPLAY_PWR_EN);
2830 if (rc < 0)
2831 pr_err("failed to set direction for "
2832 "display pwr\n");
2833 }
2834 }
2835
2836 if (on) {
2837 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 0);
2838
2839 if (machine_is_msm7x27a_surf()) {
2840 lcdc_reset_cfg = readl_relaxed(lcdc_reset_ptr);
2841 rmb();
2842 lcdc_reset_cfg &= ~1;
2843
2844 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2845 msleep(20);
2846 wmb();
2847 lcdc_reset_cfg |= 1;
2848 writel_relaxed(lcdc_reset_cfg, lcdc_reset_ptr);
2849 } else {
2850 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2851 0);
2852 msleep(20);
2853 gpio_set_value_cansleep(GPIO_LCDC_BRDG_RESET_N,
2854 1);
2855 }
2856
2857 if (pmapp_disp_backlight_set_brightness(100))
2858 pr_err("backlight set brightness failed\n");
2859 } else {
2860 gpio_set_value_cansleep(GPIO_LCDC_BRDG_PD, 1);
2861
2862 if (pmapp_disp_backlight_set_brightness(0))
2863 pr_err("backlight set brightness failed\n");
2864 }
2865
2866 /*Configure vreg lines */
2867 for (i = 0; i < ARRAY_SIZE(msm_fb_dsi_vreg); i++) {
2868 if (on) {
2869 rc = vreg_enable(dsi_vreg[i]);
2870
2871 if (rc) {
2872 printk(KERN_ERR "vreg_enable: %s vreg"
2873 "operation failed\n",
2874 msm_fb_dsi_vreg[i]);
2875
2876 goto vreg_fail2;
2877 }
2878 } else {
2879 rc = vreg_disable(dsi_vreg[i]);
2880
2881 if (rc) {
2882 printk(KERN_ERR "vreg_disable: %s vreg "
2883 "operation failed\n",
2884 msm_fb_dsi_vreg[i]);
2885 goto vreg_fail2;
2886 }
2887 }
2888 }
2889
2890 return rc;
2891
2892vreg_fail2:
2893 if (on) {
2894 for (; i > 0; i--)
2895 vreg_disable(dsi_vreg[i - 1]);
2896 } else {
2897 for (; i > 0; i--)
2898 vreg_enable(dsi_vreg[i - 1]);
2899 }
2900
2901 return rc;
2902
2903vreg_fail1:
2904 for (; i > 0; i--)
2905 vreg_put(dsi_vreg[i - 1]);
2906
2907fail_gpio2:
2908 gpio_free(GPIO_BACKLIGHT_EN);
2909fail_gpio1:
2910 gpio_free(GPIO_DISPLAY_PWR_EN);
2911 dsi_gpio_initialized = 0;
2912 return rc;
2913}
2914
2915#define MDP_303_VSYNC_GPIO 97
2916
2917#ifdef CONFIG_FB_MSM_MDP303
2918static struct mipi_dsi_platform_data mipi_dsi_pdata = {
2919 .vsync_gpio = MDP_303_VSYNC_GPIO,
2920 .dsi_power_save = mipi_dsi_panel_power,
2921 .dsi_client_reset = msm_fb_dsi_client_reset,
2922 .get_lane_config = msm_fb_get_lane_config,
2923};
2924#endif
2925
2926static void __init msm_fb_add_devices(void)
2927{
2928 msm_fb_register_device("mdp", &mdp_pdata);
2929 msm_fb_register_device("lcdc", &lcdc_pdata);
2930 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
2931}
2932
2933#define MSM_EBI2_PHYS 0xa0d00000
2934#define MSM_EBI2_XMEM_CS2_CFG1 0xa0d10030
2935
2936static void __init msm7x27a_init_ebi2(void)
2937{
2938 uint32_t ebi2_cfg;
2939 void __iomem *ebi2_cfg_ptr;
2940
2941 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_PHYS, sizeof(uint32_t));
2942 if (!ebi2_cfg_ptr)
2943 return;
2944
2945 ebi2_cfg = readl(ebi2_cfg_ptr);
2946 if (machine_is_msm7x27a_rumi3() || machine_is_msm7x27a_surf())
2947 ebi2_cfg |= (1 << 4); /* CS2 */
2948
2949 writel(ebi2_cfg, ebi2_cfg_ptr);
2950 iounmap(ebi2_cfg_ptr);
2951
2952 /* Enable A/D MUX[bit 31] from EBI2_XMEM_CS2_CFG1 */
2953 ebi2_cfg_ptr = ioremap_nocache(MSM_EBI2_XMEM_CS2_CFG1,
2954 sizeof(uint32_t));
2955 if (!ebi2_cfg_ptr)
2956 return;
2957
2958 ebi2_cfg = readl(ebi2_cfg_ptr);
2959 if (machine_is_msm7x27a_surf())
2960 ebi2_cfg |= (1 << 31);
2961
2962 writel(ebi2_cfg, ebi2_cfg_ptr);
2963 iounmap(ebi2_cfg_ptr);
2964}
2965
2966#define ATMEL_TS_I2C_NAME "maXTouch"
2967static struct vreg *vreg_l12;
2968static struct vreg *vreg_s3;
2969
2970#define ATMEL_TS_GPIO_IRQ 82
2971
2972static int atmel_ts_power_on(bool on)
2973{
2974 int rc;
2975
2976 rc = on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2977 if (rc) {
2978 pr_err("%s: vreg %sable failed (%d)\n",
2979 __func__, on ? "en" : "dis", rc);
2980 return rc;
2981 }
2982
2983 rc = on ? vreg_enable(vreg_s3) : vreg_disable(vreg_s3);
2984 if (rc) {
2985 pr_err("%s: vreg %sable failed (%d) for S3\n",
2986 __func__, on ? "en" : "dis", rc);
2987 !on ? vreg_enable(vreg_l12) : vreg_disable(vreg_l12);
2988 return rc;
2989 }
2990 /* vreg stabilization delay */
2991 msleep(50);
2992 return 0;
2993}
2994
2995static int atmel_ts_platform_init(struct i2c_client *client)
2996{
2997 int rc;
2998
2999 vreg_l12 = vreg_get(NULL, "gp2");
3000 if (IS_ERR(vreg_l12)) {
3001 pr_err("%s: vreg_get for L2 failed\n", __func__);
3002 return PTR_ERR(vreg_l12);
3003 }
3004
3005 rc = vreg_set_level(vreg_l12, 2850);
3006 if (rc) {
3007 pr_err("%s: vreg set level failed (%d) for l2\n",
3008 __func__, rc);
3009 goto vreg_put_l2;
3010 }
3011
3012 vreg_s3 = vreg_get(NULL, "msme1");
3013 if (IS_ERR(vreg_s3)) {
3014 pr_err("%s: vreg_get for S3 failed\n", __func__);
3015 rc = PTR_ERR(vreg_s3);
3016 goto vreg_put_l2;
3017 }
3018
3019 rc = vreg_set_level(vreg_s3, 1800);
3020 if (rc) {
3021 pr_err("%s: vreg set level failed (%d) for S3\n",
3022 __func__, rc);
3023 goto vreg_put_s3;
3024 }
3025
3026 rc = gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3027 GPIO_CFG_INPUT, GPIO_CFG_PULL_UP,
3028 GPIO_CFG_8MA), GPIO_CFG_ENABLE);
3029 if (rc) {
3030 pr_err("%s: gpio_tlmm_config for %d failed\n",
3031 __func__, ATMEL_TS_GPIO_IRQ);
3032 goto vreg_put_s3;
3033 }
3034
3035 /* configure touchscreen interrupt gpio */
3036 rc = gpio_request(ATMEL_TS_GPIO_IRQ, "atmel_maxtouch_gpio");
3037 if (rc) {
3038 pr_err("%s: unable to request gpio %d\n",
3039 __func__, ATMEL_TS_GPIO_IRQ);
3040 goto ts_gpio_tlmm_unconfig;
3041 }
3042
3043 rc = gpio_direction_input(ATMEL_TS_GPIO_IRQ);
3044 if (rc < 0) {
3045 pr_err("%s: unable to set the direction of gpio %d\n",
3046 __func__, ATMEL_TS_GPIO_IRQ);
3047 goto free_ts_gpio;
3048 }
3049 return 0;
3050
3051free_ts_gpio:
3052 gpio_free(ATMEL_TS_GPIO_IRQ);
3053ts_gpio_tlmm_unconfig:
3054 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3055 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3056 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3057vreg_put_s3:
3058 vreg_put(vreg_s3);
3059vreg_put_l2:
3060 vreg_put(vreg_l12);
3061 return rc;
3062}
3063
3064static int atmel_ts_platform_exit(struct i2c_client *client)
3065{
3066 gpio_free(ATMEL_TS_GPIO_IRQ);
3067 gpio_tlmm_config(GPIO_CFG(ATMEL_TS_GPIO_IRQ, 0,
3068 GPIO_CFG_INPUT, GPIO_CFG_NO_PULL,
3069 GPIO_CFG_2MA), GPIO_CFG_DISABLE);
3070 vreg_disable(vreg_s3);
3071 vreg_put(vreg_s3);
3072 vreg_disable(vreg_l12);
3073 vreg_put(vreg_l12);
3074 return 0;
3075}
3076
3077static u8 atmel_ts_read_chg(void)
3078{
3079 return gpio_get_value(ATMEL_TS_GPIO_IRQ);
3080}
3081
3082static u8 atmel_ts_valid_interrupt(void)
3083{
3084 return !atmel_ts_read_chg();
3085}
3086
3087#define ATMEL_X_OFFSET 13
3088#define ATMEL_Y_OFFSET 0
3089
3090static struct mxt_platform_data atmel_ts_pdata = {
3091 .numtouch = 4,
3092 .init_platform_hw = atmel_ts_platform_init,
3093 .exit_platform_hw = atmel_ts_platform_exit,
3094 .power_on = atmel_ts_power_on,
3095 .display_res_x = 480,
3096 .display_res_y = 864,
3097 .min_x = ATMEL_X_OFFSET,
3098 .max_x = (505 - ATMEL_X_OFFSET),
3099 .min_y = ATMEL_Y_OFFSET,
3100 .max_y = (863 - ATMEL_Y_OFFSET),
3101 .valid_interrupt = atmel_ts_valid_interrupt,
3102 .read_chg = atmel_ts_read_chg,
3103};
3104
3105static struct i2c_board_info atmel_ts_i2c_info[] __initdata = {
3106 {
3107 I2C_BOARD_INFO(ATMEL_TS_I2C_NAME, 0x4a),
3108 .platform_data = &atmel_ts_pdata,
3109 .irq = MSM_GPIO_TO_INT(ATMEL_TS_GPIO_IRQ),
3110 },
3111};
3112
3113#define KP_INDEX(row, col) ((row)*ARRAY_SIZE(kp_col_gpios) + (col))
3114
3115static unsigned int kp_row_gpios[] = {31, 32, 33, 34, 35};
3116static unsigned int kp_col_gpios[] = {36, 37, 38, 39, 40};
3117
3118static const unsigned short keymap[ARRAY_SIZE(kp_col_gpios) *
3119 ARRAY_SIZE(kp_row_gpios)] = {
3120 [KP_INDEX(0, 0)] = KEY_7,
3121 [KP_INDEX(0, 1)] = KEY_DOWN,
3122 [KP_INDEX(0, 2)] = KEY_UP,
3123 [KP_INDEX(0, 3)] = KEY_RIGHT,
3124 [KP_INDEX(0, 4)] = KEY_ENTER,
3125
3126 [KP_INDEX(1, 0)] = KEY_LEFT,
3127 [KP_INDEX(1, 1)] = KEY_SEND,
3128 [KP_INDEX(1, 2)] = KEY_1,
3129 [KP_INDEX(1, 3)] = KEY_4,
3130 [KP_INDEX(1, 4)] = KEY_CLEAR,
3131
3132 [KP_INDEX(2, 0)] = KEY_6,
3133 [KP_INDEX(2, 1)] = KEY_5,
3134 [KP_INDEX(2, 2)] = KEY_8,
3135 [KP_INDEX(2, 3)] = KEY_3,
3136 [KP_INDEX(2, 4)] = KEY_NUMERIC_STAR,
3137
3138 [KP_INDEX(3, 0)] = KEY_9,
3139 [KP_INDEX(3, 1)] = KEY_NUMERIC_POUND,
3140 [KP_INDEX(3, 2)] = KEY_0,
3141 [KP_INDEX(3, 3)] = KEY_2,
3142 [KP_INDEX(3, 4)] = KEY_SLEEP,
3143
3144 [KP_INDEX(4, 0)] = KEY_BACK,
3145 [KP_INDEX(4, 1)] = KEY_HOME,
3146 [KP_INDEX(4, 2)] = KEY_MENU,
3147 [KP_INDEX(4, 3)] = KEY_VOLUMEUP,
3148 [KP_INDEX(4, 4)] = KEY_VOLUMEDOWN,
3149};
3150
3151/* SURF keypad platform device information */
3152static struct gpio_event_matrix_info kp_matrix_info = {
3153 .info.func = gpio_event_matrix_func,
3154 .keymap = keymap,
3155 .output_gpios = kp_row_gpios,
3156 .input_gpios = kp_col_gpios,
3157 .noutputs = ARRAY_SIZE(kp_row_gpios),
3158 .ninputs = ARRAY_SIZE(kp_col_gpios),
3159 .settle_time.tv_nsec = 40 * NSEC_PER_USEC,
3160 .poll_time.tv_nsec = 20 * NSEC_PER_MSEC,
3161 .flags = GPIOKPF_LEVEL_TRIGGERED_IRQ | GPIOKPF_DRIVE_INACTIVE |
3162 GPIOKPF_PRINT_UNMAPPED_KEYS,
3163};
3164
3165static struct gpio_event_info *kp_info[] = {
3166 &kp_matrix_info.info
3167};
3168
3169static struct gpio_event_platform_data kp_pdata = {
3170 .name = "7x27a_kp",
3171 .info = kp_info,
3172 .info_count = ARRAY_SIZE(kp_info)
3173};
3174
3175static struct platform_device kp_pdev = {
3176 .name = GPIO_EVENT_DEV_NAME,
3177 .id = -1,
3178 .dev = {
3179 .platform_data = &kp_pdata,
3180 },
3181};
3182
3183static struct msm_handset_platform_data hs_platform_data = {
3184 .hs_name = "7k_handset",
3185 .pwr_key_delay_ms = 500, /* 0 will disable end key */
3186};
3187
3188static struct platform_device hs_pdev = {
3189 .name = "msm-handset",
3190 .id = -1,
3191 .dev = {
3192 .platform_data = &hs_platform_data,
3193 },
3194};
3195
3196#define LED_GPIO_PDM 96
3197#define UART1DM_RX_GPIO 45
3198static void __init msm7x2x_init(void)
3199{
3200
3201 /* Common functions for SURF/FFA/RUMI3 */
3202 msm_device_i2c_init();
3203 msm7x27a_init_mmc();
3204 msm7x27a_init_ebi2();
3205 msm7x27a_cfg_uart2dm_serial();
3206#ifdef CONFIG_SERIAL_MSM_HS
3207 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO);
3208 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
3209#endif
3210
3211 if (machine_is_msm7x27a_rumi3()) {
3212 platform_add_devices(rumi_sim_devices,
3213 ARRAY_SIZE(rumi_sim_devices));
3214 }
3215 if (machine_is_msm7x27a_surf() || machine_is_msm7x27a_ffa()) {
3216#ifdef CONFIG_USB_MSM_OTG_72K
3217 msm_otg_pdata.swfi_latency =
3218 msm7x27a_pm_data
3219 [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency;
3220 msm_device_otg.dev.platform_data = &msm_otg_pdata;
3221#endif
3222 msm_device_gadget_peripheral.dev.platform_data =
3223 &msm_gadget_pdata;
3224 msm7x27a_cfg_smsc911x();
3225 platform_add_devices(msm_footswitch_devices,
3226 msm_num_footswitch_devices);
3227 platform_add_devices(surf_ffa_devices,
3228 ARRAY_SIZE(surf_ffa_devices));
3229 msm_fb_add_devices();
3230#ifdef CONFIG_USB_EHCI_MSM_72K
3231 msm7x2x_init_host();
3232#endif
3233 }
3234
3235 msm_pm_set_platform_data(msm7x27a_pm_data,
3236 ARRAY_SIZE(msm7x27a_pm_data));
3237
3238#if defined(CONFIG_I2C) && defined(CONFIG_GPIO_SX150X)
3239 register_i2c_devices();
3240#endif
3241#if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE)
3242 bt_power_init();
3243#endif
3244 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
3245 atmel_ts_pdata.min_x = 0;
3246 atmel_ts_pdata.max_x = 480;
3247 atmel_ts_pdata.min_y = 0;
3248 atmel_ts_pdata.max_y = 320;
3249 }
3250
3251 i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID,
3252 atmel_ts_i2c_info,
3253 ARRAY_SIZE(atmel_ts_i2c_info));
3254
3255 i2c_register_board_info(MSM_GSBI0_QUP_I2C_BUS_ID,
3256 i2c_camera_devices,
3257 ARRAY_SIZE(i2c_camera_devices));
3258 platform_device_register(&kp_pdev);
3259 platform_device_register(&hs_pdev);
3260
3261 /* configure it as a pdm function*/
3262 if (gpio_tlmm_config(GPIO_CFG(LED_GPIO_PDM, 3,
3263 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL,
3264 GPIO_CFG_8MA), GPIO_CFG_ENABLE))
3265 pr_err("%s: gpio_tlmm_config for %d failed\n",
3266 __func__, LED_GPIO_PDM);
3267 else
3268 platform_device_register(&led_pdev);
3269
3270#ifdef CONFIG_MSM_RPC_VIBRATOR
3271 if (machine_is_msm7x27a_ffa())
3272 msm_init_pmic_vibrator();
3273#endif
3274 /*7x25a kgsl initializations*/
3275 msm7x25a_kgsl_3d0_init();
3276}
3277
3278static void __init msm7x2x_init_early(void)
3279{
3280 msm7x2x_misc_init();
3281 msm_msm7x2x_allocate_memory_regions();
3282}
3283
3284MACHINE_START(MSM7X27A_RUMI3, "QCT MSM7x27a RUMI3")
3285 .boot_params = PHYS_OFFSET + 0x100,
3286 .map_io = msm_common_io_init,
3287 .reserve = msm7x27a_reserve,
3288 .init_irq = msm_init_irq,
3289 .init_machine = msm7x2x_init,
3290 .timer = &msm_timer,
3291 .init_early = msm7x2x_init_early,
3292MACHINE_END
3293MACHINE_START(MSM7X27A_SURF, "QCT MSM7x27a SURF")
3294 .boot_params = PHYS_OFFSET + 0x100,
3295 .map_io = msm_common_io_init,
3296 .reserve = msm7x27a_reserve,
3297 .init_irq = msm_init_irq,
3298 .init_machine = msm7x2x_init,
3299 .timer = &msm_timer,
3300 .init_early = msm7x2x_init_early,
3301MACHINE_END
3302MACHINE_START(MSM7X27A_FFA, "QCT MSM7x27a FFA")
3303 .boot_params = PHYS_OFFSET + 0x100,
3304 .map_io = msm_common_io_init,
3305 .reserve = msm7x27a_reserve,
3306 .init_irq = msm_init_irq,
3307 .init_machine = msm7x2x_init,
3308 .timer = &msm_timer,
3309 .init_early = msm7x2x_init_early,
3310MACHINE_END