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review.evervolv.com / android_kernel_htc_msm8960 / e9541a3e912274eeb46f5e1b4b0eb8290de30342 / . / drivers / gpu / msm / kgsl_iommu.h
blob: d4de656dd5bcac1b0dc1ed16ff3df8219dc92023 [file] [log] [blame]
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -0600[diff] [blame]1/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __KGSL_IOMMU_H
14#define __KGSL_IOMMU_H
15
16#include <mach/iommu.h>
17
Shubhraprakash Das2b8716b2012-05-04 16:58:40 -0600[diff] [blame]18/* IOMMU registers and masks */
19#define KGSL_IOMMU_TTBR0 0x10
20#define KGSL_IOMMU_TTBR1 0x14
21#define KGSL_IOMMU_TTBR0_PA_MASK 0x0003FFFF
22#define KGSL_IOMMU_TTBR0_PA_SHIFT 14
23#define KGSL_IOMMU_CTX_TLBIALL 0x800
24#define KGSL_IOMMU_CONTEXTIDR 0x8
25#define KGSL_IOMMU_CONTEXTIDR_ASID_MASK 0xFF
26#define KGSL_IOMMU_CONTEXTIDR_ASID_SHIFT 0
27#define KGSL_IOMMU_CTX_TLBIASID 0x804
28#define KGSL_IOMMU_CTX_SHIFT 12
Shubhraprakash Dasd3f937c2012-05-07 12:44:40 -0600[diff] [blame]29
30#define KGSL_IOMMU_MAX_ASIDS 256
31#define KGSL_IOMMU_ASID_REUSE 2
32
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -0600[diff] [blame]33/*
34 * Max number of iommu units that the gpu core can have
35 * On APQ8064, KGSL can control a maximum of 2 IOMMU units.
36 */
37#define KGSL_IOMMU_MAX_UNITS 2
38
39/* Max number of iommu contexts per IOMMU unit */
40#define KGSL_IOMMU_MAX_DEVS_PER_UNIT 2
41
Shubhraprakash Dasd8cbcd12012-05-07 16:11:32 -0600[diff] [blame]42/* Macros to read/write IOMMU registers */
43#define KGSL_IOMMU_SET_IOMMU_REG(base_addr, ctx, REG, val) \
44 writel_relaxed(val, base_addr + \
45 (ctx << KGSL_IOMMU_CTX_SHIFT) + \
46 KGSL_IOMMU_##REG)
47
48#define KGSL_IOMMU_GET_IOMMU_REG(base_addr, ctx, REG) \
49 readl_relaxed(base_addr + \
50 (ctx << KGSL_IOMMU_CTX_SHIFT) + \
51 KGSL_IOMMU_##REG)
52
53/* Gets the lsb value of pagetable */
54#define KGSL_IOMMMU_PT_LSB(pt_val) \
55 (pt_val & ~(KGSL_IOMMU_TTBR0_PA_MASK << \
56 KGSL_IOMMU_TTBR0_PA_SHIFT))
57
Shubhraprakash Dase9541a32012-05-09 22:25:55 -0600[diff] [blame^]58/* offset at which a nop command is placed in setstate_memory */
59#define KGSL_IOMMU_SETSTATE_NOP_OFFSET 1024
60
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -0600[diff] [blame]61/*
62 * struct kgsl_iommu_device - Structure holding data about iommu contexts
63 * @dev: Device pointer to iommu context
64 * @attached: Indicates whether this iommu context is presently attached to
65 * a pagetable/domain or not
66 * @pt_lsb: The LSB of IOMMU_TTBR0 register which is the pagetable
67 * register
68 * @ctx_id: This iommu units context id. It can be either 0 or 1
69 * @clk_enabled: If set indicates that iommu clocks of this iommu context
70 * are on, else the clocks are off
71 */
72struct kgsl_iommu_device {
73 struct device *dev;
74 bool attached;
75 unsigned int pt_lsb;
76 enum kgsl_iommu_context_id ctx_id;
77 bool clk_enabled;
78};
79
80/*
81 * struct kgsl_iommu_unit - Structure holding data about iommu units. An IOMMU
82 * units is basically a separte IOMMU h/w block with it's own IOMMU contexts
83 * @dev: Pointer to array of struct kgsl_iommu_device which has information
84 * about the IOMMU contexts under this IOMMU unit
85 * @dev_count: Number of IOMMU contexts that are valid in the previous feild
86 * @reg_map: Memory descriptor which holds the mapped address of this IOMMU
87 * units register range
88 */
89struct kgsl_iommu_unit {
90 struct kgsl_iommu_device dev[KGSL_IOMMU_MAX_DEVS_PER_UNIT];
91 unsigned int dev_count;
92 struct kgsl_memdesc reg_map;
93};
94
95/*
96 * struct kgsl_iommu - Structure holding iommu data for kgsl driver
97 * @dev: Array of kgsl_iommu_device which contain information about
98 * iommu contexts owned by graphics cores
99 * @unit_count: Number of IOMMU units that are available for this
100 * instance of the IOMMU driver
101 * @iommu_last_cmd_ts: The timestamp of last command submitted that
102 * aceeses iommu registers
103 * @device: Pointer to kgsl device
104 * @asids: A bit structure indicating which id's are presently used
105 * @asid: Contains the initial value of IOMMU_CONTEXTIDR when a domain
106 * is first attached
Shubhraprakash Dasd3f937c2012-05-07 12:44:40 -0600[diff] [blame]107 * asid_reuse: Holds the number of times the reuse asid is reused
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -0600[diff] [blame]108 */
109struct kgsl_iommu {
110 struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS];
111 unsigned int unit_count;
112 unsigned int iommu_last_cmd_ts;
113 struct kgsl_device *device;
114 unsigned long *asids;
115 unsigned int asid;
Shubhraprakash Dasd3f937c2012-05-07 12:44:40 -0600[diff] [blame]116 unsigned int asid_reuse;
117};
118
119/*
120 * struct kgsl_iommu_pt - Iommu pagetable structure private to kgsl driver
121 * @domain: Pointer to the iommu domain that contains the iommu pagetable
122 * @iommu: Pointer to iommu structure
123 * @asid: The asid assigned to this domain
124 */
125struct kgsl_iommu_pt {
126 struct iommu_domain *domain;
127 struct kgsl_iommu *iommu;
128 unsigned int asid;
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -0600[diff] [blame]129};
130
131#endif