blob: 64062879981e4297db9f8386c68306c15e61c616 [file] [log] [blame]
Mike Iselyd8554972006-06-26 20:58:46 -03001/*
2 *
3 * $Id$
4 *
5 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
6 * Copyright (C) 2004 Aurelien Alleaume <slts@free.fr>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#include <linux/device.h> // for linux/firmware.h
24#include <linux/firmware.h>
Mike Iselyd8554972006-06-26 20:58:46 -030025#include "pvrusb2-util.h"
26#include "pvrusb2-encoder.h"
27#include "pvrusb2-hdw-internal.h"
28#include "pvrusb2-debug.h"
Michael Krufky8d364362007-01-22 02:17:55 -030029#include "pvrusb2-fx2-cmd.h"
Mike Iselyd8554972006-06-26 20:58:46 -030030
Mike Iselyd8554972006-06-26 20:58:46 -030031
32
33/* Firmware mailbox flags - definitions found from ivtv */
34#define IVTV_MBOX_FIRMWARE_DONE 0x00000004
35#define IVTV_MBOX_DRIVER_DONE 0x00000002
36#define IVTV_MBOX_DRIVER_BUSY 0x00000001
37
Mike Iselyc43000e2007-01-28 15:41:12 -030038#define MBOX_BASE 0x44
39
Mike Iselyd8554972006-06-26 20:58:46 -030040
Mike Iselyeacbe7c2006-06-25 20:04:06 -030041static int pvr2_encoder_write_words(struct pvr2_hdw *hdw,
Mike Iselyc43000e2007-01-28 15:41:12 -030042 unsigned int offs,
Mike Iselyd8554972006-06-26 20:58:46 -030043 const u32 *data, unsigned int dlen)
44{
Mike Iselyc43000e2007-01-28 15:41:12 -030045 unsigned int idx,addr;
46 unsigned int bAddr;
Mike Iselyd8554972006-06-26 20:58:46 -030047 int ret;
Mike Iselyd8554972006-06-26 20:58:46 -030048 unsigned int chunkCnt;
49
50 /*
51
52 Format: First byte must be 0x01. Remaining 32 bit words are
Mike Iselyc43000e2007-01-28 15:41:12 -030053 spread out into chunks of 7 bytes each, with the first 4 bytes
54 being the data word (little endian), and the next 3 bytes
55 being the address where that data word is to be written (big
56 endian). Repeat request for additional words, with offset
57 adjusted accordingly.
Mike Iselyd8554972006-06-26 20:58:46 -030058
59 */
60 while (dlen) {
61 chunkCnt = 8;
62 if (chunkCnt > dlen) chunkCnt = dlen;
63 memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer));
Mike Iselyc43000e2007-01-28 15:41:12 -030064 bAddr = 0;
65 hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD;
Mike Iselyd8554972006-06-26 20:58:46 -030066 for (idx = 0; idx < chunkCnt; idx++) {
Mike Iselyc43000e2007-01-28 15:41:12 -030067 addr = idx + offs;
68 hdw->cmd_buffer[bAddr+6] = (addr & 0xffu);
69 hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu);
70 hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu);
71 PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]);
72 bAddr += 7;
Mike Iselyd8554972006-06-26 20:58:46 -030073 }
74 ret = pvr2_send_request(hdw,
75 hdw->cmd_buffer,1+(chunkCnt*7),
Mike Iselya0fd1cb2006-06-30 11:35:28 -030076 NULL,0);
Mike Iselyd8554972006-06-26 20:58:46 -030077 if (ret) return ret;
78 data += chunkCnt;
79 dlen -= chunkCnt;
80 offs += chunkCnt;
81 }
82
83 return 0;
84}
85
86
Mike Iselyc43000e2007-01-28 15:41:12 -030087static int pvr2_encoder_read_words(struct pvr2_hdw *hdw,
88 unsigned int offs,
Mike Iselyd8554972006-06-26 20:58:46 -030089 u32 *data, unsigned int dlen)
90{
91 unsigned int idx;
92 int ret;
Mike Iselyd8554972006-06-26 20:58:46 -030093 unsigned int chunkCnt;
94
95 /*
96
97 Format: First byte must be 0x02 (status check) or 0x28 (read
98 back block of 32 bit words). Next 6 bytes must be zero,
Mike Iselyc43000e2007-01-28 15:41:12 -030099 followed by a single byte of MBOX_BASE+offset for portion to
100 be read. Returned data is packed set of 32 bits words that
101 were read.
Mike Iselyd8554972006-06-26 20:58:46 -0300102
103 */
104
105 while (dlen) {
106 chunkCnt = 16;
107 if (chunkCnt > dlen) chunkCnt = dlen;
Mike Iselyc43000e2007-01-28 15:41:12 -0300108 if (chunkCnt < 16) chunkCnt = 1;
Michael Krufky8d364362007-01-22 02:17:55 -0300109 hdw->cmd_buffer[0] =
Mike Iselyc43000e2007-01-28 15:41:12 -0300110 ((chunkCnt == 1) ?
111 FX2CMD_MEM_READ_DWORD : FX2CMD_MEM_READ_64BYTES);
112 hdw->cmd_buffer[1] = 0;
113 hdw->cmd_buffer[2] = 0;
114 hdw->cmd_buffer[3] = 0;
115 hdw->cmd_buffer[4] = 0;
116 hdw->cmd_buffer[5] = ((offs>>16) & 0xffu);
117 hdw->cmd_buffer[6] = ((offs>>8) & 0xffu);
118 hdw->cmd_buffer[7] = (offs & 0xffu);
Mike Iselyd8554972006-06-26 20:58:46 -0300119 ret = pvr2_send_request(hdw,
120 hdw->cmd_buffer,8,
Mike Iselyc43000e2007-01-28 15:41:12 -0300121 hdw->cmd_buffer,
122 (chunkCnt == 1 ? 4 : 16 * 4));
Mike Iselyd8554972006-06-26 20:58:46 -0300123 if (ret) return ret;
124
125 for (idx = 0; idx < chunkCnt; idx++) {
126 data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4);
127 }
128 data += chunkCnt;
129 dlen -= chunkCnt;
130 offs += chunkCnt;
131 }
132
133 return 0;
134}
135
136
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300137/* This prototype is set up to be compatible with the
138 cx2341x_mbox_func prototype in cx2341x.h, which should be in
139 kernels 2.6.18 or later. We do this so that we can enable
140 cx2341x.ko to write to our encoder (by handing it a pointer to this
141 function). For earlier kernels this doesn't really matter. */
142static int pvr2_encoder_cmd(void *ctxt,
Hans Verkuilea48c132007-12-12 07:04:58 -0300143 u32 cmd,
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300144 int arg_cnt_send,
145 int arg_cnt_recv,
146 u32 *argp)
Mike Iselyd8554972006-06-26 20:58:46 -0300147{
148 unsigned int poll_count;
Mike Iselyc43000e2007-01-28 15:41:12 -0300149 unsigned int try_count = 0;
150 int retry_flag;
Mike Iselyd8554972006-06-26 20:58:46 -0300151 int ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300152 unsigned int idx;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300153 /* These sizes look to be limited by the FX2 firmware implementation */
Mike Iselyd8554972006-06-26 20:58:46 -0300154 u32 wrData[16];
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300155 u32 rdData[16];
156 struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt;
Mike Iselyd8554972006-06-26 20:58:46 -0300157
Mike Iselyc05c0462006-06-25 20:04:25 -0300158
Mike Iselyd8554972006-06-26 20:58:46 -0300159 /*
160
161 The encoder seems to speak entirely using blocks 32 bit words.
Mike Iselyc43000e2007-01-28 15:41:12 -0300162 In ivtv driver terms, this is a mailbox at MBOX_BASE which we
163 populate with data and watch what the hardware does with it.
164 The first word is a set of flags used to control the
165 transaction, the second word is the command to execute, the
166 third byte is zero (ivtv driver suggests that this is some
167 kind of return value), and the fourth byte is a specified
168 timeout (windows driver always uses 0x00060000 except for one
169 case when it is zero). All successive words are the argument
170 words for the command.
Mike Iselyd8554972006-06-26 20:58:46 -0300171
172 First, write out the entire set of words, with the first word
173 being zero.
174
175 Next, write out just the first word again, but set it to
176 IVTV_MBOX_DRIVER_DONE | IVTV_DRIVER_BUSY this time (which
177 probably means "go").
178
Mike Iselyc43000e2007-01-28 15:41:12 -0300179 Next, read back the return count words. Check the first word,
Mike Iselyd8554972006-06-26 20:58:46 -0300180 which should have IVTV_MBOX_FIRMWARE_DONE set. If however
181 that bit is not set, then the command isn't done so repeat the
Mike Iselyc43000e2007-01-28 15:41:12 -0300182 read until it is set.
Mike Iselyd8554972006-06-26 20:58:46 -0300183
184 Finally, write out just the first word again, but set it to
185 0x0 this time (which probably means "idle").
186
187 */
188
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300189 if (arg_cnt_send > (ARRAY_SIZE(wrData) - 4)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300190 pvr2_trace(
191 PVR2_TRACE_ERROR_LEGS,
192 "Failed to write cx23416 command"
193 " - too many input arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300194 " (was given %u limit %lu)",
195 arg_cnt_send, (long unsigned) ARRAY_SIZE(wrData) - 4);
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300196 return -EINVAL;
197 }
198
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300199 if (arg_cnt_recv > (ARRAY_SIZE(rdData) - 4)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300200 pvr2_trace(
201 PVR2_TRACE_ERROR_LEGS,
202 "Failed to write cx23416 command"
203 " - too many return arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300204 " (was given %u limit %lu)",
205 arg_cnt_recv, (long unsigned) ARRAY_SIZE(rdData) - 4);
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300206 return -EINVAL;
207 }
208
Mike Iselyd8554972006-06-26 20:58:46 -0300209
210 LOCK_TAKE(hdw->ctl_lock); do {
211
Mike Isely681c7392007-11-26 01:48:52 -0300212 if (!hdw->state_encoder_ok) {
Mike Isely9a607f02007-10-14 18:18:12 -0300213 ret = -EIO;
214 break;
215 }
216
Mike Iselyc43000e2007-01-28 15:41:12 -0300217 retry_flag = 0;
218 try_count++;
219 ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300220 wrData[0] = 0;
221 wrData[1] = cmd;
222 wrData[2] = 0;
223 wrData[3] = 0x00060000;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300224 for (idx = 0; idx < arg_cnt_send; idx++) {
225 wrData[idx+4] = argp[idx];
Mike Iselyd8554972006-06-26 20:58:46 -0300226 }
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300227 for (; idx < ARRAY_SIZE(wrData) - 4; idx++) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300228 wrData[idx+4] = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300229 }
230
Mike Iselyc43000e2007-01-28 15:41:12 -0300231 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx);
Mike Iselyd8554972006-06-26 20:58:46 -0300232 if (ret) break;
233 wrData[0] = IVTV_MBOX_DRIVER_DONE|IVTV_MBOX_DRIVER_BUSY;
Mike Iselyc43000e2007-01-28 15:41:12 -0300234 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
Mike Iselyd8554972006-06-26 20:58:46 -0300235 if (ret) break;
236 poll_count = 0;
237 while (1) {
Mike Iselyc43000e2007-01-28 15:41:12 -0300238 poll_count++;
239 ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData,
240 arg_cnt_recv+4);
241 if (ret) {
242 break;
243 }
Mike Iselyd8554972006-06-26 20:58:46 -0300244 if (rdData[0] & IVTV_MBOX_FIRMWARE_DONE) {
245 break;
246 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300247 if (rdData[0] && (poll_count < 1000)) continue;
248 if (!rdData[0]) {
249 retry_flag = !0;
250 pvr2_trace(
251 PVR2_TRACE_ERROR_LEGS,
252 "Encoder timed out waiting for us"
253 "; arranging to retry");
254 } else {
Mike Iselyd8554972006-06-26 20:58:46 -0300255 pvr2_trace(
256 PVR2_TRACE_ERROR_LEGS,
257 "***WARNING*** device's encoder"
258 " appears to be stuck"
Mike Isely201779f2007-02-08 01:48:57 -0300259 " (status=0x%08x)",rdData[0]);
Mike Iselyd8554972006-06-26 20:58:46 -0300260 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300261 pvr2_trace(
262 PVR2_TRACE_ERROR_LEGS,
263 "Encoder command: 0x%02x",cmd);
264 for (idx = 4; idx < arg_cnt_send; idx++) {
265 pvr2_trace(
266 PVR2_TRACE_ERROR_LEGS,
267 "Encoder arg%d: 0x%08x",
268 idx-3,wrData[idx]);
269 }
270 ret = -EBUSY;
271 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300272 }
Mike Iselyc43000e2007-01-28 15:41:12 -0300273 if (retry_flag) {
274 if (try_count < 20) continue;
275 pvr2_trace(
276 PVR2_TRACE_ERROR_LEGS,
277 "Too many retries...");
278 ret = -EBUSY;
279 }
280 if (ret) {
Mike Isely681c7392007-11-26 01:48:52 -0300281 hdw->state_encoder_ok = 0;
282 pvr2_trace(PVR2_TRACE_STBITS,
283 "State bit %s <-- %s",
284 "state_encoder_ok",
285 (hdw->state_encoder_ok ? "true" : "false"));
Mike Iselyc43000e2007-01-28 15:41:12 -0300286 pvr2_trace(
287 PVR2_TRACE_ERROR_LEGS,
288 "Giving up on command."
Mike Isely65bd80f2007-11-26 02:11:38 -0300289 " This is normally recovered by the driver.");
Mike Iselyc43000e2007-01-28 15:41:12 -0300290 break;
291 }
Mike Iselyd8554972006-06-26 20:58:46 -0300292 wrData[0] = 0x7;
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300293 for (idx = 0; idx < arg_cnt_recv; idx++) {
294 argp[idx] = rdData[idx+4];
Mike Iselyd8554972006-06-26 20:58:46 -0300295 }
296
297 wrData[0] = 0x0;
Mike Iselyc43000e2007-01-28 15:41:12 -0300298 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1);
Mike Iselyd8554972006-06-26 20:58:46 -0300299 if (ret) break;
300
301 } while(0); LOCK_GIVE(hdw->ctl_lock);
302
303 return ret;
304}
305
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300306
307static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd,
308 int args, ...)
309{
310 va_list vl;
311 unsigned int idx;
312 u32 data[12];
313
Ahmed S. Darwisheca8ebf2007-01-20 00:35:03 -0300314 if (args > ARRAY_SIZE(data)) {
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300315 pvr2_trace(
316 PVR2_TRACE_ERROR_LEGS,
317 "Failed to write cx23416 command"
318 " - too many arguments"
Mauro Carvalho Chehab69b04f02007-01-21 22:02:35 -0300319 " (was given %u limit %lu)",
320 args, (long unsigned) ARRAY_SIZE(data));
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300321 return -EINVAL;
322 }
323
324 va_start(vl, args);
325 for (idx = 0; idx < args; idx++) {
326 data[idx] = va_arg(vl, u32);
327 }
328 va_end(vl);
329
330 return pvr2_encoder_cmd(hdw,cmd,args,0,data);
331}
332
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300333
334/* This implements some extra setup for the encoder that seems to be
335 specific to the PVR USB2 hardware. */
Adrian Bunk5948e522007-04-27 12:31:05 -0300336static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw)
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300337{
338 int ret = 0;
339 int encMisc3Arg = 0;
340
341#if 0
342 /* This inexplicable bit happens in the Hauppage windows
343 driver (for both 24xxx and 29xxx devices). However I
344 currently see no difference in behavior with or without
345 this stuff. Leave this here as a note of its existence,
346 but don't use it. */
347 LOCK_TAKE(hdw->ctl_lock); do {
348 u32 dat[1];
349 dat[0] = 0x80000640;
350 pvr2_encoder_write_words(hdw,0x01fe,dat,1);
351 pvr2_encoder_write_words(hdw,0x023e,dat,1);
352 } while(0); LOCK_GIVE(hdw->ctl_lock);
353#endif
354
355 /* Mike Isely <isely@pobox.com> 26-Jan-2006 The windows driver
356 sends the following list of ENC_MISC commands (for both
357 24xxx and 29xxx devices). Meanings are not entirely clear,
358 however without the ENC_MISC(3,1) command then we risk
359 random perpetual video corruption whenever the video input
360 breaks up for a moment (like when switching channels). */
361
362
363#if 0
364 /* This ENC_MISC(5,0) command seems to hurt 29xxx sync
365 performance on channel changes, but is not a problem on
366 24xxx devices. */
367 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0);
368#endif
369
370 /* This ENC_MISC(3,encMisc3Arg) command is critical - without
371 it there will eventually be video corruption. Also, the
Mike Isely989eb152007-11-26 01:53:12 -0300372 saa7115 case is strange - the Windows driver is passing 1
373 regardless of device type but if we have 1 for saa7115
374 devices the video turns sluggish. */
375 if (hdw->hdw_desc->flag_has_cx25840) {
376 encMisc3Arg = 1;
377 } else {
378 encMisc3Arg = 0;
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300379 }
380 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3,
381 encMisc3Arg,0,0);
382
383 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0);
384
385#if 0
386 /* This ENC_MISC(4,1) command is poisonous, so it is commented
387 out. But I'm leaving it here anyway to document its
388 existence in the Windows driver. The effect of this
389 command is that apps displaying the stream become sluggish
390 with stuttering video. */
391 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0);
392#endif
393
394 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0);
395 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0);
396
397 return ret;
398}
399
Mike Isely681c7392007-11-26 01:48:52 -0300400int pvr2_encoder_adjust(struct pvr2_hdw *hdw)
401{
402 int ret;
403 ret = cx2341x_update(hdw,pvr2_encoder_cmd,
404 (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL),
405 &hdw->enc_ctl_state);
406 if (ret) {
407 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
408 "Error from cx2341x module code=%d",ret);
409 } else {
410 memcpy(&hdw->enc_cur_state,&hdw->enc_ctl_state,
411 sizeof(struct cx2341x_mpeg_params));
412 hdw->enc_cur_valid = !0;
413 }
414 return ret;
415}
416
417
Mike Iselyd8554972006-06-26 20:58:46 -0300418int pvr2_encoder_configure(struct pvr2_hdw *hdw)
419{
Mike Iselyb30d2442006-06-25 20:05:01 -0300420 int ret;
Mike Iselydb71b7d2007-04-28 20:08:33 -0300421 int val;
Mike Iselyb30d2442006-06-25 20:05:01 -0300422 pvr2_trace(PVR2_TRACE_ENCODER,"pvr2_encoder_configure"
423 " (cx2341x module)");
424 hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING;
425 hdw->enc_ctl_state.width = hdw->res_hor_val;
426 hdw->enc_ctl_state.height = hdw->res_ver_val;
Mike Iselydb71b7d2007-04-28 20:08:33 -0300427 hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ?
Mike Iselyb30d2442006-06-25 20:05:01 -0300428 0 : 1);
Mike Iselyd8554972006-06-26 20:58:46 -0300429
Mike Iselyb30d2442006-06-25 20:05:01 -0300430 ret = 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300431
Mike Isely6fe7d2c2007-01-28 15:42:56 -0300432 ret |= pvr2_encoder_prep_config(hdw);
433
Mike Iselydb71b7d2007-04-28 20:08:33 -0300434 /* saa7115: 0xf0 */
435 val = 0xf0;
Mike Isely989eb152007-11-26 01:53:12 -0300436 if (hdw->hdw_desc->flag_has_cx25840) {
Mike Iselydb71b7d2007-04-28 20:08:33 -0300437 /* ivtv cx25840: 0x140 */
438 val = 0x140;
439 }
440
Mike Iselyb30d2442006-06-25 20:05:01 -0300441 if (!ret) ret = pvr2_encoder_vcmd(
442 hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2,
Mike Iselydb71b7d2007-04-28 20:08:33 -0300443 val, val);
Mike Iselyd8554972006-06-26 20:58:46 -0300444
445 /* setup firmware to notify us about some events (don't know why...) */
Mike Iselyb30d2442006-06-25 20:05:01 -0300446 if (!ret) ret = pvr2_encoder_vcmd(
447 hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4,
448 0, 0, 0x10000000, 0xffffffff);
Mike Iselyd8554972006-06-26 20:58:46 -0300449
Mike Iselyb30d2442006-06-25 20:05:01 -0300450 if (!ret) ret = pvr2_encoder_vcmd(
451 hdw,CX2341X_ENC_SET_VBI_LINE, 5,
452 0xffffffff,0,0,0,0);
Mike Iselyd8554972006-06-26 20:58:46 -0300453
Mike Iselyb30d2442006-06-25 20:05:01 -0300454 if (ret) {
455 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
Mauro Carvalho Chehab58f56cb2006-08-30 05:44:31 -0300456 "Failed to configure cx23416");
Mike Iselyb30d2442006-06-25 20:05:01 -0300457 return ret;
Mike Iselyd8554972006-06-26 20:58:46 -0300458 }
459
Mike Isely681c7392007-11-26 01:48:52 -0300460 ret = pvr2_encoder_adjust(hdw);
461 if (ret) return ret;
Mike Iselyd8554972006-06-26 20:58:46 -0300462
Mike Isely681c7392007-11-26 01:48:52 -0300463 ret = pvr2_encoder_vcmd(
Mike Iselyb30d2442006-06-25 20:05:01 -0300464 hdw, CX2341X_ENC_INITIALIZE_INPUT, 0);
465
466 if (ret) {
467 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
Mauro Carvalho Chehab58f56cb2006-08-30 05:44:31 -0300468 "Failed to initialize cx23416 video input");
Mike Iselyb30d2442006-06-25 20:05:01 -0300469 return ret;
470 }
471
Mike Iselyb30d2442006-06-25 20:05:01 -0300472 return 0;
Mike Iselyd8554972006-06-26 20:58:46 -0300473}
474
Mike Iselyb30d2442006-06-25 20:05:01 -0300475
Mike Iselyd8554972006-06-26 20:58:46 -0300476int pvr2_encoder_start(struct pvr2_hdw *hdw)
477{
478 int status;
479
480 /* unmask some interrupts */
481 pvr2_write_register(hdw, 0x0048, 0xbfffffff);
482
483 /* change some GPIO data */
484 pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000481);
485 pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
486
Pantelis Koukousoulas275b2e22006-12-27 23:05:19 -0300487 pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1,
488 hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0);
489
Mike Isely681c7392007-11-26 01:48:52 -0300490 switch (hdw->active_stream_type) {
Mike Isely16eb40d2006-12-30 18:27:32 -0300491 case pvr2_config_vbi:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300492 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
493 0x01,0x14);
Mike Isely16eb40d2006-12-30 18:27:32 -0300494 break;
495 case pvr2_config_mpeg:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300496 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
497 0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300498 break;
499 default: /* Unhandled cases for now */
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300500 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2,
501 0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300502 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300503 }
Mike Iselyd8554972006-06-26 20:58:46 -0300504 return status;
505}
506
507int pvr2_encoder_stop(struct pvr2_hdw *hdw)
508{
509 int status;
510
511 /* mask all interrupts */
512 pvr2_write_register(hdw, 0x0048, 0xffffffff);
513
Mike Isely681c7392007-11-26 01:48:52 -0300514 switch (hdw->active_stream_type) {
Mike Isely16eb40d2006-12-30 18:27:32 -0300515 case pvr2_config_vbi:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300516 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
517 0x01,0x01,0x14);
Mike Isely16eb40d2006-12-30 18:27:32 -0300518 break;
519 case pvr2_config_mpeg:
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300520 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
521 0x01,0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300522 break;
523 default: /* Unhandled cases for now */
Mike Iselyeacbe7c2006-06-25 20:04:06 -0300524 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3,
525 0x01,0,0x13);
Mike Isely16eb40d2006-12-30 18:27:32 -0300526 break;
Mike Iselyd8554972006-06-26 20:58:46 -0300527 }
528
529 /* change some GPIO data */
530 /* Note: Bit d7 of dir appears to control the LED. So we shut it
531 off here. */
532 pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000401);
533 pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000000);
534
Mike Iselyd8554972006-06-26 20:58:46 -0300535 return status;
536}
537
538
539/*
540 Stuff for Emacs to see, in order to encourage consistent editing style:
541 *** Local Variables: ***
542 *** mode: c ***
543 *** fill-column: 70 ***
544 *** tab-width: 8 ***
545 *** c-basic-offset: 8 ***
546 *** End: ***
547 */