| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 1 | /* | 
 | 2 |  * arch/arm/mach-tegra/board-harmony.c | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 2010 Google, Inc. | 
 | 5 |  * | 
 | 6 |  * Author: | 
 | 7 |  *	Colin Cross <ccross@android.com> | 
 | 8 |  * | 
 | 9 |  * This software is licensed under the terms of the GNU General Public | 
 | 10 |  * License version 2, as published by the Free Software Foundation, and | 
 | 11 |  * may be copied, distributed, and modified under those terms. | 
 | 12 |  * | 
 | 13 |  * This program is distributed in the hope that it will be useful, | 
 | 14 |  * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
 | 15 |  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
 | 16 |  * GNU General Public License for more details. | 
 | 17 |  * | 
 | 18 |  */ | 
 | 19 |  | 
 | 20 | #include <linux/init.h> | 
 | 21 | #include <linux/io.h> | 
| Colin Cross | 4de3a8f | 2010-04-05 13:16:42 -0700 | [diff] [blame] | 22 | #include <linux/clk.h> | 
 | 23 | #include <linux/delay.h> | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 24 |  | 
 | 25 | #include <asm/hardware/cache-l2x0.h> | 
 | 26 |  | 
 | 27 | #include <mach/iomap.h> | 
| Colin Cross | 4de3a8f | 2010-04-05 13:16:42 -0700 | [diff] [blame] | 28 | #include <mach/dma.h> | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 29 |  | 
 | 30 | #include "board.h" | 
| Colin Cross | d861196 | 2010-01-28 16:40:29 -0800 | [diff] [blame] | 31 | #include "clock.h" | 
| Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 32 | #include "fuse.h" | 
| Colin Cross | d861196 | 2010-01-28 16:40:29 -0800 | [diff] [blame] | 33 |  | 
 | 34 | static __initdata struct tegra_clk_init_table common_clk_init_table[] = { | 
 | 35 | 	/* name		parent		rate		enabled */ | 
 | 36 | 	{ "clk_m",	NULL,		0,		true }, | 
 | 37 | 	{ "pll_p",	"clk_m",	216000000,	true }, | 
 | 38 | 	{ "pll_p_out1",	"pll_p",	28800000,	true }, | 
 | 39 | 	{ "pll_p_out2",	"pll_p",	48000000,	true }, | 
 | 40 | 	{ "pll_p_out3",	"pll_p",	72000000,	true }, | 
 | 41 | 	{ "pll_p_out4",	"pll_p",	108000000,	true }, | 
| Colin Cross | 8486bdd | 2010-06-24 18:57:00 -0700 | [diff] [blame] | 42 | 	{ "sclk",	"pll_p_out4",	108000000,	true }, | 
 | 43 | 	{ "hclk",	"sclk",		108000000,	true }, | 
| Colin Cross | d861196 | 2010-01-28 16:40:29 -0800 | [diff] [blame] | 44 | 	{ "pclk",	"hclk",		54000000,	true }, | 
 | 45 | 	{ NULL,		NULL,		0,		0}, | 
 | 46 | }; | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 47 |  | 
 | 48 | void __init tegra_init_cache(void) | 
 | 49 | { | 
 | 50 | #ifdef CONFIG_CACHE_L2X0 | 
 | 51 | 	void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000; | 
 | 52 |  | 
 | 53 | 	writel(0x331, p + L2X0_TAG_LATENCY_CTRL); | 
 | 54 | 	writel(0x441, p + L2X0_DATA_LATENCY_CTRL); | 
 | 55 |  | 
 | 56 | 	l2x0_init(p, 0x6C080001, 0x8200c3fe); | 
 | 57 | #endif | 
| Colin Cross | 4de3a8f | 2010-04-05 13:16:42 -0700 | [diff] [blame] | 58 |  | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 59 | } | 
 | 60 |  | 
 | 61 | void __init tegra_common_init(void) | 
 | 62 | { | 
| Colin Cross | 73625e3 | 2010-06-23 15:49:17 -0700 | [diff] [blame] | 63 | 	tegra_init_fuse(); | 
| Colin Cross | d861196 | 2010-01-28 16:40:29 -0800 | [diff] [blame] | 64 | 	tegra_init_clock(); | 
 | 65 | 	tegra_clk_init_from_table(common_clk_init_table); | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 66 | 	tegra_init_cache(); | 
| Colin Cross | 4de3a8f | 2010-04-05 13:16:42 -0700 | [diff] [blame] | 67 | #ifdef CONFIG_TEGRA_SYSTEM_DMA | 
 | 68 | 	tegra_dma_init(); | 
 | 69 | #endif | 
| Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 70 | } |