| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 1 | #ifndef __LIS3LV02D_H_ | 
|  | 2 | #define __LIS3LV02D_H_ | 
|  | 3 |  | 
| Samu Onkalo | 83af1bd | 2010-10-23 09:39:44 -0400 | [diff] [blame] | 4 | /** | 
|  | 5 | * struct lis3lv02d_platform_data - lis3 chip family platform data | 
|  | 6 | * @click_flags:	Click detection unit configuration | 
|  | 7 | * @click_thresh_x:	Click detection unit x axis threshold | 
|  | 8 | * @click_thresh_y:	Click detection unit y axis threshold | 
|  | 9 | * @click_thresh_z:	Click detection unit z axis threshold | 
|  | 10 | * @click_time_limit:	Click detection unit time parameter | 
|  | 11 | * @click_latency:	Click detection unit latency parameter | 
|  | 12 | * @click_window:	Click detection unit window parameter | 
|  | 13 | * @irq_cfg:		On chip irq source and type configuration (click / | 
|  | 14 | *			data available / wake up, open drain, polarity) | 
|  | 15 | * @irq_flags1:		Additional irq triggering flags for irq channel 0 | 
|  | 16 | * @irq_flags2:		Additional irq triggering flags for irq channel 1 | 
|  | 17 | * @duration1:		Wake up unit 1 duration parameter | 
|  | 18 | * @duration2:		Wake up unit 2 duration parameter | 
|  | 19 | * @wakeup_flags:	Wake up unit 1 flags | 
|  | 20 | * @wakeup_thresh:	Wake up unit 1 threshold value | 
|  | 21 | * @wakeup_flags2:	Wake up unit 2 flags | 
|  | 22 | * @wakeup_thresh2:	Wake up unit 2 threshold value | 
|  | 23 | * @hipass_ctrl:	High pass filter control (enable / disable, cut off | 
|  | 24 | *			frequency) | 
|  | 25 | * @axis_x:		Sensor orientation remapping for x-axis | 
|  | 26 | * @axis_y:		Sensor orientation remapping for y-axis | 
|  | 27 | * @axis_z:		Sensor orientation remapping for z-axis | 
|  | 28 | * @driver_features:	Enable bits for different features. Disabled by default | 
|  | 29 | * @default_rate:	Default sampling rate. 0 means reset default | 
|  | 30 | * @setup_resources:	Interrupt line setup call back function | 
|  | 31 | * @release_resources:	Interrupt line release call back function | 
|  | 32 | * @st_min_limits[3]:	Selftest acceptance minimum values | 
|  | 33 | * @st_max_limits[3]:	Selftest acceptance maximum values | 
|  | 34 | * @irq2:		Irq line 2 number | 
|  | 35 | * | 
|  | 36 | * Platform data is used to setup the sensor chip. Meaning of the different | 
|  | 37 | * chip features can be found from the data sheet. It is publicly available | 
|  | 38 | * at www.st.com web pages. Currently the platform data is used | 
|  | 39 | * only for the 8 bit device. The 8 bit device has two wake up / free fall | 
|  | 40 | * detection units and click detection unit. There are plenty of ways to | 
|  | 41 | * configure the chip which makes is quite hard to explain deeper meaning of | 
|  | 42 | * the fields here. Behaviour of the detection blocks varies heavily depending | 
|  | 43 | * on the configuration. For example, interrupt detection block can use high | 
|  | 44 | * pass filtered data which makes it react to the changes in the acceleration. | 
|  | 45 | * Irq_flags can be used to enable interrupt detection on the both edges. | 
|  | 46 | * With proper chip configuration this produces interrupt when some trigger | 
|  | 47 | * starts and when it goes away. | 
|  | 48 | */ | 
|  | 49 |  | 
| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 50 | struct lis3lv02d_platform_data { | 
|  | 51 | /* please note: the 'click' feature is only supported for | 
|  | 52 | * LIS[32]02DL variants of the chip and will be ignored for | 
|  | 53 | * others */ | 
|  | 54 | #define LIS3_CLICK_SINGLE_X	(1 << 0) | 
|  | 55 | #define LIS3_CLICK_DOUBLE_X	(1 << 1) | 
|  | 56 | #define LIS3_CLICK_SINGLE_Y	(1 << 2) | 
|  | 57 | #define LIS3_CLICK_DOUBLE_Y	(1 << 3) | 
|  | 58 | #define LIS3_CLICK_SINGLE_Z	(1 << 4) | 
|  | 59 | #define LIS3_CLICK_DOUBLE_Z	(1 << 5) | 
|  | 60 | unsigned char click_flags; | 
|  | 61 | unsigned char click_thresh_x; | 
|  | 62 | unsigned char click_thresh_y; | 
|  | 63 | unsigned char click_thresh_z; | 
|  | 64 | unsigned char click_time_limit; | 
|  | 65 | unsigned char click_latency; | 
|  | 66 | unsigned char click_window; | 
|  | 67 |  | 
|  | 68 | #define LIS3_IRQ1_DISABLE	(0 << 0) | 
|  | 69 | #define LIS3_IRQ1_FF_WU_1	(1 << 0) | 
|  | 70 | #define LIS3_IRQ1_FF_WU_2	(2 << 0) | 
|  | 71 | #define LIS3_IRQ1_FF_WU_12	(3 << 0) | 
|  | 72 | #define LIS3_IRQ1_DATA_READY	(4 << 0) | 
|  | 73 | #define LIS3_IRQ1_CLICK		(7 << 0) | 
| Samu Onkalo | 6d94d40 | 2010-05-24 14:33:37 -0700 | [diff] [blame] | 74 | #define LIS3_IRQ1_MASK		(7 << 0) | 
| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 75 | #define LIS3_IRQ2_DISABLE	(0 << 3) | 
|  | 76 | #define LIS3_IRQ2_FF_WU_1	(1 << 3) | 
|  | 77 | #define LIS3_IRQ2_FF_WU_2	(2 << 3) | 
|  | 78 | #define LIS3_IRQ2_FF_WU_12	(3 << 3) | 
|  | 79 | #define LIS3_IRQ2_DATA_READY	(4 << 3) | 
|  | 80 | #define LIS3_IRQ2_CLICK		(7 << 3) | 
| Samu Onkalo | 6d94d40 | 2010-05-24 14:33:37 -0700 | [diff] [blame] | 81 | #define LIS3_IRQ2_MASK		(7 << 3) | 
| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 82 | #define LIS3_IRQ_OPEN_DRAIN	(1 << 6) | 
| Daniel Mack | 0ec4891 | 2009-09-21 17:04:42 -0700 | [diff] [blame] | 83 | #define LIS3_IRQ_ACTIVE_LOW	(1 << 7) | 
| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 84 | unsigned char irq_cfg; | 
| Samu Onkalo | cc23aa1 | 2010-10-22 07:57:29 -0400 | [diff] [blame] | 85 | unsigned char irq_flags1; /* Additional irq edge / level flags */ | 
|  | 86 | unsigned char irq_flags2; /* Additional irq edge / level flags */ | 
|  | 87 | unsigned char duration1; | 
|  | 88 | unsigned char duration2; | 
| Daniel Mack | 8873c33 | 2009-09-21 17:04:43 -0700 | [diff] [blame] | 89 | #define LIS3_WAKEUP_X_LO	(1 << 0) | 
|  | 90 | #define LIS3_WAKEUP_X_HI	(1 << 1) | 
|  | 91 | #define LIS3_WAKEUP_Y_LO	(1 << 2) | 
|  | 92 | #define LIS3_WAKEUP_Y_HI	(1 << 3) | 
|  | 93 | #define LIS3_WAKEUP_Z_LO	(1 << 4) | 
|  | 94 | #define LIS3_WAKEUP_Z_HI	(1 << 5) | 
|  | 95 | unsigned char wakeup_flags; | 
|  | 96 | unsigned char wakeup_thresh; | 
| Samu Onkalo | 342c5f1 | 2010-05-24 14:33:35 -0700 | [diff] [blame] | 97 | unsigned char wakeup_flags2; | 
|  | 98 | unsigned char wakeup_thresh2; | 
|  | 99 | #define LIS3_HIPASS_CUTFF_8HZ   0 | 
|  | 100 | #define LIS3_HIPASS_CUTFF_4HZ   1 | 
|  | 101 | #define LIS3_HIPASS_CUTFF_2HZ   2 | 
|  | 102 | #define LIS3_HIPASS_CUTFF_1HZ   3 | 
|  | 103 | #define LIS3_HIPASS1_DISABLE    (1 << 2) | 
|  | 104 | #define LIS3_HIPASS2_DISABLE    (1 << 3) | 
|  | 105 | unsigned char hipass_ctrl; | 
| Samu Onkalo | e40d6ea | 2009-12-14 18:01:35 -0800 | [diff] [blame] | 106 | #define LIS3_NO_MAP		0 | 
|  | 107 | #define LIS3_DEV_X		1 | 
|  | 108 | #define LIS3_DEV_Y		2 | 
|  | 109 | #define LIS3_DEV_Z		3 | 
|  | 110 | #define LIS3_INV_DEV_X	       -1 | 
|  | 111 | #define LIS3_INV_DEV_Y	       -2 | 
|  | 112 | #define LIS3_INV_DEV_Z	       -3 | 
|  | 113 | s8 axis_x; | 
|  | 114 | s8 axis_y; | 
|  | 115 | s8 axis_z; | 
| Samu Onkalo | f10a540 | 2010-10-22 07:57:31 -0400 | [diff] [blame] | 116 | #define LIS3_USE_BLOCK_READ	0x02 | 
| Samu Onkalo | f9deb41 | 2010-10-22 07:57:24 -0400 | [diff] [blame] | 117 | u16 driver_features; | 
| Samu Onkalo | cc23aa1 | 2010-10-22 07:57:29 -0400 | [diff] [blame] | 118 | int default_rate; | 
| Samu Onkalo | e40d6ea | 2009-12-14 18:01:35 -0800 | [diff] [blame] | 119 | int (*setup_resources)(void); | 
|  | 120 | int (*release_resources)(void); | 
| Samu Onkalo | 2db4a76 | 2009-12-14 18:01:43 -0800 | [diff] [blame] | 121 | /* Limits for selftest are specified in chip data sheet */ | 
|  | 122 | s16 st_min_limits[3]; /* min pass limit x, y, z */ | 
|  | 123 | s16 st_max_limits[3]; /* max pass limit x, y, z */ | 
| Samu Onkalo | 92ba4fe | 2010-05-24 14:33:36 -0700 | [diff] [blame] | 124 | int irq2; | 
| Daniel Mack | 8f3128e | 2009-06-16 15:34:17 -0700 | [diff] [blame] | 125 | }; | 
|  | 126 |  | 
|  | 127 | #endif /* __LIS3LV02D_H_ */ |