| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 1 | /* | 
|  | 2 | * Interface the pinctrl subsystem | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 2011 ST-Ericsson SA | 
|  | 5 | * Written on behalf of Linaro for ST-Ericsson | 
|  | 6 | * This interface is used in the core to keep track of pins. | 
|  | 7 | * | 
|  | 8 | * Author: Linus Walleij <linus.walleij@linaro.org> | 
|  | 9 | * | 
|  | 10 | * License terms: GNU General Public License (GPL) version 2 | 
|  | 11 | */ | 
|  | 12 | #ifndef __LINUX_PINCTRL_PINCTRL_H | 
|  | 13 | #define __LINUX_PINCTRL_PINCTRL_H | 
|  | 14 |  | 
|  | 15 | #ifdef CONFIG_PINCTRL | 
|  | 16 |  | 
|  | 17 | #include <linux/radix-tree.h> | 
|  | 18 | #include <linux/spinlock.h> | 
|  | 19 | #include <linux/list.h> | 
|  | 20 | #include <linux/seq_file.h> | 
|  | 21 |  | 
|  | 22 | struct pinctrl_dev; | 
|  | 23 | struct pinmux_ops; | 
| Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 24 | struct pinconf_ops; | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 25 | struct gpio_chip; | 
|  | 26 |  | 
|  | 27 | /** | 
|  | 28 | * struct pinctrl_pin_desc - boards/machines provide information on their | 
|  | 29 | * pins, pads or other muxable units in this struct | 
|  | 30 | * @number: unique pin number from the global pin number space | 
|  | 31 | * @name: a name for this pin | 
|  | 32 | */ | 
|  | 33 | struct pinctrl_pin_desc { | 
|  | 34 | unsigned number; | 
|  | 35 | const char *name; | 
|  | 36 | }; | 
|  | 37 |  | 
|  | 38 | /* Convenience macro to define a single named or anonymous pin descriptor */ | 
|  | 39 | #define PINCTRL_PIN(a, b) { .number = a, .name = b } | 
|  | 40 | #define PINCTRL_PIN_ANON(a) { .number = a } | 
|  | 41 |  | 
|  | 42 | /** | 
|  | 43 | * struct pinctrl_gpio_range - each pin controller can provide subranges of | 
|  | 44 | * the GPIO number space to be handled by the controller | 
|  | 45 | * @node: list node for internal use | 
|  | 46 | * @name: a name for the chip in this range | 
|  | 47 | * @id: an ID number for the chip in this range | 
|  | 48 | * @base: base offset of the GPIO range | 
| Chanho Park | 3c739ad | 2011-11-11 18:47:58 +0900 | [diff] [blame] | 49 | * @pin_base: base pin number of the GPIO range | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 50 | * @npins: number of pins in the GPIO range, including the base number | 
|  | 51 | * @gc: an optional pointer to a gpio_chip | 
|  | 52 | */ | 
|  | 53 | struct pinctrl_gpio_range { | 
|  | 54 | struct list_head node; | 
|  | 55 | const char *name; | 
|  | 56 | unsigned int id; | 
|  | 57 | unsigned int base; | 
| Chanho Park | 3c739ad | 2011-11-11 18:47:58 +0900 | [diff] [blame] | 58 | unsigned int pin_base; | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 59 | unsigned int npins; | 
|  | 60 | struct gpio_chip *gc; | 
|  | 61 | }; | 
|  | 62 |  | 
|  | 63 | /** | 
|  | 64 | * struct pinctrl_ops - global pin control operations, to be implemented by | 
|  | 65 | * pin controller drivers. | 
|  | 66 | * @list_groups: list the number of selectable named groups available | 
|  | 67 | *	in this pinmux driver, the core will begin on 0 and call this | 
|  | 68 | *	repeatedly as long as it returns >= 0 to enumerate the groups | 
|  | 69 | * @get_group_name: return the group name of the pin group | 
|  | 70 | * @get_group_pins: return an array of pins corresponding to a certain | 
|  | 71 | *	group selector @pins, and the size of the array in @num_pins | 
|  | 72 | * @pin_dbg_show: optional debugfs display hook that will provide per-device | 
|  | 73 | *	info for a certain pin in debugfs | 
|  | 74 | */ | 
|  | 75 | struct pinctrl_ops { | 
|  | 76 | int (*list_groups) (struct pinctrl_dev *pctldev, unsigned selector); | 
|  | 77 | const char *(*get_group_name) (struct pinctrl_dev *pctldev, | 
|  | 78 | unsigned selector); | 
|  | 79 | int (*get_group_pins) (struct pinctrl_dev *pctldev, | 
|  | 80 | unsigned selector, | 
| Stephen Warren | a5818a8 | 2011-10-19 16:19:25 -0600 | [diff] [blame] | 81 | const unsigned **pins, | 
|  | 82 | unsigned *num_pins); | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 83 | void (*pin_dbg_show) (struct pinctrl_dev *pctldev, struct seq_file *s, | 
|  | 84 | unsigned offset); | 
|  | 85 | }; | 
|  | 86 |  | 
|  | 87 | /** | 
|  | 88 | * struct pinctrl_desc - pin controller descriptor, register this to pin | 
|  | 89 | * control subsystem | 
|  | 90 | * @name: name for the pin controller | 
|  | 91 | * @pins: an array of pin descriptors describing all the pins handled by | 
|  | 92 | *	this pin controller | 
|  | 93 | * @npins: number of descriptors in the array, usually just ARRAY_SIZE() | 
|  | 94 | *	of the pins field above | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 95 | * @pctlops: pin control operation vtable, to support global concepts like | 
|  | 96 | *	grouping of pins, this is optional. | 
| Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 97 | * @pmxops: pinmux operations vtable, if you support pinmuxing in your driver | 
|  | 98 | * @confops: pin config operations vtable, if you support pin configuration in | 
|  | 99 | *	your driver | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 100 | * @owner: module providing the pin controller, used for refcounting | 
|  | 101 | */ | 
|  | 102 | struct pinctrl_desc { | 
|  | 103 | const char *name; | 
|  | 104 | struct pinctrl_pin_desc const *pins; | 
|  | 105 | unsigned int npins; | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 106 | struct pinctrl_ops *pctlops; | 
|  | 107 | struct pinmux_ops *pmxops; | 
| Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 108 | struct pinconf_ops *confops; | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 109 | struct module *owner; | 
|  | 110 | }; | 
|  | 111 |  | 
|  | 112 | /* External interface to pin controller */ | 
|  | 113 | extern struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, | 
|  | 114 | struct device *dev, void *driver_data); | 
|  | 115 | extern void pinctrl_unregister(struct pinctrl_dev *pctldev); | 
|  | 116 | extern bool pin_is_valid(struct pinctrl_dev *pctldev, int pin); | 
|  | 117 | extern void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev, | 
|  | 118 | struct pinctrl_gpio_range *range); | 
|  | 119 | extern void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev, | 
|  | 120 | struct pinctrl_gpio_range *range); | 
|  | 121 | extern const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev); | 
|  | 122 | extern void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev); | 
|  | 123 | #else | 
|  | 124 |  | 
| Barry Song | e0e2075 | 2011-10-27 20:38:24 -0700 | [diff] [blame] | 125 | struct pinctrl_dev; | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 126 |  | 
| Linus Walleij | ae6b4d8 | 2011-10-19 18:14:33 +0200 | [diff] [blame] | 127 | /* Sufficiently stupid default functions when pinctrl is not in use */ | 
| Linus Walleij | 2744e8a | 2011-05-02 20:50:54 +0200 | [diff] [blame] | 128 | static inline bool pin_is_valid(struct pinctrl_dev *pctldev, int pin) | 
|  | 129 | { | 
|  | 130 | return pin >= 0; | 
|  | 131 | } | 
|  | 132 |  | 
|  | 133 | #endif /* !CONFIG_PINCTRL */ | 
|  | 134 |  | 
|  | 135 | #endif /* __LINUX_PINCTRL_PINCTRL_H */ |