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Hyok S. Choi75d90832006-03-27 14:58:25 +01001/*
2 * linux/arch/arm/kernel/head-common.S
3 *
4 * Copyright (C) 1994-2002 Russell King
5 * Copyright (c) 2003 ARM Limited
6 * All Rights Reserved
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
Greg Ungerer9c4c9f32008-03-05 06:50:07 +010014#define ATAG_CORE 0x54410001
15#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
David Brown31abdb72009-10-01 17:43:29 +010016#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
Greg Ungerer9c4c9f32008-03-05 06:50:07 +010017
Hyok S. Choi75d90832006-03-27 14:58:25 +010018/*
19 * Exception handling. Something went wrong and we can't proceed. We
20 * ought to tell the user, but since we don't have any guarantee that
21 * we're even running on the right architecture, we do virtually nothing.
22 *
23 * If CONFIG_DEBUG_LL is set we try to print out something about the error
24 * and hope for the best (useful if bootloader fails to pass a proper
25 * machine ID for example).
26 */
Russell King80924ac2010-10-04 17:45:25 +010027 __HEAD
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010028
29/* Determine validity of the r2 atags pointer. The heuristic requires
30 * that the pointer be aligned, in the first 16k of physical RAM and
31 * that the ATAG_CORE marker is first and present. Future revisions
32 * of this function may be more lenient with the physical address and
33 * may also be able to move the ATAGS block if necessary.
34 *
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010035 * Returns:
36 * r2 either valid atags pointer, or zero
37 * r5, r6 corrupted
38 */
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010039__vet_atags:
40 tst r2, #0x3 @ aligned?
41 bne 1f
42
43 ldr r5, [r2, #0] @ is first tag ATAG_CORE?
David Brown31abdb72009-10-01 17:43:29 +010044 cmp r5, #ATAG_CORE_SIZE
45 cmpne r5, #ATAG_CORE_SIZE_EMPTY
Bill Gatliff9d20fdd2007-05-31 22:02:22 +010046 bne 1f
47 ldr r5, [r2, #4]
48 ldr r6, =ATAG_CORE
49 cmp r5, r6
50 bne 1f
51
52 mov pc, lr @ atag pointer is ok
53
541: mov r2, #0
55 mov pc, lr
Catalin Marinas93ed3972008-08-28 11:22:32 +010056ENDPROC(__vet_atags)
Russell King5085f3f2010-10-01 15:37:05 +010057
58/*
Russell King17bb5e22010-10-04 16:29:35 +010059 * The following fragment of code is executed with the MMU on in MMU mode,
60 * and uses absolute addresses; this is not position independent.
61 *
62 * r0 = cp#15 control register
63 * r1 = machine ID
64 * r2 = atags pointer
65 * r9 = processor ID
66 */
67 __INIT
68__mmap_switched:
69 adr r3, __mmap_switched_data
70
71 ldmia r3!, {r4, r5, r6, r7}
72 cmp r4, r5 @ Copy data segment if needed
731: cmpne r5, r6
74 ldrne fp, [r4], #4
75 strne fp, [r5], #4
76 bne 1b
77
78 mov fp, #0 @ Clear BSS (and zero fp)
791: cmp r6, r7
80 strcc fp, [r6],#4
81 bcc 1b
82
83 ARM( ldmia r3, {r4, r5, r6, r7, sp})
84 THUMB( ldmia r3, {r4, r5, r6, r7} )
85 THUMB( ldr sp, [r3, #16] )
86 str r9, [r4] @ Save processor ID
87 str r1, [r5] @ Save machine type
88 str r2, [r6] @ Save atags pointer
89 bic r4, r0, #CR_A @ Clear 'A' bit
90 stmia r7, {r0, r4} @ Save control register values
91 b start_kernel
92ENDPROC(__mmap_switched)
93
94 .align 2
95 .type __mmap_switched_data, %object
96__mmap_switched_data:
97 .long __data_loc @ r4
Russell Kinga0a55682010-10-18 22:34:47 +010098 .long _sdata @ r5
Russell King17bb5e22010-10-04 16:29:35 +010099 .long __bss_start @ r6
100 .long _end @ r7
101 .long processor_id @ r4
102 .long __machine_arch_type @ r5
103 .long __atags_pointer @ r6
104 .long cr_alignment @ r7
105 .long init_thread_union + THREAD_START_SP @ sp
106 .size __mmap_switched_data, . - __mmap_switched_data
107
108/*
Russell King17bb5e22010-10-04 16:29:35 +0100109 * This provides a C-API version of __lookup_processor_type
110 */
111ENTRY(lookup_processor_type)
112 stmfd sp!, {r4 - r6, r9, lr}
113 mov r9, r0
114 bl __lookup_processor_type
115 mov r0, r5
116 ldmfd sp!, {r4 - r6, r9, pc}
117ENDPROC(lookup_processor_type)
118
119/*
Russell King5085f3f2010-10-01 15:37:05 +0100120 * Read processor ID register (CP#15, CR0), and look up in the linker-built
121 * supported processor list. Note that we can't use the absolute addresses
122 * for the __proc_info lists since we aren't running with the MMU on
123 * (and therefore, we are not in the correct address space). We have to
124 * calculate the offset.
125 *
126 * r9 = cpuid
127 * Returns:
128 * r3, r4, r6 corrupted
129 * r5 = proc_info pointer in physical address space
130 * r9 = cpuid (preserved)
131 */
132 __CPUINIT
133__lookup_processor_type:
134 adr r3, __lookup_processor_type_data
135 ldmia r3, {r4 - r6}
136 sub r3, r3, r4 @ get offset between virt&phys
137 add r5, r5, r3 @ convert virt addresses to
138 add r6, r6, r3 @ physical address space
1391: ldmia r5, {r3, r4} @ value, mask
140 and r4, r4, r9 @ mask wanted bits
141 teq r3, r4
142 beq 2f
143 add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
144 cmp r5, r6
145 blo 1b
146 mov r5, #0 @ unknown processor
1472: mov pc, lr
148ENDPROC(__lookup_processor_type)
149
150/*
151 * Look in <asm/procinfo.h> for information about the __proc_info structure.
152 */
153 .align 2
154 .type __lookup_processor_type_data, %object
155__lookup_processor_type_data:
156 .long .
157 .long __proc_info_begin
158 .long __proc_info_end
159 .size __lookup_processor_type_data, . - __lookup_processor_type_data
Russell Kingc083c662010-10-04 17:39:20 +0100160
161__error_p:
162#ifdef CONFIG_DEBUG_LL
163 adr r0, str_p1
164 bl printascii
165 mov r0, r9
166 bl printhex8
167 adr r0, str_p2
168 bl printascii
169 b __error
170str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
171str_p2: .asciz ").\n"
172 .align
173#endif
174ENDPROC(__error_p)
175
176__error:
177#ifdef CONFIG_ARCH_RPC
178/*
179 * Turn the screen red on a error - RiscPC only.
180 */
181 mov r0, #0x02000000
182 mov r3, #0x11
183 orr r3, r3, r3, lsl #8
184 orr r3, r3, r3, lsl #16
185 str r3, [r0], #4
186 str r3, [r0], #4
187 str r3, [r0], #4
188 str r3, [r0], #4
189#endif
1901: mov r0, r0
191 b 1b
192ENDPROC(__error)