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Paul Mundtcad82442006-01-16 22:14:19 -08001#
2# Processor families
3#
4config CPU_SH2
Yoshinori Sato9d4436a2006-11-05 15:40:13 +09005 select SH_WRITETHROUGH if !CPU_SH2A
Paul Mundtcad82442006-01-16 22:14:19 -08006 bool
Yoshinori Sato9d4436a2006-11-05 15:40:13 +09007
8config CPU_SH2A
9 bool
10 select CPU_SH2
Paul Mundtcad82442006-01-16 22:14:19 -080011
12config CPU_SH3
13 bool
14 select CPU_HAS_INTEVT
15 select CPU_HAS_SR_RB
16
17config CPU_SH4
18 bool
19 select CPU_HAS_INTEVT
20 select CPU_HAS_SR_RB
Paul Mundt26b7a782006-12-28 10:31:48 +090021 select CPU_HAS_PTEA if (!CPU_SUBTYPE_ST40 && !CPU_SH4A) || CPU_SHX2
Paul Mundtcad82442006-01-16 22:14:19 -080022
23config CPU_SH4A
24 bool
25 select CPU_SH4
Paul Mundtcad82442006-01-16 22:14:19 -080026
Paul Mundte5723e02006-09-27 17:38:11 +090027config CPU_SH4AL_DSP
28 bool
29 select CPU_SH4A
Paul Mundtac79fd52007-07-25 16:26:10 +090030 select CPU_HAS_DSP
Paul Mundte5723e02006-09-27 17:38:11 +090031
Paul Mundtcad82442006-01-16 22:14:19 -080032config CPU_SUBTYPE_ST40
33 bool
34 select CPU_SH4
35 select CPU_HAS_INTC2_IRQ
36
Paul Mundt41504c32006-12-11 20:28:03 +090037config CPU_SHX2
38 bool
39
Paul Mundt2b1bd1a2007-06-20 18:27:10 +090040config CPU_SHX3
41 bool
42
Paul Mundtf3d22292007-05-14 17:29:12 +090043choice
44 prompt "Processor sub-type selection"
45
Paul Mundtcad82442006-01-16 22:14:19 -080046#
47# Processor subtypes
48#
49
Paul Mundtf3d22292007-05-14 17:29:12 +090050# SH-2 Processor Support
Paul Mundtcad82442006-01-16 22:14:19 -080051
Yoshinori Sato9d4436a2006-11-05 15:40:13 +090052config CPU_SUBTYPE_SH7619
53 bool "Support SH7619 processor"
54 select CPU_SH2
Paul Mundt357d5942007-06-11 15:32:07 +090055 select CPU_HAS_IPR_IRQ
Yoshinori Sato9d4436a2006-11-05 15:40:13 +090056
Paul Mundtf3d22292007-05-14 17:29:12 +090057# SH-2A Processor Support
Yoshinori Sato9d4436a2006-11-05 15:40:13 +090058
59config CPU_SUBTYPE_SH7206
60 bool "Support SH7206 processor"
61 select CPU_SH2A
Paul Mundtfa1ec922007-06-01 17:23:14 +090062 select CPU_HAS_IPR_IRQ
Yoshinori Sato9d4436a2006-11-05 15:40:13 +090063
Paul Mundtf3d22292007-05-14 17:29:12 +090064# SH-3 Processor Support
Paul Mundtcad82442006-01-16 22:14:19 -080065
Paul Mundtcad82442006-01-16 22:14:19 -080066config CPU_SUBTYPE_SH7705
67 bool "Support SH7705 processor"
68 select CPU_SH3
Magnus Damm70e8be02007-07-25 10:50:42 +090069 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -080070
Paul Mundte5723e02006-09-27 17:38:11 +090071config CPU_SUBTYPE_SH7706
72 bool "Support SH7706 processor"
73 select CPU_SH3
Magnus Dammec58f1f2007-07-25 17:50:01 +090074 select CPU_HAS_INTC_IRQ
Paul Mundte5723e02006-09-27 17:38:11 +090075 help
76 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
77
Paul Mundtcad82442006-01-16 22:14:19 -080078config CPU_SUBTYPE_SH7707
79 bool "Support SH7707 processor"
80 select CPU_SH3
Magnus Dammec58f1f2007-07-25 17:50:01 +090081 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -080082 help
83 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
84
85config CPU_SUBTYPE_SH7708
86 bool "Support SH7708 processor"
87 select CPU_SH3
Magnus Dammec58f1f2007-07-25 17:50:01 +090088 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -080089 help
90 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
91 if you have a 100 Mhz SH-3 HD6417708R CPU.
92
93config CPU_SUBTYPE_SH7709
94 bool "Support SH7709 processor"
95 select CPU_SH3
Magnus Dammec58f1f2007-07-25 17:50:01 +090096 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -080097 help
98 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
99
Paul Mundte5723e02006-09-27 17:38:11 +0900100config CPU_SUBTYPE_SH7710
101 bool "Support SH7710 processor"
102 select CPU_SH3
Magnus Damm28b146c2007-07-25 17:47:07 +0900103 select CPU_HAS_INTC_IRQ
Paul Mundtac79fd52007-07-25 16:26:10 +0900104 select CPU_HAS_DSP
Paul Mundte5723e02006-09-27 17:38:11 +0900105 help
106 Select SH7710 if you have a SH3-DSP SH7710 CPU.
107
Nobuhiro Iwamatsu9465a542007-03-27 18:13:51 +0900108config CPU_SUBTYPE_SH7712
109 bool "Support SH7712 processor"
110 select CPU_SH3
Magnus Damm28b146c2007-07-25 17:47:07 +0900111 select CPU_HAS_INTC_IRQ
Paul Mundtac79fd52007-07-25 16:26:10 +0900112 select CPU_HAS_DSP
Nobuhiro Iwamatsu9465a542007-03-27 18:13:51 +0900113 help
114 Select SH7712 if you have a SH3-DSP SH7712 CPU.
115
Paul Mundtf3d22292007-05-14 17:29:12 +0900116# SH-4 Processor Support
Paul Mundtcad82442006-01-16 22:14:19 -0800117
118config CPU_SUBTYPE_SH7750
119 bool "Support SH7750 processor"
120 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900121 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800122 help
123 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
124
125config CPU_SUBTYPE_SH7091
126 bool "Support SH7091 processor"
127 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900128 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800129 help
130 Select SH7091 if you have an SH-4 based Sega device (such as
131 the Dreamcast, Naomi, and Naomi 2).
132
133config CPU_SUBTYPE_SH7750R
134 bool "Support SH7750R processor"
135 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900136 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800137
138config CPU_SUBTYPE_SH7750S
139 bool "Support SH7750S processor"
140 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900141 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800142
143config CPU_SUBTYPE_SH7751
144 bool "Support SH7751 processor"
145 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900146 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800147 help
148 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
149 or if you have a HD6417751R CPU.
150
151config CPU_SUBTYPE_SH7751R
152 bool "Support SH7751R processor"
153 select CPU_SH4
Magnus Damm56386f62007-07-20 18:44:49 +0900154 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800155
156config CPU_SUBTYPE_SH7760
157 bool "Support SH7760 processor"
158 select CPU_SH4
159 select CPU_HAS_INTC2_IRQ
Manuel Lauss6dcda6f2007-01-25 15:21:03 +0900160 select CPU_HAS_IPR_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800161
162config CPU_SUBTYPE_SH4_202
163 bool "Support SH4-202 processor"
164 select CPU_SH4
165
Paul Mundtf3d22292007-05-14 17:29:12 +0900166# ST40 Processor Support
Paul Mundtcad82442006-01-16 22:14:19 -0800167
168config CPU_SUBTYPE_ST40STB1
169 bool "Support ST40STB1/ST40RA processors"
170 select CPU_SUBTYPE_ST40
171 help
172 Select ST40STB1 if you have a ST40RA CPU.
173 This was previously called the ST40STB1, hence the option name.
174
175config CPU_SUBTYPE_ST40GX1
176 bool "Support ST40GX1 processor"
177 select CPU_SUBTYPE_ST40
178 help
179 Select ST40GX1 if you have a ST40GX1 CPU.
180
Paul Mundtf3d22292007-05-14 17:29:12 +0900181# SH-4A Processor Support
Paul Mundtcad82442006-01-16 22:14:19 -0800182
Paul Mundtcad82442006-01-16 22:14:19 -0800183config CPU_SUBTYPE_SH7770
184 bool "Support SH7770 processor"
185 select CPU_SH4A
186
187config CPU_SUBTYPE_SH7780
188 bool "Support SH7780 processor"
189 select CPU_SH4A
Magnus Damm39c7aa92007-07-20 12:10:29 +0900190 select CPU_HAS_INTC_IRQ
Paul Mundtcad82442006-01-16 22:14:19 -0800191
Paul Mundtb552c7e2006-11-20 14:14:29 +0900192config CPU_SUBTYPE_SH7785
193 bool "Support SH7785 processor"
194 select CPU_SH4A
Paul Mundt41504c32006-12-11 20:28:03 +0900195 select CPU_SHX2
Paul Mundtb552c7e2006-11-20 14:14:29 +0900196 select CPU_HAS_INTC2_IRQ
197
Paul Mundt2b1bd1a2007-06-20 18:27:10 +0900198config CPU_SUBTYPE_SHX3
199 bool "Support SH-X3 processor"
200 select CPU_SH4A
201 select CPU_SHX3
202 select CPU_HAS_INTC2_IRQ
203
Paul Mundtf3d22292007-05-14 17:29:12 +0900204# SH4AL-DSP Processor Support
Paul Mundte5723e02006-09-27 17:38:11 +0900205
Paul Mundte5723e02006-09-27 17:38:11 +0900206config CPU_SUBTYPE_SH7343
207 bool "Support SH7343 processor"
208 select CPU_SH4AL_DSP
209
Paul Mundt41504c32006-12-11 20:28:03 +0900210config CPU_SUBTYPE_SH7722
211 bool "Support SH7722 processor"
212 select CPU_SH4AL_DSP
213 select CPU_SHX2
Magnus Damm1b064282007-07-18 17:51:24 +0900214 select CPU_HAS_INTC_IRQ
Paul Mundt520588f2007-06-06 17:58:56 +0900215 select ARCH_SPARSEMEM_ENABLE
Paul Mundt357d5942007-06-11 15:32:07 +0900216 select SYS_SUPPORTS_NUMA
Paul Mundt41504c32006-12-11 20:28:03 +0900217
Paul Mundtf3d22292007-05-14 17:29:12 +0900218endchoice
Paul Mundtcad82442006-01-16 22:14:19 -0800219
220menu "Memory management options"
221
Paul Mundt5f8c9902007-05-08 11:55:21 +0900222config QUICKLIST
223 def_bool y
224
Paul Mundtcad82442006-01-16 22:14:19 -0800225config MMU
226 bool "Support for memory management hardware"
227 depends on !CPU_SH2
228 default y
229 help
230 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
231 boot on these systems, this option must not be set.
232
233 On other systems (such as the SH-3 and 4) where an MMU exists,
234 turning this off will boot the kernel on these machines with the
235 MMU implicitly switched off.
236
Paul Mundte7f93a32006-09-27 17:19:13 +0900237config PAGE_OFFSET
238 hex
239 default "0x80000000" if MMU
240 default "0x00000000"
241
242config MEMORY_START
243 hex "Physical memory start address"
244 default "0x08000000"
245 ---help---
246 Computers built with Hitachi SuperH processors always
247 map the ROM starting at address zero. But the processor
248 does not specify the range that RAM takes.
249
250 The physical memory (RAM) start address will be automatically
251 set to 08000000. Other platforms, such as the Solution Engine
252 boards typically map RAM at 0C000000.
253
254 Tweak this only when porting to a new machine which does not
255 already have a defconfig. Changing it from the known correct
256 value on any of the known systems will only lead to disaster.
257
258config MEMORY_SIZE
259 hex "Physical memory size"
260 default "0x00400000"
261 help
262 This sets the default memory size assumed by your SH kernel. It can
263 be overridden as normal by the 'mem=' argument on the kernel command
264 line. If unsure, consult your board specifications or just leave it
265 as 0x00400000 which was the default value before this became
266 configurable.
267
Paul Mundtcad82442006-01-16 22:14:19 -0800268config 32BIT
269 bool "Support 32-bit physical addressing through PMB"
Paul Mundt50f63f22007-06-15 18:30:42 +0900270 depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
Paul Mundtcad82442006-01-16 22:14:19 -0800271 default y
272 help
273 If you say Y here, physical addressing will be extended to
274 32-bits through the SH-4A PMB. If this is not set, legacy
275 29-bit physical addressing will be used.
276
Paul Mundt21440cf2006-11-20 14:30:26 +0900277config X2TLB
278 bool "Enable extended TLB mode"
Paul Mundt41504c32006-12-11 20:28:03 +0900279 depends on CPU_SHX2 && MMU && EXPERIMENTAL
Paul Mundt21440cf2006-11-20 14:30:26 +0900280 help
281 Selecting this option will enable the extended mode of the SH-X2
282 TLB. For legacy SH-X behaviour and interoperability, say N. For
283 all of the fun new features and a willingless to submit bug reports,
284 say Y.
285
Paul Mundt19f9a342006-09-27 18:33:49 +0900286config VSYSCALL
287 bool "Support vsyscall page"
288 depends on MMU
289 default y
290 help
291 This will enable support for the kernel mapping a vDSO page
292 in process space, and subsequently handing down the entry point
293 to the libc through the ELF auxiliary vector.
294
295 From the kernel side this is used for the signal trampoline.
296 For systems with an MMU that can afford to give up a page,
297 (the default value) say Y.
298
Paul Mundtb241cb02007-06-06 17:52:19 +0900299config NUMA
300 bool "Non Uniform Memory Access (NUMA) Support"
Paul Mundt357d5942007-06-11 15:32:07 +0900301 depends on MMU && SYS_SUPPORTS_NUMA && EXPERIMENTAL
Paul Mundtb241cb02007-06-06 17:52:19 +0900302 default n
303 help
304 Some SH systems have many various memories scattered around
305 the address space, each with varying latencies. This enables
306 support for these blocks by binding them to nodes and allowing
307 memory policies to be used for prioritizing and controlling
308 allocation behaviour.
309
Paul Mundt01066622007-03-28 16:38:13 +0900310config NODES_SHIFT
311 int
312 default "1"
313 depends on NEED_MULTIPLE_NODES
314
315config ARCH_FLATMEM_ENABLE
316 def_bool y
Paul Mundt357d5942007-06-11 15:32:07 +0900317 depends on !NUMA
Paul Mundt01066622007-03-28 16:38:13 +0900318
Paul Mundtdfbb9042007-05-23 17:48:36 +0900319config ARCH_SPARSEMEM_ENABLE
320 def_bool y
321 select SPARSEMEM_STATIC
322
323config ARCH_SPARSEMEM_DEFAULT
324 def_bool y
325
Paul Mundt1ce7ddd2007-05-09 13:20:52 +0900326config MAX_ACTIVE_REGIONS
327 int
Paul Mundt520588f2007-06-06 17:58:56 +0900328 default "2" if (CPU_SUBTYPE_SH7722 && SPARSEMEM)
Paul Mundt1ce7ddd2007-05-09 13:20:52 +0900329 default "1"
330
Paul Mundt01066622007-03-28 16:38:13 +0900331config ARCH_POPULATES_NODE_MAP
332 def_bool y
333
Paul Mundtdfbb9042007-05-23 17:48:36 +0900334config ARCH_SELECT_MEMORY_MODEL
335 def_bool y
336
Paul Mundt33d63bd2007-06-07 11:32:52 +0900337config ARCH_ENABLE_MEMORY_HOTPLUG
338 def_bool y
339 depends on SPARSEMEM
340
341config ARCH_MEMORY_PROBE
342 def_bool y
343 depends on MEMORY_HOTPLUG
344
Paul Mundtcad82442006-01-16 22:14:19 -0800345choice
Paul Mundt21440cf2006-11-20 14:30:26 +0900346 prompt "Kernel page size"
347 default PAGE_SIZE_4KB
348
349config PAGE_SIZE_4KB
350 bool "4kB"
351 help
352 This is the default page size used by all SuperH CPUs.
353
354config PAGE_SIZE_8KB
355 bool "8kB"
356 depends on EXPERIMENTAL && X2TLB
357 help
358 This enables 8kB pages as supported by SH-X2 and later MMUs.
359
360config PAGE_SIZE_64KB
361 bool "64kB"
362 depends on EXPERIMENTAL && CPU_SH4
363 help
364 This enables support for 64kB pages, possible on all SH-4
365 CPUs and later. Highly experimental, not recommended.
366
367endchoice
368
369choice
Paul Mundtcad82442006-01-16 22:14:19 -0800370 prompt "HugeTLB page size"
371 depends on HUGETLB_PAGE && CPU_SH4 && MMU
372 default HUGETLB_PAGE_SIZE_64K
373
374config HUGETLB_PAGE_SIZE_64K
Paul Mundt21440cf2006-11-20 14:30:26 +0900375 bool "64kB"
376
377config HUGETLB_PAGE_SIZE_256K
378 bool "256kB"
379 depends on X2TLB
Paul Mundtcad82442006-01-16 22:14:19 -0800380
381config HUGETLB_PAGE_SIZE_1MB
382 bool "1MB"
383
Paul Mundt21440cf2006-11-20 14:30:26 +0900384config HUGETLB_PAGE_SIZE_4MB
385 bool "4MB"
386 depends on X2TLB
387
388config HUGETLB_PAGE_SIZE_64MB
389 bool "64MB"
390 depends on X2TLB
391
Paul Mundtcad82442006-01-16 22:14:19 -0800392endchoice
393
394source "mm/Kconfig"
395
396endmenu
397
398menu "Cache configuration"
399
400config SH7705_CACHE_32KB
401 bool "Enable 32KB cache size for SH7705"
402 depends on CPU_SUBTYPE_SH7705
403 default y
404
405config SH_DIRECT_MAPPED
406 bool "Use direct-mapped caching"
407 default n
408 help
409 Selecting this option will configure the caches to be direct-mapped,
410 even if the cache supports a 2 or 4-way mode. This is useful primarily
411 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
412 SH4-202, SH4-501, etc.)
413
414 Turn this option off for platforms that do not have a direct-mapped
415 cache, and you have no need to run the caches in such a configuration.
416
417config SH_WRITETHROUGH
418 bool "Use write-through caching"
Paul Mundtcad82442006-01-16 22:14:19 -0800419 help
420 Selecting this option will configure the caches in write-through
421 mode, as opposed to the default write-back configuration.
422
423 Since there's sill some aliasing issues on SH-4, this option will
424 unfortunately still require the majority of flushing functions to
425 be implemented to deal with aliasing.
426
427 If unsure, say N.
428
Paul Mundtcad82442006-01-16 22:14:19 -0800429endmenu