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Rafał Miłecki8369ae32011-05-09 18:56:46 +02001#ifndef LINUX_BCMA_H_
2#define LINUX_BCMA_H_
3
4#include <linux/pci.h>
5#include <linux/mod_devicetable.h>
6
7#include <linux/bcma/bcma_driver_chipcommon.h>
8#include <linux/bcma/bcma_driver_pci.h>
Rafał Miłecki27f18dc2011-06-02 02:08:51 +02009#include <linux/ssb/ssb.h> /* SPROM sharing */
Rafał Miłecki8369ae32011-05-09 18:56:46 +020010
11#include "bcma_regs.h"
12
13struct bcma_device;
14struct bcma_bus;
15
16enum bcma_hosttype {
Rafał Miłecki8369ae32011-05-09 18:56:46 +020017 BCMA_HOSTTYPE_PCI,
18 BCMA_HOSTTYPE_SDIO,
Hauke Mehrtensecd177c2011-07-23 01:20:08 +020019 BCMA_HOSTTYPE_SOC,
Rafał Miłecki8369ae32011-05-09 18:56:46 +020020};
21
22struct bcma_chipinfo {
23 u16 id;
24 u8 rev;
25 u8 pkg;
26};
27
Rafał Miłecki7424dd02011-07-17 01:06:04 +020028enum bcma_clkmode {
29 BCMA_CLKMODE_FAST,
30 BCMA_CLKMODE_DYNAMIC,
31};
32
Rafał Miłecki8369ae32011-05-09 18:56:46 +020033struct bcma_host_ops {
34 u8 (*read8)(struct bcma_device *core, u16 offset);
35 u16 (*read16)(struct bcma_device *core, u16 offset);
36 u32 (*read32)(struct bcma_device *core, u16 offset);
37 void (*write8)(struct bcma_device *core, u16 offset, u8 value);
38 void (*write16)(struct bcma_device *core, u16 offset, u16 value);
39 void (*write32)(struct bcma_device *core, u16 offset, u32 value);
Rafał Miłecki9d75ef02011-05-20 03:27:06 +020040#ifdef CONFIG_BCMA_BLOCKIO
41 void (*block_read)(struct bcma_device *core, void *buffer,
42 size_t count, u16 offset, u8 reg_width);
43 void (*block_write)(struct bcma_device *core, const void *buffer,
44 size_t count, u16 offset, u8 reg_width);
45#endif
Rafał Miłecki8369ae32011-05-09 18:56:46 +020046 /* Agent ops */
47 u32 (*aread32)(struct bcma_device *core, u16 offset);
48 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
49};
50
51/* Core manufacturers */
52#define BCMA_MANUF_ARM 0x43B
53#define BCMA_MANUF_MIPS 0x4A7
54#define BCMA_MANUF_BCM 0x4BF
55
56/* Core class values. */
57#define BCMA_CL_SIM 0x0
58#define BCMA_CL_EROM 0x1
59#define BCMA_CL_CORESIGHT 0x9
60#define BCMA_CL_VERIF 0xB
61#define BCMA_CL_OPTIMO 0xD
62#define BCMA_CL_GEN 0xE
63#define BCMA_CL_PRIMECELL 0xF
64
65/* Core-ID values. */
66#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
67#define BCMA_CORE_INVALID 0x700
68#define BCMA_CORE_CHIPCOMMON 0x800
69#define BCMA_CORE_ILINE20 0x801
70#define BCMA_CORE_SRAM 0x802
71#define BCMA_CORE_SDRAM 0x803
72#define BCMA_CORE_PCI 0x804
73#define BCMA_CORE_MIPS 0x805
74#define BCMA_CORE_ETHERNET 0x806
75#define BCMA_CORE_V90 0x807
76#define BCMA_CORE_USB11_HOSTDEV 0x808
77#define BCMA_CORE_ADSL 0x809
78#define BCMA_CORE_ILINE100 0x80A
79#define BCMA_CORE_IPSEC 0x80B
80#define BCMA_CORE_UTOPIA 0x80C
81#define BCMA_CORE_PCMCIA 0x80D
82#define BCMA_CORE_INTERNAL_MEM 0x80E
83#define BCMA_CORE_MEMC_SDRAM 0x80F
84#define BCMA_CORE_OFDM 0x810
85#define BCMA_CORE_EXTIF 0x811
86#define BCMA_CORE_80211 0x812
87#define BCMA_CORE_PHY_A 0x813
88#define BCMA_CORE_PHY_B 0x814
89#define BCMA_CORE_PHY_G 0x815
90#define BCMA_CORE_MIPS_3302 0x816
91#define BCMA_CORE_USB11_HOST 0x817
92#define BCMA_CORE_USB11_DEV 0x818
93#define BCMA_CORE_USB20_HOST 0x819
94#define BCMA_CORE_USB20_DEV 0x81A
95#define BCMA_CORE_SDIO_HOST 0x81B
96#define BCMA_CORE_ROBOSWITCH 0x81C
97#define BCMA_CORE_PARA_ATA 0x81D
98#define BCMA_CORE_SATA_XORDMA 0x81E
99#define BCMA_CORE_ETHERNET_GBIT 0x81F
100#define BCMA_CORE_PCIE 0x820
101#define BCMA_CORE_PHY_N 0x821
102#define BCMA_CORE_SRAM_CTL 0x822
103#define BCMA_CORE_MINI_MACPHY 0x823
104#define BCMA_CORE_ARM_1176 0x824
105#define BCMA_CORE_ARM_7TDMI 0x825
106#define BCMA_CORE_PHY_LP 0x826
107#define BCMA_CORE_PMU 0x827
108#define BCMA_CORE_PHY_SSN 0x828
109#define BCMA_CORE_SDIO_DEV 0x829
110#define BCMA_CORE_ARM_CM3 0x82A
111#define BCMA_CORE_PHY_HT 0x82B
112#define BCMA_CORE_MIPS_74K 0x82C
113#define BCMA_CORE_MAC_GBIT 0x82D
114#define BCMA_CORE_DDR12_MEM_CTL 0x82E
115#define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */
116#define BCMA_CORE_OCP_OCP_BRIDGE 0x830
117#define BCMA_CORE_SHARED_COMMON 0x831
118#define BCMA_CORE_OCP_AHB_BRIDGE 0x832
119#define BCMA_CORE_SPI_HOST 0x833
120#define BCMA_CORE_I2S 0x834
121#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
122#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
123#define BCMA_CORE_DEFAULT 0xFFF
124
125#define BCMA_MAX_NR_CORES 16
126
127struct bcma_device {
128 struct bcma_bus *bus;
129 struct bcma_device_id id;
130
131 struct device dev;
Rafał Miłecki1bdcd092011-05-18 11:40:22 +0200132 struct device *dma_dev;
133 unsigned int irq;
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200134 bool dev_registered;
135
136 u8 core_index;
137
138 u32 addr;
139 u32 wrap;
140
Hauke Mehrtensecd177c2011-07-23 01:20:08 +0200141 void __iomem *io_addr;
142 void __iomem *io_wrap;
143
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200144 void *drvdata;
145 struct list_head list;
146};
147
148static inline void *bcma_get_drvdata(struct bcma_device *core)
149{
150 return core->drvdata;
151}
152static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
153{
154 core->drvdata = drvdata;
155}
156
157struct bcma_driver {
158 const char *name;
159 const struct bcma_device_id *id_table;
160
161 int (*probe)(struct bcma_device *dev);
162 void (*remove)(struct bcma_device *dev);
163 int (*suspend)(struct bcma_device *dev, pm_message_t state);
164 int (*resume)(struct bcma_device *dev);
165 void (*shutdown)(struct bcma_device *dev);
166
167 struct device_driver drv;
168};
169extern
170int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
171static inline int bcma_driver_register(struct bcma_driver *drv)
172{
173 return __bcma_driver_register(drv, THIS_MODULE);
174}
175extern void bcma_driver_unregister(struct bcma_driver *drv);
176
177struct bcma_bus {
178 /* The MMIO area. */
179 void __iomem *mmio;
180
181 const struct bcma_host_ops *ops;
182
183 enum bcma_hosttype hosttype;
184 union {
185 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
186 struct pci_dev *host_pci;
187 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
188 struct sdio_func *host_sdio;
189 };
190
191 struct bcma_chipinfo chipinfo;
192
193 struct bcma_device *mapped_core;
194 struct list_head cores;
195 u8 nr_cores;
Hauke Mehrtens517f43e2011-07-23 01:20:07 +0200196 u8 init_done:1;
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200197
198 struct bcma_drv_cc drv_cc;
199 struct bcma_drv_pci drv_pci;
Rafał Miłecki27f18dc2011-06-02 02:08:51 +0200200
201 /* We decided to share SPROM struct with SSB as long as we do not need
202 * any hacks for BCMA. This simplifies drivers code. */
203 struct ssb_sprom sprom;
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200204};
205
206extern inline u32 bcma_read8(struct bcma_device *core, u16 offset)
207{
208 return core->bus->ops->read8(core, offset);
209}
210extern inline u32 bcma_read16(struct bcma_device *core, u16 offset)
211{
212 return core->bus->ops->read16(core, offset);
213}
214extern inline u32 bcma_read32(struct bcma_device *core, u16 offset)
215{
216 return core->bus->ops->read32(core, offset);
217}
218extern inline
219void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
220{
221 core->bus->ops->write8(core, offset, value);
222}
223extern inline
224void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
225{
226 core->bus->ops->write16(core, offset, value);
227}
228extern inline
229void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
230{
231 core->bus->ops->write32(core, offset, value);
232}
Rafał Miłecki9d75ef02011-05-20 03:27:06 +0200233#ifdef CONFIG_BCMA_BLOCKIO
234extern inline void bcma_block_read(struct bcma_device *core, void *buffer,
235 size_t count, u16 offset, u8 reg_width)
236{
237 core->bus->ops->block_read(core, buffer, count, offset, reg_width);
238}
239extern inline void bcma_block_write(struct bcma_device *core, const void *buffer,
240 size_t count, u16 offset, u8 reg_width)
241{
242 core->bus->ops->block_write(core, buffer, count, offset, reg_width);
243}
244#endif
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200245extern inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
246{
247 return core->bus->ops->aread32(core, offset);
248}
249extern inline
250void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
251{
252 core->bus->ops->awrite32(core, offset, value);
253}
254
Rafał Miłecki3de1a772011-07-17 01:06:03 +0200255#define bcma_mask32(cc, offset, mask) \
256 bcma_write32(cc, offset, bcma_read32(cc, offset) & (mask))
257#define bcma_set32(cc, offset, set) \
258 bcma_write32(cc, offset, bcma_read32(cc, offset) | (set))
259#define bcma_maskset32(cc, offset, mask, set) \
260 bcma_write32(cc, offset, (bcma_read32(cc, offset) & (mask)) | (set))
261
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200262extern bool bcma_core_is_enabled(struct bcma_device *core);
Arend van Spriele3ae0ca2011-06-09 20:07:20 +0200263extern void bcma_core_disable(struct bcma_device *core, u32 flags);
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200264extern int bcma_core_enable(struct bcma_device *core, u32 flags);
Rafał Miłecki7424dd02011-07-17 01:06:04 +0200265extern void bcma_core_set_clockmode(struct bcma_device *core,
266 enum bcma_clkmode clkmode);
Rafał Miłecki6f539122011-07-17 01:06:05 +0200267extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
268 bool on);
Rafał Miłecki05aec232011-07-20 19:52:15 +0200269#define BCMA_DMA_TRANSLATION_MASK 0xC0000000
270#define BCMA_DMA_TRANSLATION_NONE 0x00000000
271#define BCMA_DMA_TRANSLATION_DMA32_CMT 0x40000000 /* Client Mode Translation for 32-bit DMA */
272#define BCMA_DMA_TRANSLATION_DMA64_CMT 0x80000000 /* Client Mode Translation for 64-bit DMA */
273extern u32 bcma_core_dma_translation(struct bcma_device *core);
Rafał Miłecki3de1a772011-07-17 01:06:03 +0200274
Rafał Miłecki8369ae32011-05-09 18:56:46 +0200275#endif /* LINUX_BCMA_H_ */