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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080058#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070059#include <mach/irqs.h>
60#include <mach/msm_spi.h>
61#include <mach/msm_serial_hs.h>
62#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080063#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064#include <mach/msm_memtypes.h>
65#include <asm/mach/mmc.h>
66#include <mach/msm_battery.h>
67#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070068#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070069#ifdef CONFIG_MSM_DSPS
70#include <mach/msm_dsps.h>
71#endif
72#include <mach/msm_xo.h>
73#include <mach/msm_bus_board.h>
74#include <mach/socinfo.h>
75#include <linux/i2c/isl9519.h>
76#ifdef CONFIG_USB_G_ANDROID
77#include <linux/usb/android.h>
78#include <mach/usbdiag.h>
79#endif
80#include <linux/regulator/consumer.h>
81#include <linux/regulator/machine.h>
82#include <mach/sdio_al.h>
83#include <mach/rpm.h>
84#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070085#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053086#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080087
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070088#include "devices.h"
89#include "devices-msm8x60.h"
90#include "cpuidle.h"
91#include "pm.h"
92#include "mpm.h"
93#include "spm.h"
94#include "rpm_log.h"
95#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070096#include "gpiomux-8x60.h"
97#include "rpm_stats.h"
98#include "peripheral-loader.h"
99#include <linux/platform_data/qcom_crypto_device.h>
100#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700101#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600102#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700103
104#include <linux/ion.h>
105#include <mach/ion.h>
106
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700107#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MDM2AP_SYNC 129
109
Terence Hampson1c73fef2011-07-19 17:10:49 -0400110#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700111#define LCDC_SPI_GPIO_CLK 73
112#define LCDC_SPI_GPIO_CS 72
113#define LCDC_SPI_GPIO_MOSI 70
114#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
115#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
116#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
117#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
118#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400119#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700120
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700121#define PANEL_NAME_MAX_LEN 30
122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
802static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
803 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
804 .idle_supported = 1,
805 .suspend_supported = 1,
806 .idle_enabled = 0,
807 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700808 },
809
810 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
811 .idle_supported = 1,
812 .suspend_supported = 1,
813 .idle_enabled = 0,
814 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815 },
816
817 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
818 .idle_supported = 1,
819 .suspend_supported = 1,
820 .idle_enabled = 1,
821 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700822 },
823
824 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
825 .idle_supported = 1,
826 .suspend_supported = 1,
827 .idle_enabled = 0,
828 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 },
830
831 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
832 .idle_supported = 1,
833 .suspend_supported = 1,
834 .idle_enabled = 0,
835 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700836 },
837
838 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
839 .idle_supported = 1,
840 .suspend_supported = 1,
841 .idle_enabled = 1,
842 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843 },
844};
845
846static struct msm_cpuidle_state msm_cstates[] __initdata = {
847 {0, 0, "C0", "WFI",
848 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
849
850 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
851 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
852
853 {0, 2, "C2", "POWER_COLLAPSE",
854 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
855
856 {1, 0, "C0", "WFI",
857 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
858
859 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
860 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
861};
862
863static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
864 {
865 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
866 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
867 true,
868 1, 8000, 100000, 1,
869 },
870
871 {
872 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
873 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
874 true,
875 1500, 5000, 60100000, 3000,
876 },
877
878 {
879 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
880 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
881 false,
882 1800, 5000, 60350000, 3500,
883 },
884 {
885 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
886 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
887 false,
888 3800, 4500, 65350000, 5500,
889 },
890
891 {
892 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
893 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
894 false,
895 2800, 2500, 66850000, 4800,
896 },
897
898 {
899 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
900 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
901 false,
902 4800, 2000, 71850000, 6800,
903 },
904
905 {
906 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
907 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
908 false,
909 6800, 500, 75850000, 8800,
910 },
911
912 {
913 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
914 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
915 false,
916 7800, 0, 76350000, 9800,
917 },
918};
919
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600920static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
921 .mode = MSM_PM_BOOT_CONFIG_TZ,
922};
923
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700924#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
925
926#define ISP1763_INT_GPIO 117
927#define ISP1763_RST_GPIO 152
928static struct resource isp1763_resources[] = {
929 [0] = {
930 .flags = IORESOURCE_MEM,
931 .start = 0x1D000000,
932 .end = 0x1D005FFF, /* 24KB */
933 },
934 [1] = {
935 .flags = IORESOURCE_IRQ,
936 },
937};
938static void __init msm8x60_cfg_isp1763(void)
939{
940 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
941 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
942}
943
944static int isp1763_setup_gpio(int enable)
945{
946 int status = 0;
947
948 if (enable) {
949 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
950 if (status) {
951 pr_err("%s:Failed to request GPIO %d\n",
952 __func__, ISP1763_INT_GPIO);
953 return status;
954 }
955 status = gpio_direction_input(ISP1763_INT_GPIO);
956 if (status) {
957 pr_err("%s:Failed to configure GPIO %d\n",
958 __func__, ISP1763_INT_GPIO);
959 goto gpio_free_int;
960 }
961 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
962 if (status) {
963 pr_err("%s:Failed to request GPIO %d\n",
964 __func__, ISP1763_RST_GPIO);
965 goto gpio_free_int;
966 }
967 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
968 if (status) {
969 pr_err("%s:Failed to configure GPIO %d\n",
970 __func__, ISP1763_RST_GPIO);
971 goto gpio_free_rst;
972 }
973 pr_debug("\nISP GPIO configuration done\n");
974 return status;
975 }
976
977gpio_free_rst:
978 gpio_free(ISP1763_RST_GPIO);
979gpio_free_int:
980 gpio_free(ISP1763_INT_GPIO);
981
982 return status;
983}
984static struct isp1763_platform_data isp1763_pdata = {
985 .reset_gpio = ISP1763_RST_GPIO,
986 .setup_gpio = isp1763_setup_gpio
987};
988
989static struct platform_device isp1763_device = {
990 .name = "isp1763_usb",
991 .num_resources = ARRAY_SIZE(isp1763_resources),
992 .resource = isp1763_resources,
993 .dev = {
994 .platform_data = &isp1763_pdata
995 }
996};
997#endif
998
999#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301000static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001001static struct regulator *ldo6_3p3;
1002static struct regulator *ldo7_1p8;
1003static struct regulator *vdd_cx;
1004#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301005#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001006notify_vbus_state notify_vbus_state_func_ptr;
1007static int usb_phy_susp_dig_vol = 750000;
1008static int pmic_id_notif_supported;
1009
1010#ifdef CONFIG_USB_EHCI_MSM_72K
1011#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1012struct delayed_work pmic_id_det;
1013
1014static int __init usb_id_pin_rework_setup(char *support)
1015{
1016 if (strncmp(support, "true", 4) == 0)
1017 pmic_id_notif_supported = 1;
1018
1019 return 1;
1020}
1021__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1022
1023static void pmic_id_detect(struct work_struct *w)
1024{
1025 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1026 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1027
1028 if (notify_vbus_state_func_ptr)
1029 (*notify_vbus_state_func_ptr) (val);
1030}
1031
1032static irqreturn_t pmic_id_on_irq(int irq, void *data)
1033{
1034 /*
1035 * Spurious interrupts are observed on pmic gpio line
1036 * even though there is no state change on USB ID. Schedule the
1037 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001038 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001039 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001040
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001041 return IRQ_HANDLED;
1042}
1043
Anji jonnalaae745e92011-11-14 18:34:31 +05301044static int msm_hsusb_phy_id_setup_init(int init)
1045{
1046 unsigned ret;
1047
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301048 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1049 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1050 .level = PM8901_MPP_DIG_LEVEL_L5,
1051 };
1052
Anji jonnalaae745e92011-11-14 18:34:31 +05301053 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301054 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1055 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1056 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301057 if (ret < 0)
1058 pr_err("%s:MPP2 configuration failed\n", __func__);
1059 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301060 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1061 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1062 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301063 if (ret < 0)
1064 pr_err("%s:MPP2 un config failed\n", __func__);
1065 }
1066 return ret;
1067}
1068
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001069static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1070{
1071 unsigned ret = -ENODEV;
1072
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301073 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301074 .direction = PM_GPIO_DIR_IN,
1075 .pull = PM_GPIO_PULL_UP_1P5,
1076 .function = PM_GPIO_FUNC_NORMAL,
1077 .vin_sel = 2,
1078 .inv_int_pol = 0,
1079 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301080 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301081 .direction = PM_GPIO_DIR_IN,
1082 .pull = PM_GPIO_PULL_NO,
1083 .function = PM_GPIO_FUNC_NORMAL,
1084 .vin_sel = 2,
1085 .inv_int_pol = 0,
1086 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001087 if (!callback)
1088 return -EINVAL;
1089
1090 if (machine_is_msm8x60_fluid())
1091 return -ENOTSUPP;
1092
1093 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1094 pr_debug("%s: USB_ID pin is not routed to PMIC"
1095 "on V1 surf/ffa\n", __func__);
1096 return -ENOTSUPP;
1097 }
1098
Manu Gautam62158eb2011-11-24 16:20:46 +05301099 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1100 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001101 pr_debug("%s: USB_ID is not routed to PMIC"
1102 "on V2 ffa\n", __func__);
1103 return -ENOTSUPP;
1104 }
1105
1106 usb_phy_susp_dig_vol = 500000;
1107
1108 if (init) {
1109 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301110 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301111 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1112 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301113 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301114 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301115 __func__, ret);
1116 return ret;
1117 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001118 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1119 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1120 "msm_otg_id", NULL);
1121 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001122 pr_err("%s:pmic_usb_id interrupt registration failed",
1123 __func__);
1124 return ret;
1125 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301126 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001127 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301128 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001129 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301130 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1131 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301132 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301133 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301134 __func__, ret);
1135 return ret;
1136 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301137 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001138 cancel_delayed_work_sync(&pmic_id_det);
1139 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001140 }
1141 return 0;
1142}
1143#endif
1144
1145#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1146#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1147static int msm_hsusb_init_vddcx(int init)
1148{
1149 int ret = 0;
1150
1151 if (init) {
1152 vdd_cx = regulator_get(NULL, "8058_s1");
1153 if (IS_ERR(vdd_cx)) {
1154 return PTR_ERR(vdd_cx);
1155 }
1156
1157 ret = regulator_set_voltage(vdd_cx,
1158 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1159 USB_PHY_MAX_VDD_DIG_VOL);
1160 if (ret) {
1161 pr_err("%s: unable to set the voltage for regulator"
1162 "vdd_cx\n", __func__);
1163 regulator_put(vdd_cx);
1164 return ret;
1165 }
1166
1167 ret = regulator_enable(vdd_cx);
1168 if (ret) {
1169 pr_err("%s: unable to enable regulator"
1170 "vdd_cx\n", __func__);
1171 regulator_put(vdd_cx);
1172 }
1173 } else {
1174 ret = regulator_disable(vdd_cx);
1175 if (ret) {
1176 pr_err("%s: Unable to disable the regulator:"
1177 "vdd_cx\n", __func__);
1178 return ret;
1179 }
1180
1181 regulator_put(vdd_cx);
1182 }
1183
1184 return ret;
1185}
1186
1187static int msm_hsusb_config_vddcx(int high)
1188{
1189 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1190 int min_vol;
1191 int ret;
1192
1193 if (high)
1194 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1195 else
1196 min_vol = usb_phy_susp_dig_vol;
1197
1198 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1199 if (ret) {
1200 pr_err("%s: unable to set the voltage for regulator"
1201 "vdd_cx\n", __func__);
1202 return ret;
1203 }
1204
1205 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1206
1207 return ret;
1208}
1209
1210#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1211#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1212#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1213#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1214
1215#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1216#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1217#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1218#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1219static int msm_hsusb_ldo_init(int init)
1220{
1221 int rc = 0;
1222
1223 if (init) {
1224 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1225 if (IS_ERR(ldo6_3p3))
1226 return PTR_ERR(ldo6_3p3);
1227
1228 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1229 if (IS_ERR(ldo7_1p8)) {
1230 rc = PTR_ERR(ldo7_1p8);
1231 goto put_3p3;
1232 }
1233
1234 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1235 USB_PHY_3P3_VOL_MAX);
1236 if (rc) {
1237 pr_err("%s: Unable to set voltage level for"
1238 "ldo6_3p3 regulator\n", __func__);
1239 goto put_1p8;
1240 }
1241 rc = regulator_enable(ldo6_3p3);
1242 if (rc) {
1243 pr_err("%s: Unable to enable the regulator:"
1244 "ldo6_3p3\n", __func__);
1245 goto put_1p8;
1246 }
1247 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1248 USB_PHY_1P8_VOL_MAX);
1249 if (rc) {
1250 pr_err("%s: Unable to set voltage level for"
1251 "ldo7_1p8 regulator\n", __func__);
1252 goto disable_3p3;
1253 }
1254 rc = regulator_enable(ldo7_1p8);
1255 if (rc) {
1256 pr_err("%s: Unable to enable the regulator:"
1257 "ldo7_1p8\n", __func__);
1258 goto disable_3p3;
1259 }
1260
1261 return 0;
1262 }
1263
1264 regulator_disable(ldo7_1p8);
1265disable_3p3:
1266 regulator_disable(ldo6_3p3);
1267put_1p8:
1268 regulator_put(ldo7_1p8);
1269put_3p3:
1270 regulator_put(ldo6_3p3);
1271 return rc;
1272}
1273
1274static int msm_hsusb_ldo_enable(int on)
1275{
1276 int ret = 0;
1277
1278 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1279 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1280 return -ENODEV;
1281 }
1282
1283 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1284 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1285 return -ENODEV;
1286 }
1287
1288 if (on) {
1289 ret = regulator_set_optimum_mode(ldo7_1p8,
1290 USB_PHY_1P8_HPM_LOAD);
1291 if (ret < 0) {
1292 pr_err("%s: Unable to set HPM of the regulator:"
1293 "ldo7_1p8\n", __func__);
1294 return ret;
1295 }
1296 ret = regulator_set_optimum_mode(ldo6_3p3,
1297 USB_PHY_3P3_HPM_LOAD);
1298 if (ret < 0) {
1299 pr_err("%s: Unable to set HPM of the regulator:"
1300 "ldo6_3p3\n", __func__);
1301 regulator_set_optimum_mode(ldo7_1p8,
1302 USB_PHY_1P8_LPM_LOAD);
1303 return ret;
1304 }
1305 } else {
1306 ret = regulator_set_optimum_mode(ldo7_1p8,
1307 USB_PHY_1P8_LPM_LOAD);
1308 if (ret < 0)
1309 pr_err("%s: Unable to set LPM of the regulator:"
1310 "ldo7_1p8\n", __func__);
1311 ret = regulator_set_optimum_mode(ldo6_3p3,
1312 USB_PHY_3P3_LPM_LOAD);
1313 if (ret < 0)
1314 pr_err("%s: Unable to set LPM of the regulator:"
1315 "ldo6_3p3\n", __func__);
1316 }
1317
1318 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1319 return ret < 0 ? ret : 0;
1320 }
1321#endif
1322#ifdef CONFIG_USB_EHCI_MSM_72K
1323#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1324static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1325{
1326 static int vbus_is_on;
1327
1328 /* If VBUS is already on (or off), do nothing. */
1329 if (on == vbus_is_on)
1330 return;
1331 smb137b_otg_power(on);
1332 vbus_is_on = on;
1333}
1334#endif
1335static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1336{
1337 static struct regulator *votg_5v_switch;
1338 static struct regulator *ext_5v_reg;
1339 static int vbus_is_on;
1340
1341 /* If VBUS is already on (or off), do nothing. */
1342 if (on == vbus_is_on)
1343 return;
1344
1345 if (!votg_5v_switch) {
1346 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1347 if (IS_ERR(votg_5v_switch)) {
1348 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1349 return;
1350 }
1351 }
1352 if (!ext_5v_reg) {
1353 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1354 if (IS_ERR(ext_5v_reg)) {
1355 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1356 return;
1357 }
1358 }
1359 if (on) {
1360 if (regulator_enable(ext_5v_reg)) {
1361 pr_err("%s: Unable to enable the regulator:"
1362 " ext_5v_reg\n", __func__);
1363 return;
1364 }
1365 if (regulator_enable(votg_5v_switch)) {
1366 pr_err("%s: Unable to enable the regulator:"
1367 " votg_5v_switch\n", __func__);
1368 return;
1369 }
1370 } else {
1371 if (regulator_disable(votg_5v_switch))
1372 pr_err("%s: Unable to enable the regulator:"
1373 " votg_5v_switch\n", __func__);
1374 if (regulator_disable(ext_5v_reg))
1375 pr_err("%s: Unable to enable the regulator:"
1376 " ext_5v_reg\n", __func__);
1377 }
1378
1379 vbus_is_on = on;
1380}
1381
1382static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1383 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1384 .power_budget = 390,
1385};
1386#endif
1387
1388#ifdef CONFIG_BATTERY_MSM8X60
1389static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1390 int init)
1391{
1392 int ret = -ENOTSUPP;
1393
1394#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1395 if (machine_is_msm8x60_fluid()) {
1396 if (init)
1397 msm_charger_register_vbus_sn(callback);
1398 else
1399 msm_charger_unregister_vbus_sn(callback);
1400 return 0;
1401 }
1402#endif
1403 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1404 * hence, irrespective of either peripheral only mode or
1405 * OTG (host and peripheral) modes, can depend on pmic for
1406 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001407 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001408 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1409 && (machine_is_msm8x60_surf() ||
1410 pmic_id_notif_supported)) {
1411 if (init)
1412 ret = msm_charger_register_vbus_sn(callback);
1413 else {
1414 msm_charger_unregister_vbus_sn(callback);
1415 ret = 0;
1416 }
1417 } else {
1418#if !defined(CONFIG_USB_EHCI_MSM_72K)
1419 if (init)
1420 ret = msm_charger_register_vbus_sn(callback);
1421 else {
1422 msm_charger_unregister_vbus_sn(callback);
1423 ret = 0;
1424 }
1425#endif
1426 }
1427 return ret;
1428}
1429#endif
1430
1431#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1432static struct msm_otg_platform_data msm_otg_pdata = {
1433 /* if usb link is in sps there is no need for
1434 * usb pclk as dayatona fabric clock will be
1435 * used instead
1436 */
1437 .pclk_src_name = "dfab_usb_hs_clk",
1438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002673#define MSM_ION_EBI_SIZE MSM_PMEM_SF_SIZE
2674#define MSM_ION_ADSP_SIZE MSM_PMEM_ADSP_SIZE
Laura Abbottdf8b8a82011-11-02 23:13:45 -07002675#define MSM_ION_SMI_SIZE MSM_PMEM_SMIPOOL_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002676
2677#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
2678#define MSM_ION_HEAP_NUM 5
2679#else
2680#define MSM_ION_HEAP_NUM 2
2681#endif
2682
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002683static unsigned fb_size;
2684static int __init fb_size_setup(char *p)
2685{
2686 fb_size = memparse(p, NULL);
2687 return 0;
2688}
2689early_param("fb_size", fb_size_setup);
2690
2691static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2692static int __init pmem_kernel_ebi1_size_setup(char *p)
2693{
2694 pmem_kernel_ebi1_size = memparse(p, NULL);
2695 return 0;
2696}
2697early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2698
2699#ifdef CONFIG_ANDROID_PMEM
2700static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2701static int __init pmem_sf_size_setup(char *p)
2702{
2703 pmem_sf_size = memparse(p, NULL);
2704 return 0;
2705}
2706early_param("pmem_sf_size", pmem_sf_size_setup);
2707
2708static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2709
2710static int __init pmem_adsp_size_setup(char *p)
2711{
2712 pmem_adsp_size = memparse(p, NULL);
2713 return 0;
2714}
2715early_param("pmem_adsp_size", pmem_adsp_size_setup);
2716
2717static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2718
2719static int __init pmem_audio_size_setup(char *p)
2720{
2721 pmem_audio_size = memparse(p, NULL);
2722 return 0;
2723}
2724early_param("pmem_audio_size", pmem_audio_size_setup);
2725#endif
2726
2727static struct resource msm_fb_resources[] = {
2728 {
2729 .flags = IORESOURCE_DMA,
2730 }
2731};
2732
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002733static int msm_fb_detect_panel(const char *name)
2734{
2735 if (machine_is_msm8x60_fluid()) {
2736 uint32_t soc_platform_version = socinfo_get_platform_version();
2737 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2738#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2739 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002740 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2741 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002742 return 0;
2743#endif
2744 } else { /*P3 and up use AUO panel */
2745#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2746 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002747 strnlen(LCDC_AUO_PANEL_NAME,
2748 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002749 return 0;
2750#endif
2751 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002752#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2753 } else if machine_is_msm8x60_dragon() {
2754 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002755 strnlen(LCDC_NT35582_PANEL_NAME,
2756 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002757 return 0;
2758#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002759 } else {
2760 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002761 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2762 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002763 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002764
2765#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2766 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2767 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2768 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2769 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2770 PANEL_NAME_MAX_LEN)))
2771 return 0;
2772
2773 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2774 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2775 PANEL_NAME_MAX_LEN)))
2776 return 0;
2777
2778 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2779 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2780 PANEL_NAME_MAX_LEN)))
2781 return 0;
2782#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002783 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002784
2785 if (!strncmp(name, HDMI_PANEL_NAME,
2786 strnlen(HDMI_PANEL_NAME,
2787 PANEL_NAME_MAX_LEN)))
2788 return 0;
2789
2790 if (!strncmp(name, TVOUT_PANEL_NAME,
2791 strnlen(TVOUT_PANEL_NAME,
2792 PANEL_NAME_MAX_LEN)))
2793 return 0;
2794
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002795 pr_warning("%s: not supported '%s'", __func__, name);
2796 return -ENODEV;
2797}
2798
2799static struct msm_fb_platform_data msm_fb_pdata = {
2800 .detect_client = msm_fb_detect_panel,
2801};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002802
2803static struct platform_device msm_fb_device = {
2804 .name = "msm_fb",
2805 .id = 0,
2806 .num_resources = ARRAY_SIZE(msm_fb_resources),
2807 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002808 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002809};
2810
2811#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002812#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002813static struct android_pmem_platform_data android_pmem_pdata = {
2814 .name = "pmem",
2815 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2816 .cached = 1,
2817 .memory_type = MEMTYPE_EBI1,
2818};
2819
2820static struct platform_device android_pmem_device = {
2821 .name = "android_pmem",
2822 .id = 0,
2823 .dev = {.platform_data = &android_pmem_pdata},
2824};
2825
2826static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2827 .name = "pmem_adsp",
2828 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2829 .cached = 0,
2830 .memory_type = MEMTYPE_EBI1,
2831};
2832
2833static struct platform_device android_pmem_adsp_device = {
2834 .name = "android_pmem",
2835 .id = 2,
2836 .dev = { .platform_data = &android_pmem_adsp_pdata },
2837};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002838#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002839static struct android_pmem_platform_data android_pmem_audio_pdata = {
2840 .name = "pmem_audio",
2841 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2842 .cached = 0,
2843 .memory_type = MEMTYPE_EBI1,
2844};
2845
2846static struct platform_device android_pmem_audio_device = {
2847 .name = "android_pmem",
2848 .id = 4,
2849 .dev = { .platform_data = &android_pmem_audio_pdata },
2850};
2851
Laura Abbott1e36a022011-06-22 17:08:13 -07002852#define PMEM_BUS_WIDTH(_bw) \
2853 { \
2854 .vectors = &(struct msm_bus_vectors){ \
2855 .src = MSM_BUS_MASTER_AMPSS_M0, \
2856 .dst = MSM_BUS_SLAVE_SMI, \
2857 .ib = (_bw), \
2858 .ab = 0, \
2859 }, \
2860 .num_paths = 1, \
2861 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002862
2863static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002864 [0] = PMEM_BUS_WIDTH(0), /* Off */
2865 [1] = PMEM_BUS_WIDTH(1), /* On */
2866};
2867
2868static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002869 .usecase = mem_smi_table,
2870 .num_usecases = ARRAY_SIZE(mem_smi_table),
2871 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002872};
2873
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002874int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002875{
2876 int bus_id = (int) data;
2877
2878 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002879 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002880}
2881
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002882int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002883{
2884 int bus_id = (int) data;
2885
2886 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002887 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002888}
2889
Alex Bird199980e2011-10-21 11:29:27 -07002890void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002891{
2892 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2893}
Olav Hauganee0f7802011-12-19 13:28:57 -08002894#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002895static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2896 .name = "pmem_smipool",
2897 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2898 .cached = 0,
2899 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002900 .request_region = request_smi_region,
2901 .release_region = release_smi_region,
2902 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002903 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002904};
2905static struct platform_device android_pmem_smipool_device = {
2906 .name = "android_pmem",
2907 .id = 7,
2908 .dev = { .platform_data = &android_pmem_smipool_pdata },
2909};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002910#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002911#endif
2912
2913#define GPIO_DONGLE_PWR_EN 258
2914static void setup_display_power(void);
2915static int lcdc_vga_enabled;
2916static int vga_enable_request(int enable)
2917{
2918 if (enable)
2919 lcdc_vga_enabled = 1;
2920 else
2921 lcdc_vga_enabled = 0;
2922 setup_display_power();
2923
2924 return 0;
2925}
2926
2927#define GPIO_BACKLIGHT_PWM0 0
2928#define GPIO_BACKLIGHT_PWM1 1
2929
2930static int pmic_backlight_gpio[2]
2931 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2932static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2933 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2934 .vga_switch = vga_enable_request,
2935};
2936
2937static struct platform_device lcdc_samsung_panel_device = {
2938 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2939 .id = 0,
2940 .dev = {
2941 .platform_data = &lcdc_samsung_panel_data,
2942 }
2943};
2944#if (!defined(CONFIG_SPI_QUP)) && \
2945 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2946 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2947
2948static int lcdc_spi_gpio_array_num[] = {
2949 LCDC_SPI_GPIO_CLK,
2950 LCDC_SPI_GPIO_CS,
2951 LCDC_SPI_GPIO_MOSI,
2952};
2953
2954static uint32_t lcdc_spi_gpio_config_data[] = {
2955 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2956 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2957 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2958 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2959 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2960 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2961};
2962
2963static void lcdc_config_spi_gpios(int enable)
2964{
2965 int n;
2966 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2967 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2968}
2969#endif
2970
2971#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2972#ifdef CONFIG_SPI_QUP
2973static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2974 {
2975 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2976 .mode = SPI_MODE_3,
2977 .bus_num = 1,
2978 .chip_select = 0,
2979 .max_speed_hz = 10800000,
2980 }
2981};
2982#endif /* CONFIG_SPI_QUP */
2983
2984static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2985#ifndef CONFIG_SPI_QUP
2986 .panel_config_gpio = lcdc_config_spi_gpios,
2987 .gpio_num = lcdc_spi_gpio_array_num,
2988#endif
2989};
2990
2991static struct platform_device lcdc_samsung_oled_panel_device = {
2992 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2993 .id = 0,
2994 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2995};
2996#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2997
2998#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2999#ifdef CONFIG_SPI_QUP
3000static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3001 {
3002 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3003 .mode = SPI_MODE_3,
3004 .bus_num = 1,
3005 .chip_select = 0,
3006 .max_speed_hz = 10800000,
3007 }
3008};
3009#endif
3010
3011static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3012#ifndef CONFIG_SPI_QUP
3013 .panel_config_gpio = lcdc_config_spi_gpios,
3014 .gpio_num = lcdc_spi_gpio_array_num,
3015#endif
3016};
3017
3018static struct platform_device lcdc_auo_wvga_panel_device = {
3019 .name = LCDC_AUO_PANEL_NAME,
3020 .id = 0,
3021 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3022};
3023#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3024
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003025#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3026
3027#define GPIO_NT35582_RESET 94
3028#define GPIO_NT35582_BL_EN_HW_PIN 24
3029#define GPIO_NT35582_BL_EN \
3030 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3031
3032static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3033
3034static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3035 .gpio_num = lcdc_nt35582_pmic_gpio,
3036};
3037
3038static struct platform_device lcdc_nt35582_panel_device = {
3039 .name = LCDC_NT35582_PANEL_NAME,
3040 .id = 0,
3041 .dev = {
3042 .platform_data = &lcdc_nt35582_panel_data,
3043 }
3044};
3045
3046static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3047 {
3048 .modalias = "lcdc_nt35582_spi",
3049 .mode = SPI_MODE_0,
3050 .bus_num = 0,
3051 .chip_select = 0,
3052 .max_speed_hz = 1100000,
3053 }
3054};
3055#endif
3056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003057#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3058static struct resource hdmi_msm_resources[] = {
3059 {
3060 .name = "hdmi_msm_qfprom_addr",
3061 .start = 0x00700000,
3062 .end = 0x007060FF,
3063 .flags = IORESOURCE_MEM,
3064 },
3065 {
3066 .name = "hdmi_msm_hdmi_addr",
3067 .start = 0x04A00000,
3068 .end = 0x04A00FFF,
3069 .flags = IORESOURCE_MEM,
3070 },
3071 {
3072 .name = "hdmi_msm_irq",
3073 .start = HDMI_IRQ,
3074 .end = HDMI_IRQ,
3075 .flags = IORESOURCE_IRQ,
3076 },
3077};
3078
3079static int hdmi_enable_5v(int on);
3080static int hdmi_core_power(int on, int show);
3081static int hdmi_cec_power(int on);
3082
3083static struct msm_hdmi_platform_data hdmi_msm_data = {
3084 .irq = HDMI_IRQ,
3085 .enable_5v = hdmi_enable_5v,
3086 .core_power = hdmi_core_power,
3087 .cec_power = hdmi_cec_power,
3088};
3089
3090static struct platform_device hdmi_msm_device = {
3091 .name = "hdmi_msm",
3092 .id = 0,
3093 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3094 .resource = hdmi_msm_resources,
3095 .dev.platform_data = &hdmi_msm_data,
3096};
3097#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3098
3099#ifdef CONFIG_FB_MSM_MIPI_DSI
3100static struct platform_device mipi_dsi_toshiba_panel_device = {
3101 .name = "mipi_toshiba",
3102 .id = 0,
3103};
3104
3105#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3106
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003107static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003108 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003109 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003110};
3111
3112static struct platform_device mipi_dsi_novatek_panel_device = {
3113 .name = "mipi_novatek",
3114 .id = 0,
3115 .dev = {
3116 .platform_data = &novatek_pdata,
3117 }
3118};
3119#endif
3120
3121static void __init msm8x60_allocate_memory_regions(void)
3122{
3123 void *addr;
3124 unsigned long size;
3125
3126 size = MSM_FB_SIZE;
3127 addr = alloc_bootmem_align(size, 0x1000);
3128 msm_fb_resources[0].start = __pa(addr);
3129 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3130 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3131 size, addr, __pa(addr));
3132
3133}
3134
3135#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3136 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3137/*virtual key support */
3138static ssize_t tma300_vkeys_show(struct kobject *kobj,
3139 struct kobj_attribute *attr, char *buf)
3140{
3141 return sprintf(buf,
3142 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3143 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3144 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3146 "\n");
3147}
3148
3149static struct kobj_attribute tma300_vkeys_attr = {
3150 .attr = {
3151 .mode = S_IRUGO,
3152 },
3153 .show = &tma300_vkeys_show,
3154};
3155
3156static struct attribute *tma300_properties_attrs[] = {
3157 &tma300_vkeys_attr.attr,
3158 NULL
3159};
3160
3161static struct attribute_group tma300_properties_attr_group = {
3162 .attrs = tma300_properties_attrs,
3163};
3164
3165static struct kobject *properties_kobj;
3166
3167
3168
3169#define CYTTSP_TS_GPIO_IRQ 61
3170static int cyttsp_platform_init(struct i2c_client *client)
3171{
3172 int rc = -EINVAL;
3173 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3174
3175 if (machine_is_msm8x60_fluid()) {
3176 pm8058_l5 = regulator_get(NULL, "8058_l5");
3177 if (IS_ERR(pm8058_l5)) {
3178 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3179 __func__, PTR_ERR(pm8058_l5));
3180 rc = PTR_ERR(pm8058_l5);
3181 return rc;
3182 }
3183 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3184 if (rc) {
3185 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3186 __func__, rc);
3187 goto reg_l5_put;
3188 }
3189
3190 rc = regulator_enable(pm8058_l5);
3191 if (rc) {
3192 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3193 __func__, rc);
3194 goto reg_l5_put;
3195 }
3196 }
3197 /* vote for s3 to enable i2c communication lines */
3198 pm8058_s3 = regulator_get(NULL, "8058_s3");
3199 if (IS_ERR(pm8058_s3)) {
3200 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3201 __func__, PTR_ERR(pm8058_s3));
3202 rc = PTR_ERR(pm8058_s3);
3203 goto reg_l5_disable;
3204 }
3205
3206 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3207 if (rc) {
3208 pr_err("%s: regulator_set_voltage() = %d\n",
3209 __func__, rc);
3210 goto reg_s3_put;
3211 }
3212
3213 rc = regulator_enable(pm8058_s3);
3214 if (rc) {
3215 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3216 __func__, rc);
3217 goto reg_s3_put;
3218 }
3219
3220 /* wait for vregs to stabilize */
3221 usleep_range(10000, 10000);
3222
3223 /* check this device active by reading first byte/register */
3224 rc = i2c_smbus_read_byte_data(client, 0x01);
3225 if (rc < 0) {
3226 pr_err("%s: i2c sanity check failed\n", __func__);
3227 goto reg_s3_disable;
3228 }
3229
3230 /* virtual keys */
3231 if (machine_is_msm8x60_fluid()) {
3232 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3233 properties_kobj = kobject_create_and_add("board_properties",
3234 NULL);
3235 if (properties_kobj)
3236 rc = sysfs_create_group(properties_kobj,
3237 &tma300_properties_attr_group);
3238 if (!properties_kobj || rc)
3239 pr_err("%s: failed to create board_properties\n",
3240 __func__);
3241 }
3242 return CY_OK;
3243
3244reg_s3_disable:
3245 regulator_disable(pm8058_s3);
3246reg_s3_put:
3247 regulator_put(pm8058_s3);
3248reg_l5_disable:
3249 if (machine_is_msm8x60_fluid())
3250 regulator_disable(pm8058_l5);
3251reg_l5_put:
3252 if (machine_is_msm8x60_fluid())
3253 regulator_put(pm8058_l5);
3254 return rc;
3255}
3256
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303257/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3258static int cyttsp_platform_suspend(struct i2c_client *client)
3259{
3260 msleep(20);
3261
3262 return CY_OK;
3263}
3264
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003265static int cyttsp_platform_resume(struct i2c_client *client)
3266{
3267 /* add any special code to strobe a wakeup pin or chip reset */
3268 msleep(10);
3269
3270 return CY_OK;
3271}
3272
3273static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3274 .flags = 0x04,
3275 .gen = CY_GEN3, /* or */
3276 .use_st = CY_USE_ST,
3277 .use_mt = CY_USE_MT,
3278 .use_hndshk = CY_SEND_HNDSHK,
3279 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303280 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003281 .use_gestures = CY_USE_GESTURES,
3282 /* activate up to 4 groups
3283 * and set active distance
3284 */
3285 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3286 CY_GEST_GRP3 | CY_GEST_GRP4 |
3287 CY_ACT_DIST,
3288 /* change act_intrvl to customize the Active power state
3289 * scanning/processing refresh interval for Operating mode
3290 */
3291 .act_intrvl = CY_ACT_INTRVL_DFLT,
3292 /* change tch_tmout to customize the touch timeout for the
3293 * Active power state for Operating mode
3294 */
3295 .tch_tmout = CY_TCH_TMOUT_DFLT,
3296 /* change lp_intrvl to customize the Low Power power state
3297 * scanning/processing refresh interval for Operating mode
3298 */
3299 .lp_intrvl = CY_LP_INTRVL_DFLT,
3300 .sleep_gpio = -1,
3301 .resout_gpio = -1,
3302 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3303 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303304 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003305 .init = cyttsp_platform_init,
3306};
3307
3308static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3309 .panel_maxx = 1083,
3310 .panel_maxy = 659,
3311 .disp_minx = 30,
3312 .disp_maxx = 1053,
3313 .disp_miny = 30,
3314 .disp_maxy = 629,
3315 .correct_fw_ver = 8,
3316 .fw_fname = "cyttsp_8660_ffa.hex",
3317 .flags = 0x00,
3318 .gen = CY_GEN2, /* or */
3319 .use_st = CY_USE_ST,
3320 .use_mt = CY_USE_MT,
3321 .use_hndshk = CY_SEND_HNDSHK,
3322 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303323 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003324 .use_gestures = CY_USE_GESTURES,
3325 /* activate up to 4 groups
3326 * and set active distance
3327 */
3328 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3329 CY_GEST_GRP3 | CY_GEST_GRP4 |
3330 CY_ACT_DIST,
3331 /* change act_intrvl to customize the Active power state
3332 * scanning/processing refresh interval for Operating mode
3333 */
3334 .act_intrvl = CY_ACT_INTRVL_DFLT,
3335 /* change tch_tmout to customize the touch timeout for the
3336 * Active power state for Operating mode
3337 */
3338 .tch_tmout = CY_TCH_TMOUT_DFLT,
3339 /* change lp_intrvl to customize the Low Power power state
3340 * scanning/processing refresh interval for Operating mode
3341 */
3342 .lp_intrvl = CY_LP_INTRVL_DFLT,
3343 .sleep_gpio = -1,
3344 .resout_gpio = -1,
3345 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3346 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303347 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003348 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303349 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003350};
3351static void cyttsp_set_params(void)
3352{
3353 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3354 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3355 cyttsp_fluid_pdata.panel_maxx = 539;
3356 cyttsp_fluid_pdata.panel_maxy = 994;
3357 cyttsp_fluid_pdata.disp_minx = 30;
3358 cyttsp_fluid_pdata.disp_maxx = 509;
3359 cyttsp_fluid_pdata.disp_miny = 60;
3360 cyttsp_fluid_pdata.disp_maxy = 859;
3361 cyttsp_fluid_pdata.correct_fw_ver = 4;
3362 } else {
3363 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3364 cyttsp_fluid_pdata.panel_maxx = 550;
3365 cyttsp_fluid_pdata.panel_maxy = 1013;
3366 cyttsp_fluid_pdata.disp_minx = 35;
3367 cyttsp_fluid_pdata.disp_maxx = 515;
3368 cyttsp_fluid_pdata.disp_miny = 69;
3369 cyttsp_fluid_pdata.disp_maxy = 869;
3370 cyttsp_fluid_pdata.correct_fw_ver = 5;
3371 }
3372
3373}
3374
3375static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3376 {
3377 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3378 .platform_data = &cyttsp_fluid_pdata,
3379#ifndef CY_USE_TIMER
3380 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3381#endif /* CY_USE_TIMER */
3382 },
3383};
3384
3385static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3386 {
3387 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3388 .platform_data = &cyttsp_tmg240_pdata,
3389#ifndef CY_USE_TIMER
3390 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3391#endif /* CY_USE_TIMER */
3392 },
3393};
3394#endif
3395
3396static struct regulator *vreg_tmg200;
3397
3398#define TS_PEN_IRQ_GPIO 61
3399static int tmg200_power(int vreg_on)
3400{
3401 int rc = -EINVAL;
3402
3403 if (!vreg_tmg200) {
3404 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3405 __func__, rc);
3406 return rc;
3407 }
3408
3409 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3410 regulator_disable(vreg_tmg200);
3411 if (rc < 0)
3412 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3413 __func__, vreg_on ? "enable" : "disable", rc);
3414
3415 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003416 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003417
3418 return rc;
3419}
3420
3421static int tmg200_dev_setup(bool enable)
3422{
3423 int rc;
3424
3425 if (enable) {
3426 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3427 if (IS_ERR(vreg_tmg200)) {
3428 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3429 __func__, PTR_ERR(vreg_tmg200));
3430 rc = PTR_ERR(vreg_tmg200);
3431 return rc;
3432 }
3433
3434 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3435 if (rc) {
3436 pr_err("%s: regulator_set_voltage() = %d\n",
3437 __func__, rc);
3438 goto reg_put;
3439 }
3440 } else {
3441 /* put voltage sources */
3442 regulator_put(vreg_tmg200);
3443 }
3444 return 0;
3445reg_put:
3446 regulator_put(vreg_tmg200);
3447 return rc;
3448}
3449
3450static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3451 .ts_name = "msm_tmg200_ts",
3452 .dis_min_x = 0,
3453 .dis_max_x = 1023,
3454 .dis_min_y = 0,
3455 .dis_max_y = 599,
3456 .min_tid = 0,
3457 .max_tid = 255,
3458 .min_touch = 0,
3459 .max_touch = 255,
3460 .min_width = 0,
3461 .max_width = 255,
3462 .power_on = tmg200_power,
3463 .dev_setup = tmg200_dev_setup,
3464 .nfingers = 2,
3465 .irq_gpio = TS_PEN_IRQ_GPIO,
3466 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3467};
3468
3469static struct i2c_board_info cy8ctmg200_board_info[] = {
3470 {
3471 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3472 .platform_data = &cy8ctmg200_pdata,
3473 }
3474};
3475
Zhang Chang Ken211df572011-07-05 19:16:39 -04003476static struct regulator *vreg_tma340;
3477
3478static int tma340_power(int vreg_on)
3479{
3480 int rc = -EINVAL;
3481
3482 if (!vreg_tma340) {
3483 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3484 __func__, rc);
3485 return rc;
3486 }
3487
3488 rc = vreg_on ? regulator_enable(vreg_tma340) :
3489 regulator_disable(vreg_tma340);
3490 if (rc < 0)
3491 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3492 __func__, vreg_on ? "enable" : "disable", rc);
3493
3494 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003495 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003496
3497 return rc;
3498}
3499
3500static struct kobject *tma340_prop_kobj;
3501
3502static int tma340_dragon_dev_setup(bool enable)
3503{
3504 int rc;
3505
3506 if (enable) {
3507 vreg_tma340 = regulator_get(NULL, "8901_l2");
3508 if (IS_ERR(vreg_tma340)) {
3509 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3510 __func__, PTR_ERR(vreg_tma340));
3511 rc = PTR_ERR(vreg_tma340);
3512 return rc;
3513 }
3514
3515 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3516 if (rc) {
3517 pr_err("%s: regulator_set_voltage() = %d\n",
3518 __func__, rc);
3519 goto reg_put;
3520 }
3521 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3522 tma340_prop_kobj = kobject_create_and_add("board_properties",
3523 NULL);
3524 if (tma340_prop_kobj) {
3525 rc = sysfs_create_group(tma340_prop_kobj,
3526 &tma300_properties_attr_group);
3527 if (rc) {
3528 kobject_put(tma340_prop_kobj);
3529 pr_err("%s: failed to create board_properties\n",
3530 __func__);
3531 goto reg_put;
3532 }
3533 }
3534
3535 } else {
3536 /* put voltage sources */
3537 regulator_put(vreg_tma340);
3538 /* destroy virtual keys */
3539 if (tma340_prop_kobj) {
3540 sysfs_remove_group(tma340_prop_kobj,
3541 &tma300_properties_attr_group);
3542 kobject_put(tma340_prop_kobj);
3543 }
3544 }
3545 return 0;
3546reg_put:
3547 regulator_put(vreg_tma340);
3548 return rc;
3549}
3550
3551
3552static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3553 .ts_name = "cy8ctma340",
3554 .dis_min_x = 0,
3555 .dis_max_x = 479,
3556 .dis_min_y = 0,
3557 .dis_max_y = 799,
3558 .min_tid = 0,
3559 .max_tid = 255,
3560 .min_touch = 0,
3561 .max_touch = 255,
3562 .min_width = 0,
3563 .max_width = 255,
3564 .power_on = tma340_power,
3565 .dev_setup = tma340_dragon_dev_setup,
3566 .nfingers = 2,
3567 .irq_gpio = TS_PEN_IRQ_GPIO,
3568 .resout_gpio = -1,
3569};
3570
3571static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3572 {
3573 I2C_BOARD_INFO("cy8ctma340", 0x24),
3574 .platform_data = &cy8ctma340_dragon_pdata,
3575 }
3576};
3577
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003578#ifdef CONFIG_SERIAL_MSM_HS
3579static int configure_uart_gpios(int on)
3580{
3581 int ret = 0, i;
3582 int uart_gpios[] = {53, 54, 55, 56};
3583 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3584 if (on) {
3585 ret = msm_gpiomux_get(uart_gpios[i]);
3586 if (unlikely(ret))
3587 break;
3588 } else {
3589 ret = msm_gpiomux_put(uart_gpios[i]);
3590 if (unlikely(ret))
3591 return ret;
3592 }
3593 }
3594 if (ret)
3595 for (; i >= 0; i--)
3596 msm_gpiomux_put(uart_gpios[i]);
3597 return ret;
3598}
3599static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3600 .inject_rx_on_wakeup = 1,
3601 .rx_to_inject = 0xFD,
3602 .gpio_config = configure_uart_gpios,
3603};
3604#endif
3605
3606
3607#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3608
3609static struct gpio_led gpio_exp_leds_config[] = {
3610 {
3611 .name = "left_led1:green",
3612 .gpio = GPIO_LEFT_LED_1,
3613 .active_low = 1,
3614 .retain_state_suspended = 0,
3615 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3616 },
3617 {
3618 .name = "left_led2:red",
3619 .gpio = GPIO_LEFT_LED_2,
3620 .active_low = 1,
3621 .retain_state_suspended = 0,
3622 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3623 },
3624 {
3625 .name = "left_led3:green",
3626 .gpio = GPIO_LEFT_LED_3,
3627 .active_low = 1,
3628 .retain_state_suspended = 0,
3629 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3630 },
3631 {
3632 .name = "wlan_led:orange",
3633 .gpio = GPIO_LEFT_LED_WLAN,
3634 .active_low = 1,
3635 .retain_state_suspended = 0,
3636 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3637 },
3638 {
3639 .name = "left_led5:green",
3640 .gpio = GPIO_LEFT_LED_5,
3641 .active_low = 1,
3642 .retain_state_suspended = 0,
3643 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3644 },
3645 {
3646 .name = "right_led1:green",
3647 .gpio = GPIO_RIGHT_LED_1,
3648 .active_low = 1,
3649 .retain_state_suspended = 0,
3650 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3651 },
3652 {
3653 .name = "right_led2:red",
3654 .gpio = GPIO_RIGHT_LED_2,
3655 .active_low = 1,
3656 .retain_state_suspended = 0,
3657 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3658 },
3659 {
3660 .name = "right_led3:green",
3661 .gpio = GPIO_RIGHT_LED_3,
3662 .active_low = 1,
3663 .retain_state_suspended = 0,
3664 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3665 },
3666 {
3667 .name = "bt_led:blue",
3668 .gpio = GPIO_RIGHT_LED_BT,
3669 .active_low = 1,
3670 .retain_state_suspended = 0,
3671 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3672 },
3673 {
3674 .name = "right_led5:green",
3675 .gpio = GPIO_RIGHT_LED_5,
3676 .active_low = 1,
3677 .retain_state_suspended = 0,
3678 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3679 },
3680};
3681
3682static struct gpio_led_platform_data gpio_leds_pdata = {
3683 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3684 .leds = gpio_exp_leds_config,
3685};
3686
3687static struct platform_device gpio_leds = {
3688 .name = "leds-gpio",
3689 .id = -1,
3690 .dev = {
3691 .platform_data = &gpio_leds_pdata,
3692 },
3693};
3694
3695static struct gpio_led fluid_gpio_leds[] = {
3696 {
3697 .name = "dual_led:green",
3698 .gpio = GPIO_LED1_GREEN_N,
3699 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3700 .active_low = 1,
3701 .retain_state_suspended = 0,
3702 },
3703 {
3704 .name = "dual_led:red",
3705 .gpio = GPIO_LED2_RED_N,
3706 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3707 .active_low = 1,
3708 .retain_state_suspended = 0,
3709 },
3710};
3711
3712static struct gpio_led_platform_data gpio_led_pdata = {
3713 .leds = fluid_gpio_leds,
3714 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3715};
3716
3717static struct platform_device fluid_leds_gpio = {
3718 .name = "leds-gpio",
3719 .id = -1,
3720 .dev = {
3721 .platform_data = &gpio_led_pdata,
3722 },
3723};
3724
3725#endif
3726
3727#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3728
3729static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3730 .phys_addr_base = 0x00106000,
3731 .reg_offsets = {
3732 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3733 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3734 },
3735 .phys_size = SZ_8K,
3736 .log_len = 4096, /* log's buffer length in bytes */
3737 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3738};
3739
3740static struct platform_device msm_rpm_log_device = {
3741 .name = "msm_rpm_log",
3742 .id = -1,
3743 .dev = {
3744 .platform_data = &msm_rpm_log_pdata,
3745 },
3746};
3747#endif
3748
3749#ifdef CONFIG_BATTERY_MSM8X60
3750static struct msm_charger_platform_data msm_charger_data = {
3751 .safety_time = 180,
3752 .update_time = 1,
3753 .max_voltage = 4200,
3754 .min_voltage = 3200,
3755};
3756
3757static struct platform_device msm_charger_device = {
3758 .name = "msm-charger",
3759 .id = -1,
3760 .dev = {
3761 .platform_data = &msm_charger_data,
3762 }
3763};
3764#endif
3765
3766/*
3767 * Consumer specific regulator names:
3768 * regulator name consumer dev_name
3769 */
3770static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3771 REGULATOR_SUPPLY("8058_l0", NULL),
3772};
3773static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3774 REGULATOR_SUPPLY("8058_l1", NULL),
3775};
3776static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3777 REGULATOR_SUPPLY("8058_l2", NULL),
3778};
3779static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3780 REGULATOR_SUPPLY("8058_l3", NULL),
3781};
3782static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3783 REGULATOR_SUPPLY("8058_l4", NULL),
3784};
3785static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3786 REGULATOR_SUPPLY("8058_l5", NULL),
3787};
3788static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3789 REGULATOR_SUPPLY("8058_l6", NULL),
3790};
3791static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3792 REGULATOR_SUPPLY("8058_l7", NULL),
3793};
3794static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3795 REGULATOR_SUPPLY("8058_l8", NULL),
3796};
3797static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3798 REGULATOR_SUPPLY("8058_l9", NULL),
3799};
3800static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3801 REGULATOR_SUPPLY("8058_l10", NULL),
3802};
3803static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3804 REGULATOR_SUPPLY("8058_l11", NULL),
3805};
3806static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3807 REGULATOR_SUPPLY("8058_l12", NULL),
3808};
3809static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3810 REGULATOR_SUPPLY("8058_l13", NULL),
3811};
3812static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3813 REGULATOR_SUPPLY("8058_l14", NULL),
3814};
3815static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3816 REGULATOR_SUPPLY("8058_l15", NULL),
3817};
3818static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3819 REGULATOR_SUPPLY("8058_l16", NULL),
3820};
3821static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3822 REGULATOR_SUPPLY("8058_l17", NULL),
3823};
3824static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3825 REGULATOR_SUPPLY("8058_l18", NULL),
3826};
3827static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3828 REGULATOR_SUPPLY("8058_l19", NULL),
3829};
3830static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3831 REGULATOR_SUPPLY("8058_l20", NULL),
3832};
3833static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3834 REGULATOR_SUPPLY("8058_l21", NULL),
3835};
3836static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3837 REGULATOR_SUPPLY("8058_l22", NULL),
3838};
3839static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3840 REGULATOR_SUPPLY("8058_l23", NULL),
3841};
3842static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3843 REGULATOR_SUPPLY("8058_l24", NULL),
3844};
3845static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3846 REGULATOR_SUPPLY("8058_l25", NULL),
3847};
3848static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3849 REGULATOR_SUPPLY("8058_s0", NULL),
3850};
3851static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3852 REGULATOR_SUPPLY("8058_s1", NULL),
3853};
3854static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3855 REGULATOR_SUPPLY("8058_s2", NULL),
3856};
3857static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3858 REGULATOR_SUPPLY("8058_s3", NULL),
3859};
3860static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3861 REGULATOR_SUPPLY("8058_s4", NULL),
3862};
3863static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3864 REGULATOR_SUPPLY("8058_lvs0", NULL),
3865};
3866static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3867 REGULATOR_SUPPLY("8058_lvs1", NULL),
3868};
3869static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3870 REGULATOR_SUPPLY("8058_ncp", NULL),
3871};
3872
3873static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3874 REGULATOR_SUPPLY("8901_l0", NULL),
3875};
3876static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3877 REGULATOR_SUPPLY("8901_l1", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3880 REGULATOR_SUPPLY("8901_l2", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3883 REGULATOR_SUPPLY("8901_l3", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3886 REGULATOR_SUPPLY("8901_l4", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3889 REGULATOR_SUPPLY("8901_l5", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3892 REGULATOR_SUPPLY("8901_l6", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3895 REGULATOR_SUPPLY("8901_s2", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3898 REGULATOR_SUPPLY("8901_s3", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3901 REGULATOR_SUPPLY("8901_s4", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3904 REGULATOR_SUPPLY("8901_lvs0", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3907 REGULATOR_SUPPLY("8901_lvs1", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3910 REGULATOR_SUPPLY("8901_lvs2", NULL),
3911};
3912static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3913 REGULATOR_SUPPLY("8901_lvs3", NULL),
3914};
3915static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3916 REGULATOR_SUPPLY("8901_mvs0", NULL),
3917};
3918
David Collins6f032ba2011-08-31 14:08:15 -07003919/* Pin control regulators */
3920static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3921 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3922};
3923static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3924 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3925};
3926static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3927 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3928};
3929static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3930 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3931};
3932static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3933 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3934};
3935static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3936 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3937};
3938
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003939#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3940 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003941 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003942 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003943 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003944 .init_data = { \
3945 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003946 .valid_modes_mask = _modes, \
3947 .valid_ops_mask = _ops, \
3948 .min_uV = _min_uV, \
3949 .max_uV = _max_uV, \
3950 .input_uV = _min_uV, \
3951 .apply_uV = _apply_uV, \
3952 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003953 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003954 .consumer_supplies = vreg_consumers_##_id, \
3955 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003956 ARRAY_SIZE(vreg_consumers_##_id), \
3957 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003958 .id = RPM_VREG_ID_##_id, \
3959 .default_uV = _default_uV, \
3960 .peak_uA = _peak_uA, \
3961 .avg_uA = _avg_uA, \
3962 .pull_down_enable = _pull_down, \
3963 .pin_ctrl = _pin_ctrl, \
3964 .freq = RPM_VREG_FREQ_##_freq, \
3965 .pin_fn = _pin_fn, \
3966 .force_mode = _force_mode, \
3967 .state = _state, \
3968 .sleep_selectable = _sleep_selectable, \
3969 }
3970
3971/* Pin control initialization */
3972#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3973 { \
3974 .init_data = { \
3975 .constraints = { \
3976 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3977 .always_on = _always_on, \
3978 }, \
3979 .num_consumer_supplies = \
3980 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3981 .consumer_supplies = vreg_consumers_##_id##_PC, \
3982 }, \
3983 .id = RPM_VREG_ID_##_id##_PC, \
3984 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003985 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003986 }
3987
3988/*
3989 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3990 * via the peak_uA value specified in the table below. If the value is less
3991 * than the high power min threshold for the regulator, then the regulator will
3992 * be set to LPM. Otherwise, it will be set to HPM.
3993 *
3994 * This value can be further overridden by specifying an initial mode via
3995 * .init_data.constraints.initial_mode.
3996 */
3997
David Collins6f032ba2011-08-31 14:08:15 -07003998#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
3999 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004000 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4001 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4002 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4003 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4004 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004005 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4006 RPM_VREG_PIN_FN_8660_ENABLE, \
4007 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004008 _sleep_selectable, _always_on)
4009
David Collins6f032ba2011-08-31 14:08:15 -07004010#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4011 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004012 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4013 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4014 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4015 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4016 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004017 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4018 RPM_VREG_PIN_FN_8660_ENABLE, \
4019 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4020 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004021
David Collins6f032ba2011-08-31 14:08:15 -07004022#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4024 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004025 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4026 RPM_VREG_PIN_FN_8660_ENABLE, \
4027 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4028 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004029
David Collins6f032ba2011-08-31 14:08:15 -07004030#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4032 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004033 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4034 RPM_VREG_PIN_FN_8660_ENABLE, \
4035 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4036 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004037
David Collins6f032ba2011-08-31 14:08:15 -07004038#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4039#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4040#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4041#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4042#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004043
David Collins6f032ba2011-08-31 14:08:15 -07004044/* RPM early regulator constraints */
4045static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4046 /* ID a_on pd ss min_uV max_uV init_ip freq */
4047 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4048 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004049};
4050
David Collins6f032ba2011-08-31 14:08:15 -07004051/* RPM regulator constraints */
4052static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4053 /* ID a_on pd ss min_uV max_uV init_ip */
4054 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4055 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4056 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4057 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4058 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4059 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4060 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4061 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4062 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4063 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4064 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4065 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4066 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4067 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4068 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4069 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4070 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4071 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4072 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4073 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4074 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4075 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4076 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4077 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4078 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4079 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004080
David Collins6f032ba2011-08-31 14:08:15 -07004081 /* ID a_on pd ss min_uV max_uV init_ip freq */
4082 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4083 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4084 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4085
4086 /* ID a_on pd ss */
4087 RPM_VS(PM8058_LVS0, 0, 1, 0),
4088 RPM_VS(PM8058_LVS1, 0, 1, 0),
4089
4090 /* ID a_on pd ss min_uV max_uV */
4091 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4092
4093 /* ID a_on pd ss min_uV max_uV init_ip */
4094 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4095 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4096 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4097 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4099 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4100 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4101
4102 /* ID a_on pd ss min_uV max_uV init_ip freq */
4103 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4104 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4105 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4106
4107 /* ID a_on pd ss */
4108 RPM_VS(PM8901_LVS0, 1, 1, 0),
4109 RPM_VS(PM8901_LVS1, 0, 1, 0),
4110 RPM_VS(PM8901_LVS2, 0, 1, 0),
4111 RPM_VS(PM8901_LVS3, 0, 1, 0),
4112 RPM_VS(PM8901_MVS0, 0, 1, 0),
4113
4114 /* ID a_on pin_func pin_ctrl */
4115 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4116 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4117 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4119 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4120 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4121};
4122
4123static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4124 .init_data = rpm_regulator_early_init_data,
4125 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4126 .version = RPM_VREG_VERSION_8660,
4127 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4128 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4129};
4130
4131static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4132 .init_data = rpm_regulator_init_data,
4133 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4134 .version = RPM_VREG_VERSION_8660,
4135};
4136
4137static struct platform_device rpm_regulator_early_device = {
4138 .name = "rpm-regulator",
4139 .id = 0,
4140 .dev = {
4141 .platform_data = &rpm_regulator_early_pdata,
4142 },
4143};
4144
4145static struct platform_device rpm_regulator_device = {
4146 .name = "rpm-regulator",
4147 .id = 1,
4148 .dev = {
4149 .platform_data = &rpm_regulator_pdata,
4150 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004151};
4152
4153static struct platform_device *early_regulators[] __initdata = {
4154 &msm_device_saw_s0,
4155 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004156 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004157};
4158
4159static struct platform_device *early_devices[] __initdata = {
4160#ifdef CONFIG_MSM_BUS_SCALING
4161 &msm_bus_apps_fabric,
4162 &msm_bus_sys_fabric,
4163 &msm_bus_mm_fabric,
4164 &msm_bus_sys_fpb,
4165 &msm_bus_cpss_fpb,
4166#endif
4167 &msm_device_dmov_adm0,
4168 &msm_device_dmov_adm1,
4169};
4170
4171#if (defined(CONFIG_MARIMBA_CORE)) && \
4172 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4173
4174static int bluetooth_power(int);
4175static struct platform_device msm_bt_power_device = {
4176 .name = "bt_power",
4177 .id = -1,
4178 .dev = {
4179 .platform_data = &bluetooth_power,
4180 },
4181};
4182#endif
4183
4184static struct platform_device msm_tsens_device = {
4185 .name = "tsens-tm",
4186 .id = -1,
4187};
4188
4189static struct platform_device *rumi_sim_devices[] __initdata = {
4190 &smc91x_device,
4191 &msm_device_uart_dm12,
4192#ifdef CONFIG_I2C_QUP
4193 &msm_gsbi3_qup_i2c_device,
4194 &msm_gsbi4_qup_i2c_device,
4195 &msm_gsbi7_qup_i2c_device,
4196 &msm_gsbi8_qup_i2c_device,
4197 &msm_gsbi9_qup_i2c_device,
4198 &msm_gsbi12_qup_i2c_device,
4199#endif
4200#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004201 &msm_device_ssbi3,
4202#endif
4203#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004204#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205 &android_pmem_device,
4206 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004207 &android_pmem_smipool_device,
4208#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004209 &android_pmem_audio_device,
4210#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004211#ifdef CONFIG_MSM_ROTATOR
4212 &msm_rotator_device,
4213#endif
4214 &msm_fb_device,
4215 &msm_kgsl_3d0,
4216 &msm_kgsl_2d0,
4217 &msm_kgsl_2d1,
4218 &lcdc_samsung_panel_device,
4219#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4220 &hdmi_msm_device,
4221#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4222#ifdef CONFIG_MSM_CAMERA
4223#ifdef CONFIG_MT9E013
4224 &msm_camera_sensor_mt9e013,
4225#endif
4226#ifdef CONFIG_IMX074
4227 &msm_camera_sensor_imx074,
4228#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004229#ifdef CONFIG_VX6953
4230 &msm_camera_sensor_vx6953,
4231#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004232#ifdef CONFIG_WEBCAM_OV7692
4233 &msm_camera_sensor_webcam_ov7692,
4234#endif
4235#ifdef CONFIG_WEBCAM_OV9726
4236 &msm_camera_sensor_webcam_ov9726,
4237#endif
4238#ifdef CONFIG_QS_S5K4E1
4239 &msm_camera_sensor_qs_s5k4e1,
4240#endif
4241#endif
4242#ifdef CONFIG_MSM_GEMINI
4243 &msm_gemini_device,
4244#endif
4245#ifdef CONFIG_MSM_VPE
4246 &msm_vpe_device,
4247#endif
4248 &msm_device_vidc,
4249};
4250
4251#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4252enum {
4253 SX150X_CORE,
4254 SX150X_DOCKING,
4255 SX150X_SURF,
4256 SX150X_LEFT_FHA,
4257 SX150X_RIGHT_FHA,
4258 SX150X_SOUTH,
4259 SX150X_NORTH,
4260 SX150X_CORE_FLUID,
4261};
4262
4263static struct sx150x_platform_data sx150x_data[] __initdata = {
4264 [SX150X_CORE] = {
4265 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4266 .oscio_is_gpo = false,
4267 .io_pullup_ena = 0x0c08,
4268 .io_pulldn_ena = 0x4060,
4269 .io_open_drain_ena = 0x000c,
4270 .io_polarity = 0,
4271 .irq_summary = -1, /* see fixup_i2c_configs() */
4272 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4273 },
4274 [SX150X_DOCKING] = {
4275 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4276 .oscio_is_gpo = false,
4277 .io_pullup_ena = 0x5e06,
4278 .io_pulldn_ena = 0x81b8,
4279 .io_open_drain_ena = 0,
4280 .io_polarity = 0,
4281 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4282 UI_INT2_N),
4283 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4284 GPIO_DOCKING_EXPANDER_BASE -
4285 GPIO_EXPANDER_GPIO_BASE,
4286 },
4287 [SX150X_SURF] = {
4288 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4289 .oscio_is_gpo = false,
4290 .io_pullup_ena = 0,
4291 .io_pulldn_ena = 0,
4292 .io_open_drain_ena = 0,
4293 .io_polarity = 0,
4294 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4295 UI_INT1_N),
4296 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4297 GPIO_SURF_EXPANDER_BASE -
4298 GPIO_EXPANDER_GPIO_BASE,
4299 },
4300 [SX150X_LEFT_FHA] = {
4301 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4302 .oscio_is_gpo = false,
4303 .io_pullup_ena = 0,
4304 .io_pulldn_ena = 0x40,
4305 .io_open_drain_ena = 0,
4306 .io_polarity = 0,
4307 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4308 UI_INT3_N),
4309 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4310 GPIO_LEFT_KB_EXPANDER_BASE -
4311 GPIO_EXPANDER_GPIO_BASE,
4312 },
4313 [SX150X_RIGHT_FHA] = {
4314 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4315 .oscio_is_gpo = true,
4316 .io_pullup_ena = 0,
4317 .io_pulldn_ena = 0,
4318 .io_open_drain_ena = 0,
4319 .io_polarity = 0,
4320 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4321 UI_INT3_N),
4322 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4323 GPIO_RIGHT_KB_EXPANDER_BASE -
4324 GPIO_EXPANDER_GPIO_BASE,
4325 },
4326 [SX150X_SOUTH] = {
4327 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4328 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4329 GPIO_SOUTH_EXPANDER_BASE -
4330 GPIO_EXPANDER_GPIO_BASE,
4331 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4332 },
4333 [SX150X_NORTH] = {
4334 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4335 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4336 GPIO_NORTH_EXPANDER_BASE -
4337 GPIO_EXPANDER_GPIO_BASE,
4338 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4339 .oscio_is_gpo = true,
4340 .io_open_drain_ena = 0x30,
4341 },
4342 [SX150X_CORE_FLUID] = {
4343 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4344 .oscio_is_gpo = false,
4345 .io_pullup_ena = 0x0408,
4346 .io_pulldn_ena = 0x4060,
4347 .io_open_drain_ena = 0x0008,
4348 .io_polarity = 0,
4349 .irq_summary = -1, /* see fixup_i2c_configs() */
4350 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4351 },
4352};
4353
4354#ifdef CONFIG_SENSORS_MSM_ADC
4355/* Configuration of EPM expander is done when client
4356 * request an adc read
4357 */
4358static struct sx150x_platform_data sx150x_epmdata = {
4359 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4360 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4361 GPIO_EPM_EXPANDER_BASE -
4362 GPIO_EXPANDER_GPIO_BASE,
4363 .irq_summary = -1,
4364};
4365#endif
4366
4367/* sx150x_low_power_cfg
4368 *
4369 * This data and init function are used to put unused gpio-expander output
4370 * lines into their low-power states at boot. The init
4371 * function must be deferred until a later init stage because the i2c
4372 * gpio expander drivers do not probe until after they are registered
4373 * (see register_i2c_devices) and the work-queues for those registrations
4374 * are processed. Because these lines are unused, there is no risk of
4375 * competing with a device driver for the gpio.
4376 *
4377 * gpio lines whose low-power states are input are naturally in their low-
4378 * power configurations once probed, see the platform data structures above.
4379 */
4380struct sx150x_low_power_cfg {
4381 unsigned gpio;
4382 unsigned val;
4383};
4384
4385static struct sx150x_low_power_cfg
4386common_sx150x_lp_cfgs[] __initdata = {
4387 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4388 {GPIO_EXT_GPS_LNA_EN, 0},
4389 {GPIO_MSM_WAKES_BT, 0},
4390 {GPIO_USB_UICC_EN, 0},
4391 {GPIO_BATT_GAUGE_EN, 0},
4392};
4393
4394static struct sx150x_low_power_cfg
4395surf_ffa_sx150x_lp_cfgs[] __initdata = {
4396 {GPIO_MIPI_DSI_RST_N, 0},
4397 {GPIO_DONGLE_PWR_EN, 0},
4398 {GPIO_CAP_TS_SLEEP, 1},
4399 {GPIO_WEB_CAMIF_RESET_N, 0},
4400};
4401
4402static void __init
4403cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4404{
4405 unsigned n;
4406 int rc;
4407
4408 for (n = 0; n < nelems; ++n) {
4409 rc = gpio_request(cfgs[n].gpio, NULL);
4410 if (!rc) {
4411 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4412 gpio_free(cfgs[n].gpio);
4413 }
4414
4415 if (rc) {
4416 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4417 __func__, cfgs[n].gpio, rc);
4418 }
Steve Muckle9161d302010-02-11 11:50:40 -08004419 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004420}
4421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004422static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004423{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004424 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4425 ARRAY_SIZE(common_sx150x_lp_cfgs));
4426 if (!machine_is_msm8x60_fluid())
4427 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4428 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4429 return 0;
4430}
4431module_init(cfg_sx150xs_low_power);
4432
4433#ifdef CONFIG_I2C
4434static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4435 {
4436 I2C_BOARD_INFO("sx1509q", 0x3e),
4437 .platform_data = &sx150x_data[SX150X_CORE]
4438 },
4439};
4440
4441static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4442 {
4443 I2C_BOARD_INFO("sx1509q", 0x3f),
4444 .platform_data = &sx150x_data[SX150X_DOCKING]
4445 },
4446};
4447
4448static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4449 {
4450 I2C_BOARD_INFO("sx1509q", 0x70),
4451 .platform_data = &sx150x_data[SX150X_SURF]
4452 }
4453};
4454
4455static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4456 {
4457 I2C_BOARD_INFO("sx1508q", 0x21),
4458 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4459 },
4460 {
4461 I2C_BOARD_INFO("sx1508q", 0x22),
4462 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4463 }
4464};
4465
4466static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4467 {
4468 I2C_BOARD_INFO("sx1508q", 0x23),
4469 .platform_data = &sx150x_data[SX150X_SOUTH]
4470 },
4471 {
4472 I2C_BOARD_INFO("sx1508q", 0x20),
4473 .platform_data = &sx150x_data[SX150X_NORTH]
4474 }
4475};
4476
4477static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4478 {
4479 I2C_BOARD_INFO("sx1509q", 0x3e),
4480 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4481 },
4482};
4483
4484#ifdef CONFIG_SENSORS_MSM_ADC
4485static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4486 {
4487 I2C_BOARD_INFO("sx1509q", 0x3e),
4488 .platform_data = &sx150x_epmdata
4489 },
4490};
4491#endif
4492#endif
4493#endif
4494
4495#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004496
4497static struct adc_access_fn xoadc_fn = {
4498 pm8058_xoadc_select_chan_and_start_conv,
4499 pm8058_xoadc_read_adc_code,
4500 pm8058_xoadc_get_properties,
4501 pm8058_xoadc_slot_request,
4502 pm8058_xoadc_restore_slot,
4503 pm8058_xoadc_calibrate,
4504};
4505
4506#if defined(CONFIG_I2C) && \
4507 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4508static struct regulator *vreg_adc_epm1;
4509
4510static struct i2c_client *epm_expander_i2c_register_board(void)
4511
4512{
4513 struct i2c_adapter *i2c_adap;
4514 struct i2c_client *client = NULL;
4515 i2c_adap = i2c_get_adapter(0x0);
4516
4517 if (i2c_adap == NULL)
4518 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4519
4520 if (i2c_adap != NULL)
4521 client = i2c_new_device(i2c_adap,
4522 &fluid_expanders_i2c_epm_info[0]);
4523 return client;
4524
4525}
4526
4527static unsigned int msm_adc_gpio_configure_expander_enable(void)
4528{
4529 int rc = 0;
4530 static struct i2c_client *epm_i2c_client;
4531
4532 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4533
4534 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4535
4536 if (IS_ERR(vreg_adc_epm1)) {
4537 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4538 return 0;
4539 }
4540
4541 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4542 if (rc)
4543 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4544 "regulator set voltage failed\n");
4545
4546 rc = regulator_enable(vreg_adc_epm1);
4547 if (rc) {
4548 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4549 "Error while enabling regulator for epm s3 %d\n", rc);
4550 return rc;
4551 }
4552
4553 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4554 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4555
4556 msleep(1000);
4557
4558 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4559 if (!rc) {
4560 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4561 "Configure 5v boost\n");
4562 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4563 } else {
4564 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4565 "Error for epm 5v boost en\n");
4566 goto exit_vreg_epm;
4567 }
4568
4569 msleep(500);
4570
4571 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4572 if (!rc) {
4573 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4574 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4575 "Configure epm 3.3v\n");
4576 } else {
4577 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4578 "Error for gpio 3.3ven\n");
4579 goto exit_vreg_epm;
4580 }
4581 msleep(500);
4582
4583 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4584 "Trying to request EPM LVLSFT_EN\n");
4585 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4586 if (!rc) {
4587 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4588 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4589 "Configure the lvlsft\n");
4590 } else {
4591 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4592 "Error for epm lvlsft_en\n");
4593 goto exit_vreg_epm;
4594 }
4595
4596 msleep(500);
4597
4598 if (!epm_i2c_client)
4599 epm_i2c_client = epm_expander_i2c_register_board();
4600
4601 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4602 if (!rc)
4603 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4604 if (rc) {
4605 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4606 ": GPIO PWR MON Enable issue\n");
4607 goto exit_vreg_epm;
4608 }
4609
4610 msleep(1000);
4611
4612 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4613 if (!rc) {
4614 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4615 if (rc) {
4616 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4617 ": ADC1_PWDN error direction out\n");
4618 goto exit_vreg_epm;
4619 }
4620 }
4621
4622 msleep(100);
4623
4624 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4625 if (!rc) {
4626 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4627 if (rc) {
4628 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4629 ": ADC2_PWD error direction out\n");
4630 goto exit_vreg_epm;
4631 }
4632 }
4633
4634 msleep(1000);
4635
4636 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4637 if (!rc) {
4638 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4639 if (rc) {
4640 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4641 "Gpio request problem %d\n", rc);
4642 goto exit_vreg_epm;
4643 }
4644 }
4645
4646 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4647 if (!rc) {
4648 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4649 if (rc) {
4650 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4651 ": EPM_SPI_ADC1_CS_N error\n");
4652 goto exit_vreg_epm;
4653 }
4654 }
4655
4656 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4657 if (!rc) {
4658 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4659 if (rc) {
4660 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4661 ": EPM_SPI_ADC2_Cs_N error\n");
4662 goto exit_vreg_epm;
4663 }
4664 }
4665
4666 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4667 "the power monitor reset for epm\n");
4668
4669 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4670 if (!rc) {
4671 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4672 if (rc) {
4673 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4674 ": Error in the power mon reset\n");
4675 goto exit_vreg_epm;
4676 }
4677 }
4678
4679 msleep(1000);
4680
4681 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4682
4683 msleep(500);
4684
4685 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4686
4687 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4688
4689 return rc;
4690
4691exit_vreg_epm:
4692 regulator_disable(vreg_adc_epm1);
4693
4694 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4695 " rc = %d.\n", rc);
4696 return rc;
4697};
4698
4699static unsigned int msm_adc_gpio_configure_expander_disable(void)
4700{
4701 int rc = 0;
4702
4703 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4704 gpio_free(GPIO_PWR_MON_RESET_N);
4705
4706 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4707 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4708
4709 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4710 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4711
4712 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4713 gpio_free(GPIO_PWR_MON_START);
4714
4715 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4716 gpio_free(GPIO_ADC1_PWDN_N);
4717
4718 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4719 gpio_free(GPIO_ADC2_PWDN_N);
4720
4721 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4722 gpio_free(GPIO_PWR_MON_ENABLE);
4723
4724 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4725 gpio_free(GPIO_EPM_LVLSFT_EN);
4726
4727 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4728 gpio_free(GPIO_EPM_5V_BOOST_EN);
4729
4730 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4731 gpio_free(GPIO_EPM_3_3V_EN);
4732
4733 rc = regulator_disable(vreg_adc_epm1);
4734 if (rc)
4735 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4736 "Error while enabling regulator for epm s3 %d\n", rc);
4737 regulator_put(vreg_adc_epm1);
4738
4739 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4740 return rc;
4741};
4742
4743unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4744{
4745 int rc = 0;
4746
4747 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4748 cs_enable);
4749
4750 if (cs_enable < 16) {
4751 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4752 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4753 } else {
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4755 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4756 }
4757 return rc;
4758};
4759
4760unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4761{
4762 int rc = 0;
4763
4764 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4765
4766 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4767
4768 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4769
4770 return rc;
4771};
4772#endif
4773
4774static struct msm_adc_channels msm_adc_channels_data[] = {
4775 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4776 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4777 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4778 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4779 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4780 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4781 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4782 CHAN_PATH_TYPE4,
4783 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4784 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4785 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4786 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4787 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4788 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4789 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4790 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4791 CHAN_PATH_TYPE12,
4792 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4793 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4794 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4795 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4796 CHAN_PATH_TYPE_NONE,
4797 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4798 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4799 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4800 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4802 scale_xtern_chgr_cur},
4803 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4804 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4805 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4807 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4808 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4809 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4810 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4811 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4812 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4813 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4814 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4815};
4816
4817static char *msm_adc_fluid_device_names[] = {
4818 "ADS_ADC1",
4819 "ADS_ADC2",
4820};
4821
4822static struct msm_adc_platform_data msm_adc_pdata = {
4823 .channel = msm_adc_channels_data,
4824 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4825#if defined(CONFIG_I2C) && \
4826 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4827 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4828 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4829 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4830 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4831#endif
4832};
4833
4834static struct platform_device msm_adc_device = {
4835 .name = "msm_adc",
4836 .id = -1,
4837 .dev = {
4838 .platform_data = &msm_adc_pdata,
4839 },
4840};
4841
4842static void pmic8058_xoadc_mpp_config(void)
4843{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304844 int rc, i;
4845 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304846 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304847 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304848 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304849 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304850 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304851 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304852 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304853 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304854 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304856 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4857 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304858 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004859
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304860 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4861 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4862 &xoadc_mpps[i].config);
4863 if (rc) {
4864 pr_err("%s: Config MPP %d of PM8058 failed\n",
4865 __func__, xoadc_mpps[i].mpp);
4866 }
4867 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004868}
4869
4870static struct regulator *vreg_ldo18_adc;
4871
4872static int pmic8058_xoadc_vreg_config(int on)
4873{
4874 int rc;
4875
4876 if (on) {
4877 rc = regulator_enable(vreg_ldo18_adc);
4878 if (rc)
4879 pr_err("%s: Enable of regulator ldo18_adc "
4880 "failed\n", __func__);
4881 } else {
4882 rc = regulator_disable(vreg_ldo18_adc);
4883 if (rc)
4884 pr_err("%s: Disable of regulator ldo18_adc "
4885 "failed\n", __func__);
4886 }
4887
4888 return rc;
4889}
4890
4891static int pmic8058_xoadc_vreg_setup(void)
4892{
4893 int rc;
4894
4895 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4896 if (IS_ERR(vreg_ldo18_adc)) {
4897 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4898 __func__, PTR_ERR(vreg_ldo18_adc));
4899 rc = PTR_ERR(vreg_ldo18_adc);
4900 goto fail;
4901 }
4902
4903 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4904 if (rc) {
4905 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4906 goto fail;
4907 }
4908
4909 return rc;
4910fail:
4911 regulator_put(vreg_ldo18_adc);
4912 return rc;
4913}
4914
4915static void pmic8058_xoadc_vreg_shutdown(void)
4916{
4917 regulator_put(vreg_ldo18_adc);
4918}
4919
4920/* usec. For this ADC,
4921 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4922 * Each channel has different configuration, thus at the time of starting
4923 * the conversion, xoadc will return actual conversion time
4924 * */
4925static struct adc_properties pm8058_xoadc_data = {
4926 .adc_reference = 2200, /* milli-voltage for this adc */
4927 .bitresolution = 15,
4928 .bipolar = 0,
4929 .conversiontime = 54,
4930};
4931
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304932static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004933 .xoadc_prop = &pm8058_xoadc_data,
4934 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4935 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4936 .xoadc_num = XOADC_PMIC_0,
4937 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4938 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4939};
4940#endif
4941
4942#ifdef CONFIG_MSM_SDIO_AL
4943
4944static unsigned mdm2ap_status = 140;
4945
4946static int configure_mdm2ap_status(int on)
4947{
4948 int ret = 0;
4949 if (on)
4950 ret = msm_gpiomux_get(mdm2ap_status);
4951 else
4952 ret = msm_gpiomux_put(mdm2ap_status);
4953
4954 if (ret)
4955 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4956 on);
4957
4958 return ret;
4959}
4960
4961
4962static int get_mdm2ap_status(void)
4963{
4964 return gpio_get_value(mdm2ap_status);
4965}
4966
4967static struct sdio_al_platform_data sdio_al_pdata = {
4968 .config_mdm2ap_status = configure_mdm2ap_status,
4969 .get_mdm2ap_status = get_mdm2ap_status,
4970 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004971 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004972 .peer_sdioc_version_major = 0x0004,
4973 .peer_sdioc_boot_version_minor = 0x0001,
4974 .peer_sdioc_boot_version_major = 0x0003
4975};
4976
4977struct platform_device msm_device_sdio_al = {
4978 .name = "msm_sdio_al",
4979 .id = -1,
4980 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004981 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004982 .platform_data = &sdio_al_pdata,
4983 },
4984};
4985
4986#endif /* CONFIG_MSM_SDIO_AL */
4987
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304988#define GPIO_VREG_ID_EXT_5V 0
4989
4990static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4991 REGULATOR_SUPPLY("ext_5v", NULL),
4992 REGULATOR_SUPPLY("8901_mpp0", NULL),
4993};
4994
4995#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4996 [GPIO_VREG_ID_##_id] = { \
4997 .init_data = { \
4998 .constraints = { \
4999 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5000 }, \
5001 .num_consumer_supplies = \
5002 ARRAY_SIZE(vreg_consumers_##_id), \
5003 .consumer_supplies = vreg_consumers_##_id, \
5004 }, \
5005 .regulator_name = _reg_name, \
5006 .active_low = _active_low, \
5007 .gpio_label = _gpio_label, \
5008 .gpio = _gpio, \
5009 }
5010
5011/* GPIO regulator constraints */
5012static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5013 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5014 PM8901_MPP_PM_TO_SYS(0), 0),
5015};
5016
5017/* GPIO regulator */
5018static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5019 .name = GPIO_REGULATOR_DEV_NAME,
5020 .id = PM8901_MPP_PM_TO_SYS(0),
5021 .dev = {
5022 .platform_data =
5023 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5024 },
5025};
5026
5027static void __init pm8901_vreg_mpp0_init(void)
5028{
5029 int rc;
5030
5031 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5032 .mpp = PM8901_MPP_PM_TO_SYS(0),
5033 .config = {
5034 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5035 .level = PM8901_MPP_DIG_LEVEL_VPH,
5036 },
5037 };
5038
5039 /*
5040 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5041 * implies that the regulator connected to MPP0 is enabled when
5042 * MPP0 is low.
5043 */
5044 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5045 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5046 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5047 } else {
5048 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5049 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5050 }
5051
5052 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5053 if (rc)
5054 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5055}
5056
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005057static struct platform_device *charm_devices[] __initdata = {
5058 &msm_charm_modem,
5059#ifdef CONFIG_MSM_SDIO_AL
5060 &msm_device_sdio_al,
5061#endif
5062};
5063
Lei Zhou338cab82011-08-19 13:38:17 -04005064#ifdef CONFIG_SND_SOC_MSM8660_APQ
5065static struct platform_device *dragon_alsa_devices[] __initdata = {
5066 &msm_pcm,
5067 &msm_pcm_routing,
5068 &msm_cpudai0,
5069 &msm_cpudai1,
5070 &msm_cpudai_hdmi_rx,
5071 &msm_cpudai_bt_rx,
5072 &msm_cpudai_bt_tx,
5073 &msm_cpudai_fm_rx,
5074 &msm_cpudai_fm_tx,
5075 &msm_cpu_fe,
5076 &msm_stub_codec,
5077 &msm_lpa_pcm,
5078};
5079#endif
5080
5081static struct platform_device *asoc_devices[] __initdata = {
5082 &asoc_msm_pcm,
5083 &asoc_msm_dai0,
5084 &asoc_msm_dai1,
5085};
5086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005087static struct platform_device *surf_devices[] __initdata = {
5088 &msm_device_smd,
5089 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005090 &msm_pil_q6v3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005091#ifdef CONFIG_I2C_QUP
5092 &msm_gsbi3_qup_i2c_device,
5093 &msm_gsbi4_qup_i2c_device,
5094 &msm_gsbi7_qup_i2c_device,
5095 &msm_gsbi8_qup_i2c_device,
5096 &msm_gsbi9_qup_i2c_device,
5097 &msm_gsbi12_qup_i2c_device,
5098#endif
5099#ifdef CONFIG_SERIAL_MSM_HS
5100 &msm_device_uart_dm1,
5101#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305102#ifdef CONFIG_MSM_SSBI
5103 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305104 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305105#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005106#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005107 &msm_device_ssbi3,
5108#endif
5109#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5110 &isp1763_device,
5111#endif
5112
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005113#if defined (CONFIG_MSM_8x60_VOIP)
5114 &asoc_msm_mvs,
5115 &asoc_mvs_dai0,
5116 &asoc_mvs_dai1,
5117#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005118
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005119#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5120 &msm_device_otg,
5121#endif
5122#ifdef CONFIG_USB_GADGET_MSM_72K
5123 &msm_device_gadget_peripheral,
5124#endif
5125#ifdef CONFIG_USB_G_ANDROID
5126 &android_usb_device,
5127#endif
5128#ifdef CONFIG_BATTERY_MSM
5129 &msm_batt_device,
5130#endif
5131#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005132#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005133 &android_pmem_device,
5134 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005135 &android_pmem_smipool_device,
5136#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005137 &android_pmem_audio_device,
5138#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005139#ifdef CONFIG_MSM_ROTATOR
5140 &msm_rotator_device,
5141#endif
5142 &msm_fb_device,
5143 &msm_kgsl_3d0,
5144 &msm_kgsl_2d0,
5145 &msm_kgsl_2d1,
5146 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005147#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5148 &lcdc_nt35582_panel_device,
5149#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005150#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5151 &lcdc_samsung_oled_panel_device,
5152#endif
5153#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5154 &lcdc_auo_wvga_panel_device,
5155#endif
5156#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5157 &hdmi_msm_device,
5158#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5159#ifdef CONFIG_FB_MSM_MIPI_DSI
5160 &mipi_dsi_toshiba_panel_device,
5161 &mipi_dsi_novatek_panel_device,
5162#endif
5163#ifdef CONFIG_MSM_CAMERA
5164#ifdef CONFIG_MT9E013
5165 &msm_camera_sensor_mt9e013,
5166#endif
5167#ifdef CONFIG_IMX074
5168 &msm_camera_sensor_imx074,
5169#endif
5170#ifdef CONFIG_WEBCAM_OV7692
5171 &msm_camera_sensor_webcam_ov7692,
5172#endif
5173#ifdef CONFIG_WEBCAM_OV9726
5174 &msm_camera_sensor_webcam_ov9726,
5175#endif
5176#ifdef CONFIG_QS_S5K4E1
5177 &msm_camera_sensor_qs_s5k4e1,
5178#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005179#ifdef CONFIG_VX6953
5180 &msm_camera_sensor_vx6953,
5181#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005182#endif
5183#ifdef CONFIG_MSM_GEMINI
5184 &msm_gemini_device,
5185#endif
5186#ifdef CONFIG_MSM_VPE
5187 &msm_vpe_device,
5188#endif
5189
5190#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5191 &msm_rpm_log_device,
5192#endif
5193#if defined(CONFIG_MSM_RPM_STATS_LOG)
5194 &msm_rpm_stat_device,
5195#endif
5196 &msm_device_vidc,
5197#if (defined(CONFIG_MARIMBA_CORE)) && \
5198 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5199 &msm_bt_power_device,
5200#endif
5201#ifdef CONFIG_SENSORS_MSM_ADC
5202 &msm_adc_device,
5203#endif
David Collins6f032ba2011-08-31 14:08:15 -07005204 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005205
5206#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5207 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5208 &qcrypto_device,
5209#endif
5210
5211#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5212 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5213 &qcedev_device,
5214#endif
5215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005216
5217#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5218#ifdef CONFIG_MSM_USE_TSIF1
5219 &msm_device_tsif[1],
5220#else
5221 &msm_device_tsif[0],
5222#endif /* CONFIG_MSM_USE_TSIF1 */
5223#endif /* CONFIG_TSIF */
5224
5225#ifdef CONFIG_HW_RANDOM_MSM
5226 &msm_device_rng,
5227#endif
5228
5229 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005230 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005231#ifdef CONFIG_ION_MSM
5232 &ion_dev,
5233#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005234 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005235};
5236
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005237#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005238static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005239 .nr = MSM_ION_HEAP_NUM,
5240 .heaps = {
5241 {
5242 .id = ION_HEAP_SYSTEM_ID,
5243 .type = ION_HEAP_TYPE_SYSTEM,
5244 .name = ION_VMALLOC_HEAP_NAME,
5245 },
5246 {
5247 .id = ION_HEAP_SYSTEM_CONTIG_ID,
5248 .type = ION_HEAP_TYPE_SYSTEM_CONTIG,
5249 .name = ION_KMALLOC_HEAP_NAME,
5250 },
5251#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5252 {
5253 .id = ION_HEAP_EBI_ID,
5254 .type = ION_HEAP_TYPE_CARVEOUT,
5255 .name = ION_EBI1_HEAP_NAME,
5256 .size = MSM_ION_EBI_SIZE,
5257 .memory_type = ION_EBI_TYPE,
5258 },
5259 {
5260 .id = ION_HEAP_ADSP_ID,
5261 .type = ION_HEAP_TYPE_CARVEOUT,
5262 .name = ION_ADSP_HEAP_NAME,
5263 .size = MSM_ION_ADSP_SIZE,
5264 .memory_type = ION_EBI_TYPE,
5265 },
5266 {
5267 .id = ION_HEAP_SMI_ID,
5268 .type = ION_HEAP_TYPE_CARVEOUT,
5269 .name = ION_SMI_HEAP_NAME,
5270 .size = MSM_ION_SMI_SIZE,
5271 .memory_type = ION_SMI_TYPE,
Olav Hauganee0f7802011-12-19 13:28:57 -08005272 .request_region = request_smi_region,
5273 .release_region = release_smi_region,
5274 .setup_region = setup_smi_region,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005275 },
5276#endif
5277 }
5278};
5279
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005280static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005281 .name = "ion-msm",
5282 .id = 1,
5283 .dev = { .platform_data = &ion_pdata },
5284};
5285#endif
5286
5287
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005288static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5289 /* Kernel SMI memory pool for video core, used for firmware */
5290 /* and encoder, decoder scratch buffers */
5291 /* Kernel SMI memory pool should always precede the user space */
5292 /* SMI memory pool, as the video core will use offset address */
5293 /* from the Firmware base */
5294 [MEMTYPE_SMI_KERNEL] = {
5295 .start = KERNEL_SMI_BASE,
5296 .limit = KERNEL_SMI_SIZE,
5297 .size = KERNEL_SMI_SIZE,
5298 .flags = MEMTYPE_FLAGS_FIXED,
5299 },
5300 /* User space SMI memory pool for video core */
5301 /* used for encoder, decoder input & output buffers */
5302 [MEMTYPE_SMI] = {
5303 .start = USER_SMI_BASE,
5304 .limit = USER_SMI_SIZE,
5305 .flags = MEMTYPE_FLAGS_FIXED,
5306 },
5307 [MEMTYPE_EBI0] = {
5308 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5309 },
5310 [MEMTYPE_EBI1] = {
5311 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5312 },
5313};
5314
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005315static void reserve_ion_memory(void)
5316{
5317#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
5318 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_EBI_SIZE;
5319 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_ADSP_SIZE;
5320 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_SMI_SIZE;
5321#endif
5322}
5323
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005324static void __init size_pmem_devices(void)
5325{
5326#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005327#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005328 android_pmem_adsp_pdata.size = pmem_adsp_size;
5329 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005330 android_pmem_pdata.size = pmem_sf_size;
5331#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005332 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5333#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005334}
5335
5336static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5337{
5338 msm8x60_reserve_table[p->memory_type].size += p->size;
5339}
5340
5341static void __init reserve_pmem_memory(void)
5342{
5343#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005344#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005345 reserve_memory_for(&android_pmem_adsp_pdata);
5346 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005347 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005348#endif
5349 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005350 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5351#endif
5352}
5353
Huaibin Yanga5419422011-12-08 23:52:10 -08005354static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005355
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005356static void __init msm8x60_calculate_reserve_sizes(void)
5357{
5358 size_pmem_devices();
5359 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005360 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005361 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005362}
5363
5364static int msm8x60_paddr_to_memtype(unsigned int paddr)
5365{
5366 if (paddr >= 0x40000000 && paddr < 0x60000000)
5367 return MEMTYPE_EBI1;
5368 if (paddr >= 0x38000000 && paddr < 0x40000000)
5369 return MEMTYPE_SMI;
5370 return MEMTYPE_NONE;
5371}
5372
5373static struct reserve_info msm8x60_reserve_info __initdata = {
5374 .memtype_reserve_table = msm8x60_reserve_table,
5375 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5376 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5377};
5378
5379static void __init msm8x60_reserve(void)
5380{
5381 reserve_info = &msm8x60_reserve_info;
5382 msm_reserve();
5383}
5384
5385#define EXT_CHG_VALID_MPP 10
5386#define EXT_CHG_VALID_MPP_2 11
5387
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305388static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305389 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305390 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305391 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305392 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5393};
5394
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005395#ifdef CONFIG_ISL9519_CHARGER
5396static int isl_detection_setup(void)
5397{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305398 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005399
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305400 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5401 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5402 &isl_mpp[i].config);
5403 if (ret) {
5404 pr_err("%s: Config MPP %d of PM8058 failed\n",
5405 __func__, isl_mpp[i].mpp);
5406 return ret;
5407 }
5408 }
5409
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005410 return ret;
5411}
5412
5413static struct isl_platform_data isl_data __initdata = {
5414 .chgcurrent = 700,
5415 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5416 .chg_detection_config = isl_detection_setup,
5417 .max_system_voltage = 4200,
5418 .min_system_voltage = 3200,
5419 .term_current = 120,
5420 .input_current = 2048,
5421};
5422
5423static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5424 {
5425 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305426 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005427 .platform_data = &isl_data,
5428 },
5429};
5430#endif
5431
5432#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5433static int smb137b_detection_setup(void)
5434{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305435 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005436
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305437 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5438 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5439 &isl_mpp[i].config);
5440 if (ret) {
5441 pr_err("%s: Config MPP %d of PM8058 failed\n",
5442 __func__, isl_mpp[i].mpp);
5443 return ret;
5444 }
5445 }
5446
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005447 return ret;
5448}
5449
5450static struct smb137b_platform_data smb137b_data __initdata = {
5451 .chg_detection_config = smb137b_detection_setup,
5452 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5453 .batt_mah_rating = 950,
5454};
5455
5456static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5457 {
5458 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305459 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005460 .platform_data = &smb137b_data,
5461 },
5462};
5463#endif
5464
5465#ifdef CONFIG_PMIC8058
5466#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305467#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005468
5469static int pm8058_gpios_init(void)
5470{
5471 int i;
5472 int rc;
5473 struct pm8058_gpio_cfg {
5474 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305475 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005476 };
5477
5478 struct pm8058_gpio_cfg gpio_cfgs[] = {
5479 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305480 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005481 {
5482 .direction = PM_GPIO_DIR_IN,
5483 .pull = PM_GPIO_PULL_DN,
5484 .vin_sel = 2,
5485 .function = PM_GPIO_FUNC_NORMAL,
5486 .inv_int_pol = 0,
5487 },
5488 },
5489#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5490 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305491 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005492 {
5493 .direction = PM_GPIO_DIR_IN,
5494 .pull = PM_GPIO_PULL_UP_30,
5495 .vin_sel = 2,
5496 .function = PM_GPIO_FUNC_NORMAL,
5497 .inv_int_pol = 0,
5498 },
5499 },
5500#endif
5501 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305502 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005503 {
5504 .direction = PM_GPIO_DIR_IN,
5505 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305506 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005507 .function = PM_GPIO_FUNC_NORMAL,
5508 .inv_int_pol = 0,
5509 },
5510 },
5511 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305512 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005513 {
5514 .direction = PM_GPIO_DIR_IN,
5515 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305516 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005517 .function = PM_GPIO_FUNC_NORMAL,
5518 .inv_int_pol = 0,
5519 },
5520 },
5521 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305522 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005523 {
5524 .direction = PM_GPIO_DIR_IN,
5525 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305526 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005527 .function = PM_GPIO_FUNC_NORMAL,
5528 .inv_int_pol = 0,
5529 },
5530 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005531 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305532 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005533 {
5534 .direction = PM_GPIO_DIR_OUT,
5535 .output_value = 1,
5536 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5537 .pull = PM_GPIO_PULL_DN,
5538 .out_strength = PM_GPIO_STRENGTH_HIGH,
5539 .function = PM_GPIO_FUNC_NORMAL,
5540 .vin_sel = 2,
5541 .inv_int_pol = 0,
5542 }
5543 },
5544 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305545 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005546 {
5547 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305548 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005549 .function = PM_GPIO_FUNC_NORMAL,
5550 .vin_sel = 2,
5551 .inv_int_pol = 0,
5552 }
5553 },
5554 };
5555
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305556#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5557 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305558 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305559 .direction = PM_GPIO_DIR_IN,
5560 .pull = PM_GPIO_PULL_UP_1P5,
5561 .vin_sel = 2,
5562 .function = PM_GPIO_FUNC_NORMAL,
5563 };
5564#endif
5565
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005566#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305567 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305568 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305569 .direction = PM_GPIO_DIR_OUT,
5570 .pull = PM_GPIO_PULL_NO,
5571 .out_strength = PM_GPIO_STRENGTH_HIGH,
5572 .function = PM_GPIO_FUNC_NORMAL,
5573 .inv_int_pol = 0,
5574 .vin_sel = 2,
5575 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5576 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005577 };
5578#endif
5579
5580#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5581 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305582 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005583 {
5584 .direction = PM_GPIO_DIR_IN,
5585 .pull = PM_GPIO_PULL_UP_1P5,
5586 .vin_sel = 2,
5587 .function = PM_GPIO_FUNC_NORMAL,
5588 .inv_int_pol = 0,
5589 }
5590 };
5591#endif
5592
5593#if defined(CONFIG_QS_S5K4E1)
5594 {
5595 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305596 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005597 {
5598 .direction = PM_GPIO_DIR_OUT,
5599 .output_value = 0,
5600 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5601 .pull = PM_GPIO_PULL_DN,
5602 .out_strength = PM_GPIO_STRENGTH_HIGH,
5603 .function = PM_GPIO_FUNC_NORMAL,
5604 .vin_sel = 2,
5605 .inv_int_pol = 0,
5606 }
5607 };
5608#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005609#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5610 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305611 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005612 {
5613 .direction = PM_GPIO_DIR_OUT,
5614 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5615 .output_value = 1,
5616 .pull = PM_GPIO_PULL_UP_30,
5617 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305618 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005619 .out_strength = PM_GPIO_STRENGTH_HIGH,
5620 .function = PM_GPIO_FUNC_NORMAL,
5621 .inv_int_pol = 0,
5622 }
5623 };
5624#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005625#if defined(CONFIG_HAPTIC_ISA1200) || \
5626 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5627 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305628 rc = pm8xxx_gpio_config(
5629 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5630 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005631 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305632 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005633 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305634 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305635 rc = pm8xxx_gpio_config(
5636 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5637 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305638 if (rc < 0) {
5639 pr_err("%s: pmic haptics ldo gpio config failed\n",
5640 __func__);
5641 }
5642
5643 }
5644#endif
5645
5646#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5647 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5648 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5649 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305650 rc = pm8xxx_gpio_config(
5651 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5652 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305653 if (rc < 0) {
5654 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5655 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005656 }
5657 }
5658#endif
5659
5660#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5661 /* Line_in only for 8660 ffa & surf */
5662 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005663 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005664 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305665 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005666 &line_in_gpio_cfg.cfg);
5667 if (rc < 0) {
5668 pr_err("%s pmic line_in gpio config failed\n",
5669 __func__);
5670 return rc;
5671 }
5672 }
5673#endif
5674
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005675#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5676 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305677 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005678 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5679 if (rc < 0) {
5680 pr_err("%s pmic gpio config failed\n", __func__);
5681 return rc;
5682 }
5683 }
5684#endif
5685
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005686#if defined(CONFIG_QS_S5K4E1)
5687 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5688 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305689 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005690 &qs_hc37_cam_pd_gpio_cfg.cfg);
5691 if (rc < 0) {
5692 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5693 __func__);
5694 return rc;
5695 }
5696 }
5697 }
5698#endif
5699
5700 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305701 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005702 &gpio_cfgs[i].cfg);
5703 if (rc < 0) {
5704 pr_err("%s pmic gpio config failed\n",
5705 __func__);
5706 return rc;
5707 }
5708 }
5709
5710 return 0;
5711}
5712
5713static const unsigned int ffa_keymap[] = {
5714 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5715 KEY(0, 1, KEY_UP), /* NAV - UP */
5716 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5717 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5718
5719 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5720 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5721 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5722 KEY(1, 3, KEY_VOLUMEDOWN),
5723
5724 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5725
5726 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5727 KEY(4, 1, KEY_UP), /* USER_UP */
5728 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5729 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5730 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5731
5732 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5733 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5734 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5735 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5736 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5737};
5738
Zhang Chang Ken683be172011-08-10 17:45:34 -04005739static const unsigned int dragon_keymap[] = {
5740 KEY(0, 0, KEY_MENU),
5741 KEY(0, 2, KEY_1),
5742 KEY(0, 3, KEY_4),
5743 KEY(0, 4, KEY_7),
5744
5745 KEY(1, 0, KEY_UP),
5746 KEY(1, 1, KEY_LEFT),
5747 KEY(1, 2, KEY_DOWN),
5748 KEY(1, 3, KEY_5),
5749 KEY(1, 4, KEY_8),
5750
5751 KEY(2, 0, KEY_HOME),
5752 KEY(2, 1, KEY_REPLY),
5753 KEY(2, 2, KEY_2),
5754 KEY(2, 3, KEY_6),
5755 KEY(2, 4, KEY_0),
5756
5757 KEY(3, 0, KEY_VOLUMEUP),
5758 KEY(3, 1, KEY_RIGHT),
5759 KEY(3, 2, KEY_3),
5760 KEY(3, 3, KEY_9),
5761 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5762
5763 KEY(4, 0, KEY_VOLUMEDOWN),
5764 KEY(4, 1, KEY_BACK),
5765 KEY(4, 2, KEY_CAMERA),
5766 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5767};
5768
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005769static struct matrix_keymap_data ffa_keymap_data = {
5770 .keymap_size = ARRAY_SIZE(ffa_keymap),
5771 .keymap = ffa_keymap,
5772};
5773
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305774static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005775 .input_name = "ffa-keypad",
5776 .input_phys_device = "ffa-keypad/input0",
5777 .num_rows = 6,
5778 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305779 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5780 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5781 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005782 .scan_delay_ms = 32,
5783 .row_hold_ns = 91500,
5784 .wakeup = 1,
5785 .keymap_data = &ffa_keymap_data,
5786};
5787
Zhang Chang Ken683be172011-08-10 17:45:34 -04005788static struct matrix_keymap_data dragon_keymap_data = {
5789 .keymap_size = ARRAY_SIZE(dragon_keymap),
5790 .keymap = dragon_keymap,
5791};
5792
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305793static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005794 .input_name = "dragon-keypad",
5795 .input_phys_device = "dragon-keypad/input0",
5796 .num_rows = 6,
5797 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305798 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5799 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5800 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005801 .scan_delay_ms = 32,
5802 .row_hold_ns = 91500,
5803 .wakeup = 1,
5804 .keymap_data = &dragon_keymap_data,
5805};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305806
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005807static const unsigned int fluid_keymap[] = {
5808 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5809 KEY(0, 1, KEY_UP), /* NAV - UP */
5810 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5811 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5812
5813 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5814 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5815 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5816 KEY(1, 3, KEY_VOLUMEUP),
5817
5818 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5819
5820 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5821 KEY(4, 1, KEY_UP), /* USER_UP */
5822 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5823 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5824 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5825
Jilai Wang9a895102011-07-12 14:00:35 -04005826 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005827 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5828 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5829 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5830 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5831};
5832
5833static struct matrix_keymap_data fluid_keymap_data = {
5834 .keymap_size = ARRAY_SIZE(fluid_keymap),
5835 .keymap = fluid_keymap,
5836};
5837
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305838static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005839 .input_name = "fluid-keypad",
5840 .input_phys_device = "fluid-keypad/input0",
5841 .num_rows = 6,
5842 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305843 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5844 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5845 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005846 .scan_delay_ms = 32,
5847 .row_hold_ns = 91500,
5848 .wakeup = 1,
5849 .keymap_data = &fluid_keymap_data,
5850};
5851
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305852static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005853 .initial_vibrate_ms = 500,
5854 .level_mV = 3000,
5855 .max_timeout_ms = 15000,
5856};
5857
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305858static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5859 .rtc_write_enable = false,
5860 .rtc_alarm_powerup = false,
5861};
5862
5863static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5864 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005865 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305866 .wakeup = 1,
5867};
5868
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005869#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5870
5871static struct othc_accessory_info othc_accessories[] = {
5872 {
5873 .accessory = OTHC_SVIDEO_OUT,
5874 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5875 | OTHC_ADC_DETECT,
5876 .key_code = SW_VIDEOOUT_INSERT,
5877 .enabled = false,
5878 .adc_thres = {
5879 .min_threshold = 20,
5880 .max_threshold = 40,
5881 },
5882 },
5883 {
5884 .accessory = OTHC_ANC_HEADPHONE,
5885 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5886 OTHC_SWITCH_DETECT,
5887 .gpio = PM8058_LINE_IN_DET_GPIO,
5888 .active_low = 1,
5889 .key_code = SW_HEADPHONE_INSERT,
5890 .enabled = true,
5891 },
5892 {
5893 .accessory = OTHC_ANC_HEADSET,
5894 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5895 .gpio = PM8058_LINE_IN_DET_GPIO,
5896 .active_low = 1,
5897 .key_code = SW_HEADPHONE_INSERT,
5898 .enabled = true,
5899 },
5900 {
5901 .accessory = OTHC_HEADPHONE,
5902 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5903 .key_code = SW_HEADPHONE_INSERT,
5904 .enabled = true,
5905 },
5906 {
5907 .accessory = OTHC_MICROPHONE,
5908 .detect_flags = OTHC_GPIO_DETECT,
5909 .gpio = PM8058_LINE_IN_DET_GPIO,
5910 .active_low = 1,
5911 .key_code = SW_MICROPHONE_INSERT,
5912 .enabled = true,
5913 },
5914 {
5915 .accessory = OTHC_HEADSET,
5916 .detect_flags = OTHC_MICBIAS_DETECT,
5917 .key_code = SW_HEADPHONE_INSERT,
5918 .enabled = true,
5919 },
5920};
5921
5922static struct othc_switch_info switch_info[] = {
5923 {
5924 .min_adc_threshold = 0,
5925 .max_adc_threshold = 100,
5926 .key_code = KEY_PLAYPAUSE,
5927 },
5928 {
5929 .min_adc_threshold = 100,
5930 .max_adc_threshold = 200,
5931 .key_code = KEY_REWIND,
5932 },
5933 {
5934 .min_adc_threshold = 200,
5935 .max_adc_threshold = 500,
5936 .key_code = KEY_FASTFORWARD,
5937 },
5938};
5939
5940static struct othc_n_switch_config switch_config = {
5941 .voltage_settling_time_ms = 0,
5942 .num_adc_samples = 3,
5943 .adc_channel = CHANNEL_ADC_HDSET,
5944 .switch_info = switch_info,
5945 .num_keys = ARRAY_SIZE(switch_info),
5946 .default_sw_en = true,
5947 .default_sw_idx = 0,
5948};
5949
5950static struct hsed_bias_config hsed_bias_config = {
5951 /* HSED mic bias config info */
5952 .othc_headset = OTHC_HEADSET_NO,
5953 .othc_lowcurr_thresh_uA = 100,
5954 .othc_highcurr_thresh_uA = 600,
5955 .othc_hyst_prediv_us = 7800,
5956 .othc_period_clkdiv_us = 62500,
5957 .othc_hyst_clk_us = 121000,
5958 .othc_period_clk_us = 312500,
5959 .othc_wakeup = 1,
5960};
5961
5962static struct othc_hsed_config hsed_config_1 = {
5963 .hsed_bias_config = &hsed_bias_config,
5964 /*
5965 * The detection delay and switch reporting delay are
5966 * required to encounter a hardware bug (spurious switch
5967 * interrupts on slow insertion/removal of the headset).
5968 * This will introduce a delay in reporting the accessory
5969 * insertion and removal to the userspace.
5970 */
5971 .detection_delay_ms = 1500,
5972 /* Switch info */
5973 .switch_debounce_ms = 1500,
5974 .othc_support_n_switch = false,
5975 .switch_config = &switch_config,
5976 .ir_gpio = -1,
5977 /* Accessory info */
5978 .accessories_support = true,
5979 .accessories = othc_accessories,
5980 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5981};
5982
5983static struct othc_regulator_config othc_reg = {
5984 .regulator = "8058_l5",
5985 .max_uV = 2850000,
5986 .min_uV = 2850000,
5987};
5988
5989/* MIC_BIAS0 is configured as normal MIC BIAS */
5990static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
5991 .micbias_select = OTHC_MICBIAS_0,
5992 .micbias_capability = OTHC_MICBIAS,
5993 .micbias_enable = OTHC_SIGNAL_OFF,
5994 .micbias_regulator = &othc_reg,
5995};
5996
5997/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
5998static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
5999 .micbias_select = OTHC_MICBIAS_1,
6000 .micbias_capability = OTHC_MICBIAS_HSED,
6001 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6002 .micbias_regulator = &othc_reg,
6003 .hsed_config = &hsed_config_1,
6004 .hsed_name = "8660_handset",
6005};
6006
6007/* MIC_BIAS2 is configured as normal MIC BIAS */
6008static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6009 .micbias_select = OTHC_MICBIAS_2,
6010 .micbias_capability = OTHC_MICBIAS,
6011 .micbias_enable = OTHC_SIGNAL_OFF,
6012 .micbias_regulator = &othc_reg,
6013};
6014
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006015
6016static void __init msm8x60_init_pm8058_othc(void)
6017{
6018 int i;
6019
6020 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6021 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6022 machine_is_msm8x60_fusn_ffa()) {
6023 /* 3-switch headset supported only by V2 FFA and FLUID */
6024 hsed_config_1.accessories_adc_support = true,
6025 /* ADC based accessory detection works only on V2 and FLUID */
6026 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6027 hsed_config_1.othc_support_n_switch = true;
6028 }
6029
6030 /* IR GPIO is absent on FLUID */
6031 if (machine_is_msm8x60_fluid())
6032 hsed_config_1.ir_gpio = -1;
6033
6034 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6035 if (machine_is_msm8x60_fluid()) {
6036 switch (othc_accessories[i].accessory) {
6037 case OTHC_ANC_HEADPHONE:
6038 case OTHC_ANC_HEADSET:
6039 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6040 break;
6041 case OTHC_MICROPHONE:
6042 othc_accessories[i].enabled = false;
6043 break;
6044 case OTHC_SVIDEO_OUT:
6045 othc_accessories[i].enabled = true;
6046 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6047 break;
6048 }
6049 }
6050 }
6051}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006052
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006053
6054static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6055{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306056 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006057 .direction = PM_GPIO_DIR_OUT,
6058 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6059 .output_value = 0,
6060 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306061 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006062 .out_strength = PM_GPIO_STRENGTH_HIGH,
6063 .function = PM_GPIO_FUNC_2,
6064 };
6065
6066 int rc = -EINVAL;
6067 int id, mode, max_mA;
6068
6069 id = mode = max_mA = 0;
6070 switch (ch) {
6071 case 0:
6072 case 1:
6073 case 2:
6074 if (on) {
6075 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306076 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6077 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006078 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306079 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006080 __func__, id, rc);
6081 }
6082 break;
6083
6084 case 6:
6085 id = PM_PWM_LED_FLASH;
6086 mode = PM_PWM_CONF_PWM1;
6087 max_mA = 300;
6088 break;
6089
6090 case 7:
6091 id = PM_PWM_LED_FLASH1;
6092 mode = PM_PWM_CONF_PWM1;
6093 max_mA = 300;
6094 break;
6095
6096 default:
6097 break;
6098 }
6099
6100 if (ch >= 6 && ch <= 7) {
6101 if (!on) {
6102 mode = PM_PWM_CONF_NONE;
6103 max_mA = 0;
6104 }
6105 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6106 if (rc)
6107 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6108 __func__, ch, rc);
6109 }
6110 return rc;
6111
6112}
6113
6114static struct pm8058_pwm_pdata pm8058_pwm_data = {
6115 .config = pm8058_pwm_config,
6116};
6117
6118#define PM8058_GPIO_INT 88
6119
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006120static struct pmic8058_led pmic8058_flash_leds[] = {
6121 [0] = {
6122 .name = "camera:flash0",
6123 .max_brightness = 15,
6124 .id = PMIC8058_ID_FLASH_LED_0,
6125 },
6126 [1] = {
6127 .name = "camera:flash1",
6128 .max_brightness = 15,
6129 .id = PMIC8058_ID_FLASH_LED_1,
6130 },
6131};
6132
6133static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6134 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6135 .leds = pmic8058_flash_leds,
6136};
6137
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006138static struct pmic8058_led pmic8058_dragon_leds[] = {
6139 [0] = {
6140 /* RED */
6141 .name = "led_drv0",
6142 .max_brightness = 15,
6143 .id = PMIC8058_ID_LED_0,
6144 },/* 300 mA flash led0 drv sink */
6145 [1] = {
6146 /* Yellow */
6147 .name = "led_drv1",
6148 .max_brightness = 15,
6149 .id = PMIC8058_ID_LED_1,
6150 },/* 300 mA flash led0 drv sink */
6151 [2] = {
6152 /* Green */
6153 .name = "led_drv2",
6154 .max_brightness = 15,
6155 .id = PMIC8058_ID_LED_2,
6156 },/* 300 mA flash led0 drv sink */
6157 [3] = {
6158 .name = "led_psensor",
6159 .max_brightness = 15,
6160 .id = PMIC8058_ID_LED_KB_LIGHT,
6161 },/* 300 mA flash led0 drv sink */
6162};
6163
6164static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6165 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6166 .leds = pmic8058_dragon_leds,
6167};
6168
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006169static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6170 [0] = {
6171 .name = "led:drv0",
6172 .max_brightness = 15,
6173 .id = PMIC8058_ID_FLASH_LED_0,
6174 },/* 300 mA flash led0 drv sink */
6175 [1] = {
6176 .name = "led:drv1",
6177 .max_brightness = 15,
6178 .id = PMIC8058_ID_FLASH_LED_1,
6179 },/* 300 mA flash led1 sink */
6180 [2] = {
6181 .name = "led:drv2",
6182 .max_brightness = 20,
6183 .id = PMIC8058_ID_LED_0,
6184 },/* 40 mA led0 sink */
6185 [3] = {
6186 .name = "keypad:drv",
6187 .max_brightness = 15,
6188 .id = PMIC8058_ID_LED_KB_LIGHT,
6189 },/* 300 mA keypad drv sink */
6190};
6191
6192static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6193 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6194 .leds = pmic8058_fluid_flash_leds,
6195};
6196
Terence Hampson90508a92011-08-09 10:40:08 -04006197static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306198 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006199 .max_source_current = 1800,
6200 .charger_type = CHG_TYPE_AC,
6201};
6202
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306203static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6204 .charger_data_valid = false,
6205};
6206
6207static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6208 .priority = 0,
6209};
6210
6211static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6212 .irq_base = PM8058_IRQ_BASE,
6213 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6214 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6215};
6216
6217static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6218 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6219};
6220
6221static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6222 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006223};
6224
6225static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306226 .irq_pdata = &pm8058_irq_pdata,
6227 .gpio_pdata = &pm8058_gpio_pdata,
6228 .mpp_pdata = &pm8058_mpp_pdata,
6229 .rtc_pdata = &pm8058_rtc_pdata,
6230 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6231 .othc0_pdata = &othc_config_pdata_0,
6232 .othc1_pdata = &othc_config_pdata_1,
6233 .othc2_pdata = &othc_config_pdata_2,
6234 .pwm_pdata = &pm8058_pwm_data,
6235 .misc_pdata = &pm8058_misc_pdata,
6236#ifdef CONFIG_SENSORS_MSM_ADC
6237 .xoadc_pdata = &pm8058_xoadc_pdata,
6238#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006239};
6240
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306241#ifdef CONFIG_MSM_SSBI
6242static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6243 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6244 .slave = {
6245 .name = "pm8058-core",
6246 .platform_data = &pm8058_platform_data,
6247 },
6248};
6249#endif
6250#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006251
6252#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6253 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6254#define TDISC_I2C_SLAVE_ADDR 0x67
6255#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6256#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6257
6258static const char *vregs_tdisc_name[] = {
6259 "8058_l5",
6260 "8058_s3",
6261};
6262
6263static const int vregs_tdisc_val[] = {
6264 2850000,/* uV */
6265 1800000,
6266};
6267static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6268
6269static int tdisc_shinetsu_setup(void)
6270{
6271 int rc, i;
6272
6273 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6274 if (rc) {
6275 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6276 __func__);
6277 return rc;
6278 }
6279
6280 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6281 if (rc) {
6282 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6283 __func__);
6284 goto fail_gpio_oe;
6285 }
6286
6287 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6288 if (rc) {
6289 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6290 __func__);
6291 gpio_free(GPIO_JOYSTICK_EN);
6292 goto fail_gpio_oe;
6293 }
6294
6295 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6296 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6297 if (IS_ERR(vregs_tdisc[i])) {
6298 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6299 __func__, vregs_tdisc_name[i],
6300 PTR_ERR(vregs_tdisc[i]));
6301 rc = PTR_ERR(vregs_tdisc[i]);
6302 goto vreg_get_fail;
6303 }
6304
6305 rc = regulator_set_voltage(vregs_tdisc[i],
6306 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6307 if (rc) {
6308 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6309 __func__, rc);
6310 goto vreg_set_voltage_fail;
6311 }
6312 }
6313
6314 return rc;
6315vreg_set_voltage_fail:
6316 i++;
6317vreg_get_fail:
6318 while (i)
6319 regulator_put(vregs_tdisc[--i]);
6320fail_gpio_oe:
6321 gpio_free(PMIC_GPIO_TDISC);
6322 return rc;
6323}
6324
6325static void tdisc_shinetsu_release(void)
6326{
6327 int i;
6328
6329 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6330 regulator_put(vregs_tdisc[i]);
6331
6332 gpio_free(PMIC_GPIO_TDISC);
6333 gpio_free(GPIO_JOYSTICK_EN);
6334}
6335
6336static int tdisc_shinetsu_enable(void)
6337{
6338 int i, rc = -EINVAL;
6339
6340 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6341 rc = regulator_enable(vregs_tdisc[i]);
6342 if (rc < 0) {
6343 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6344 __func__, vregs_tdisc_name[i], rc);
6345 goto vreg_fail;
6346 }
6347 }
6348
6349 /* Enable the OE (output enable) gpio */
6350 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6351 /* voltage and gpio stabilization delay */
6352 msleep(50);
6353
6354 return 0;
6355vreg_fail:
6356 while (i)
6357 regulator_disable(vregs_tdisc[--i]);
6358 return rc;
6359}
6360
6361static int tdisc_shinetsu_disable(void)
6362{
6363 int i, rc;
6364
6365 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6366 rc = regulator_disable(vregs_tdisc[i]);
6367 if (rc < 0) {
6368 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6369 __func__, vregs_tdisc_name[i], rc);
6370 goto tdisc_reg_fail;
6371 }
6372 }
6373
6374 /* Disable the OE (output enable) gpio */
6375 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6376
6377 return 0;
6378
6379tdisc_reg_fail:
6380 while (i)
6381 regulator_enable(vregs_tdisc[--i]);
6382 return rc;
6383}
6384
6385static struct tdisc_abs_values tdisc_abs = {
6386 .x_max = 32,
6387 .y_max = 32,
6388 .x_min = -32,
6389 .y_min = -32,
6390 .pressure_max = 32,
6391 .pressure_min = 0,
6392};
6393
6394static struct tdisc_platform_data tdisc_data = {
6395 .tdisc_setup = tdisc_shinetsu_setup,
6396 .tdisc_release = tdisc_shinetsu_release,
6397 .tdisc_enable = tdisc_shinetsu_enable,
6398 .tdisc_disable = tdisc_shinetsu_disable,
6399 .tdisc_wakeup = 0,
6400 .tdisc_gpio = PMIC_GPIO_TDISC,
6401 .tdisc_report_keys = true,
6402 .tdisc_report_relative = true,
6403 .tdisc_report_absolute = false,
6404 .tdisc_report_wheel = false,
6405 .tdisc_reverse_x = false,
6406 .tdisc_reverse_y = true,
6407 .tdisc_abs = &tdisc_abs,
6408};
6409
6410static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6411 {
6412 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6413 .irq = TDISC_INT,
6414 .platform_data = &tdisc_data,
6415 },
6416};
6417#endif
6418
6419#define PM_GPIO_CDC_RST_N 20
6420#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6421
6422static struct regulator *vreg_timpani_1;
6423static struct regulator *vreg_timpani_2;
6424
6425static unsigned int msm_timpani_setup_power(void)
6426{
6427 int rc;
6428
6429 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6430 if (IS_ERR(vreg_timpani_1)) {
6431 pr_err("%s: Unable to get 8058_l0\n", __func__);
6432 return -ENODEV;
6433 }
6434
6435 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6436 if (IS_ERR(vreg_timpani_2)) {
6437 pr_err("%s: Unable to get 8058_s3\n", __func__);
6438 regulator_put(vreg_timpani_1);
6439 return -ENODEV;
6440 }
6441
6442 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6443 if (rc) {
6444 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6445 goto fail;
6446 }
6447
6448 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6449 if (rc) {
6450 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6451 goto fail;
6452 }
6453
6454 rc = regulator_enable(vreg_timpani_1);
6455 if (rc) {
6456 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6457 goto fail;
6458 }
6459
6460 /* The settings for LDO0 should be set such that
6461 * it doesn't require to reset the timpani. */
6462 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6463 if (rc < 0) {
6464 pr_err("Timpani regulator optimum mode setting failed\n");
6465 goto fail;
6466 }
6467
6468 rc = regulator_enable(vreg_timpani_2);
6469 if (rc) {
6470 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6471 regulator_disable(vreg_timpani_1);
6472 goto fail;
6473 }
6474
6475 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6476 if (rc) {
6477 pr_err("%s: GPIO Request %d failed\n", __func__,
6478 GPIO_CDC_RST_N);
6479 regulator_disable(vreg_timpani_1);
6480 regulator_disable(vreg_timpani_2);
6481 goto fail;
6482 } else {
6483 gpio_direction_output(GPIO_CDC_RST_N, 1);
6484 usleep_range(1000, 1050);
6485 gpio_direction_output(GPIO_CDC_RST_N, 0);
6486 usleep_range(1000, 1050);
6487 gpio_direction_output(GPIO_CDC_RST_N, 1);
6488 gpio_free(GPIO_CDC_RST_N);
6489 }
6490 return rc;
6491
6492fail:
6493 regulator_put(vreg_timpani_1);
6494 regulator_put(vreg_timpani_2);
6495 return rc;
6496}
6497
6498static void msm_timpani_shutdown_power(void)
6499{
6500 int rc;
6501
6502 rc = regulator_disable(vreg_timpani_1);
6503 if (rc)
6504 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6505
6506 regulator_put(vreg_timpani_1);
6507
6508 rc = regulator_disable(vreg_timpani_2);
6509 if (rc)
6510 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6511
6512 regulator_put(vreg_timpani_2);
6513}
6514
6515/* Power analog function of codec */
6516static struct regulator *vreg_timpani_cdc_apwr;
6517static int msm_timpani_codec_power(int vreg_on)
6518{
6519 int rc = 0;
6520
6521 if (!vreg_timpani_cdc_apwr) {
6522
6523 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6524
6525 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6526 pr_err("%s: vreg_get failed (%ld)\n",
6527 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6528 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6529 return rc;
6530 }
6531 }
6532
6533 if (vreg_on) {
6534
6535 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6536 2200000, 2200000);
6537 if (rc) {
6538 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6539 __func__);
6540 goto vreg_fail;
6541 }
6542
6543 rc = regulator_enable(vreg_timpani_cdc_apwr);
6544 if (rc) {
6545 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6546 goto vreg_fail;
6547 }
6548 } else {
6549 rc = regulator_disable(vreg_timpani_cdc_apwr);
6550 if (rc) {
6551 pr_err("%s: vreg_disable failed %d\n",
6552 __func__, rc);
6553 goto vreg_fail;
6554 }
6555 }
6556
6557 return 0;
6558
6559vreg_fail:
6560 regulator_put(vreg_timpani_cdc_apwr);
6561 vreg_timpani_cdc_apwr = NULL;
6562 return rc;
6563}
6564
6565static struct marimba_codec_platform_data timpani_codec_pdata = {
6566 .marimba_codec_power = msm_timpani_codec_power,
6567};
6568
6569#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6570#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6571
6572static struct marimba_platform_data timpani_pdata = {
6573 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6574 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6575 .marimba_setup = msm_timpani_setup_power,
6576 .marimba_shutdown = msm_timpani_shutdown_power,
6577 .codec = &timpani_codec_pdata,
6578 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6579};
6580
6581#define TIMPANI_I2C_SLAVE_ADDR 0xD
6582
6583static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6584 {
6585 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6586 .platform_data = &timpani_pdata,
6587 },
6588};
6589
Lei Zhou338cab82011-08-19 13:38:17 -04006590#ifdef CONFIG_SND_SOC_WM8903
6591static struct wm8903_platform_data wm8903_pdata = {
6592 .gpio_cfg[2] = 0x3A8,
6593};
6594
6595#define WM8903_I2C_SLAVE_ADDR 0x34
6596static struct i2c_board_info wm8903_codec_i2c_info[] = {
6597 {
6598 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6599 .platform_data = &wm8903_pdata,
6600 },
6601};
6602#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006603#ifdef CONFIG_PMIC8901
6604
6605#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006606/*
6607 * Consumer specific regulator names:
6608 * regulator name consumer dev_name
6609 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006610static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6611 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6612};
6613static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6614 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6615};
6616
6617#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306618 _always_on) \
6619 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006620 .init_data = { \
6621 .constraints = { \
6622 .valid_modes_mask = _modes, \
6623 .valid_ops_mask = _ops, \
6624 .min_uV = _min_uV, \
6625 .max_uV = _max_uV, \
6626 .input_uV = _min_uV, \
6627 .apply_uV = _apply_uV, \
6628 .always_on = _always_on, \
6629 }, \
6630 .consumer_supplies = vreg_consumers_8901_##_id, \
6631 .num_consumer_supplies = \
6632 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6633 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306634 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006635 }
6636
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006637#define PM8901_VREG_INIT_VS(_id) \
6638 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306639 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006640
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306641static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006642 PM8901_VREG_INIT_VS(USB_OTG),
6643 PM8901_VREG_INIT_VS(HDMI_MVS),
6644};
6645
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306646static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6647 .priority = 1,
6648};
6649
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306650static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6651 .irq_base = PM8901_IRQ_BASE,
6652 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6653 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6654};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006655
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306656static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6657 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006658};
6659
6660static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306661 .irq_pdata = &pm8901_irq_pdata,
6662 .mpp_pdata = &pm8901_mpp_pdata,
6663 .regulator_pdatas = pm8901_vreg_init,
6664 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306665 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006666};
6667
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306668static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6669 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6670 .slave = {
6671 .name = "pm8901-core",
6672 .platform_data = &pm8901_platform_data,
6673 },
6674};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006675#endif /* CONFIG_PMIC8901 */
6676
6677#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6678 || defined(CONFIG_GPIO_SX150X_MODULE))
6679
6680static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006681static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006682
6683struct bahama_config_register{
6684 u8 reg;
6685 u8 value;
6686 u8 mask;
6687};
6688
6689enum version{
6690 VER_1_0,
6691 VER_2_0,
6692 VER_UNSUPPORTED = 0xFF
6693};
6694
6695static u8 read_bahama_ver(void)
6696{
6697 int rc;
6698 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6699 u8 bahama_version;
6700
6701 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6702 if (rc < 0) {
6703 printk(KERN_ERR
6704 "%s: version read failed: %d\n",
6705 __func__, rc);
6706 return VER_UNSUPPORTED;
6707 } else {
6708 printk(KERN_INFO
6709 "%s: version read got: 0x%x\n",
6710 __func__, bahama_version);
6711 }
6712
6713 switch (bahama_version) {
6714 case 0x08: /* varient of bahama v1 */
6715 case 0x10:
6716 case 0x00:
6717 return VER_1_0;
6718 case 0x09: /* variant of bahama v2 */
6719 return VER_2_0;
6720 default:
6721 return VER_UNSUPPORTED;
6722 }
6723}
6724
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006725static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006726static unsigned int msm_bahama_setup_power(void)
6727{
6728 int rc = 0;
6729 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006730
6731 if (machine_is_msm8x60_dragon())
6732 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6733
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006734 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6735
6736 if (IS_ERR(vreg_bahama)) {
6737 rc = PTR_ERR(vreg_bahama);
6738 pr_err("%s: regulator_get %s = %d\n", __func__,
6739 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006740 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006741 }
6742
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006743 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6744 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006745 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6746 msm_bahama_regulator, rc);
6747 goto unget;
6748 }
6749
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006750 rc = regulator_enable(vreg_bahama);
6751 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006752 pr_err("%s: regulator_enable %s = %d\n", __func__,
6753 msm_bahama_regulator, rc);
6754 goto unget;
6755 }
6756
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006757 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6758 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006759 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006760 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006761 goto unenable;
6762 }
6763
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006764 gpio_direction_output(msm_bahama_sys_rst, 0);
6765 usleep_range(1000, 1050);
6766 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6767 usleep_range(1000, 1050);
6768 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006769 return rc;
6770
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006771unenable:
6772 regulator_disable(vreg_bahama);
6773unget:
6774 regulator_put(vreg_bahama);
6775 return rc;
6776};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006777
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006778static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006779{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006780 if (msm_bahama_setup_power_enable) {
6781 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6782 gpio_free(msm_bahama_sys_rst);
6783 regulator_disable(vreg_bahama);
6784 regulator_put(vreg_bahama);
6785 msm_bahama_setup_power_enable = 0;
6786 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006787
6788 return 0;
6789};
6790
6791static unsigned int msm_bahama_core_config(int type)
6792{
6793 int rc = 0;
6794
6795 if (type == BAHAMA_ID) {
6796
6797 int i;
6798 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6799
6800 const struct bahama_config_register v20_init[] = {
6801 /* reg, value, mask */
6802 { 0xF4, 0x84, 0xFF }, /* AREG */
6803 { 0xF0, 0x04, 0xFF } /* DREG */
6804 };
6805
6806 if (read_bahama_ver() == VER_2_0) {
6807 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6808 u8 value = v20_init[i].value;
6809 rc = marimba_write_bit_mask(&config,
6810 v20_init[i].reg,
6811 &value,
6812 sizeof(v20_init[i].value),
6813 v20_init[i].mask);
6814 if (rc < 0) {
6815 printk(KERN_ERR
6816 "%s: reg %d write failed: %d\n",
6817 __func__, v20_init[i].reg, rc);
6818 return rc;
6819 }
6820 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6821 " mask 0x%02x\n",
6822 __func__, v20_init[i].reg,
6823 v20_init[i].value, v20_init[i].mask);
6824 }
6825 }
6826 }
6827 printk(KERN_INFO "core type: %d\n", type);
6828
6829 return rc;
6830}
6831
6832static struct regulator *fm_regulator_s3;
6833static struct msm_xo_voter *fm_clock;
6834
6835static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6836{
6837 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306838 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006839 .direction = PM_GPIO_DIR_IN,
6840 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306841 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006842 .function = PM_GPIO_FUNC_NORMAL,
6843 .inv_int_pol = 0,
6844 };
6845
6846 if (!fm_regulator_s3) {
6847 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6848 if (IS_ERR(fm_regulator_s3)) {
6849 rc = PTR_ERR(fm_regulator_s3);
6850 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6851 __func__, rc);
6852 goto out;
6853 }
6854 }
6855
6856
6857 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6858 if (rc < 0) {
6859 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6860 __func__, rc);
6861 goto fm_fail_put;
6862 }
6863
6864 rc = regulator_enable(fm_regulator_s3);
6865 if (rc < 0) {
6866 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6867 __func__, rc);
6868 goto fm_fail_put;
6869 }
6870
6871 /*Vote for XO clock*/
6872 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6873
6874 if (IS_ERR(fm_clock)) {
6875 rc = PTR_ERR(fm_clock);
6876 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6877 __func__, rc);
6878 goto fm_fail_switch;
6879 }
6880
6881 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6882 if (rc < 0) {
6883 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6884 __func__, rc);
6885 goto fm_fail_vote;
6886 }
6887
6888 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306889 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006890 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306891 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006892 __func__, rc);
6893 goto fm_fail_clock;
6894 }
6895 goto out;
6896
6897fm_fail_clock:
6898 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6899fm_fail_vote:
6900 msm_xo_put(fm_clock);
6901fm_fail_switch:
6902 regulator_disable(fm_regulator_s3);
6903fm_fail_put:
6904 regulator_put(fm_regulator_s3);
6905out:
6906 return rc;
6907};
6908
6909static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6910{
6911 int rc = 0;
6912 if (fm_regulator_s3 != NULL) {
6913 rc = regulator_disable(fm_regulator_s3);
6914 if (rc < 0) {
6915 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6916 __func__, rc);
6917 }
6918 regulator_put(fm_regulator_s3);
6919 fm_regulator_s3 = NULL;
6920 }
6921 printk(KERN_ERR "%s: Voting off for XO", __func__);
6922
6923 if (fm_clock != NULL) {
6924 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6925 if (rc < 0) {
6926 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6927 __func__, rc);
6928 }
6929 msm_xo_put(fm_clock);
6930 }
6931 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6932}
6933
6934/* Slave id address for FM/CDC/QMEMBIST
6935 * Values can be programmed using Marimba slave id 0
6936 * should there be a conflict with other I2C devices
6937 * */
6938#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6939#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6940
6941static struct marimba_fm_platform_data marimba_fm_pdata = {
6942 .fm_setup = fm_radio_setup,
6943 .fm_shutdown = fm_radio_shutdown,
6944 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6945 .is_fm_soc_i2s_master = false,
6946 .config_i2s_gpio = NULL,
6947};
6948
6949/*
6950Just initializing the BAHAMA related slave
6951*/
6952static struct marimba_platform_data marimba_pdata = {
6953 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6954 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6955 .bahama_setup = msm_bahama_setup_power,
6956 .bahama_shutdown = msm_bahama_shutdown_power,
6957 .bahama_core_config = msm_bahama_core_config,
6958 .fm = &marimba_fm_pdata,
6959 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6960};
6961
6962
6963static struct i2c_board_info msm_marimba_board_info[] = {
6964 {
6965 I2C_BOARD_INFO("marimba", 0xc),
6966 .platform_data = &marimba_pdata,
6967 }
6968};
6969#endif /* CONFIG_MAIMBA_CORE */
6970
6971#ifdef CONFIG_I2C
6972#define I2C_SURF 1
6973#define I2C_FFA (1 << 1)
6974#define I2C_RUMI (1 << 2)
6975#define I2C_SIM (1 << 3)
6976#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006977#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006978
6979struct i2c_registry {
6980 u8 machs;
6981 int bus;
6982 struct i2c_board_info *info;
6983 int len;
6984};
6985
6986static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006987#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
6988 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006989 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006990 MSM_GSBI8_QUP_I2C_BUS_ID,
6991 core_expander_i2c_info,
6992 ARRAY_SIZE(core_expander_i2c_info),
6993 },
6994 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006995 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006996 MSM_GSBI8_QUP_I2C_BUS_ID,
6997 docking_expander_i2c_info,
6998 ARRAY_SIZE(docking_expander_i2c_info),
6999 },
7000 {
7001 I2C_SURF,
7002 MSM_GSBI8_QUP_I2C_BUS_ID,
7003 surf_expanders_i2c_info,
7004 ARRAY_SIZE(surf_expanders_i2c_info),
7005 },
7006 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007007 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007008 MSM_GSBI3_QUP_I2C_BUS_ID,
7009 fha_expanders_i2c_info,
7010 ARRAY_SIZE(fha_expanders_i2c_info),
7011 },
7012 {
7013 I2C_FLUID,
7014 MSM_GSBI3_QUP_I2C_BUS_ID,
7015 fluid_expanders_i2c_info,
7016 ARRAY_SIZE(fluid_expanders_i2c_info),
7017 },
7018 {
7019 I2C_FLUID,
7020 MSM_GSBI8_QUP_I2C_BUS_ID,
7021 fluid_core_expander_i2c_info,
7022 ARRAY_SIZE(fluid_core_expander_i2c_info),
7023 },
7024#endif
7025#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7026 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7027 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007028 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007029 MSM_GSBI3_QUP_I2C_BUS_ID,
7030 msm_i2c_gsbi3_tdisc_info,
7031 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7032 },
7033#endif
7034 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007035 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007036 MSM_GSBI3_QUP_I2C_BUS_ID,
7037 cy8ctmg200_board_info,
7038 ARRAY_SIZE(cy8ctmg200_board_info),
7039 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007040 {
7041 I2C_DRAGON,
7042 MSM_GSBI3_QUP_I2C_BUS_ID,
7043 cy8ctma340_dragon_board_info,
7044 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7045 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007046#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7047 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7048 {
7049 I2C_FLUID,
7050 MSM_GSBI3_QUP_I2C_BUS_ID,
7051 cyttsp_fluid_info,
7052 ARRAY_SIZE(cyttsp_fluid_info),
7053 },
7054 {
7055 I2C_FFA | I2C_SURF,
7056 MSM_GSBI3_QUP_I2C_BUS_ID,
7057 cyttsp_ffa_info,
7058 ARRAY_SIZE(cyttsp_ffa_info),
7059 },
7060#endif
7061#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007062 {
7063 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007064 MSM_GSBI4_QUP_I2C_BUS_ID,
7065 msm_camera_boardinfo,
7066 ARRAY_SIZE(msm_camera_boardinfo),
7067 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007068 {
7069 I2C_DRAGON,
7070 MSM_GSBI4_QUP_I2C_BUS_ID,
7071 msm_camera_dragon_boardinfo,
7072 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7073 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007074#endif
7075 {
7076 I2C_SURF | I2C_FFA | I2C_FLUID,
7077 MSM_GSBI7_QUP_I2C_BUS_ID,
7078 msm_i2c_gsbi7_timpani_info,
7079 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7080 },
7081#if defined(CONFIG_MARIMBA_CORE)
7082 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007083 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007084 MSM_GSBI7_QUP_I2C_BUS_ID,
7085 msm_marimba_board_info,
7086 ARRAY_SIZE(msm_marimba_board_info),
7087 },
7088#endif /* CONFIG_MARIMBA_CORE */
7089#ifdef CONFIG_ISL9519_CHARGER
7090 {
7091 I2C_SURF | I2C_FFA,
7092 MSM_GSBI8_QUP_I2C_BUS_ID,
7093 isl_charger_i2c_info,
7094 ARRAY_SIZE(isl_charger_i2c_info),
7095 },
7096#endif
7097#if defined(CONFIG_HAPTIC_ISA1200) || \
7098 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7099 {
7100 I2C_FLUID,
7101 MSM_GSBI8_QUP_I2C_BUS_ID,
7102 msm_isa1200_board_info,
7103 ARRAY_SIZE(msm_isa1200_board_info),
7104 },
7105#endif
7106#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7107 {
7108 I2C_FLUID,
7109 MSM_GSBI8_QUP_I2C_BUS_ID,
7110 smb137b_charger_i2c_info,
7111 ARRAY_SIZE(smb137b_charger_i2c_info),
7112 },
7113#endif
7114#if defined(CONFIG_BATTERY_BQ27520) || \
7115 defined(CONFIG_BATTERY_BQ27520_MODULE)
7116 {
7117 I2C_FLUID,
7118 MSM_GSBI8_QUP_I2C_BUS_ID,
7119 msm_bq27520_board_info,
7120 ARRAY_SIZE(msm_bq27520_board_info),
7121 },
7122#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007123#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7124 {
7125 I2C_DRAGON,
7126 MSM_GSBI8_QUP_I2C_BUS_ID,
7127 wm8903_codec_i2c_info,
7128 ARRAY_SIZE(wm8903_codec_i2c_info),
7129 },
7130#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007131};
7132#endif /* CONFIG_I2C */
7133
7134static void fixup_i2c_configs(void)
7135{
7136#ifdef CONFIG_I2C
7137#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7138 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7139 sx150x_data[SX150X_CORE].irq_summary =
7140 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007141 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7142 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007143 sx150x_data[SX150X_CORE].irq_summary =
7144 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7145 else if (machine_is_msm8x60_fluid())
7146 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7147 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7148#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007149#endif
7150}
7151
7152static void register_i2c_devices(void)
7153{
7154#ifdef CONFIG_I2C
7155 u8 mach_mask = 0;
7156 int i;
7157
7158 /* Build the matching 'supported_machs' bitmask */
7159 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7160 mach_mask = I2C_SURF;
7161 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7162 mach_mask = I2C_FFA;
7163 else if (machine_is_msm8x60_rumi3())
7164 mach_mask = I2C_RUMI;
7165 else if (machine_is_msm8x60_sim())
7166 mach_mask = I2C_SIM;
7167 else if (machine_is_msm8x60_fluid())
7168 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007169 else if (machine_is_msm8x60_dragon())
7170 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007171 else
7172 pr_err("unmatched machine ID in register_i2c_devices\n");
7173
7174 /* Run the array and install devices as appropriate */
7175 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7176 if (msm8x60_i2c_devices[i].machs & mach_mask)
7177 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7178 msm8x60_i2c_devices[i].info,
7179 msm8x60_i2c_devices[i].len);
7180 }
7181#endif
7182}
7183
7184static void __init msm8x60_init_uart12dm(void)
7185{
7186#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7187 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7188 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7189
7190 if (!fpga_mem)
7191 pr_err("%s(): Error getting memory\n", __func__);
7192
7193 /* Advanced mode */
7194 writew(0xFFFF, fpga_mem + 0x15C);
7195 /* FPGA_UART_SEL */
7196 writew(0, fpga_mem + 0x172);
7197 /* FPGA_GPIO_CONFIG_117 */
7198 writew(1, fpga_mem + 0xEA);
7199 /* FPGA_GPIO_CONFIG_118 */
7200 writew(1, fpga_mem + 0xEC);
7201 mb();
7202 iounmap(fpga_mem);
7203#endif
7204}
7205
7206#define MSM_GSBI9_PHYS 0x19900000
7207#define GSBI_DUAL_MODE_CODE 0x60
7208
7209static void __init msm8x60_init_buses(void)
7210{
7211#ifdef CONFIG_I2C_QUP
7212 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7213 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7214 writel_relaxed(0x6 << 4, gsbi_mem);
7215 /* Ensure protocol code is written before proceeding further */
7216 mb();
7217 iounmap(gsbi_mem);
7218
7219 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7220 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7221 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7222 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7223
7224#ifdef CONFIG_MSM_GSBI9_UART
7225 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7226 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7227 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7228 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7229 iounmap(gsbi_mem);
7230 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7231 }
7232#endif
7233 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7234 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7235#endif
7236#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7237 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7238#endif
7239#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007240 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7241#endif
7242
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307243#ifdef CONFIG_MSM_SSBI
7244 msm_device_ssbi_pmic1.dev.platform_data =
7245 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307246 msm_device_ssbi_pmic2.dev.platform_data =
7247 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307248#endif
7249
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007250 if (machine_is_msm8x60_fluid()) {
7251#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7252 (defined(CONFIG_SMB137B_CHARGER) || \
7253 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7254 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7255#endif
7256#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7257 msm_gsbi10_qup_spi_device.dev.platform_data =
7258 &msm_gsbi10_qup_spi_pdata;
7259#endif
7260 }
7261
7262#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7263 /*
7264 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7265 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7266 * and ID notifications are available only on V2 surf and FFA
7267 * with a hardware workaround.
7268 */
7269 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7270 (machine_is_msm8x60_surf() ||
7271 (machine_is_msm8x60_ffa() &&
7272 pmic_id_notif_supported)))
7273 msm_otg_pdata.phy_can_powercollapse = 1;
7274 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7275#endif
7276
7277#ifdef CONFIG_USB_GADGET_MSM_72K
7278 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7279#endif
7280
7281#ifdef CONFIG_SERIAL_MSM_HS
7282 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7283 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7284#endif
7285#ifdef CONFIG_MSM_GSBI9_UART
7286 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7287 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7288 if (IS_ERR(msm_device_uart_gsbi9))
7289 pr_err("%s(): Failed to create uart gsbi9 device\n",
7290 __func__);
7291 }
7292#endif
7293
7294#ifdef CONFIG_MSM_BUS_SCALING
7295
7296 /* RPM calls are only enabled on V2 */
7297 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7298 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7299 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7300 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7301 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7302 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7303 }
7304
7305 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7306 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7307 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7308 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7309 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7310#endif
7311}
7312
7313static void __init msm8x60_map_io(void)
7314{
7315 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7316 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007317
7318 if (socinfo_init() < 0)
7319 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007320}
7321
7322/*
7323 * Most segments of the EBI2 bus are disabled by default.
7324 */
7325static void __init msm8x60_init_ebi2(void)
7326{
7327 uint32_t ebi2_cfg;
7328 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007329 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7330
7331 if (IS_ERR(mem_clk)) {
7332 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7333 "msm_ebi2", "mem_clk");
7334 return;
7335 }
7336 clk_enable(mem_clk);
7337 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007338
7339 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7340 if (ebi2_cfg_ptr != 0) {
7341 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7342
7343 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007344 machine_is_msm8x60_fluid() ||
7345 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007346 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7347 else if (machine_is_msm8x60_sim())
7348 ebi2_cfg |= (1 << 4); /* CS2 */
7349 else if (machine_is_msm8x60_rumi3())
7350 ebi2_cfg |= (1 << 5); /* CS3 */
7351
7352 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7353 iounmap(ebi2_cfg_ptr);
7354 }
7355
7356 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007357 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007358 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7359 if (ebi2_cfg_ptr != 0) {
7360 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7361 writel_relaxed(0UL, ebi2_cfg_ptr);
7362
7363 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7364 * LAN9221 Ethernet controller reads and writes.
7365 * The lowest 4 bits are the read delay, the next
7366 * 4 are the write delay. */
7367 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7368#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7369 /*
7370 * RECOVERY=5, HOLD_WR=1
7371 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7372 * WAIT_WR=1, WAIT_RD=2
7373 */
7374 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7375 /*
7376 * HOLD_RD=1
7377 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7378 */
7379 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7380#else
7381 /* EBI2 CS3 muxed address/data,
7382 * two cyc addr enable */
7383 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7384
7385#endif
7386 iounmap(ebi2_cfg_ptr);
7387 }
7388 }
7389}
7390
7391static void __init msm8x60_configure_smc91x(void)
7392{
7393 if (machine_is_msm8x60_sim()) {
7394
7395 smc91x_resources[0].start = 0x1b800300;
7396 smc91x_resources[0].end = 0x1b8003ff;
7397
7398 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7399 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7400
7401 } else if (machine_is_msm8x60_rumi3()) {
7402
7403 smc91x_resources[0].start = 0x1d000300;
7404 smc91x_resources[0].end = 0x1d0003ff;
7405
7406 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7407 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7408 }
7409}
7410
7411static void __init msm8x60_init_tlmm(void)
7412{
7413 if (machine_is_msm8x60_rumi3())
7414 msm_gpio_install_direct_irq(0, 0, 1);
7415}
7416
7417#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7418 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7419 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7420 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7421 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7422
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007423/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007424#define MAX_SDCC_CONTROLLER 5
7425
7426struct msm_sdcc_gpio {
7427 /* maximum 10 GPIOs per SDCC controller */
7428 s16 no;
7429 /* name of this GPIO */
7430 const char *name;
7431 bool always_on;
7432 bool is_enabled;
7433};
7434
7435#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7436static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7437 {159, "sdc1_dat_0"},
7438 {160, "sdc1_dat_1"},
7439 {161, "sdc1_dat_2"},
7440 {162, "sdc1_dat_3"},
7441#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7442 {163, "sdc1_dat_4"},
7443 {164, "sdc1_dat_5"},
7444 {165, "sdc1_dat_6"},
7445 {166, "sdc1_dat_7"},
7446#endif
7447 {167, "sdc1_clk"},
7448 {168, "sdc1_cmd"}
7449};
7450#endif
7451
7452#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7453static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7454 {143, "sdc2_dat_0"},
7455 {144, "sdc2_dat_1", 1},
7456 {145, "sdc2_dat_2"},
7457 {146, "sdc2_dat_3"},
7458#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7459 {147, "sdc2_dat_4"},
7460 {148, "sdc2_dat_5"},
7461 {149, "sdc2_dat_6"},
7462 {150, "sdc2_dat_7"},
7463#endif
7464 {151, "sdc2_cmd"},
7465 {152, "sdc2_clk", 1}
7466};
7467#endif
7468
7469#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7470static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7471 {95, "sdc5_cmd"},
7472 {96, "sdc5_dat_3"},
7473 {97, "sdc5_clk", 1},
7474 {98, "sdc5_dat_2"},
7475 {99, "sdc5_dat_1", 1},
7476 {100, "sdc5_dat_0"}
7477};
7478#endif
7479
7480struct msm_sdcc_pad_pull_cfg {
7481 enum msm_tlmm_pull_tgt pull;
7482 u32 pull_val;
7483};
7484
7485struct msm_sdcc_pad_drv_cfg {
7486 enum msm_tlmm_hdrive_tgt drv;
7487 u32 drv_val;
7488};
7489
7490#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7491static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7492 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7493 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7494 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7495};
7496
7497static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7498 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7499 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7500};
7501
7502static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7503 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7504 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7505 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7506};
7507
7508static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7509 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7510 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7511};
7512#endif
7513
7514#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7515static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7516 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7517 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7518 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7519};
7520
7521static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7522 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7523 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7524};
7525
7526static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7527 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7528 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7529 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7530};
7531
7532static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7533 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7534 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7535};
7536#endif
7537
7538struct msm_sdcc_pin_cfg {
7539 /*
7540 * = 1 if controller pins are using gpios
7541 * = 0 if controller has dedicated MSM pins
7542 */
7543 u8 is_gpio;
7544 u8 cfg_sts;
7545 u8 gpio_data_size;
7546 struct msm_sdcc_gpio *gpio_data;
7547 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7548 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7549 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7550 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7551 u8 pad_drv_data_size;
7552 u8 pad_pull_data_size;
7553 u8 sdio_lpm_gpio_cfg;
7554};
7555
7556
7557static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7558#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7559 [0] = {
7560 .is_gpio = 1,
7561 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7562 .gpio_data = sdc1_gpio_cfg
7563 },
7564#endif
7565#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7566 [1] = {
7567 .is_gpio = 1,
7568 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7569 .gpio_data = sdc2_gpio_cfg
7570 },
7571#endif
7572#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7573 [2] = {
7574 .is_gpio = 0,
7575 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7576 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7577 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7578 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7579 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7580 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7581 },
7582#endif
7583#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7584 [3] = {
7585 .is_gpio = 0,
7586 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7587 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7588 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7589 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7590 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7591 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7592 },
7593#endif
7594#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7595 [4] = {
7596 .is_gpio = 1,
7597 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7598 .gpio_data = sdc5_gpio_cfg
7599 }
7600#endif
7601};
7602
7603static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7604{
7605 int rc = 0;
7606 struct msm_sdcc_pin_cfg *curr;
7607 int n;
7608
7609 curr = &sdcc_pin_cfg_data[dev_id - 1];
7610 if (!curr->gpio_data)
7611 goto out;
7612
7613 for (n = 0; n < curr->gpio_data_size; n++) {
7614 if (enable) {
7615
7616 if (curr->gpio_data[n].always_on &&
7617 curr->gpio_data[n].is_enabled)
7618 continue;
7619 pr_debug("%s: enable: %s\n", __func__,
7620 curr->gpio_data[n].name);
7621 rc = gpio_request(curr->gpio_data[n].no,
7622 curr->gpio_data[n].name);
7623 if (rc) {
7624 pr_err("%s: gpio_request(%d, %s)"
7625 "failed", __func__,
7626 curr->gpio_data[n].no,
7627 curr->gpio_data[n].name);
7628 goto free_gpios;
7629 }
7630 /* set direction as output for all GPIOs */
7631 rc = gpio_direction_output(
7632 curr->gpio_data[n].no, 1);
7633 if (rc) {
7634 pr_err("%s: gpio_direction_output"
7635 "(%d, 1) failed\n", __func__,
7636 curr->gpio_data[n].no);
7637 goto free_gpios;
7638 }
7639 curr->gpio_data[n].is_enabled = 1;
7640 } else {
7641 /*
7642 * now free this GPIO which will put GPIO
7643 * in low power mode and will also put GPIO
7644 * in input mode
7645 */
7646 if (curr->gpio_data[n].always_on)
7647 continue;
7648 pr_debug("%s: disable: %s\n", __func__,
7649 curr->gpio_data[n].name);
7650 gpio_free(curr->gpio_data[n].no);
7651 curr->gpio_data[n].is_enabled = 0;
7652 }
7653 }
7654 curr->cfg_sts = enable;
7655 goto out;
7656
7657free_gpios:
7658 for (; n >= 0; n--)
7659 gpio_free(curr->gpio_data[n].no);
7660out:
7661 return rc;
7662}
7663
7664static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7665{
7666 int rc = 0;
7667 struct msm_sdcc_pin_cfg *curr;
7668 int n;
7669
7670 curr = &sdcc_pin_cfg_data[dev_id - 1];
7671 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7672 goto out;
7673
7674 if (enable) {
7675 /*
7676 * set up the normal driver strength and
7677 * pull config for pads
7678 */
7679 for (n = 0; n < curr->pad_drv_data_size; n++) {
7680 if (curr->sdio_lpm_gpio_cfg) {
7681 if (curr->pad_drv_on_data[n].drv ==
7682 TLMM_HDRV_SDC4_DATA)
7683 continue;
7684 }
7685 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7686 curr->pad_drv_on_data[n].drv_val);
7687 }
7688 for (n = 0; n < curr->pad_pull_data_size; n++) {
7689 if (curr->sdio_lpm_gpio_cfg) {
7690 if (curr->pad_pull_on_data[n].pull ==
7691 TLMM_PULL_SDC4_DATA)
7692 continue;
7693 }
7694 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7695 curr->pad_pull_on_data[n].pull_val);
7696 }
7697 } else {
7698 /* set the low power config for pads */
7699 for (n = 0; n < curr->pad_drv_data_size; n++) {
7700 if (curr->sdio_lpm_gpio_cfg) {
7701 if (curr->pad_drv_off_data[n].drv ==
7702 TLMM_HDRV_SDC4_DATA)
7703 continue;
7704 }
7705 msm_tlmm_set_hdrive(
7706 curr->pad_drv_off_data[n].drv,
7707 curr->pad_drv_off_data[n].drv_val);
7708 }
7709 for (n = 0; n < curr->pad_pull_data_size; n++) {
7710 if (curr->sdio_lpm_gpio_cfg) {
7711 if (curr->pad_pull_off_data[n].pull ==
7712 TLMM_PULL_SDC4_DATA)
7713 continue;
7714 }
7715 msm_tlmm_set_pull(
7716 curr->pad_pull_off_data[n].pull,
7717 curr->pad_pull_off_data[n].pull_val);
7718 }
7719 }
7720 curr->cfg_sts = enable;
7721out:
7722 return rc;
7723}
7724
7725struct sdcc_reg {
7726 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7727 const char *reg_name;
7728 /*
7729 * is set voltage supported for this regulator?
7730 * 0 = not supported, 1 = supported
7731 */
7732 unsigned char set_voltage_sup;
7733 /* voltage level to be set */
7734 unsigned int level;
7735 /* VDD/VCC/VCCQ voltage regulator handle */
7736 struct regulator *reg;
7737 /* is this regulator enabled? */
7738 bool enabled;
7739 /* is this regulator needs to be always on? */
7740 bool always_on;
7741 /* is operating power mode setting required for this regulator? */
7742 bool op_pwr_mode_sup;
7743 /* Load values for low power and high power mode */
7744 unsigned int lpm_uA;
7745 unsigned int hpm_uA;
7746};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007747/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007748static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7749/* only SDCC1 requires VCCQ voltage */
7750static struct sdcc_reg sdcc_vccq_reg_data[1];
7751/* all SDCC controllers may require voting for VDD PAD voltage */
7752static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7753
7754struct sdcc_reg_data {
7755 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7756 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7757 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7758 unsigned char sts; /* regulator enable/disable status */
7759};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007760/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007761static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7762
7763static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7764{
7765 int rc = 0;
7766
7767 /* Get the regulator handle */
7768 vreg->reg = regulator_get(NULL, vreg->reg_name);
7769 if (IS_ERR(vreg->reg)) {
7770 rc = PTR_ERR(vreg->reg);
7771 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7772 __func__, vreg->reg_name, rc);
7773 goto out;
7774 }
7775
7776 /* Set the voltage level if required */
7777 if (vreg->set_voltage_sup) {
7778 rc = regulator_set_voltage(vreg->reg, vreg->level,
7779 vreg->level);
7780 if (rc) {
7781 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7782 __func__, vreg->reg_name, rc);
7783 goto vreg_put;
7784 }
7785 }
7786 goto out;
7787
7788vreg_put:
7789 regulator_put(vreg->reg);
7790out:
7791 return rc;
7792}
7793
7794static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7795{
7796 regulator_put(vreg->reg);
7797}
7798
7799/* this init function should be called only once for each SDCC */
7800static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7801{
7802 int rc = 0;
7803 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7804 struct sdcc_reg_data *curr;
7805
7806 curr = &sdcc_vreg_data[dev_id - 1];
7807 curr_vdd_reg = curr->vdd_data;
7808 curr_vccq_reg = curr->vccq_data;
7809 curr_vddp_reg = curr->vddp_data;
7810
7811 if (init) {
7812 /*
7813 * get the regulator handle from voltage regulator framework
7814 * and then try to set the voltage level for the regulator
7815 */
7816 if (curr_vdd_reg) {
7817 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7818 if (rc)
7819 goto out;
7820 }
7821 if (curr_vccq_reg) {
7822 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7823 if (rc)
7824 goto vdd_reg_deinit;
7825 }
7826 if (curr_vddp_reg) {
7827 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7828 if (rc)
7829 goto vccq_reg_deinit;
7830 }
7831 goto out;
7832 } else
7833 /* deregister with all regulators from regulator framework */
7834 goto vddp_reg_deinit;
7835
7836vddp_reg_deinit:
7837 if (curr_vddp_reg)
7838 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7839vccq_reg_deinit:
7840 if (curr_vccq_reg)
7841 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7842vdd_reg_deinit:
7843 if (curr_vdd_reg)
7844 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7845out:
7846 return rc;
7847}
7848
7849static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7850{
7851 int rc;
7852
7853 if (!vreg->enabled) {
7854 rc = regulator_enable(vreg->reg);
7855 if (rc) {
7856 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7857 __func__, vreg->reg_name, rc);
7858 goto out;
7859 }
7860 vreg->enabled = 1;
7861 }
7862
7863 /* Put always_on regulator in HPM (high power mode) */
7864 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7865 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7866 if (rc < 0) {
7867 pr_err("%s: reg=%s: HPM setting failed"
7868 " hpm_uA=%d, rc=%d\n",
7869 __func__, vreg->reg_name,
7870 vreg->hpm_uA, rc);
7871 goto vreg_disable;
7872 }
7873 rc = 0;
7874 }
7875 goto out;
7876
7877vreg_disable:
7878 regulator_disable(vreg->reg);
7879 vreg->enabled = 0;
7880out:
7881 return rc;
7882}
7883
7884static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7885{
7886 int rc;
7887
7888 /* Never disable always_on regulator */
7889 if (!vreg->always_on) {
7890 rc = regulator_disable(vreg->reg);
7891 if (rc) {
7892 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7893 __func__, vreg->reg_name, rc);
7894 goto out;
7895 }
7896 vreg->enabled = 0;
7897 }
7898
7899 /* Put always_on regulator in LPM (low power mode) */
7900 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7901 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7902 if (rc < 0) {
7903 pr_err("%s: reg=%s: LPM setting failed"
7904 " lpm_uA=%d, rc=%d\n",
7905 __func__,
7906 vreg->reg_name,
7907 vreg->lpm_uA, rc);
7908 goto out;
7909 }
7910 rc = 0;
7911 }
7912
7913out:
7914 return rc;
7915}
7916
7917static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7918{
7919 int rc = 0;
7920 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7921 struct sdcc_reg_data *curr;
7922
7923 curr = &sdcc_vreg_data[dev_id - 1];
7924 curr_vdd_reg = curr->vdd_data;
7925 curr_vccq_reg = curr->vccq_data;
7926 curr_vddp_reg = curr->vddp_data;
7927
7928 /* check if regulators are initialized or not? */
7929 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7930 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7931 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7932 /* initialize voltage regulators required for this SDCC */
7933 rc = msm_sdcc_vreg_init(dev_id, 1);
7934 if (rc) {
7935 pr_err("%s: regulator init failed = %d\n",
7936 __func__, rc);
7937 goto out;
7938 }
7939 }
7940
7941 if (curr->sts == enable)
7942 goto out;
7943
7944 if (curr_vdd_reg) {
7945 if (enable)
7946 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7947 else
7948 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7949 if (rc)
7950 goto out;
7951 }
7952
7953 if (curr_vccq_reg) {
7954 if (enable)
7955 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7956 else
7957 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7958 if (rc)
7959 goto out;
7960 }
7961
7962 if (curr_vddp_reg) {
7963 if (enable)
7964 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7965 else
7966 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7967 if (rc)
7968 goto out;
7969 }
7970 curr->sts = enable;
7971
7972out:
7973 return rc;
7974}
7975
7976static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7977{
7978 u32 rc_pin_cfg = 0;
7979 u32 rc_vreg_cfg = 0;
7980 u32 rc = 0;
7981 struct platform_device *pdev;
7982 struct msm_sdcc_pin_cfg *curr_pin_cfg;
7983
7984 pdev = container_of(dv, struct platform_device, dev);
7985
7986 /* setup gpio/pad */
7987 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
7988 if (curr_pin_cfg->cfg_sts == !!vdd)
7989 goto setup_vreg;
7990
7991 if (curr_pin_cfg->is_gpio)
7992 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
7993 else
7994 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
7995
7996setup_vreg:
7997 /* setup voltage regulators */
7998 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
7999
8000 if (rc_pin_cfg || rc_vreg_cfg)
8001 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8002
8003 return rc;
8004}
8005
8006static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8007{
8008 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8009 struct platform_device *pdev;
8010
8011 pdev = container_of(dv, struct platform_device, dev);
8012 /* setup gpio/pad */
8013 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8014
8015 if (curr_pin_cfg->cfg_sts == active)
8016 return;
8017
8018 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8019 if (curr_pin_cfg->is_gpio)
8020 msm_sdcc_setup_gpio(pdev->id, active);
8021 else
8022 msm_sdcc_setup_pad(pdev->id, active);
8023 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8024}
8025
8026static int msm_sdc3_get_wpswitch(struct device *dev)
8027{
8028 struct platform_device *pdev;
8029 int status;
8030 pdev = container_of(dev, struct platform_device, dev);
8031
8032 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8033 if (status) {
8034 pr_err("%s:Failed to request GPIO %d\n",
8035 __func__, GPIO_SDC_WP);
8036 } else {
8037 status = gpio_direction_input(GPIO_SDC_WP);
8038 if (!status) {
8039 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8040 pr_info("%s: WP Status for Slot %d = %d\n",
8041 __func__, pdev->id, status);
8042 }
8043 gpio_free(GPIO_SDC_WP);
8044 }
8045 return status;
8046}
8047
8048#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8049int sdc5_register_status_notify(void (*callback)(int, void *),
8050 void *dev_id)
8051{
8052 sdc5_status_notify_cb = callback;
8053 sdc5_status_notify_cb_devid = dev_id;
8054 return 0;
8055}
8056#endif
8057
8058#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8059int sdc2_register_status_notify(void (*callback)(int, void *),
8060 void *dev_id)
8061{
8062 sdc2_status_notify_cb = callback;
8063 sdc2_status_notify_cb_devid = dev_id;
8064 return 0;
8065}
8066#endif
8067
8068/* Interrupt handler for SDC2 and SDC5 detection
8069 * This function uses dual-edge interrputs settings in order
8070 * to get SDIO detection when the GPIO is rising and SDIO removal
8071 * when the GPIO is falling */
8072static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8073{
8074 int status;
8075
8076 if (!machine_is_msm8x60_fusion() &&
8077 !machine_is_msm8x60_fusn_ffa())
8078 return IRQ_NONE;
8079
8080 status = gpio_get_value(MDM2AP_SYNC);
8081 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8082 __func__, status);
8083
8084#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8085 if (sdc2_status_notify_cb) {
8086 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8087 sdc2_status_notify_cb(status,
8088 sdc2_status_notify_cb_devid);
8089 }
8090#endif
8091
8092#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8093 if (sdc5_status_notify_cb) {
8094 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8095 sdc5_status_notify_cb(status,
8096 sdc5_status_notify_cb_devid);
8097 }
8098#endif
8099 return IRQ_HANDLED;
8100}
8101
8102static int msm8x60_multi_sdio_init(void)
8103{
8104 int ret, irq_num;
8105
8106 if (!machine_is_msm8x60_fusion() &&
8107 !machine_is_msm8x60_fusn_ffa())
8108 return 0;
8109
8110 ret = msm_gpiomux_get(MDM2AP_SYNC);
8111 if (ret) {
8112 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8113 __func__, MDM2AP_SYNC, ret);
8114 return ret;
8115 }
8116
8117 irq_num = gpio_to_irq(MDM2AP_SYNC);
8118
8119 ret = request_irq(irq_num,
8120 msm8x60_multi_sdio_slot_status_irq,
8121 IRQ_TYPE_EDGE_BOTH,
8122 "sdio_multidetection", NULL);
8123
8124 if (ret) {
8125 pr_err("%s:Failed to request irq, ret=%d\n",
8126 __func__, ret);
8127 return ret;
8128 }
8129
8130 return ret;
8131}
8132
8133#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8134#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8135static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8136{
8137 int status;
8138
8139 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8140 , "SD_HW_Detect");
8141 if (status) {
8142 pr_err("%s:Failed to request GPIO %d\n", __func__,
8143 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8144 } else {
8145 status = gpio_direction_input(
8146 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8147 if (!status)
8148 status = !(gpio_get_value_cansleep(
8149 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8150 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8151 }
8152 return (unsigned int) status;
8153}
8154#endif
8155#endif
8156
8157#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8158static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8159{
8160 struct platform_device *pdev;
8161 enum msm_mpm_pin pin;
8162 int ret = 0;
8163
8164 pdev = container_of(dev, struct platform_device, dev);
8165
8166 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8167 if (pdev->id == 4)
8168 pin = MSM_MPM_PIN_SDC4_DAT1;
8169 else
8170 return -EINVAL;
8171
8172 switch (mode) {
8173 case SDC_DAT1_DISABLE:
8174 ret = msm_mpm_enable_pin(pin, 0);
8175 break;
8176 case SDC_DAT1_ENABLE:
8177 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8178 ret = msm_mpm_enable_pin(pin, 1);
8179 break;
8180 case SDC_DAT1_ENWAKE:
8181 ret = msm_mpm_set_pin_wake(pin, 1);
8182 break;
8183 case SDC_DAT1_DISWAKE:
8184 ret = msm_mpm_set_pin_wake(pin, 0);
8185 break;
8186 default:
8187 ret = -EINVAL;
8188 break;
8189 }
8190 return ret;
8191}
8192#endif
8193#endif
8194
8195#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8196static struct mmc_platform_data msm8x60_sdc1_data = {
8197 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8198 .translate_vdd = msm_sdcc_setup_power,
8199#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8200 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8201#else
8202 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8203#endif
8204 .msmsdcc_fmin = 400000,
8205 .msmsdcc_fmid = 24000000,
8206 .msmsdcc_fmax = 48000000,
8207 .nonremovable = 1,
8208 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008209};
8210#endif
8211
8212#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8213static struct mmc_platform_data msm8x60_sdc2_data = {
8214 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8215 .translate_vdd = msm_sdcc_setup_power,
8216 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8217 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8218 .msmsdcc_fmin = 400000,
8219 .msmsdcc_fmid = 24000000,
8220 .msmsdcc_fmax = 48000000,
8221 .nonremovable = 0,
8222 .pclk_src_dfab = 1,
8223 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008224#ifdef CONFIG_MSM_SDIO_AL
8225 .is_sdio_al_client = 1,
8226#endif
8227};
8228#endif
8229
8230#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8231static struct mmc_platform_data msm8x60_sdc3_data = {
8232 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8233 .translate_vdd = msm_sdcc_setup_power,
8234 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8235 .wpswitch = msm_sdc3_get_wpswitch,
8236#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8237 .status = msm8x60_sdcc_slot_status,
8238 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8239 PMIC_GPIO_SDC3_DET - 1),
8240 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8241#endif
8242 .msmsdcc_fmin = 400000,
8243 .msmsdcc_fmid = 24000000,
8244 .msmsdcc_fmax = 48000000,
8245 .nonremovable = 0,
8246 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008247};
8248#endif
8249
8250#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8251static struct mmc_platform_data msm8x60_sdc4_data = {
8252 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8253 .translate_vdd = msm_sdcc_setup_power,
8254 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8255 .msmsdcc_fmin = 400000,
8256 .msmsdcc_fmid = 24000000,
8257 .msmsdcc_fmax = 48000000,
8258 .nonremovable = 0,
8259 .pclk_src_dfab = 1,
8260 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008261};
8262#endif
8263
8264#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8265static struct mmc_platform_data msm8x60_sdc5_data = {
8266 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8267 .translate_vdd = msm_sdcc_setup_power,
8268 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8269 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8270 .msmsdcc_fmin = 400000,
8271 .msmsdcc_fmid = 24000000,
8272 .msmsdcc_fmax = 48000000,
8273 .nonremovable = 0,
8274 .pclk_src_dfab = 1,
8275 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008276#ifdef CONFIG_MSM_SDIO_AL
8277 .is_sdio_al_client = 1,
8278#endif
8279};
8280#endif
8281
8282static void __init msm8x60_init_mmc(void)
8283{
8284#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8285 /* SDCC1 : eMMC card connected */
8286 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8287 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8288 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8289 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308290 sdcc_vreg_data[0].vdd_data->always_on = 1;
8291 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8292 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8293 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008294
8295 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8296 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8297 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8298 sdcc_vreg_data[0].vccq_data->always_on = 1;
8299
8300 msm_add_sdcc(1, &msm8x60_sdc1_data);
8301#endif
8302#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8303 /*
8304 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8305 * and no card is connected on 8660 SURF/FFA/FLUID.
8306 */
8307 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8308 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8309 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8310 sdcc_vreg_data[1].vdd_data->level = 1800000;
8311
8312 sdcc_vreg_data[1].vccq_data = NULL;
8313
8314 if (machine_is_msm8x60_fusion())
8315 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8316 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8317#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8318 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8319 msm_sdcc_setup_gpio(2, 1);
8320#endif
8321 msm_add_sdcc(2, &msm8x60_sdc2_data);
8322 }
8323#endif
8324#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8325 /* SDCC3 : External card slot connected */
8326 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8327 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8328 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8329 sdcc_vreg_data[2].vdd_data->level = 2850000;
8330 sdcc_vreg_data[2].vdd_data->always_on = 1;
8331 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8332 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8333 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8334
8335 sdcc_vreg_data[2].vccq_data = NULL;
8336
8337 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8338 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8339 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8340 sdcc_vreg_data[2].vddp_data->level = 2850000;
8341 sdcc_vreg_data[2].vddp_data->always_on = 1;
8342 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8343 /* Sleep current required is ~300 uA. But min. RPM
8344 * vote can be in terms of mA (min. 1 mA).
8345 * So let's vote for 2 mA during sleep.
8346 */
8347 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8348 /* Max. Active current required is 16 mA */
8349 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8350
8351 if (machine_is_msm8x60_fluid())
8352 msm8x60_sdc3_data.wpswitch = NULL;
8353 msm_add_sdcc(3, &msm8x60_sdc3_data);
8354#endif
8355#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8356 /* SDCC4 : WLAN WCN1314 chip is connected */
8357 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8358 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8359 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8360 sdcc_vreg_data[3].vdd_data->level = 1800000;
8361
8362 sdcc_vreg_data[3].vccq_data = NULL;
8363
8364 msm_add_sdcc(4, &msm8x60_sdc4_data);
8365#endif
8366#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8367 /*
8368 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8369 * and no card is connected on 8660 SURF/FFA/FLUID.
8370 */
8371 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8372 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8373 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8374 sdcc_vreg_data[4].vdd_data->level = 1800000;
8375
8376 sdcc_vreg_data[4].vccq_data = NULL;
8377
8378 if (machine_is_msm8x60_fusion())
8379 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8380 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8381#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8382 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8383 msm_sdcc_setup_gpio(5, 1);
8384#endif
8385 msm_add_sdcc(5, &msm8x60_sdc5_data);
8386 }
8387#endif
8388}
8389
8390#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8391static inline void display_common_power(int on) {}
8392#else
8393
8394#define _GET_REGULATOR(var, name) do { \
8395 if (var == NULL) { \
8396 var = regulator_get(NULL, name); \
8397 if (IS_ERR(var)) { \
8398 pr_err("'%s' regulator not found, rc=%ld\n", \
8399 name, PTR_ERR(var)); \
8400 var = NULL; \
8401 } \
8402 } \
8403} while (0)
8404
8405static int dsub_regulator(int on)
8406{
8407 static struct regulator *dsub_reg;
8408 static struct regulator *mpp0_reg;
8409 static int dsub_reg_enabled;
8410 int rc = 0;
8411
8412 _GET_REGULATOR(dsub_reg, "8901_l3");
8413 if (IS_ERR(dsub_reg)) {
8414 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8415 __func__, PTR_ERR(dsub_reg));
8416 return PTR_ERR(dsub_reg);
8417 }
8418
8419 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8420 if (IS_ERR(mpp0_reg)) {
8421 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8422 __func__, PTR_ERR(mpp0_reg));
8423 return PTR_ERR(mpp0_reg);
8424 }
8425
8426 if (on && !dsub_reg_enabled) {
8427 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8428 if (rc) {
8429 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8430 " err=%d", __func__, rc);
8431 goto dsub_regulator_err;
8432 }
8433 rc = regulator_enable(dsub_reg);
8434 if (rc) {
8435 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8436 " err=%d", __func__, rc);
8437 goto dsub_regulator_err;
8438 }
8439 rc = regulator_enable(mpp0_reg);
8440 if (rc) {
8441 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8442 " err=%d", __func__, rc);
8443 goto dsub_regulator_err;
8444 }
8445 dsub_reg_enabled = 1;
8446 } else if (!on && dsub_reg_enabled) {
8447 rc = regulator_disable(dsub_reg);
8448 if (rc)
8449 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8450 " err=%d", __func__, rc);
8451 rc = regulator_disable(mpp0_reg);
8452 if (rc)
8453 printk(KERN_WARNING "%s: failed to disable reg "
8454 "8901_mpp0 err=%d", __func__, rc);
8455 dsub_reg_enabled = 0;
8456 }
8457
8458 return rc;
8459
8460dsub_regulator_err:
8461 regulator_put(mpp0_reg);
8462 regulator_put(dsub_reg);
8463 return rc;
8464}
8465
8466static int display_power_on;
8467static void setup_display_power(void)
8468{
8469 if (display_power_on)
8470 if (lcdc_vga_enabled) {
8471 dsub_regulator(1);
8472 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8473 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8474 if (machine_is_msm8x60_ffa() ||
8475 machine_is_msm8x60_fusn_ffa())
8476 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8477 } else {
8478 dsub_regulator(0);
8479 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8480 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8481 if (machine_is_msm8x60_ffa() ||
8482 machine_is_msm8x60_fusn_ffa())
8483 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8484 }
8485 else {
8486 dsub_regulator(0);
8487 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8488 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8489 /* BACKLIGHT */
8490 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8491 /* LVDS */
8492 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8493 }
8494}
8495
8496#define _GET_REGULATOR(var, name) do { \
8497 if (var == NULL) { \
8498 var = regulator_get(NULL, name); \
8499 if (IS_ERR(var)) { \
8500 pr_err("'%s' regulator not found, rc=%ld\n", \
8501 name, PTR_ERR(var)); \
8502 var = NULL; \
8503 } \
8504 } \
8505} while (0)
8506
8507#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8508
8509static void display_common_power(int on)
8510{
8511 int rc;
8512 static struct regulator *display_reg;
8513
8514 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8515 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8516 if (on) {
8517 /* LVDS */
8518 _GET_REGULATOR(display_reg, "8901_l2");
8519 if (!display_reg)
8520 return;
8521 rc = regulator_set_voltage(display_reg,
8522 3300000, 3300000);
8523 if (rc)
8524 goto out;
8525 rc = regulator_enable(display_reg);
8526 if (rc)
8527 goto out;
8528 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8529 "LVDS_STDN_OUT_N");
8530 if (rc) {
8531 printk(KERN_ERR "%s: LVDS gpio %d request"
8532 "failed\n", __func__,
8533 GPIO_LVDS_SHUTDOWN_N);
8534 goto out2;
8535 }
8536
8537 /* BACKLIGHT */
8538 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8539 if (rc) {
8540 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8541 "failed\n", __func__,
8542 GPIO_BACKLIGHT_EN);
8543 goto out3;
8544 }
8545
8546 if (machine_is_msm8x60_ffa() ||
8547 machine_is_msm8x60_fusn_ffa()) {
8548 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8549 "DONGLE_PWR_EN");
8550 if (rc) {
8551 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8552 " %d request failed\n", __func__,
8553 GPIO_DONGLE_PWR_EN);
8554 goto out4;
8555 }
8556 }
8557
8558 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8559 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8560 if (machine_is_msm8x60_ffa() ||
8561 machine_is_msm8x60_fusn_ffa())
8562 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8563 mdelay(20);
8564 display_power_on = 1;
8565 setup_display_power();
8566 } else {
8567 if (display_power_on) {
8568 display_power_on = 0;
8569 setup_display_power();
8570 mdelay(20);
8571 if (machine_is_msm8x60_ffa() ||
8572 machine_is_msm8x60_fusn_ffa())
8573 gpio_free(GPIO_DONGLE_PWR_EN);
8574 goto out4;
8575 }
8576 }
8577 }
8578#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8579 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8580 else if (machine_is_msm8x60_fluid()) {
8581 static struct regulator *fluid_reg;
8582 static struct regulator *fluid_reg2;
8583
8584 if (on) {
8585 _GET_REGULATOR(fluid_reg, "8901_l2");
8586 if (!fluid_reg)
8587 return;
8588 _GET_REGULATOR(fluid_reg2, "8058_s3");
8589 if (!fluid_reg2) {
8590 regulator_put(fluid_reg);
8591 return;
8592 }
8593 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8594 if (rc) {
8595 regulator_put(fluid_reg2);
8596 regulator_put(fluid_reg);
8597 return;
8598 }
8599 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8600 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8601 regulator_enable(fluid_reg);
8602 regulator_enable(fluid_reg2);
8603 msleep(20);
8604 gpio_direction_output(GPIO_RESX_N, 0);
8605 udelay(10);
8606 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8607 display_power_on = 1;
8608 setup_display_power();
8609 } else {
8610 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8611 gpio_free(GPIO_RESX_N);
8612 msleep(20);
8613 regulator_disable(fluid_reg2);
8614 regulator_disable(fluid_reg);
8615 regulator_put(fluid_reg2);
8616 regulator_put(fluid_reg);
8617 display_power_on = 0;
8618 setup_display_power();
8619 fluid_reg = NULL;
8620 fluid_reg2 = NULL;
8621 }
8622 }
8623#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008624#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8625 else if (machine_is_msm8x60_dragon()) {
8626 static struct regulator *dragon_reg;
8627 static struct regulator *dragon_reg2;
8628
8629 if (on) {
8630 _GET_REGULATOR(dragon_reg, "8901_l2");
8631 if (!dragon_reg)
8632 return;
8633 _GET_REGULATOR(dragon_reg2, "8058_l16");
8634 if (!dragon_reg2) {
8635 regulator_put(dragon_reg);
8636 dragon_reg = NULL;
8637 return;
8638 }
8639
8640 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8641 if (rc) {
8642 pr_err("%s: gpio %d request failed with rc=%d\n",
8643 __func__, GPIO_NT35582_BL_EN, rc);
8644 regulator_put(dragon_reg);
8645 regulator_put(dragon_reg2);
8646 dragon_reg = NULL;
8647 dragon_reg2 = NULL;
8648 return;
8649 }
8650
8651 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8652 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8653 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8654 pr_err("%s: config gpio '%d' failed!\n",
8655 __func__, GPIO_NT35582_RESET);
8656 gpio_free(GPIO_NT35582_BL_EN);
8657 regulator_put(dragon_reg);
8658 regulator_put(dragon_reg2);
8659 dragon_reg = NULL;
8660 dragon_reg2 = NULL;
8661 return;
8662 }
8663
8664 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8665 if (rc) {
8666 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8667 __func__, GPIO_NT35582_RESET, rc);
8668 gpio_free(GPIO_NT35582_BL_EN);
8669 regulator_put(dragon_reg);
8670 regulator_put(dragon_reg2);
8671 dragon_reg = NULL;
8672 dragon_reg2 = NULL;
8673 return;
8674 }
8675
8676 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8677 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8678 regulator_enable(dragon_reg);
8679 regulator_enable(dragon_reg2);
8680 msleep(20);
8681
8682 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8683 msleep(20);
8684 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8685 msleep(20);
8686 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8687 msleep(50);
8688
8689 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8690
8691 display_power_on = 1;
8692 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8693 gpio_free(GPIO_NT35582_RESET);
8694 gpio_free(GPIO_NT35582_BL_EN);
8695 regulator_disable(dragon_reg2);
8696 regulator_disable(dragon_reg);
8697 regulator_put(dragon_reg2);
8698 regulator_put(dragon_reg);
8699 display_power_on = 0;
8700 dragon_reg = NULL;
8701 dragon_reg2 = NULL;
8702 }
8703 }
8704#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008705 return;
8706
8707out4:
8708 gpio_free(GPIO_BACKLIGHT_EN);
8709out3:
8710 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8711out2:
8712 regulator_disable(display_reg);
8713out:
8714 regulator_put(display_reg);
8715 display_reg = NULL;
8716}
8717#undef _GET_REGULATOR
8718#endif
8719
8720static int mipi_dsi_panel_power(int on);
8721
8722#define LCDC_NUM_GPIO 28
8723#define LCDC_GPIO_START 0
8724
8725static void lcdc_samsung_panel_power(int on)
8726{
8727 int n, ret = 0;
8728
8729 display_common_power(on);
8730
8731 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8732 if (on) {
8733 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8734 if (unlikely(ret)) {
8735 pr_err("%s not able to get gpio\n", __func__);
8736 break;
8737 }
8738 } else
8739 gpio_free(LCDC_GPIO_START + n);
8740 }
8741
8742 if (ret) {
8743 for (n--; n >= 0; n--)
8744 gpio_free(LCDC_GPIO_START + n);
8745 }
8746
8747 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8748}
8749
8750#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8751#define _GET_REGULATOR(var, name) do { \
8752 var = regulator_get(NULL, name); \
8753 if (IS_ERR(var)) { \
8754 pr_err("'%s' regulator not found, rc=%ld\n", \
8755 name, IS_ERR(var)); \
8756 var = NULL; \
8757 return -ENODEV; \
8758 } \
8759} while (0)
8760
8761static int hdmi_enable_5v(int on)
8762{
8763 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8764 static struct regulator *reg_8901_mpp0; /* External 5V */
8765 static int prev_on;
8766 int rc;
8767
8768 if (on == prev_on)
8769 return 0;
8770
8771 if (!reg_8901_hdmi_mvs)
8772 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8773 if (!reg_8901_mpp0)
8774 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8775
8776 if (on) {
8777 rc = regulator_enable(reg_8901_mpp0);
8778 if (rc) {
8779 pr_err("'%s' regulator enable failed, rc=%d\n",
8780 "reg_8901_mpp0", rc);
8781 return rc;
8782 }
8783 rc = regulator_enable(reg_8901_hdmi_mvs);
8784 if (rc) {
8785 pr_err("'%s' regulator enable failed, rc=%d\n",
8786 "8901_hdmi_mvs", rc);
8787 return rc;
8788 }
8789 pr_info("%s(on): success\n", __func__);
8790 } else {
8791 rc = regulator_disable(reg_8901_hdmi_mvs);
8792 if (rc)
8793 pr_warning("'%s' regulator disable failed, rc=%d\n",
8794 "8901_hdmi_mvs", rc);
8795 rc = regulator_disable(reg_8901_mpp0);
8796 if (rc)
8797 pr_warning("'%s' regulator disable failed, rc=%d\n",
8798 "reg_8901_mpp0", rc);
8799 pr_info("%s(off): success\n", __func__);
8800 }
8801
8802 prev_on = on;
8803
8804 return 0;
8805}
8806
8807static int hdmi_core_power(int on, int show)
8808{
8809 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8810 static int prev_on;
8811 int rc;
8812
8813 if (on == prev_on)
8814 return 0;
8815
8816 if (!reg_8058_l16)
8817 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8818
8819 if (on) {
8820 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8821 if (!rc)
8822 rc = regulator_enable(reg_8058_l16);
8823 if (rc) {
8824 pr_err("'%s' regulator enable failed, rc=%d\n",
8825 "8058_l16", rc);
8826 return rc;
8827 }
8828 rc = gpio_request(170, "HDMI_DDC_CLK");
8829 if (rc) {
8830 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8831 "HDMI_DDC_CLK", 170, rc);
8832 goto error1;
8833 }
8834 rc = gpio_request(171, "HDMI_DDC_DATA");
8835 if (rc) {
8836 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8837 "HDMI_DDC_DATA", 171, rc);
8838 goto error2;
8839 }
8840 rc = gpio_request(172, "HDMI_HPD");
8841 if (rc) {
8842 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8843 "HDMI_HPD", 172, rc);
8844 goto error3;
8845 }
8846 pr_info("%s(on): success\n", __func__);
8847 } else {
8848 gpio_free(170);
8849 gpio_free(171);
8850 gpio_free(172);
8851 rc = regulator_disable(reg_8058_l16);
8852 if (rc)
8853 pr_warning("'%s' regulator disable failed, rc=%d\n",
8854 "8058_l16", rc);
8855 pr_info("%s(off): success\n", __func__);
8856 }
8857
8858 prev_on = on;
8859
8860 return 0;
8861
8862error3:
8863 gpio_free(171);
8864error2:
8865 gpio_free(170);
8866error1:
8867 regulator_disable(reg_8058_l16);
8868 return rc;
8869}
8870
8871static int hdmi_cec_power(int on)
8872{
8873 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8874 static int prev_on;
8875 int rc;
8876
8877 if (on == prev_on)
8878 return 0;
8879
8880 if (!reg_8901_l3)
8881 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8882
8883 if (on) {
8884 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8885 if (!rc)
8886 rc = regulator_enable(reg_8901_l3);
8887 if (rc) {
8888 pr_err("'%s' regulator enable failed, rc=%d\n",
8889 "8901_l3", rc);
8890 return rc;
8891 }
8892 rc = gpio_request(169, "HDMI_CEC_VAR");
8893 if (rc) {
8894 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8895 "HDMI_CEC_VAR", 169, rc);
8896 goto error;
8897 }
8898 pr_info("%s(on): success\n", __func__);
8899 } else {
8900 gpio_free(169);
8901 rc = regulator_disable(reg_8901_l3);
8902 if (rc)
8903 pr_warning("'%s' regulator disable failed, rc=%d\n",
8904 "8901_l3", rc);
8905 pr_info("%s(off): success\n", __func__);
8906 }
8907
8908 prev_on = on;
8909
8910 return 0;
8911error:
8912 regulator_disable(reg_8901_l3);
8913 return rc;
8914}
8915
8916#undef _GET_REGULATOR
8917
8918#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8919
8920static int lcdc_panel_power(int on)
8921{
8922 int flag_on = !!on;
8923 static int lcdc_power_save_on;
8924
8925 if (lcdc_power_save_on == flag_on)
8926 return 0;
8927
8928 lcdc_power_save_on = flag_on;
8929
8930 lcdc_samsung_panel_power(on);
8931
8932 return 0;
8933}
8934
8935#ifdef CONFIG_MSM_BUS_SCALING
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008936static struct msm_bus_vectors mdp_init_vectors[] = {
8937 /* For now, 0th array entry is reserved.
8938 * Please leave 0 as is and don't use it
8939 */
8940 {
8941 .src = MSM_BUS_MASTER_MDP_PORT0,
8942 .dst = MSM_BUS_SLAVE_SMI,
8943 .ab = 0,
8944 .ib = 0,
8945 },
8946 /* Master and slaves can be from different fabrics */
8947 {
8948 .src = MSM_BUS_MASTER_MDP_PORT0,
8949 .dst = MSM_BUS_SLAVE_EBI_CH0,
8950 .ab = 0,
8951 .ib = 0,
8952 },
8953};
8954
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07008955#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
8956static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
8957 /* If HDMI is used as primary */
8958 {
8959 .src = MSM_BUS_MASTER_MDP_PORT0,
8960 .dst = MSM_BUS_SLAVE_SMI,
8961 .ab = 2000000000,
8962 .ib = 2000000000,
8963 },
8964 /* Master and slaves can be from different fabrics */
8965 {
8966 .src = MSM_BUS_MASTER_MDP_PORT0,
8967 .dst = MSM_BUS_SLAVE_EBI_CH0,
8968 .ab = 2000000000,
8969 .ib = 2000000000,
8970 },
8971};
8972
8973static struct msm_bus_paths mdp_bus_scale_usecases[] = {
8974 {
8975 ARRAY_SIZE(mdp_init_vectors),
8976 mdp_init_vectors,
8977 },
8978 {
8979 ARRAY_SIZE(hdmi_as_primary_vectors),
8980 hdmi_as_primary_vectors,
8981 },
8982 {
8983 ARRAY_SIZE(hdmi_as_primary_vectors),
8984 hdmi_as_primary_vectors,
8985 },
8986 {
8987 ARRAY_SIZE(hdmi_as_primary_vectors),
8988 hdmi_as_primary_vectors,
8989 },
8990 {
8991 ARRAY_SIZE(hdmi_as_primary_vectors),
8992 hdmi_as_primary_vectors,
8993 },
8994 {
8995 ARRAY_SIZE(hdmi_as_primary_vectors),
8996 hdmi_as_primary_vectors,
8997 },
8998};
8999#else
9000#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009001static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9002 /* Default case static display/UI/2d/3d if FB SMI */
9003 {
9004 .src = MSM_BUS_MASTER_MDP_PORT0,
9005 .dst = MSM_BUS_SLAVE_SMI,
9006 .ab = 388800000,
9007 .ib = 486000000,
9008 },
9009 /* Master and slaves can be from different fabrics */
9010 {
9011 .src = MSM_BUS_MASTER_MDP_PORT0,
9012 .dst = MSM_BUS_SLAVE_EBI_CH0,
9013 .ab = 0,
9014 .ib = 0,
9015 },
9016};
9017
9018static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9019 /* Default case static display/UI/2d/3d if FB SMI */
9020 {
9021 .src = MSM_BUS_MASTER_MDP_PORT0,
9022 .dst = MSM_BUS_SLAVE_SMI,
9023 .ab = 0,
9024 .ib = 0,
9025 },
9026 /* Master and slaves can be from different fabrics */
9027 {
9028 .src = MSM_BUS_MASTER_MDP_PORT0,
9029 .dst = MSM_BUS_SLAVE_EBI_CH0,
9030 .ab = 388800000,
9031 .ib = 486000000 * 2,
9032 },
9033};
9034static struct msm_bus_vectors mdp_vga_vectors[] = {
9035 /* VGA and less video */
9036 {
9037 .src = MSM_BUS_MASTER_MDP_PORT0,
9038 .dst = MSM_BUS_SLAVE_SMI,
9039 .ab = 458092800,
9040 .ib = 572616000,
9041 },
9042 {
9043 .src = MSM_BUS_MASTER_MDP_PORT0,
9044 .dst = MSM_BUS_SLAVE_EBI_CH0,
9045 .ab = 458092800,
9046 .ib = 572616000 * 2,
9047 },
9048};
9049static struct msm_bus_vectors mdp_720p_vectors[] = {
9050 /* 720p and less video */
9051 {
9052 .src = MSM_BUS_MASTER_MDP_PORT0,
9053 .dst = MSM_BUS_SLAVE_SMI,
9054 .ab = 471744000,
9055 .ib = 589680000,
9056 },
9057 /* Master and slaves can be from different fabrics */
9058 {
9059 .src = MSM_BUS_MASTER_MDP_PORT0,
9060 .dst = MSM_BUS_SLAVE_EBI_CH0,
9061 .ab = 471744000,
9062 .ib = 589680000 * 2,
9063 },
9064};
9065
9066static struct msm_bus_vectors mdp_1080p_vectors[] = {
9067 /* 1080p and less video */
9068 {
9069 .src = MSM_BUS_MASTER_MDP_PORT0,
9070 .dst = MSM_BUS_SLAVE_SMI,
9071 .ab = 575424000,
9072 .ib = 719280000,
9073 },
9074 /* Master and slaves can be from different fabrics */
9075 {
9076 .src = MSM_BUS_MASTER_MDP_PORT0,
9077 .dst = MSM_BUS_SLAVE_EBI_CH0,
9078 .ab = 575424000,
9079 .ib = 719280000 * 2,
9080 },
9081};
9082
9083#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009084static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9085 /* Default case static display/UI/2d/3d if FB SMI */
9086 {
9087 .src = MSM_BUS_MASTER_MDP_PORT0,
9088 .dst = MSM_BUS_SLAVE_SMI,
9089 .ab = 175110000,
9090 .ib = 218887500,
9091 },
9092 /* Master and slaves can be from different fabrics */
9093 {
9094 .src = MSM_BUS_MASTER_MDP_PORT0,
9095 .dst = MSM_BUS_SLAVE_EBI_CH0,
9096 .ab = 0,
9097 .ib = 0,
9098 },
9099};
9100
9101static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9102 /* Default case static display/UI/2d/3d if FB SMI */
9103 {
9104 .src = MSM_BUS_MASTER_MDP_PORT0,
9105 .dst = MSM_BUS_SLAVE_SMI,
9106 .ab = 0,
9107 .ib = 0,
9108 },
9109 /* Master and slaves can be from different fabrics */
9110 {
9111 .src = MSM_BUS_MASTER_MDP_PORT0,
9112 .dst = MSM_BUS_SLAVE_EBI_CH0,
9113 .ab = 216000000,
9114 .ib = 270000000 * 2,
9115 },
9116};
9117static struct msm_bus_vectors mdp_vga_vectors[] = {
9118 /* VGA and less video */
9119 {
9120 .src = MSM_BUS_MASTER_MDP_PORT0,
9121 .dst = MSM_BUS_SLAVE_SMI,
9122 .ab = 216000000,
9123 .ib = 270000000,
9124 },
9125 {
9126 .src = MSM_BUS_MASTER_MDP_PORT0,
9127 .dst = MSM_BUS_SLAVE_EBI_CH0,
9128 .ab = 216000000,
9129 .ib = 270000000 * 2,
9130 },
9131};
9132
9133static struct msm_bus_vectors mdp_720p_vectors[] = {
9134 /* 720p and less video */
9135 {
9136 .src = MSM_BUS_MASTER_MDP_PORT0,
9137 .dst = MSM_BUS_SLAVE_SMI,
9138 .ab = 230400000,
9139 .ib = 288000000,
9140 },
9141 /* Master and slaves can be from different fabrics */
9142 {
9143 .src = MSM_BUS_MASTER_MDP_PORT0,
9144 .dst = MSM_BUS_SLAVE_EBI_CH0,
9145 .ab = 230400000,
9146 .ib = 288000000 * 2,
9147 },
9148};
9149
9150static struct msm_bus_vectors mdp_1080p_vectors[] = {
9151 /* 1080p and less video */
9152 {
9153 .src = MSM_BUS_MASTER_MDP_PORT0,
9154 .dst = MSM_BUS_SLAVE_SMI,
9155 .ab = 334080000,
9156 .ib = 417600000,
9157 },
9158 /* Master and slaves can be from different fabrics */
9159 {
9160 .src = MSM_BUS_MASTER_MDP_PORT0,
9161 .dst = MSM_BUS_SLAVE_EBI_CH0,
9162 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009163 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009164 },
9165};
9166
9167#endif
9168static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9169 {
9170 ARRAY_SIZE(mdp_init_vectors),
9171 mdp_init_vectors,
9172 },
9173 {
9174 ARRAY_SIZE(mdp_sd_smi_vectors),
9175 mdp_sd_smi_vectors,
9176 },
9177 {
9178 ARRAY_SIZE(mdp_sd_ebi_vectors),
9179 mdp_sd_ebi_vectors,
9180 },
9181 {
9182 ARRAY_SIZE(mdp_vga_vectors),
9183 mdp_vga_vectors,
9184 },
9185 {
9186 ARRAY_SIZE(mdp_720p_vectors),
9187 mdp_720p_vectors,
9188 },
9189 {
9190 ARRAY_SIZE(mdp_1080p_vectors),
9191 mdp_1080p_vectors,
9192 },
9193};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009194#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009195static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9196 mdp_bus_scale_usecases,
9197 ARRAY_SIZE(mdp_bus_scale_usecases),
9198 .name = "mdp",
9199};
9200
9201#endif
9202#ifdef CONFIG_MSM_BUS_SCALING
9203static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9204 /* For now, 0th array entry is reserved.
9205 * Please leave 0 as is and don't use it
9206 */
9207 {
9208 .src = MSM_BUS_MASTER_MDP_PORT0,
9209 .dst = MSM_BUS_SLAVE_SMI,
9210 .ab = 0,
9211 .ib = 0,
9212 },
9213 /* Master and slaves can be from different fabrics */
9214 {
9215 .src = MSM_BUS_MASTER_MDP_PORT0,
9216 .dst = MSM_BUS_SLAVE_EBI_CH0,
9217 .ab = 0,
9218 .ib = 0,
9219 },
9220};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009221#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9222static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9223 /* For now, 0th array entry is reserved.
9224 * Please leave 0 as is and don't use it
9225 */
9226 {
9227 .src = MSM_BUS_MASTER_MDP_PORT0,
9228 .dst = MSM_BUS_SLAVE_SMI,
9229 .ab = 2000000000,
9230 .ib = 2000000000,
9231 },
9232 /* Master and slaves can be from different fabrics */
9233 {
9234 .src = MSM_BUS_MASTER_MDP_PORT0,
9235 .dst = MSM_BUS_SLAVE_EBI_CH0,
9236 .ab = 2000000000,
9237 .ib = 2000000000,
9238 },
9239};
9240#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009241static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9242 /* For now, 0th array entry is reserved.
9243 * Please leave 0 as is and don't use it
9244 */
9245 {
9246 .src = MSM_BUS_MASTER_MDP_PORT0,
9247 .dst = MSM_BUS_SLAVE_SMI,
9248 .ab = 566092800,
9249 .ib = 707616000,
9250 },
9251 /* Master and slaves can be from different fabrics */
9252 {
9253 .src = MSM_BUS_MASTER_MDP_PORT0,
9254 .dst = MSM_BUS_SLAVE_EBI_CH0,
9255 .ab = 566092800,
9256 .ib = 707616000,
9257 },
9258};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009259#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009260static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9261 {
9262 ARRAY_SIZE(dtv_bus_init_vectors),
9263 dtv_bus_init_vectors,
9264 },
9265 {
9266 ARRAY_SIZE(dtv_bus_def_vectors),
9267 dtv_bus_def_vectors,
9268 },
9269};
9270static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9271 dtv_bus_scale_usecases,
9272 ARRAY_SIZE(dtv_bus_scale_usecases),
9273 .name = "dtv",
9274};
9275
9276static struct lcdc_platform_data dtv_pdata = {
9277 .bus_scale_table = &dtv_bus_scale_pdata,
9278};
9279#endif
9280
9281
9282static struct lcdc_platform_data lcdc_pdata = {
9283 .lcdc_power_save = lcdc_panel_power,
9284};
9285
9286
9287#define MDP_VSYNC_GPIO 28
9288
9289/*
9290 * MIPI_DSI only use 8058_LDO0 which need always on
9291 * therefore it need to be put at low power mode if
9292 * it was not used instead of turn it off.
9293 */
9294static int mipi_dsi_panel_power(int on)
9295{
9296 int flag_on = !!on;
9297 static int mipi_dsi_power_save_on;
9298 static struct regulator *ldo0;
9299 int rc = 0;
9300
9301 if (mipi_dsi_power_save_on == flag_on)
9302 return 0;
9303
9304 mipi_dsi_power_save_on = flag_on;
9305
9306 if (ldo0 == NULL) { /* init */
9307 ldo0 = regulator_get(NULL, "8058_l0");
9308 if (IS_ERR(ldo0)) {
9309 pr_debug("%s: LDO0 failed\n", __func__);
9310 rc = PTR_ERR(ldo0);
9311 return rc;
9312 }
9313
9314 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9315 if (rc)
9316 goto out;
9317
9318 rc = regulator_enable(ldo0);
9319 if (rc)
9320 goto out;
9321 }
9322
9323 if (on) {
9324 /* set ldo0 to HPM */
9325 rc = regulator_set_optimum_mode(ldo0, 100000);
9326 if (rc < 0)
9327 goto out;
9328 } else {
9329 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309330 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009331 if (rc < 0)
9332 goto out;
9333 }
9334
9335 return 0;
9336out:
9337 regulator_disable(ldo0);
9338 regulator_put(ldo0);
9339 ldo0 = NULL;
9340 return rc;
9341}
9342
9343static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9344 .vsync_gpio = MDP_VSYNC_GPIO,
9345 .dsi_power_save = mipi_dsi_panel_power,
9346};
9347
9348#ifdef CONFIG_FB_MSM_TVOUT
9349static struct regulator *reg_8058_l13;
9350
9351static int atv_dac_power(int on)
9352{
9353 int rc = 0;
9354 #define _GET_REGULATOR(var, name) do { \
9355 var = regulator_get(NULL, name); \
9356 if (IS_ERR(var)) { \
9357 pr_info("'%s' regulator not found, rc=%ld\n", \
9358 name, IS_ERR(var)); \
9359 var = NULL; \
9360 return -ENODEV; \
9361 } \
9362 } while (0)
9363
9364 if (!reg_8058_l13)
9365 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9366 #undef _GET_REGULATOR
9367
9368 if (on) {
9369 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9370 if (rc) {
9371 pr_info("%s: '%s' regulator set voltage failed,\
9372 rc=%d\n", __func__, "8058_l13", rc);
9373 return rc;
9374 }
9375
9376 rc = regulator_enable(reg_8058_l13);
9377 if (rc) {
9378 pr_err("%s: '%s' regulator enable failed,\
9379 rc=%d\n", __func__, "8058_l13", rc);
9380 return rc;
9381 }
9382 } else {
9383 rc = regulator_force_disable(reg_8058_l13);
9384 if (rc)
9385 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9386 __func__, "8058_l13", rc);
9387 }
9388 return rc;
9389
9390}
9391#endif
9392
9393#ifdef CONFIG_FB_MSM_MIPI_DSI
9394int mdp_core_clk_rate_table[] = {
9395 85330000,
9396 85330000,
9397 160000000,
9398 200000000,
9399};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009400#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9401int mdp_core_clk_rate_table[] = {
9402 200000000,
9403 200000000,
9404 200000000,
9405 200000000,
9406};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009407#else
9408int mdp_core_clk_rate_table[] = {
9409 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009410 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009411 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009412 200000000,
9413};
9414#endif
9415
9416static struct msm_panel_common_pdata mdp_pdata = {
9417 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009418#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9419 .mdp_core_clk_rate = 200000000,
9420#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009421 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009422#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009423 .mdp_core_clk_table = mdp_core_clk_rate_table,
9424 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9425#ifdef CONFIG_MSM_BUS_SCALING
9426 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9427#endif
9428 .mdp_rev = MDP_REV_41,
Huaibin Yanga5419422011-12-08 23:52:10 -08009429 .mdp_writeback_memtype = MEMTYPE_EBI1,
9430 .mdp_writeback_phys = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009431};
9432
Huaibin Yanga5419422011-12-08 23:52:10 -08009433static void __init reserve_mdp_memory(void)
9434{
9435 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9436 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9437
9438 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9439 mdp_pdata.mdp_writeback_size_ov0;
9440 msm8x60_reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
9441 mdp_pdata.mdp_writeback_size_ov1;
9442}
9443
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009444#ifdef CONFIG_FB_MSM_TVOUT
9445
9446#ifdef CONFIG_MSM_BUS_SCALING
9447static struct msm_bus_vectors atv_bus_init_vectors[] = {
9448 /* For now, 0th array entry is reserved.
9449 * Please leave 0 as is and don't use it
9450 */
9451 {
9452 .src = MSM_BUS_MASTER_MDP_PORT0,
9453 .dst = MSM_BUS_SLAVE_SMI,
9454 .ab = 0,
9455 .ib = 0,
9456 },
9457 /* Master and slaves can be from different fabrics */
9458 {
9459 .src = MSM_BUS_MASTER_MDP_PORT0,
9460 .dst = MSM_BUS_SLAVE_EBI_CH0,
9461 .ab = 0,
9462 .ib = 0,
9463 },
9464};
9465static struct msm_bus_vectors atv_bus_def_vectors[] = {
9466 /* For now, 0th array entry is reserved.
9467 * Please leave 0 as is and don't use it
9468 */
9469 {
9470 .src = MSM_BUS_MASTER_MDP_PORT0,
9471 .dst = MSM_BUS_SLAVE_SMI,
9472 .ab = 236390400,
9473 .ib = 265939200,
9474 },
9475 /* Master and slaves can be from different fabrics */
9476 {
9477 .src = MSM_BUS_MASTER_MDP_PORT0,
9478 .dst = MSM_BUS_SLAVE_EBI_CH0,
9479 .ab = 236390400,
9480 .ib = 265939200,
9481 },
9482};
9483static struct msm_bus_paths atv_bus_scale_usecases[] = {
9484 {
9485 ARRAY_SIZE(atv_bus_init_vectors),
9486 atv_bus_init_vectors,
9487 },
9488 {
9489 ARRAY_SIZE(atv_bus_def_vectors),
9490 atv_bus_def_vectors,
9491 },
9492};
9493static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9494 atv_bus_scale_usecases,
9495 ARRAY_SIZE(atv_bus_scale_usecases),
9496 .name = "atv",
9497};
9498#endif
9499
9500static struct tvenc_platform_data atv_pdata = {
9501 .poll = 0,
9502 .pm_vid_en = atv_dac_power,
9503#ifdef CONFIG_MSM_BUS_SCALING
9504 .bus_scale_table = &atv_bus_scale_pdata,
9505#endif
9506};
9507#endif
9508
9509static void __init msm_fb_add_devices(void)
9510{
9511#ifdef CONFIG_FB_MSM_LCDC_DSUB
9512 mdp_pdata.mdp_core_clk_table = NULL;
9513 mdp_pdata.num_mdp_clk = 0;
9514 mdp_pdata.mdp_core_clk_rate = 200000000;
9515#endif
9516 if (machine_is_msm8x60_rumi3())
9517 msm_fb_register_device("mdp", NULL);
9518 else
9519 msm_fb_register_device("mdp", &mdp_pdata);
9520
9521 msm_fb_register_device("lcdc", &lcdc_pdata);
9522 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9523#ifdef CONFIG_MSM_BUS_SCALING
9524 msm_fb_register_device("dtv", &dtv_pdata);
9525#endif
9526#ifdef CONFIG_FB_MSM_TVOUT
9527 msm_fb_register_device("tvenc", &atv_pdata);
9528 msm_fb_register_device("tvout_device", NULL);
9529#endif
9530}
9531
9532#if (defined(CONFIG_MARIMBA_CORE)) && \
9533 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9534
9535static const struct {
9536 char *name;
9537 int vmin;
9538 int vmax;
9539} bt_regs_info[] = {
9540 { "8058_s3", 1800000, 1800000 },
9541 { "8058_s2", 1300000, 1300000 },
9542 { "8058_l8", 2900000, 3050000 },
9543};
9544
9545static struct {
9546 bool enabled;
9547} bt_regs_status[] = {
9548 { false },
9549 { false },
9550 { false },
9551};
9552static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9553
9554static int bahama_bt(int on)
9555{
9556 int rc;
9557 int i;
9558 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9559
9560 struct bahama_variant_register {
9561 const size_t size;
9562 const struct bahama_config_register *set;
9563 };
9564
9565 const struct bahama_config_register *p;
9566
9567 u8 version;
9568
9569 const struct bahama_config_register v10_bt_on[] = {
9570 { 0xE9, 0x00, 0xFF },
9571 { 0xF4, 0x80, 0xFF },
9572 { 0xE4, 0x00, 0xFF },
9573 { 0xE5, 0x00, 0x0F },
9574#ifdef CONFIG_WLAN
9575 { 0xE6, 0x38, 0x7F },
9576 { 0xE7, 0x06, 0xFF },
9577#endif
9578 { 0xE9, 0x21, 0xFF },
9579 { 0x01, 0x0C, 0x1F },
9580 { 0x01, 0x08, 0x1F },
9581 };
9582
9583 const struct bahama_config_register v20_bt_on_fm_off[] = {
9584 { 0x11, 0x0C, 0xFF },
9585 { 0x13, 0x01, 0xFF },
9586 { 0xF4, 0x80, 0xFF },
9587 { 0xF0, 0x00, 0xFF },
9588 { 0xE9, 0x00, 0xFF },
9589#ifdef CONFIG_WLAN
9590 { 0x81, 0x00, 0x7F },
9591 { 0x82, 0x00, 0xFF },
9592 { 0xE6, 0x38, 0x7F },
9593 { 0xE7, 0x06, 0xFF },
9594#endif
9595 { 0xE9, 0x21, 0xFF },
9596 };
9597
9598 const struct bahama_config_register v20_bt_on_fm_on[] = {
9599 { 0x11, 0x0C, 0xFF },
9600 { 0x13, 0x01, 0xFF },
9601 { 0xF4, 0x86, 0xFF },
9602 { 0xF0, 0x06, 0xFF },
9603 { 0xE9, 0x00, 0xFF },
9604#ifdef CONFIG_WLAN
9605 { 0x81, 0x00, 0x7F },
9606 { 0x82, 0x00, 0xFF },
9607 { 0xE6, 0x38, 0x7F },
9608 { 0xE7, 0x06, 0xFF },
9609#endif
9610 { 0xE9, 0x21, 0xFF },
9611 };
9612
9613 const struct bahama_config_register v10_bt_off[] = {
9614 { 0xE9, 0x00, 0xFF },
9615 };
9616
9617 const struct bahama_config_register v20_bt_off_fm_off[] = {
9618 { 0xF4, 0x84, 0xFF },
9619 { 0xF0, 0x04, 0xFF },
9620 { 0xE9, 0x00, 0xFF }
9621 };
9622
9623 const struct bahama_config_register v20_bt_off_fm_on[] = {
9624 { 0xF4, 0x86, 0xFF },
9625 { 0xF0, 0x06, 0xFF },
9626 { 0xE9, 0x00, 0xFF }
9627 };
9628 const struct bahama_variant_register bt_bahama[2][3] = {
9629 {
9630 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9631 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9632 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9633 },
9634 {
9635 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9636 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9637 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9638 }
9639 };
9640
9641 u8 offset = 0; /* index into bahama configs */
9642
9643 on = on ? 1 : 0;
9644 version = read_bahama_ver();
9645
9646 if (version == VER_UNSUPPORTED) {
9647 dev_err(&msm_bt_power_device.dev,
9648 "%s: unsupported version\n",
9649 __func__);
9650 return -EIO;
9651 }
9652
9653 if (version == VER_2_0) {
9654 if (marimba_get_fm_status(&config))
9655 offset = 0x01;
9656 }
9657
9658 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9659 if (on && (version == VER_2_0)) {
9660 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9661 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9662 && (bt_regs_status[i].enabled == true)) {
9663 if (regulator_disable(bt_regs[i])) {
9664 dev_err(&msm_bt_power_device.dev,
9665 "%s: regulator disable failed",
9666 __func__);
9667 }
9668 bt_regs_status[i].enabled = false;
9669 break;
9670 }
9671 }
9672 }
9673
9674 p = bt_bahama[on][version + offset].set;
9675
9676 dev_info(&msm_bt_power_device.dev,
9677 "%s: found version %d\n", __func__, version);
9678
9679 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9680 u8 value = (p+i)->value;
9681 rc = marimba_write_bit_mask(&config,
9682 (p+i)->reg,
9683 &value,
9684 sizeof((p+i)->value),
9685 (p+i)->mask);
9686 if (rc < 0) {
9687 dev_err(&msm_bt_power_device.dev,
9688 "%s: reg %d write failed: %d\n",
9689 __func__, (p+i)->reg, rc);
9690 return rc;
9691 }
9692 dev_dbg(&msm_bt_power_device.dev,
9693 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9694 __func__, (p+i)->reg,
9695 value, (p+i)->mask);
9696 }
9697 /* Update BT Status */
9698 if (on)
9699 marimba_set_bt_status(&config, true);
9700 else
9701 marimba_set_bt_status(&config, false);
9702
9703 return 0;
9704}
9705
9706static int bluetooth_use_regulators(int on)
9707{
9708 int i, recover = -1, rc = 0;
9709
9710 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9711 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9712 bt_regs_info[i].name) :
9713 (regulator_put(bt_regs[i]), NULL);
9714 if (IS_ERR(bt_regs[i])) {
9715 rc = PTR_ERR(bt_regs[i]);
9716 dev_err(&msm_bt_power_device.dev,
9717 "regulator %s get failed (%d)\n",
9718 bt_regs_info[i].name, rc);
9719 recover = i - 1;
9720 bt_regs[i] = NULL;
9721 break;
9722 }
9723
9724 if (!on)
9725 continue;
9726
9727 rc = regulator_set_voltage(bt_regs[i],
9728 bt_regs_info[i].vmin,
9729 bt_regs_info[i].vmax);
9730 if (rc < 0) {
9731 dev_err(&msm_bt_power_device.dev,
9732 "regulator %s voltage set (%d)\n",
9733 bt_regs_info[i].name, rc);
9734 recover = i;
9735 break;
9736 }
9737 }
9738
9739 if (on && (recover > -1))
9740 for (i = recover; i >= 0; i--) {
9741 regulator_put(bt_regs[i]);
9742 bt_regs[i] = NULL;
9743 }
9744
9745 return rc;
9746}
9747
9748static int bluetooth_switch_regulators(int on)
9749{
9750 int i, rc = 0;
9751
9752 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9753 if (on && (bt_regs_status[i].enabled == false)) {
9754 rc = regulator_enable(bt_regs[i]);
9755 if (rc < 0) {
9756 dev_err(&msm_bt_power_device.dev,
9757 "regulator %s %s failed (%d)\n",
9758 bt_regs_info[i].name,
9759 "enable", rc);
9760 if (i > 0) {
9761 while (--i) {
9762 regulator_disable(bt_regs[i]);
9763 bt_regs_status[i].enabled
9764 = false;
9765 }
9766 break;
9767 }
9768 }
9769 bt_regs_status[i].enabled = true;
9770 } else if (!on && (bt_regs_status[i].enabled == true)) {
9771 rc = regulator_disable(bt_regs[i]);
9772 if (rc < 0) {
9773 dev_err(&msm_bt_power_device.dev,
9774 "regulator %s %s failed (%d)\n",
9775 bt_regs_info[i].name,
9776 "disable", rc);
9777 break;
9778 }
9779 bt_regs_status[i].enabled = false;
9780 }
9781 }
9782 return rc;
9783}
9784
9785static struct msm_xo_voter *bt_clock;
9786
9787static int bluetooth_power(int on)
9788{
9789 int rc = 0;
9790 int id;
9791
9792 /* In case probe function fails, cur_connv_type would be -1 */
9793 id = adie_get_detected_connectivity_type();
9794 if (id != BAHAMA_ID) {
9795 pr_err("%s: unexpected adie connectivity type: %d\n",
9796 __func__, id);
9797 return -ENODEV;
9798 }
9799
9800 if (on) {
9801
9802 rc = bluetooth_use_regulators(1);
9803 if (rc < 0)
9804 goto out;
9805
9806 rc = bluetooth_switch_regulators(1);
9807
9808 if (rc < 0)
9809 goto fail_put;
9810
9811 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9812
9813 if (IS_ERR(bt_clock)) {
9814 pr_err("Couldn't get TCXO_D0 voter\n");
9815 goto fail_switch;
9816 }
9817
9818 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9819
9820 if (rc < 0) {
9821 pr_err("Failed to vote for TCXO_DO ON\n");
9822 goto fail_vote;
9823 }
9824
9825 rc = bahama_bt(1);
9826
9827 if (rc < 0)
9828 goto fail_clock;
9829
9830 msleep(10);
9831
9832 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9833
9834 if (rc < 0) {
9835 pr_err("Failed to vote for TCXO_DO pin control\n");
9836 goto fail_vote;
9837 }
9838 } else {
9839 /* check for initial RFKILL block (power off) */
9840 /* some RFKILL versions/configurations rfkill_register */
9841 /* calls here for an initial set_block */
9842 /* avoid calling i2c and regulator before unblock (on) */
9843 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9844 dev_info(&msm_bt_power_device.dev,
9845 "%s: initialized OFF/blocked\n", __func__);
9846 goto out;
9847 }
9848
9849 bahama_bt(0);
9850
9851fail_clock:
9852 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9853fail_vote:
9854 msm_xo_put(bt_clock);
9855fail_switch:
9856 bluetooth_switch_regulators(0);
9857fail_put:
9858 bluetooth_use_regulators(0);
9859 }
9860
9861out:
9862 if (rc < 0)
9863 on = 0;
9864 dev_info(&msm_bt_power_device.dev,
9865 "Bluetooth power switch: state %d result %d\n", on, rc);
9866
9867 return rc;
9868}
9869
9870#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9871
9872static void __init msm8x60_cfg_smsc911x(void)
9873{
9874 smsc911x_resources[1].start =
9875 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9876 smsc911x_resources[1].end =
9877 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
9878}
9879
9880#ifdef CONFIG_MSM_RPM
9881static struct msm_rpm_platform_data msm_rpm_data = {
9882 .reg_base_addrs = {
9883 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
9884 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
9885 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
9886 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
9887 },
9888
9889 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
9890 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
9891 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
9892 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
9893 .msm_apps_ipc_rpm_val = 4,
9894};
9895#endif
9896
Laura Abbott5d2d1e62011-08-10 16:27:35 -07009897void msm_fusion_setup_pinctrl(void)
9898{
9899 struct msm_xo_voter *a1;
9900
9901 if (socinfo_get_platform_subtype() == 0x3) {
9902 /*
9903 * Vote for the A1 clock to be in pin control mode before
9904 * the external images are loaded.
9905 */
9906 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
9907 BUG_ON(!a1);
9908 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
9909 }
9910}
9911
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009912struct msm_board_data {
9913 struct msm_gpiomux_configs *gpiomux_cfgs;
9914};
9915
9916static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
9917 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9918};
9919
9920static struct msm_board_data msm8x60_sim_board_data __initdata = {
9921 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9922};
9923
9924static struct msm_board_data msm8x60_surf_board_data __initdata = {
9925 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9926};
9927
9928static struct msm_board_data msm8x60_ffa_board_data __initdata = {
9929 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
9930};
9931
9932static struct msm_board_data msm8x60_fluid_board_data __initdata = {
9933 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
9934};
9935
9936static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
9937 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9938};
9939
9940static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
9941 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
9942};
9943
Zhang Chang Kenef05b172011-07-27 15:28:13 -04009944static struct msm_board_data msm8x60_dragon_board_data __initdata = {
9945 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
9946};
9947
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009948static void __init msm8x60_init(struct msm_board_data *board_data)
9949{
9950 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05309951#ifdef CONFIG_USB_EHCI_MSM_72K
9952 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
9953 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
9954 .level = PM8901_MPP_DIG_LEVEL_L5,
9955 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
9956 };
9957#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +05309958 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -07009959
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009960 /*
9961 * Initialize RPM first as other drivers and devices may need
9962 * it for their initialization.
9963 */
9964#ifdef CONFIG_MSM_RPM
9965 BUG_ON(msm_rpm_init(&msm_rpm_data));
9966#endif
9967 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
9968 ARRAY_SIZE(msm_rpmrs_levels)));
9969 if (msm_xo_init())
9970 pr_err("Failed to initialize XO votes\n");
9971
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009972 msm8x60_check_2d_hardware();
9973
9974 /* Change SPM handling of core 1 if PMM 8160 is present. */
9975 soc_platform_version = socinfo_get_platform_version();
9976 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
9977 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
9978 struct msm_spm_platform_data *spm_data;
9979
9980 spm_data = &msm_spm_data_v1[1];
9981 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9982 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9983
9984 spm_data = &msm_spm_data[1];
9985 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
9986 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
9987 }
9988
9989 /*
9990 * Initialize SPM before acpuclock as the latter calls into SPM
9991 * driver to set ACPU voltages.
9992 */
9993 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
9994 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
9995 else
9996 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
9997
9998 /*
9999 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10000 * devices so that the RPM doesn't drop into a low power mode that an
10001 * un-reworked SURF cannot resume from.
10002 */
10003 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010004 int i;
10005
10006 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10007 if (rpm_regulator_init_data[i].id
10008 == RPM_VREG_ID_PM8901_L4
10009 || rpm_regulator_init_data[i].id
10010 == RPM_VREG_ID_PM8901_L6)
10011 rpm_regulator_init_data[i]
10012 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010013 }
10014
10015 /*
10016 * Disable regulator info printing so that regulator registration
10017 * messages do not enter the kmsg log.
10018 */
10019 regulator_suppress_info_printing();
10020
10021 /* Initialize regulators needed for clock_init. */
10022 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10023
Stephen Boydbb600ae2011-08-02 20:11:40 -070010024 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010025
10026 /* Buses need to be initialized before early-device registration
10027 * to get the platform data for fabrics.
10028 */
10029 msm8x60_init_buses();
10030 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10031 /* CPU frequency control is not supported on simulated targets. */
10032 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010033 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010034
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010035 /*
10036 * Enable EBI2 only for boards which make use of it. Leave
10037 * it disabled for all others for additional power savings.
10038 */
10039 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10040 machine_is_msm8x60_rumi3() ||
10041 machine_is_msm8x60_sim() ||
10042 machine_is_msm8x60_fluid() ||
10043 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010044 msm8x60_init_ebi2();
10045 msm8x60_init_tlmm();
10046 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10047 msm8x60_init_uart12dm();
10048 msm8x60_init_mmc();
10049
10050#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10051 msm8x60_init_pm8058_othc();
10052#endif
10053
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010054 if (machine_is_msm8x60_fluid())
10055 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10056 else if (machine_is_msm8x60_dragon())
10057 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10058 else
10059 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010060
Jilai Wang53d27a82011-07-13 14:32:58 -040010061 /* Specify reset pin for OV9726 */
10062 if (machine_is_msm8x60_dragon()) {
10063 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10064 ov9726_sensor_8660_info.mount_angle = 270;
10065 }
10066
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010067#ifdef CONFIG_BATTERY_MSM8X60
10068 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10069 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10070 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10071 platform_device_register(&msm_charger_device);
10072#endif
10073
10074 if (machine_is_msm8x60_dragon())
10075 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10076 if (!machine_is_msm8x60_fluid())
10077 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10078
10079 /* configure pmic leds */
10080 if (machine_is_msm8x60_fluid())
10081 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10082 else if (machine_is_msm8x60_dragon())
10083 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10084 else
10085 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10086
10087 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10088 machine_is_msm8x60_dragon()) {
10089 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10090 }
10091
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010092 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10093 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010094 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010095 msm8x60_cfg_smsc911x();
10096 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10097 platform_add_devices(msm_footswitch_devices,
10098 msm_num_footswitch_devices);
10099 platform_add_devices(surf_devices,
10100 ARRAY_SIZE(surf_devices));
10101
10102#ifdef CONFIG_MSM_DSPS
10103 if (machine_is_msm8x60_fluid()) {
10104 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10105 msm8x60_init_dsps();
10106 }
10107#endif
10108
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010109 pm8901_vreg_mpp0_init();
10110
10111 platform_device_register(&msm8x60_8901_mpp_vreg);
10112
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010113#ifdef CONFIG_USB_EHCI_MSM_72K
10114 /*
10115 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10116 * fluid
10117 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010118 if (machine_is_msm8x60_fluid())
10119 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10120 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010121#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010122
10123#ifdef CONFIG_SND_SOC_MSM8660_APQ
10124 if (machine_is_msm8x60_dragon())
10125 platform_add_devices(dragon_alsa_devices,
10126 ARRAY_SIZE(dragon_alsa_devices));
10127 else
10128#endif
10129 platform_add_devices(asoc_devices,
10130 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010131 } else {
10132 msm8x60_configure_smc91x();
10133 platform_add_devices(rumi_sim_devices,
10134 ARRAY_SIZE(rumi_sim_devices));
10135 }
10136#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010137 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10138 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010139 msm8x60_cfg_isp1763();
10140#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010141
10142 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10143 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10144
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010145
10146#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10147 if (machine_is_msm8x60_fluid())
10148 platform_device_register(&msm_gsbi10_qup_spi_device);
10149 else
10150 platform_device_register(&msm_gsbi1_qup_spi_device);
10151#endif
10152
10153#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10154 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10155 if (machine_is_msm8x60_fluid())
10156 cyttsp_set_params();
10157#endif
10158 if (!machine_is_msm8x60_sim())
10159 msm_fb_add_devices();
10160 fixup_i2c_configs();
10161 register_i2c_devices();
10162
Terence Hampson1c73fef2011-07-19 17:10:49 -040010163 if (machine_is_msm8x60_dragon())
10164 smsc911x_config.reset_gpio
10165 = GPIO_ETHERNET_RESET_N_DRAGON;
10166
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010167 platform_device_register(&smsc911x_device);
10168
10169#if (defined(CONFIG_SPI_QUP)) && \
10170 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010171 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10172 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010173
10174 if (machine_is_msm8x60_fluid()) {
10175#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10176 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10177 spi_register_board_info(lcdc_samsung_spi_board_info,
10178 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10179 } else
10180#endif
10181 {
10182#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10183 spi_register_board_info(lcdc_auo_spi_board_info,
10184 ARRAY_SIZE(lcdc_auo_spi_board_info));
10185#endif
10186 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010187#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10188 } else if (machine_is_msm8x60_dragon()) {
10189 spi_register_board_info(lcdc_nt35582_spi_board_info,
10190 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10191#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010192 }
10193#endif
10194
10195 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10196 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10197 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10198 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010199 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010200
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010201 pm8058_gpios_init();
10202
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010203#ifdef CONFIG_SENSORS_MSM_ADC
10204 if (machine_is_msm8x60_fluid()) {
10205 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10206 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10207 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10208 msm_adc_pdata.gpio_config = APROC_CONFIG;
10209 else
10210 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10211 }
10212 msm_adc_pdata.target_hw = MSM_8x60;
10213#endif
10214#ifdef CONFIG_MSM8X60_AUDIO
10215 msm_snddev_init();
10216#endif
10217#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10218 if (machine_is_msm8x60_fluid())
10219 platform_device_register(&fluid_leds_gpio);
10220 else
10221 platform_device_register(&gpio_leds);
10222#endif
10223
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010224 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010225
10226 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10227 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010228}
10229
10230static void __init msm8x60_rumi3_init(void)
10231{
10232 msm8x60_init(&msm8x60_rumi3_board_data);
10233}
10234
10235static void __init msm8x60_sim_init(void)
10236{
10237 msm8x60_init(&msm8x60_sim_board_data);
10238}
10239
10240static void __init msm8x60_surf_init(void)
10241{
10242 msm8x60_init(&msm8x60_surf_board_data);
10243}
10244
10245static void __init msm8x60_ffa_init(void)
10246{
10247 msm8x60_init(&msm8x60_ffa_board_data);
10248}
10249
10250static void __init msm8x60_fluid_init(void)
10251{
10252 msm8x60_init(&msm8x60_fluid_board_data);
10253}
10254
10255static void __init msm8x60_charm_surf_init(void)
10256{
10257 msm8x60_init(&msm8x60_charm_surf_board_data);
10258}
10259
10260static void __init msm8x60_charm_ffa_init(void)
10261{
10262 msm8x60_init(&msm8x60_charm_ffa_board_data);
10263}
10264
10265static void __init msm8x60_charm_init_early(void)
10266{
10267 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010268}
10269
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010270static void __init msm8x60_dragon_init(void)
10271{
10272 msm8x60_init(&msm8x60_dragon_board_data);
10273}
10274
Steve Mucklea55df6e2010-01-07 12:43:24 -080010275MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10276 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010277 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010278 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010279 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010280 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010281 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010282MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010283
10284MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10285 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010286 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010287 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010288 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010289 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010290 .init_early = msm8x60_charm_init_early,
10291MACHINE_END
10292
10293MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10294 .map_io = msm8x60_map_io,
10295 .reserve = msm8x60_reserve,
10296 .init_irq = msm8x60_init_irq,
10297 .init_machine = msm8x60_surf_init,
10298 .timer = &msm_timer,
10299 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010300MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010301
10302MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10303 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010304 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010305 .init_irq = msm8x60_init_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010306 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010307 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010308 .init_early = msm8x60_charm_init_early,
10309MACHINE_END
10310
10311MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10312 .map_io = msm8x60_map_io,
10313 .reserve = msm8x60_reserve,
10314 .init_irq = msm8x60_init_irq,
10315 .init_machine = msm8x60_fluid_init,
10316 .timer = &msm_timer,
10317 .init_early = msm8x60_charm_init_early,
10318MACHINE_END
10319
10320MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10321 .map_io = msm8x60_map_io,
10322 .reserve = msm8x60_reserve,
10323 .init_irq = msm8x60_init_irq,
10324 .init_machine = msm8x60_charm_surf_init,
10325 .timer = &msm_timer,
10326 .init_early = msm8x60_charm_init_early,
10327MACHINE_END
10328
10329MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10330 .map_io = msm8x60_map_io,
10331 .reserve = msm8x60_reserve,
10332 .init_irq = msm8x60_init_irq,
10333 .init_machine = msm8x60_charm_ffa_init,
10334 .timer = &msm_timer,
10335 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010336MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010337
10338MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10339 .map_io = msm8x60_map_io,
10340 .reserve = msm8x60_reserve,
10341 .init_irq = msm8x60_init_irq,
10342 .init_machine = msm8x60_dragon_init,
10343 .timer = &msm_timer,
10344 .init_early = msm8x60_charm_init_early,
10345MACHINE_END